JP2008306872A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device reduced in parasitic inductance during switching operation of a switching device, and also reduced in size and cost. <P>SOLUTION: In this semiconductor device which connects an IGBT11 connected in parallel with a FWD12 and an IGBT13 connected in parallel with a FWD14, in series between a positive electrode 1 and a negative electrode 2 to output power from a connection point between the two IGBTs11 and 13 to an output electrode 3, the positive electrode 1 and an output electrode 3 are placed adjacent to each other, the negative electrode 2 is placed on an upper side of the output electrode 3, external connection points in the positive electrode 1 and the negative electrode 2 are placed in parallel adjacently in the positions facing the external connection point of the output electrode 3, the IGBT11 and FWD12 are placed on the positive electrode 1, and the IGBT13 and the FWD14 are placed on the output electrode 3 located in the position sandwiching the IGBT11, the FWD 12 and the negative electrode 2. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device, and in particular, can be suitably applied to a semiconductor device constituting a switch circuit for a power conversion device such as an inverter device or a DC-DC converter device.

2. Description of the Related Art Conventionally, power conversion devices such as inverter devices and DC-DC converter devices include switches made of power semiconductor elements as described in Japanese Patent Application Laid-Open No. 2001-110985 “Semiconductor Device”. A circuit is used. As the configuration of the switch circuit, a first switching element in which a first reflux diode is connected in reverse parallel is connected between a positive electrode and a negative electrode for an input power source on the positive electrode side, and a second reflux is provided. An output electrode for connecting to the inductive load side from a connection point where the second switching element having the diode connected in reverse parallel is connected to the negative electrode side and the first switching element and the second switching element are connected in series Generally, it is configured to be provided.
JP 2001-110985 A

  However, in a semiconductor device applied to a conventional power converter, a semiconductor element connected to the positive electrode side (first switching element, first reflux diode) and a semiconductor element connected to the negative electrode side (second The switching position and the second return diode) are determined in consideration of the wiring length of the wires and the like when connected to the respective electrodes including the output electrode side by wire bonding or the like. However, since no consideration has been given to the current path at the time of switching of the switching element or the parasitic inductance due to the circulating magnetic flux generated by the change of the current path, it is difficult to reduce the parasitic inductance, and a large surge voltage is generated at the time of switching of the switching element. Switching loss increases, and the semiconductor device Type conductivity, there is a problem that it is difficult to reduce the cost.

  The present invention has been made to solve such a problem. The parasitic inductance during switching operation of the switching element is reduced, generation of a large surge voltage is suppressed, and the apparatus can be reduced in size and cost. An object of the present invention is to provide a semiconductor device.

  In order to solve the above-mentioned problems, the present invention arranges the positive electrode and the output electrode adjacent to each other, arranges the negative electrode at a position near the upper side of the output electrode, A first switching element connected to the positive electrode side; and a structure in which a connection portion to the outside of each negative electrode is disposed adjacent to and parallel to a position opposite to the connection portion to the outside of the output electrode The first return diode is disposed on the positive electrode, while the second switching element and the second return diode connected to the negative electrode are connected to the first switching element and the first return diode and the negative electrode. It arrange | positions on the output electrode which becomes an other side position on both sides of an electrode, It is characterized by the above-mentioned.

  According to the semiconductor device of the present invention, the following effects can be obtained.

  That is, in the semiconductor device of the present invention, the positive electrode and the output electrode are arranged adjacent to each other, the negative electrode is arranged at a position near the upper side of the output electrode, and each of the positive electrode and the negative electrode is arranged. The first switching element and the first reflux connected to the positive electrode side have a structure in which the connection portion to the outside is arranged in parallel and adjacent to the position on the opposite side facing the connection portion to the outside of the output electrode. The switching diode is disposed on the positive electrode, while the second switching element and the second return diode connected to the negative electrode are sandwiched between the first switching element and the first return diode and the negative electrode. Since it is arranged on the output electrode on the opposite side, the change in the current path that occurs in the semiconductor device during the switching operation of the first and second switching elements is reduced. It along with allowing, it is possible to the direction of the current flowing at the same time to place the current path in the opposite direction in the vicinity.

  Thus, it is possible to reduce the change of the circulating magnetic flux generated in the current path and to cancel the circulating magnetic fluxes against each other, thereby reducing the parasitic inductance contributing to the generation of the surge. Therefore, it is possible to obtain the effect of suppressing the generation of a large surge and reducing the switching loss, thereby making it possible to reduce the size and cost of the device.

  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor device according to the present invention are described in detail below with reference to the drawings.

  First, a semiconductor device according to the present invention constitutes a switch circuit suitably applied to a power conversion device such as a DC-DC converter device or an inverter device, and an example of the circuit configuration will be described with reference to FIG. To do.

  FIG. 5 shows an example of a circuit configuration in a case where a switch circuit for one phase in the inverter circuit is configured, taking as an example the case where the inverter device is applied as a power conversion device to which the semiconductor device of the present invention is applied.

  5, IGBTs (Insulated Gate Bipolar Transistors) 11 and 13 are used as switching elements, and PN junction type diodes are used as the free-wheeling diodes FWD 12 and 14. Shows about. However, the present invention is not limited to such a semiconductor element. For example, a MOSFET may be used as a switching element, and a PIN (P-Intrinsic-N) type diode may be used as a free-wheeling diode FWD. Etc. may be used.

  In the inverter circuit of FIG. 5, an IGBT 11 that is a first switching element and an IGBT 13 that is a second switching element are connected in series to a positive electrode 1 and a negative electrode 2 that are power sources on the input side. When a PWM signal is applied to the gate electrode of the IGBT 13 to perform an ON / OFF switching operation, an AC current for one phase is output to the output electrode 3 from the connection point between the IGBT 11 and the IGBT 13, for example, an inductive load ( AC power is supplied to (AC load).

  Here, each of the IGBT 11 serving as the first switching element and the IGBT 13 serving as the second switching element is supplied with power to the output electrode 3 to which the load is connected when the IGBT 11 and the IGBT 13 are switched ON / OFF. FWD12 that is a first reflux diode and FWD14 that is a second reflux diode for flowing a reflux current are connected in antiparallel to each other.

  In the inverter circuit of FIG. 5, at a certain timing, as indicated by the solid line arrow in FIG. 5A, the IGBT 11 connected to the positive electrode 1 side is turned on, and the motor connected to the output electrode 3. In the inductive load, the positive current was flowing from the positive electrode 1 through the IGBT 11, but at the next timing, the IGBT 11 was connected to the output electrode 3 when it was going to be switched off. The inductive load tries to keep current flowing.

  For this reason, the current path is changed to a current path that flows from the negative electrode 2 to the output electrode 3 via the reflux diode FWD 14 connected to the negative electrode 2, as indicated by the dashed arrow in FIG. Thus, a current flows through the FWD 14 on the negative electrode 2 side, and a negative current is supplied to the output electrode 3.

  The present invention is a semiconductor device having a circuit configuration as shown in FIG. 5 and includes IGBTs 11 and 13 as first and second switching elements and FWDs 12 and 14 as first and second reflux diodes. It is possible to reduce the parasitic inductance due to the circulating magnetic flux generated in the current path in the semiconductor device, suppress the generation of a large surge voltage, and reduce the switching loss.

  Here, when the IGBTs 11 and 13 as the first and second switching elements are switched from ON to OFF, for example, there are the following measures as a measure for reducing the parasitic inductance that contributes to the generation of the surge.

That is, currents flowing through the positive electrode 1, the negative electrode 2, and the output electrode 3 through the IGBTs 11 and 13 as the first and second switching elements and the FWDs 12 and 14 as the first and second reflux diodes. About the route
(1) For current paths that flow at the same timing, by disposing currents in opposite directions as close to each other as possible, the circulating magnetic fluxes generated in the current paths cancel each other, and the magnetic field is as much as possible. Measures to reduce the parasitic inductance caused by the circulating magnetic flux
(2) When the current path is changed by the switching operation of the IGBTs 11 and 13 that are the first and second switching elements, the current path before and after the switching operation is arranged as close as possible, so that the circulation generated in the current path Measures to reduce the parasitic inductance caused by the circulating magnetic flux by reducing the change of magnetic flux,
There are two measures:

  The semiconductor device of the present invention realizes a semiconductor device to which one or both of the above-mentioned two measures can be applied, and specific embodiments thereof will be described in detail below. .

  For example, when a three-phase AC inverter device is required as the power conversion device, three sets of the circuit shown in FIG. 5 are connected in parallel between the positive electrode 1 and the negative electrode 2, respectively. A three-phase AC motor is connected to the output electrodes of the two, and a three-phase AC current is generated by PWM control or the like. However, in the case of application to such a three-phase inverter device, not only the case where each of the three sets of switch circuits is realized as a separate semiconductor device, but also a plurality of switch circuits are summarized as will be described later as other embodiments. As the semiconductor device, for example, three sets of switch circuits can be integrated into one semiconductor device.

(First embodiment)
<Configuration>
FIG. 1 is a layout view showing a first embodiment relating to the configuration of a semiconductor device according to the present invention, and shows a plan view when viewed from above the semiconductor device.

  In the semiconductor device 10 of FIG. 1, the positive electrode 1, the negative electrode 2, and the output electrode 3 are configured using a bus bar made of copper or the like, and the positive electrode 1 and the output electrode 3 are adjacent to each other. The negative electrode 2 is arranged at a position near the upper side of the output electrode 3. The positive electrode 1, the negative electrode 2, and the output electrode 3 are integrally molded with a resin such as PPS (Polyphenylene Sulfide) to form a housing of the semiconductor device 10.

  The back electrode (collector electrode) of the IGBT 11 that is the first switching element on the positive electrode 1 side (the upper arm in the circuit diagram of FIG. 5) and the back electrode (cathode electrode) of the FWD 12 that is the first reflux diode are positive. On the electrode 1, the back surface electrode (collector electrode) of the IGBT 13 that is the second switching element on the negative electrode 2 side (the lower arm of the circuit diagram of FIG. 5) and the back surface of the FWD 14 that is the second reflux diode The electrode (cathode electrode) is soldered on the first switching element IGBT 11, the first reflux diode FWD 12, and the output electrode 3 on the opposite side across the negative electrode 2. To be directly connected and mounted.

  Further, the surface electrode (emitter electrode) of the IGBT 11 on the positive electrode 1 side and the surface electrode (anode electrode) of the FWD 12 are connected to the output electrode 3 by wire bonding or the like, respectively, and the surface electrode (IGBT 13) on the negative electrode 2 side ( The emitter electrode) and the surface electrode (anode electrode) of the FWD 14 are respectively connected to the negative electrode 2 by wire bonding or the like.

  Here, the first switching element IGBT 11 and the first reflux diode FWD 12 disposed on the positive electrode 1 are disposed in the vicinity of the side portion along the side portion adjacent to the output electrode 3, and the output electrode The second switching element IGBT 13 and the second free-wheeling diode FWD14 disposed on the third electrode 3 are positioned in the vicinity of the side portion of the side portion of the negative electrode 2 along the side portion opposite to the positive electrode 1. In addition, the first switching element IGBT11 and the first reflux diode FWD12 are arranged at positions on the output electrode 3 on the opposite side with the negative electrode 2 interposed therebetween. Thereby, the wiring length in wire bonding etc. can be shortened.

  Further, when the current path is changed by the switching operation of the IGBTs 11 and 13, by arranging the current paths before and after the switching operation as close as possible, the change of the circulating magnetic flux generated in the current path is further reduced, and the parasitic inductance is changed. In order to suppress the occurrence of a large surge voltage by further reducing the output voltage, the output electrode terminal 31 of the output electrode 3 (that is, the connection portion connected to the external connection terminal of the output electrode 3), as shown in FIG. Connection portions connected to the external connection terminals of the positive electrode 1 and the negative electrode 2 are arranged adjacent to each other in parallel at opposite positions.

  A structure in which a gel-like insulator such as silicone gel is injected around the semiconductor elements (IGBTs 11 and 13 and FWDs 12 and 14) in order to protect the semiconductor elements and bonding wires and to ensure creeping insulation. Has been.

  The semiconductor device 10 is also mounted when the lower surface portion of the semiconductor device 10 according to the present embodiment configured as a non-insulating semiconductor device in which input / output electrodes are not separated by a transformer or the like is fixed to a cooler or the like. Insulation is provided by interposing an insulating sheet or the like having an insulating property between the cooling device and the cooler.

<Operation>
Hereinafter, in the semiconductor device 10 shown in FIG. 1, the operation of the semiconductor device 10 when the IGBT 11 on the positive electrode 1 side is turned on and off will be described.

  When the IGBT 11 is turned on, a current flows as shown by a solid arrow A to the inductive load connected from the positive electrode 1 to the output electrode terminal 31 of the output electrode 3 through the IGBT 11. When the IGBT 11 is turned off from this state, the current flowing through the semiconductor device 10 is applied to the inductive load connected from the negative electrode 2 to the output electrode terminal 31 of the output electrode 3 via the FWD 14 as indicated by the broken line arrow B. Switch to a flowing state.

  At this time of switching, the current path of the current that flows to the negative electrode 2 via the FWD 14 is the current path that flows from the positive electrode 1 via the IGBT 11 and flows through the output electrode 3 when the IGBT 11 is ON, as shown in FIG. As described above, the current path changed by the switching operation is located in the vicinity, and the change in the circulating magnetic flux generated in the current path is reduced, and the parasitic inductance is reduced. By reducing, it is possible to obtain an effect that generation of a large surge voltage can be suppressed.

  Furthermore, the current that flows from the negative electrode 2 through the bonding wire to the front electrode (anode electrode) of the FWD 14 and the back electrode (cathode electrode) of the FWD 14 passes through the back surface of the negative electrode 2 to the output electrode terminal 31 side of the output electrode 3. Since the flowing current is close and parallel and flows in the opposite direction, as described above, current paths that flow at the same timing and whose current directions are opposite to each other must be arranged in the vicinity. Thus, it is possible to suppress the generation of a large surge voltage by canceling each other of the magnetic flux generated in the current path and suppressing the generation of the magnetic field and reducing the parasitic inductance. be able to.

  As described above, in the semiconductor device 10 shown in FIG. 1, the first switching element IGBT 11 in which the first reflux diode FWD 12 is connected in reverse parallel between the positive electrode 1 and the negative electrode 2, and the second A second switching element IGBT13 connected in reverse parallel to the return diode FWD14 is connected in series, and the output power after power conversion is connected to the load from the connection point of the two first and second switching elements IGBT11 and 13. For output to the output electrode 3 for use.

  Here, the positive electrode 1 and the output electrode 3 are disposed adjacent to each other, the negative electrode 2 is disposed at a position near the upper side of the output electrode 3, and each of the positive electrode 1 and the negative electrode 2 is disposed. The connection portion connected to the external connection terminal is arranged adjacent to the connection portion connected to the external connection terminal of the output electrode 3, that is, the position opposite to the output electrode terminal 31 in parallel.

  Further, the first switching element IGBT11 and the first reflux diode FWD12 connected to the positive electrode 1 side are arranged on the positive electrode 1, while the second switching element IGBT13 connected to the negative electrode 2 side and The second return diode FWD14 is configured to be disposed on the output electrode 3 on the opposite side of the first switching element IGBT11 and the first return diode FWD12 and the negative electrode 2.

  By adopting the electrode arrangement and the mounting configuration of the switching element as described above, the change in the current path in the semiconductor device 10 due to the switching operation of the first and second switching elements IGBTs 11 and 13 can be suppressed low, and Since the current paths having opposite directions of the current flowing at the same timing can be arranged in the vicinity, it is possible to reduce the change in the circulating magnetic flux generated in the current path and to cancel the circulating magnetic fluxes against each other. This makes it possible to reduce the parasitic inductance that contributes to the occurrence of surges. As a result, it suppresses the occurrence of large surges and reduces switching loss, thereby reducing the size and cost of the device. Can be obtained.

  Furthermore, as shown in FIG. 1, the second switching element IGBT 13 connected to the negative electrode 2 is disposed on the output electrode 3 at a symmetrical position with the first switching element IGBT 11 and the negative electrode 2 sandwiched therebetween. The second return diode FWD14 is disposed on the output electrode 3 at a symmetrical position with the first return diode FWD12 and the negative electrode 2 in between, thereby switching the first and second switching elements IGBT11 and 13. The change of the current path in the semiconductor device 10 due to the operation can be suppressed more reliably, and the parasitic inductance contributing to the generation of the surge can be more reliably reduced. As a result, the generation of a large surge is suppressed and switching is performed. To obtain an effect that the loss can be reduced and the device can be reduced in size and cost more reliably. It can be.

(Second Embodiment)
<Configuration>
FIG. 2 is a layout view showing a second embodiment relating to the configuration of the semiconductor device according to the present invention, and shows a plan view when viewed from above the semiconductor device.

  Also in the semiconductor device 10A of FIG. 2, the positive electrode 1, the negative electrode 2, and the output electrode 3 are configured using bus bars made of copper or the like, as in the case of the semiconductor device 10 of FIG. 1 in the first embodiment. In addition, the positive electrode 1 and the output electrode 3 are disposed adjacent to each other, and the negative electrode 2 is disposed at a position near the upper side of the output electrode 3. The positive electrode 1, the negative electrode 2, and the output electrode 3 are integrally molded with a resin such as PPS to form a housing of the semiconductor device 10A.

  In addition, around the semiconductor elements (IGBTs 11 and 13 and FWDs 12 and 14), as in the case of the first embodiment, in order to protect the semiconductor elements and bonding wires and to ensure creeping insulation, silicone gel or the like is used. It has a structure in which a gel-like insulator is injected.

  The semiconductor device 10A is also mounted when the lower surface portion of the semiconductor device 10A in the present embodiment configured as a non-insulated semiconductor device in which the input / output electrodes are not separated by a transformer or the like is fixed to a cooler or the like. Insulation is provided by interposing an insulating sheet or the like having an insulating property between the cooling device and the cooler.

  The semiconductor device 10A in FIG. 2 differs from the semiconductor device 10 in FIG. 1 in the first embodiment in that an IGBT 13 that is a second switching element on the negative electrode 2 side and an FWD 14 that is a second reflux diode are provided. The position to be disposed on the output electrode 3 is reversed, and a second reflux diode is provided at a symmetrical position on the opposite side of the IGBT 11 that is the first switching element on the positive electrode 1 side with respect to the negative electrode 2. The FWD 14 and the IGBT 13 which is the second switching element are mounted by soldering or the like at symmetrical positions on the opposite side of the FWD 12 which is the first reflux diode on the positive electrode 1 side. is there.

  As described above, the second reflux diode FWD14 on the negative electrode 2 side is provided at a symmetrical position on the opposite side of the IGBT 11 that is the first switching element on the positive electrode 1 side with respect to the negative electrode 2, and By arranging IGBTs 13 as second switching elements on the negative electrode 2 side at symmetrical positions on the opposite side of the FWD 12 that is the first reflux diode on the positive electrode 1 side, respectively, A wider range of current paths that change due to the switching operation of the first and second switching elements IGBTs 11 and 13 can be arranged at positions close to each other, which is more than in the case of the semiconductor device 10 of FIG. 1 in the first embodiment. The parasitic inductance can be further reduced.

<Operation>
In the semiconductor device 10A shown in FIG. 2, the operation of the semiconductor device 10A when the IGBT 11 on the positive electrode 1 side is turned ON / OFF is different from the operation of the semiconductor device 10 of FIG. 1 in the first embodiment. The explanation will be centered.

  In the case of the semiconductor device 10A in the present embodiment, the current path of the current flowing through the output electrode 3 is the output electrode terminal 31 of the output electrode 3 from the positive electrode 1 through the IGBT 11 as shown by the solid arrow C when the IGBT 11 is ON. When the IGBT 11 is turned off and when the IGBT 11 is OFF, as shown by the broken line arrow D, the inductive load connected to the output electrode terminal 31 of the output electrode 3 from the negative electrode 2 through the FWD 14 The current path on both the output electrodes 3 is almost the same except for the portion that flows from the back electrode (cathode electrode) of the FWD 14 through the back surface of the negative electrode 2 and flows to the output electrode 3 side. , The parasitic inductance is further reduced compared to the semiconductor device 10 of FIG. 1, and a large surge voltage is generated. It is possible to obtain an effect that it becomes possible to suppress the et.

  That is, the semiconductor device 10A in the present embodiment is different from the semiconductor device 10 in the first embodiment in the arrangement order of the first switching element IGBT11 and the first reflux diode FWD12 on the positive electrode 1 side and the negative electrode 2. The second switching element IGBT13 connected to the negative electrode 2 is replaced with the first freewheeling diode FWD12 by reversing the relationship with the arrangement order of the second switching element IGBT13 and the second freewheeling diode FWD14 on the side. The second return diode FWD14 is disposed on the output electrode 3 at a symmetrical position with the first switching element IGBT11 and the negative electrode 2 in between. Like to do.

  As a result, the change in the current path in the semiconductor device 10 due to the switching operation of the first and second switching elements IGBTs 11 and 13 can be suppressed to a smaller range, and the parasitic inductance that contributes to the occurrence of surge is further reduced. As a result, it is possible to suppress the occurrence of a large surge and reduce the switching loss more reliably, thereby obtaining the effect that the device can be more reliably reduced in size and cost. Can do.

(Third embodiment)
<Configuration>
FIG. 3 is a layout view showing a third embodiment relating to the configuration of the semiconductor device according to the present invention. FIG. 3A is a plan view when viewed from the upper side of the semiconductor device, and FIG. ) Shows a side view when viewed from the side of the semiconductor device.

  Also in the semiconductor device 10B of FIG. 3, as in the case of the semiconductor devices 10 and 10A of FIGS. 1 and 2 of the first and second embodiments, the positive electrode 1, the negative electrode 2, and the output electrode 3 are made of copper. The positive electrode 1 and the output electrode 3 are arranged adjacent to each other, and the negative electrode 2 is arranged at a position near the upper side of the output electrode 3. The positive electrode 1, the negative electrode 2, and the output electrode 3 are integrally molded with a resin such as PPS to form a housing of the semiconductor device 10B.

  Incidentally, around the semiconductor elements (IGBTs 11 and 13 and FWDs 12 and 14), as in the case of the first and second embodiments, silicone is used to protect the semiconductor elements and bonding wires and to ensure creeping insulation. The structure is such that a gel-like insulator such as gel is injected.

  The semiconductor device 10B is also mounted when the lower surface portion of the semiconductor device 10B according to the present embodiment configured as a non-insulated semiconductor device in which input / output electrodes are not separated by a transformer or the like is fixed to a cooler or the like. Insulation is provided by interposing an insulating sheet or the like having an insulating property between the cooling device and the cooler.

  The semiconductor device 10B of FIG. 3 differs from the semiconductor devices 10 and 10A of FIGS. 1 and 2 of the first and second embodiments in that the output electrode 3 juxtaposed with the positive electrode 1 is on the positive electrode 1 side. As shown in FIG. 3 (B), the side portion facing (the left side portion of the output electrode 3 in FIG. 3) is bent upward and extends to the upper side of the positive electrode 1 so that the upper side of the positive electrode 1 Is formed on the lower surface of the output electrode step 32, and the side of the positive electrode 1 facing the output electrode 3 (the right side of the positive electrode 1 in FIG. 3) is formed. The structure is such that the output electrode 3 that is the mounting surface of the semiconductor element (IGBT 13, FWD 14) on the negative electrode 2 side is brought closer to the output electrode step 32 and a part of the positive electrode 1 are overlapped.

  Further, as shown in FIG. 3B, the negative electrode 2 is arranged at a position near the upper side of the output electrode step portion 32 where a part of the positive electrode 1 and the output electrode 3 overlap each other. With this arrangement, the connection portions connected to the external connection terminals of the positive electrode 1 and the negative electrode 2 can be drawn from substantially the same place on the projection surface from above of the semiconductor device 10B.

  Note that the arrangement of semiconductor elements (chip arrangement) in the semiconductor device 10B of FIG. 3 is similar to that of the semiconductor device 10A in the second embodiment, with respect to the negative electrode 2 of the IGBT 11 that is the first switching element. The FWD 14 that is the second return diode is arranged at the opposite symmetrical position, and the IGBT 13 that is the second switching element is arranged at the opposite symmetrical position of the FWD 12 that is the first return diode. is doing.

  In order to cool the semiconductor device 10B of FIG. 3, as described above, a cooler is attached to the lower surface of the semiconductor device 10B, but by providing the output electrode stepped portion 32 on the output electrode 3, it is a main heat generating portion. The mounting surface of the positive electrode 1 on which the semiconductor elements IGBT11 and FWD12 are mounted can be disposed on the same plane as the mounting surface of the output electrode 3 on which the IGBT13 and FWD14 of the semiconductor element on the negative electrode 2 side are mounted. In addition, the cooler can be reduced in size and simplified.

<Operation>
Hereinafter, in the semiconductor device 10B shown in FIG. 3, the operation of the semiconductor device 10B when the IGBT 11 on the positive electrode 1 side is turned ON / OFF will be described with reference to FIGS. 1 and 2 in the first and second embodiments. , 10A will be mainly described.

  When the IGBT 11 is turned on, a current flows as shown by a solid arrow E to the inductive load connected from the positive electrode 1 to the output electrode terminal 31 of the output electrode 3 through the IGBT 11. When the IGBT 11 is turned OFF from such a state, the current flowing through the semiconductor device 10 is applied to the inductive load connected from the negative electrode 2 to the output electrode terminal 31 of the output electrode 3 via the FWD 14 as indicated by the broken line arrow F. Switch to a flowing state.

  At the time of this switching, the current flowing from the outside into the positive electrode 1 when the IGBT 11 is ON and the current flowing from the outside into the negative electrode 2 when the IGBT 11 is OFF are the solid line arrow E and the broken line arrow F in FIG. As shown in FIG. 5, since the semiconductor devices 3B can be superposed on each other on the projection surface from above, the current path that changes due to the switching operation is arranged in the vicinity to reduce the change in the circulating magnetic flux generated in the current path. Thus, the effect of reducing the parasitic inductance and preventing the generation of a large surge voltage can be obtained.

  Furthermore, the current flowing from the positive electrode 1 to the back electrode (collector electrode) of the IGBT 11 and the current flowing from the surface electrode (emitter electrode) of the IGBT 11 through the bonding wire, or the surface electrode (anode electrode) of the FWD 14 from the negative electrode 2 through the bonding wire ) And the current flowing out from the back electrode (cathode electrode) of the FWD 14 to the output electrode 3 also from the upper direction of the semiconductor device 10B as shown by the solid line arrow E and the broken line arrow F in FIG. Since they can be superposed on each other on the projection plane, the magnetic fluxes generated in the current path are canceled each other, so that the magnetic field is not generated as much as possible, the parasitic inductance is reduced, and the generation of a large surge voltage is also prevented. Obtainable.

  As described above, the semiconductor device 10B according to the present embodiment includes the positive electrode 1 among the output electrodes 3 disposed adjacent to the positive electrode 1 with respect to the semiconductor devices 10 and 10A according to the first and second embodiments. An output electrode step 32 extending to a position near the upper side of the positive electrode 1 is provided on the side facing the side, and the negative electrode 2 is arranged at a position near the upper side of the output electrode step 32. In addition, the connection part connected to the external connection terminal of each of the positive electrode 1 and the negative electrode 2 is configured so that the positive electrode 1 and the negative electrode 2 overlap each other with the output electrode step part 32 interposed therebetween. Yes.

  As a result, the cooler can be reduced in size and simplified, and the current flowing into and out of the first switching element IGBT11 on the positive electrode 1 side and the second switching element IGBT13 on the negative electrode 2 side, respectively. Further, the current path between the current flowing into and out of the first free-wheeling diode FWD12 on the positive electrode 1 side and the second free-wheeling diode FWD14 on the negative electrode 2 side is defined as the upward direction of the semiconductor device 10B. Since the current paths that flow in the opposite directions at the same timing can be arranged near each other on the projection plane viewed from above, the current paths that change depending on the switching operation are also the first and second current paths. Since the semiconductor devices 10 and 10A according to the embodiment can be arranged at a position closer to the semiconductor devices 10 and 10A, more effectively Can be performed to reduce the inductance, a result, it is possible to suppress lower the occurrence of a surge voltage, have been, the size of the apparatus can be more effectively achieve cost reduction.

(Fourth embodiment)
FIG. 4 is a layout view showing a fourth embodiment relating to the configuration of the semiconductor device according to the present invention, and shows a plan view when viewed from the upper side of the semiconductor device.

  When the current capacity of the semiconductor device is increased, a plurality of semiconductor elements (that is, switching elements IGBTs and freewheeling diodes FWD) may be mounted in parallel. In the semiconductor device 10C of FIG. In order to effectively realize the device, as an example of mounting a plurality of switching elements IGBT and freewheeling diode FWD, the switching element IGBT and freewheeling diode FWD are connected to the positive electrode 1 side (circuit diagram of FIG. 5). In this example, two are mounted on each of the upper arm and the negative electrode 2 side (lower arm in the circuit diagram of FIG. 5).

  That is, in the semiconductor device 10C of FIG. 4, on the positive electrode 1 side, the first switching element IGBT11 having the first reflux diode FWD12 connected in reverse parallel and the third feedback diode FWD16 connected in reverse parallel are connected. The switching element IGBT15 is connected in parallel, and on the negative electrode 2 side, the second switching element IGBT13 having the second reflux diode FWD14 connected in reverse parallel and the fourth return diode FWD18 are connected in reverse parallel. The switching element IGBT 17 is mounted so as to be connected in parallel.

  At this time, IGBTs and FWDs are alternately arranged. That is, the positive electrode 1 side is alternately arranged in the order of IGBT11, FWD12, IGBT15, and FWD16 from the side closer to the input terminal side of the positive electrode 1, and the negative electrode 2 side is shown in FIG. 2 in the second and third embodiments. As in the case of the semiconductor devices 10A and 10B of FIG. 3, FWD14, IGBT13, FWD18, and IGBT17 are arranged from the side closer to the input terminal side of the negative electrode 2 so that they are arranged in the reverse order to the order of IGBT and FWD on the positive electrode 1 side. Alternatingly arranged in this order. As a result, the negative electrode 2 is sandwiched between the IGBT on the positive electrode 1 side and the FWD on the negative electrode 2 side, and the FWD on the positive electrode 1 side and the IGBT on the negative electrode 2 side are symmetrical positions on the opposite side. It arrange | positions so that it may oppose.

  Also in the semiconductor device 10C of FIG. 4, as in the case of the semiconductor devices 10, 10A, and 10B of FIGS. 1 to 3 in the first to third embodiments, the positive electrode 1, the negative electrode 2, and the output electrode 3 is configured using a bus bar made of copper or the like, and is disposed in a state where the positive electrode 1 and the output electrode 3 are adjacent to each other, and the negative electrode 2 is disposed in the vicinity of the upper side of the output electrode 3. The positive electrode 1, the negative electrode 2, and the output electrode 3 are integrally molded with a resin such as PPS to form a housing of the semiconductor device 10C.

  As in the case of the first to third embodiments, the semiconductor elements (IGBTs 11, 13, 15, 17 and FWDs 12, 14, 16, 18) are surrounded by the protection of the semiconductor elements and the bonding wires. In order to ensure insulation, a gel-like insulator such as silicone gel is injected.

  The semiconductor device 10C is also mounted when the lower surface portion of the semiconductor device 10C according to the present embodiment configured as a non-insulated semiconductor device in which the input / output electrodes are not separated by a transformer or the like is fixed to a cooler or the like. Insulation is provided by interposing an insulating sheet or the like having an insulating property between the cooling device and the cooler.

  In general, the switching element IGBT generates a larger amount of heat than the free-wheeling diode FWD, and has a large proportion of the switching loss. Therefore, when the switching elements IGBTs are arranged adjacent to each other when the switching elements IGBTs are connected in parallel, thermal interference occurs and the temperature rise during energization increases. Therefore, as in the semiconductor device 10C of FIG. 4, the positive electrode 1 side is in the order of IGBT11, FWD12, IGBT15, and FWD16, and the negative electrode 2 side is in the order of FWD14, IGBT13, FWD18, and IGBT17. By arranging the IGBTs and the return diodes FWD alternately and arranging the return diodes FWD having a relatively small amount of heat generation between the switching elements IGBTs having a large amount of heat generation, the thermal interference between the switching elements IGBTs is suppressed, Temperature rise can be reduced.

  Further, the switching element IGBT on the positive electrode 1 side and the reflux diode FWD on the negative electrode 2 side are sandwiched between the negative electrode 2 and the switching diode IGBT on the positive electrode 1 side and the switching diode IGBT on the negative electrode 2 side. Are arranged so as to be opposed to symmetrical positions on the opposite side, so that the current flowing through the output electrode 3 is the same as in the semiconductor devices 10A and 10B of FIGS. 2 and 3 in the second and third embodiments. The current paths flow when the IGBTs 11 and 15 are turned on and flow from the positive electrode 1 to the inductive load connected to the output electrode terminal 31 of the output electrode 3 via the IGBTs 11 and 15 and when the IGBTs 11 and 15 are turned off. The current flow of both output electrodes 3 from the electrode 2 to the inductive load connected to the output electrode terminal 31 of the output electrode 3 via the FWDs 14 and 18 Since, in most parts, except for the part that flows from the back electrodes (cathode electrodes) of the FWDs 14 and 18 to the output electrode 3 side through the back surface of the negative electrode 2, it flows in close proximity and in parallel. Further, the effect of further reducing the parasitic inductance can be obtained.

  In other words, in the semiconductor device 10C of FIG. 4, the first and third switching elements IGBT11 and 15 and the second and fourth freewheeling elements in which the first and third freewheeling diodes FWD12 and 16 are connected in reverse parallel, respectively. A plurality of semiconductor elements are connected in parallel between the positive electrode 1 and the negative electrode 2 like the second and fourth switching elements IGBTs 13 and 17 in which the diodes FWD 14 and 18 are connected in antiparallel. In this case, the first and third switching elements IGBTs 11 and 15 arranged on the positive electrode 1 and the first and third free-wheeling diodes FWD 12 and 16 are arranged alternately and arranged on the output electrode 3. The second and fourth switching elements IGBTs 13 and 17 and the second and fourth freewheeling diodes FWD14 and 18 are alternately arranged.

  As a result, the recirculation diode FWD having a relatively small amount of heat generation is interposed between the switching elements IGBT having a large amount of heat generation compared to the freewheeling diode FWD, and the switching elements IGBT having a large amount of heat generation are separated from each other. By disposing, the thermal interference can be suppressed and the temperature rise can be suppressed low.

  When a plurality of switching elements IGBT are mounted on each of the positive electrode 1 and the negative electrode 2 as in the first and third switching elements IGBTs 11 and 15 and the second and fourth switching elements IGBTs 13 and 17, By arranging so that the positions of signal terminals (for example, terminals for pulling out gate electrodes and the like) of adjacent switching elements IGBTs mesh with each other, the positions of the signal terminals can be arranged in a line, and the semiconductor device 10C can be downsized. Can also be planned.

  Further, as in the case of the semiconductor device 10B of FIG. 3 in the third embodiment, the output electrode 3 has a structure including an output electrode step on the side facing the positive electrode 1 side, and the output electrode step Is made to extend to a position in the vicinity of the upper side of a part of the positive electrode 1, and the output electrode stepped part and a part of the positive electrode 1 are overlapped to reduce the size of the cooler. In addition to simplification, the following effects can also be obtained as in the case of the semiconductor device 10B of FIG. 3 in the third embodiment.

  That is, the cooler can be reduced in size and simplified, and the first and third switching elements IGBT11 and 15 on the positive electrode 1 side, and the second and fourth switching elements IGBT13 and 17 on the negative electrode 2 side, respectively. The current path of the current flowing into and out of the current further flows through the first and third return diodes FWD12 and 16 on the positive electrode 1 side, and the second and fourth return diodes FWD14 and 18 on the negative electrode 2 side. Since the current paths of the current flowing into and flowing out from each other can be superimposed on the projection plane viewed from above the semiconductor device 10C, the current paths flowing in the opposite direction at the same timing can be arranged in the vicinity. Furthermore, the current path that changes depending on the switching operation is also the same as that of the semiconductor device 10B in the third embodiment in the first and second embodiments. As a result, the parasitic inductance can be more effectively reduced, and as a result, the generation of surge voltage can be suppressed to a lower level. Therefore, it is possible to more effectively realize downsizing and cost reduction of the apparatus.

(Other embodiments)
In the first to third embodiments described above, a case has been described in which only one set of switch circuits is cut out and formed as a semiconductor device as the switch circuit applied to the power conversion device. However, the present invention is only in such a case. However, the present invention is not limited to this, and as shown in the fourth embodiment, a plurality of switch circuits may be integrated in a single semiconductor device. For example, a three-phase inverter that outputs three-phase AC power When configuring the device, a semiconductor device in which three sets of switch circuits for three phases are integrated can be formed.

  As described above, when a semiconductor device in which three sets of switch circuits for three phases are integrated is configured, the semiconductor device according to the present invention is a switching circuit that generates a large amount of heat as described in the fourth embodiment. The switching elements IGBTs and the free-wheeling diodes FWD having a relatively small amount of heat generation are alternately arranged so that the element IGBTs are not adjacent to each other, so that the temperature rise can be prevented, or the signals of the adjacent switching elements IGBTs By arranging the terminals (for example, terminals for pulling out a gate electrode, a sensor electrode or the like arranged on the chip) so as to mesh with each other, the terminals can be arranged in a line, and the semiconductor device can be downsized. .

  Of course, it is also possible to form a three-phase inverter circuit by connecting in parallel three sets of semiconductor devices including a set of switch circuits as shown in the first to third embodiments.

  Further, in each of the above-described embodiments, the case where an IGBT is used as a switching element and a PN junction type diode is used as a reflux diode has been described. However, the present invention is not limited to such a semiconductor element. As described above, for example, a power MOSFET may be used as the switching element. As the freewheeling diode, one or more combinations of PN junction diodes, PIN diodes or Schottky diodes (for example, not only one but also a plurality of PN junction diodes connected in parallel, Alternatively, a configuration in which a plurality of PIN diodes are connected in parallel or a configuration in which one or a plurality of PN junction diodes and a Schottky diode are connected in parallel may be used.

1 is a layout view showing a first embodiment relating to a configuration of a semiconductor device according to the present invention; FIG. 6 is a layout diagram illustrating a second embodiment regarding the configuration of a semiconductor device according to the present invention. FIG. 6 is a layout diagram illustrating a third embodiment relating to the configuration of a semiconductor device according to the present invention. FIG. 7 is a layout diagram illustrating a fourth embodiment regarding the configuration of a semiconductor device according to the present invention. It is a circuit diagram which shows an example of a circuit structure in the case of comprising the switch circuit for 1 phase in an inverter circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Positive electrode, 2 ... Negative electrode, 3 ... Output electrode, 10 ... Semiconductor device, 10A ... Semiconductor device, 10B ... Semiconductor device, 11C ... Semiconductor device, 11 ... IGBT, 12 ... FWD (reflux diode), 13 ... IGBT, 14... FWD (refluxing diode), 15... IGBT, 16... FWD (refluxing diode), 17... IGBT, 18 ... FWD (refluxing diode), 31.

Claims (8)

  Between the positive electrode and the negative electrode, a first switching element in which a first reflux diode is connected in antiparallel and a second switching element in which a second reflux diode is connected in antiparallel are connected in series. In a semiconductor device that outputs output power from a connection point of the first and second switching elements to an output electrode for load connection, the positive electrode and the output electrode are arranged adjacent to each other, and A connecting portion for connecting the negative electrode to a position near the upper side of the output electrode, and connecting the positive electrode and the external connecting terminal of each of the negative electrodes to the external connecting terminal of the output electrode The first switching element and the first free-wheeling diode connected to the positive electrode side are connected to the positive electrode side, respectively. On the other hand, the second switching element and the second return diode connected to the negative electrode side are connected to the first switching element, the first return diode and the negative electrode. A semiconductor device, wherein the semiconductor device is disposed on the output electrode at a position opposite to the sandwiched portion.   2. The semiconductor device according to claim 1, wherein the second switching element connected to the negative electrode is disposed on the output electrode at a symmetrical position across the first switching element and the negative electrode, 2. The semiconductor device according to claim 1, wherein the second return diode is disposed on the output electrode at a symmetrical position with the first return diode and the negative electrode interposed therebetween.   2. The semiconductor device according to claim 1, wherein the second switching element connected to the negative electrode is disposed on the output electrode at a symmetrical position with the first reflux diode and the negative electrode interposed therebetween. The semiconductor device is characterized in that the second reflux diode is disposed on the output electrode at a symmetrical position with the first switching element and the negative electrode interposed therebetween.   4. The semiconductor device according to claim 1, wherein, among the output electrodes arranged adjacent to the positive electrode, a position in the vicinity of the upper side of the positive electrode on a side portion facing the positive electrode side. 5. The output electrode stepped portion extending to the output electrode, and the negative electrode is disposed at a position near the upper side of the output electrode stepped portion, and connected to the external connection terminal of each of the positive electrode and the negative electrode The semiconductor device, wherein the positive electrode and the negative electrode overlap each other with the output electrode stepped portion interposed therebetween.   5. The semiconductor device according to claim 1, wherein the first switching element disposed on the positive electrode and the first reflux diode are disposed along a side portion adjacent to the output electrode. 6. The second switching element and the second reflux diode arranged in the vicinity of the side part and on the output electrode are arranged on the side of the negative electrode opposite to the positive electrode. The first switching element and the first return diode are positioned at positions on the opposite side of the output electrode across the negative electrode, along the portion, in the vicinity of the side portion A semiconductor device comprising:   6. The semiconductor device according to claim 1, wherein the first switching element to which the first return diode is connected in antiparallel and the second switching diode to which the second return diode is connected in antiparallel. When the two switching elements are configured to be connected in parallel between the positive electrode and the negative electrode, a plurality of the first switching elements and a plurality of the first switching elements arranged on the positive electrode One reflux diode is alternately arranged, and the plurality of second switching elements and the plurality of second reflux diodes arranged on the output electrode are alternately arranged. Semiconductor device.   7. The semiconductor device according to claim 1, wherein the first and second switching elements are made of an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET.   8. The semiconductor device according to claim 1, wherein the first and second free-wheeling diodes are one or more of a PN junction diode, a PIN diode, and a Schottky diode. A semiconductor device comprising a combination.

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