JP2015136370A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine capable of executing a performance satisfying responsiveness required when executing the performance.SOLUTION: When starting a sub control board, a sub CPU transfers sound data of a sound type "file" set to a type "1" that has many opportunities to be transferred to a DSP, from a sub ROM to an audio RAM, and causes the audio RAM to store them. When acquiring request registration information for executing sound data set to the type "1" in sound performance execution processing, the sub CPU generates access reproduction request information for requesting the DSP to execute the sound data stored in the audio RAM. Further, when acquiring request registration information to execute sound data set to a type "2", the sub CPU generates access reproduction request information for requesting the DSP to execute the sound data, while acquiring the sound data from the sub ROM.

Description

  The present invention relates to a gaming machine such as a pachislot machine.

  Conventionally, it is detected that a plurality of reels having a plurality of symbols arranged on each surface, a game medal, a coin, etc. (hereinafter referred to as a “medal, etc.”) and a start lever is operated by a player, A start switch that requests the start of rotation of a plurality of reels and a stop button provided corresponding to each of the plurality of reels are detected by the player, and the stop of rotation of the corresponding reel is requested. A stop switch that outputs a signal, a stepping motor that is provided corresponding to each of the plurality of reels, and that transmits each driving force to each reel, and a stepping motor based on the signals output by the start switch and the stop switch A reel control unit that controls the operation of each reel, and rotates and stops each reel, and the start lever is operated. Is detected, the lottery is performed based on the random number value, and the rotation of the reel is stopped based on the result of the lottery (hereinafter referred to as “internal winning combination”) and the timing at which the stop button is detected. A game machine called a so-called pachislot machine is known.

  As this type of gaming machine, there is already known a gaming machine that performs an effect by voice using a speaker or the like to a player who is playing a game, presents the current gaming state, and improves the interest of the player in the game. (For example, refer to Patent Document 1).

  In such a gaming machine, the audio output board provided on the sub-control side transfers necessary audio data from the audio data ROM storing the audio data to the sound system, and the audio data transferred to the sound system is transmitted to the speaker. The audio data ROM can be used effectively.

JP 2003-225440 A

  However, in the gaming machine as described above, the voice data stored in the voice data ROM is transferred to the sound system as necessary, and is played back by the speaker after the transfer. Since the data is transferred from the audio data ROM to the sound system every time it is necessary, there is a problem that the required responsiveness may not be satisfied.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a gaming machine that can execute an effect that satisfies the responsiveness required when the effect is executed.

  In order to achieve the above object, the gaming machine according to the present invention displays a plurality of reels (3L, 3C, 3R) displaying a plurality of symbols and a part of the plurality of symbols displayed on the reels. In the gaming machine (pachislot machine 1) comprising means (4L, 4C, 4R), a main control circuit (71) for controlling the progress of the game, and a sub-control circuit (72) for controlling the effects relating to the game, The main control circuit rotates the reel on condition that the start operation is detected by the start operation detecting means (start switch 6S) for detecting the start operation by the player and the start operation detecting means. Specific internal winning combination (BB Lip and RB Lip) on condition that the symbol change means (motor drive circuit 39) for changing the symbol and the start operation detection means detects the start operation. An internal winning combination determining means (main CPU 31) for determining an internal winning combination from a plurality of included combinations with a predetermined probability, and a stop operation for stopping each reel provided for the plurality of reels. Stop the rotation of the reel based on the stop operation detecting means (stop switch 7S), the internal winning combination determined by the internal winning combination determining means, and the timing when the stop operation is detected by the stop operation detecting means. Reel stop control means (motor drive circuit 39, stepping motors 49L, 49C, 49R) for stopping the fluctuation of the symbols displayed on the symbol display means, and the reel stop control means stops the fluctuation of the symbols. Based on this, the combination of symbols stopped on the active line (winning line 8c) provided in the symbol display means A winning determination means (main CPU 31) for determining whether or not the winning combination is based on the information, and an information output means (main CPU 31) for outputting information relating to the progress of the game to the sub-control circuit. The control circuit is connected to a plurality of peripheral devices, and based on the information output by the information output means (sub ROM 82) in which a plurality of effects information (sound data) is stored, and the information output means, Effect information determining means (sub CPU81) for determining effect information from the plurality of effect information, effect information executing means (DSP84) for executing the effect information determined by the effect information determining means, and effect information executing means The effect information transfer means (sub CPU81) for transferring the effect information to be executed by the device and the effect information storage means when the sub control circuit is activated. Specific production information storage means (audio RAM 85) for storing specific production information among the plurality of production information stored therein, and the production information transfer means sends the specific production information to the production information execution means. When the information is executed, the specific effect information stored in the specific effect information storage unit is transferred to the effect information execution unit.

  With this configuration, the gaming machine according to the present invention stores specific production information from the production information storage unit to the specific production information storage unit when the sub control circuit is activated, and depends on the type of production information to be executed by the production information execution unit. By changing the transfer source of the production information, it is possible to prevent a problem in the responsiveness due to the transfer of the production information, and it is possible to execute the production satisfying the required responsiveness.

  Moreover, in the gaming machine according to the present invention, the specific effect information is effect information that has more opportunities to be executed by the effect information execution means than other effect information.

  With this configuration, the gaming machine according to the present invention can generate specific performance information from the production information storage unit when the sub-control circuit is activated. When storing the information in the information storage means and executing the specific effect information, it is transferred from the specific effect information storage means to the effect information execution means and executed, so that there is a problem in the responsiveness due to the transfer of the effect information more reliably. Can be prevented, and an effect that satisfies the required responsiveness can be executed.

  In the gaming machine according to the present invention, the sub-control circuit includes an effect information group storage unit (sub ROM 82) for storing an effect information group (sound sequence) composed of a plurality of predetermined effect information, and the effect information. Production information group transfer means (sub CPU81) for continuously transferring the production information from the production information group to the production information execution means when a predetermined condition is established as the production information to be notified to the execution means; It has further.

  With this configuration, the gaming machine according to the present invention stores in advance in the effect information group storage means as an effect information group in advance when it is desired that the effect information execution means execute a plurality of predetermined effect information. Since a plurality of predetermined production information can be continuously executed by selecting an information group, there is a problem in responsiveness due to the transfer of the production information even when a plurality of production information is continuously executed. This can be prevented, and an effect that satisfies the required responsiveness can be executed.

  For this reason, the gaming machine according to the present invention sets, for example, that a predetermined condition is satisfied when confirming the behavior of the gaming machine when a plurality of pieces of arbitrary presentation information are continuously executed, By creating the production information group composed of the production information, the behavior of the gaming machine can be confirmed, and the production information can be easily confirmed and corrected.

  The gaming machine according to the present invention controls a game board including a game area where a game ball rolls and a detection area formed in the game area for detecting the passage of the game ball, and the progress of the game. In a gaming machine comprising a main control circuit and a sub-control circuit for controlling an effect related to a game, the main control circuit is a game advantageous for a player when the game ball passes through the detection area. Lottery means for executing lottery processing for determining whether or not to shift to a state; and information output means for outputting information on the progress of the game based on the result of the lottery processing by the lottery means to the sub-control circuit. The sub-control circuit is connected to a plurality of peripheral devices, and the plurality of effects based on the information output by the effect information storage means storing a plurality of effect information and the information output means. Effect information determining means for determining effect information from the report, effect information executing means for executing the effect information determined by the effect information determining means, and effect information for transferring the effect information to be executed by the effect information executing means A transfer means, and a specific effect information storage means for storing specific effect information among the plurality of effect information stored in the effect information storage means when the sub control circuit is activated, and the effect information The transfer means is configured to transfer the specific effect information stored in the specific effect information storage means to the effect information execution means when causing the effect information execution means to execute the specific effect information. May be.

  Moreover, in the gaming machine according to the present invention, the sub-control circuit has an effect information group storage unit that stores an effect information group composed of a plurality of predetermined effect information, and the effect information executed by the effect information execution unit. As another example, the apparatus may further include an effect information group transfer unit that continuously transfers the effect information from the effect information group to the effect information execution unit when a predetermined condition is satisfied.

  According to the present invention, it is possible to provide a gaming machine capable of executing an effect that satisfies the responsiveness required when the effect is executed.

It is a figure which shows the functional flow of the pachislot machine which concerns on embodiment of this invention. 1 is an overall perspective view showing an external structure of a pachislot machine according to an embodiment of the present invention. It is a front view of the state which removed the front panel of the pachislot machine concerning an embodiment of the invention. It is a front view inside the cabinet of the pachi-slot machine concerning an embodiment of the invention. It is a detailed exploded view of the reel of the pachislot machine according to the embodiment of the present invention. It is a figure which shows the structure of the front panel of the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the structure of the reel lower display of the pachislot machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the main control circuit of the pachislot machine which concerns on embodiment of this invention. It is a wiring block diagram of the external concentration terminal board of the pachi-slot machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the sub control circuit of the pachi-slot machine which concerns on embodiment of this invention. It is a transition diagram of the main gaming state in the pachislot machine according to the embodiment of the present invention. It is a transition diagram of the ART gaming state in the pachislot machine according to the embodiment of the present invention. It is a figure which shows the symbol arrangement | positioning table memorize | stored in main ROM. It is a figure which shows the symbol code table memorize | stored in main ROM. It is a figure which shows the symbol combination table (bonus) memorize | stored in main ROM. It is a figure which shows the symbol combination table (replay) memorize | stored in main ROM. It is a figure which shows the symbol combination table (small part) memorize | stored in main ROM. It is a figure which shows the internal lottery table for general game states memorize | stored in main ROM. It is a figure which shows the internal winning combination determination table for RT1 gaming state memorize | stored in main ROM. It is a figure which shows the internal winning combination determination table for the small combination and replay memorize | stored in main ROM. It is a figure which shows the internal winning combination determination table for bonus memorize | stored in main ROM. It is a figure which shows the reel stop initial setting table memorize | stored in main ROM. It is a figure which shows the drawing priority order table selection table memorize | stored in main ROM. It is a figure which shows the drawing priority order | rank table memorize | stored in main ROM. It is a figure which shows the priority order table memorize | stored in main ROM. It is a figure which shows the priority order table for MB game states memorize | stored in main ROM. FIG. 10 is a diagram illustrating a relationship between an internal winning combination and a winning combination according to a stop operation order. It is a figure which shows the internal winning combination storing area memorize | stored in main ROM. It is a figure which shows the display combination storage area memorize | stored in main ROM. It is a figure which shows the symbol code storage area memorize | stored in main ROM. It is a figure which shows the operation | movement stop button storage area memorize | stored in main ROM. It is a figure which shows the pressing order storage area memorize | stored in main ROM. It is a figure which shows the carryover combination storage area memorize | stored in main ROM. It is a figure which shows the game state flag storage area memorize | stored in main ROM. It is a figure which shows the drawing priority order data storage area memorize | stored in main ROM. It is explanatory drawing of the outline | summary of each mode which stays in an ART game state. It is a figure which shows the mode transfer lottery table in the mode 1 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 2 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 3 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 4 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 5 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 6 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 7 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 8 memorize | stored in main ROM. It is a figure which shows the mode transfer lottery table in the mode 9 memorize | stored in main ROM. It is a figure which shows the cancellation | release game number lottery table in the mode 1 memorize | stored in main ROM. It is a figure which shows the cancellation | release game number lottery table in the mode 2 memorize | stored in main ROM. It is a figure which shows the cancellation | release game number lottery table in the mode 3 memorize | stored in main ROM. It is a figure which shows the cancellation | release game number lottery table in the mode 4 memorize | stored in main ROM. It is a figure which shows the cancellation | release game number lottery table in the modes 5-7 memorize | stored in main ROM. It is a figure which shows the cancellation | release game number lottery table in the mode 8 memorize | stored in main ROM. It is a figure which shows the cancellation | release lottery table memorize | stored in main ROM. It is a figure which shows the short freeze lottery table at the time of ART winning state transition memorize | stored in main ROM. It is a figure which shows the long freeze reservation lottery table at the time of ART winning state transition memorize | stored in main ROM. It is a figure which shows the ART winning state transition notification mode lottery table stored in the main ROM. It is a figure which shows the long freeze reservation lottery table during ART memorize | stored in main ROM. It is a figure which shows the ART classification notification distribution lottery table memorize | stored in sub ROM. It is a figure which shows the normal navigation lottery table memorize | stored in sub ROM. It is a figure which shows the special navigation lottery table memorize | stored in sub ROM. It is a figure which shows the unauthorized navigation lottery table memorize | stored in sub ROM. It is a figure which shows the sound list table memorize | stored in subROM. It is a figure which shows the sound list table memorize | stored in subROM. It is a figure which shows the sound sequence table memorize | stored in subROM. It is a figure which shows the LED and sound output list table memorize | stored in sub ROM. It is a flowchart which shows the main control process of the pachislot machine which concerns on embodiment of this invention. FIG. 66 is a flowchart showing power-on processing that is executed in the main control processing shown in FIG. 65. FIG. FIG. 66 is a flowchart showing a medal acceptance / start check process executed in the main control process shown in FIG. 65. FIG. FIG. 66 is a flowchart showing an internal lottery process executed in the main control process shown in FIG. 65. FIG. 66 is a flowchart showing an ART gaming state lottery process executed in the main control process shown in FIG. 65. FIG. 70 is a flowchart showing an ART gaming process executed in the ART gaming state lottery process shown in FIG. 69. FIG. FIG. 70 is a flowchart showing an ART winning state process executed in the ART gaming state lottery process shown in FIG. 69. FIG. FIG. 70 is a flowchart showing an ART winning state transition process executed in the ART gaming state lottery process shown in FIG. 69. FIG. FIG. 66 is a flowchart showing a reel stop initial setting process executed in the main control process shown in FIG. 65. FIG. FIG. 66 is a flowchart showing a game start freeze process executed in the main control process shown in FIG. 65. FIG. FIG. 76 is a flowchart showing a pull-in priority storage process executed in the main control process shown in FIG. 65 and the reel stop control process shown in FIG. 78. 76 is a flowchart showing a symbol code storage process executed in the pull-in priority storage process shown in FIG. 75. FIG. 76 is a flowchart showing a drawing priority order table selection process executed in the drawing priority order storage process shown in FIG. 75. FIG. 66 is a flowchart showing a reel stop control process executed in the main control process shown in FIG. 65. FIG. 79 is a flowchart showing a priority pull-in control process executed in the reel stop control process shown in FIG. 78. FIG. 66 is a flowchart showing an ART-related process executed in the main control process shown in FIG. 65. FIG. 66 is a flowchart showing a game end lock process executed in the main control process shown in FIG. 65. FIG. FIG. 66 is a flowchart showing a bonus end check process executed in the main control process shown in FIG. 65. FIG. FIG. 66 is a flowchart showing a bonus operation check process executed in the main control process shown in FIG. 65. FIG. It is a flowchart which shows the interruption process by control of the main CPU which comprises the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the input port check process performed in the interruption process shown in FIG. It is a flowchart which shows the communication data transmission process performed in the interruption process shown in FIG. It is a flowchart which shows the power-on process of the sub CPU which comprises the pachislot machine which concerns on embodiment of this invention. 88 is a flowchart showing a mother task activated in the power-on process shown in FIG. 87. It is a flowchart which shows the LED output control task started in the power-on process shown in FIG. 90 is a flowchart showing LED output data analysis processing executed in the LED output control task shown in FIG. 89. 90 is a flowchart showing LED output control execution processing executed in the LED output control task shown in FIG. 89. 88 is a flowchart showing a sound control task activated in the power-on process shown in FIG. 87. FIG. 93 is a flowchart showing a sound-related data initialization process executed in the sound control task shown in FIG. 92. FIG. 92 is a flowchart showing sound data analysis processing executed in the sound control task shown in FIG. 92. FIG. 93 is a flowchart showing a sound effect execution process executed in the sound control task shown in FIG. 92. FIG. FIG. 89 is a flowchart showing a main board communication task activated in the mother task shown in FIG. 88. FIG. FIG. 97 is a flowchart showing a received command check process executed in the main control board task shown in FIG. 96. FIG. 97 is a flowchart showing command analysis processing executed in the main board communication task shown in FIG. 96. FIG. 99 is a flowchart showing effect content determination processing executed in the command analysis processing shown in FIG. 98. It is a flowchart which shows the process at the time of the start command reception performed in the production content determination process shown in FIG. It is a flowchart which shows the process at the time of the start command reception performed in the production content determination process shown in FIG. It is a flowchart which shows the process at the time of the winning operation command reception performed in the effect content determination process shown in FIG. It is a perspective view which shows the external appearance of the game machine in other embodiment of this invention. It is a front view which shows the structure of the outline of the game board of the game machine in other embodiment of this invention. It is a block diagram which shows the structure of the main control circuit and sub control circuit of the game machine in other embodiment of this invention.

  A pachislot machine which is an example of a gaming machine according to the present invention will be described below with reference to the drawings.

[Function flow of pachislot machine]
As shown in FIG. 1, the pachislot machine 1 has a single value from a random number in a predetermined numerical range (for example, 0 to 65535) when a medal is inserted by the player and the start lever 6 is operated. (Hereinafter, random value) is extracted.

  The internal winning combination determining means (main CPU 31 described later) performs lottery based on the extracted random number value and determines the internal winning combination. In other words, the winning combination determining means determines whether the start switch 6S (see FIG. 8) detects the start operation of the unit game with respect to the start lever 6 (establishment of a predetermined start condition) with a predetermined probability among a plurality of combinations. Determine the winning role.

  By determining the internal winning combination, a combination of symbols that permits display along a winning line described later is determined. Note that the types of symbol combinations include those related to “winning” in which benefits such as payout of medals, replay (replay) operation, bonus operation, etc. are given to the player, and other so-called “losing” Such a thing is provided.

  Subsequently, after the plurality of reels 3L, 3C, 3R are rotated, when the player presses the stop buttons 7L, 7C, 7R, reel stop control means (a motor drive circuit 39 described later, a stepping described later) The motors 49L, 49C, 49R) perform control to stop the rotation of the corresponding reels 3L, 3C, 3R based on the internal winning combination and the timing when the stop buttons 7L, 7C, 7R are pressed.

  Here, in the pachi-slot machine 1, basically, control for stopping the rotation of the corresponding reels 3L, 3C, 3R is performed within a specified time (190 msec) from when the stop buttons 7L, 7C, 7R are pressed. . In the present embodiment, the number of symbols that move with the rotation of the reels 3L, 3C, and 3R within the specified time is referred to as “the number of sliding symbols”, and the maximum number is the number of four symbols (the maximum number of sliding symbols). ).

  However, in the MB (a continuous action device for type 2 special feature) gaming state, the corresponding reel is within a predetermined time of 75 ms from when at least one of the plurality of stop buttons is pressed. Control to stop the rotation of is performed.

  The reel stop control means, when an internal winning combination permitting display of a combination of symbols related to winning is determined, uses the specified time, and the combination of symbols follows the winning line as an effective line. The rotation of the reels 3L, 3C, 3R is stopped within the range of the maximum number of sliding pieces so as to be displayed as much as possible.

  On the other hand, for combinations of symbols that are not permitted to be displayed by the internal winning combination, the reels are used within the maximum number of sliding frames so that they will not be displayed along the winning line using the specified time. Stop the rotation of 3L, 3C, 3R.

  Thus, when the rotation of the plurality of reels 3L, 3C, 3R is all stopped, the winning determination means (main CPU 31 to be described later) determines whether the combination of symbols displayed along the winning line relates to winning. Determine whether or not.

  That is, the winning determination means determines whether a winning combination (winning) or non-winning (non-winning) is based on the combination of symbols stopped on the winning line, based on the fact that the change of the symbols is stopped by the reel stop control means. To do.

  When it is determined that the prize is related to a prize, a bonus such as a medal payout is given to the player. A series of flows as described above is performed as one game (unit game) in the pachislot machine 1.

  In the present embodiment, the reel stop operation (operation of the stop buttons 7L, 7C, 7R) that is performed first when all the reels 3L, 3C, 3R are rotating is the first stop operation, the first The stop operation performed after the stop operation is referred to as a second stop operation, and the stop operation performed after the second stop operation is referred to as a third stop operation.

  Also, in the pachislot machine 1, in the above-described series of flows, the light output performed by the effect execution means (dot display 100 and front panel 110), the sound output performed by the speakers 9L and 9R, or a combination thereof is performed. Various effects are performed using it.

  When the player operates the start lever 6, in addition to the random number value used to determine the internal winning combination described above, other lottery processing, for example, randomness used for mode transition lottery in the RT1 gaming state described later, etc. A numerical value and a random number value for production (hereinafter, random number value for production) are extracted.

  When the effect random number is extracted, the effect content determining means (sub-CPU 81 described later) determines, by lottery, what is to be executed this time among a plurality of types of effect contents associated with the internal winning combination.

  When the production contents are determined, the production execution means determines whether or not there is a prize when the rotation of the reels 3L, 3C, and 3R is started and when the rotation of the reels 3L, 3C, and 3R is stopped. The execution of the production is advanced in conjunction with each opportunity such as when it is broken.

  In this way, in the pachislot machine 1, the player has an opportunity to know or predict the determined internal winning combination (in other words, the combination of symbols to be aimed at) by executing the production contents associated with the internal winning combination. To improve the player's interest.

  In particular, in the pachislot machine 1, various effects are performed using the dot display device 100 composed of a plurality of LEDs and the front panel 110 disposed on the front surface of the dot display device 100. Here, the front panel 110 has an arbitrary design on the player side, and is configured so that light from the LED of the dot display device 100 can be transmitted through part or all of the front panel 110.

  In the pachislot machine 1, the effect control means (sub-CPU 81 described later) performs lighting control (lighting, blinking, light-off) of the dot display 100 (LED) according to a predetermined program, and the design applied to the front panel 110 is designed. Various effects are performed by lighting.

  In the pachislot machine 1, the front panel 110 disposed on the front surface of the dot display 100 is changed, and the control data for controlling the dot display 100 is changed without changing the housing. It is possible to produce different performances.

[Pachislot structure]
The functional flow of the pachislot machine 1 has been described above. Next, the structure of the pachi-slot machine 1 according to the present embodiment will be described with reference to FIGS.

  FIG. 2 is a perspective view of the pachislot machine 1 according to the present embodiment. FIG. 3 is a front view of the pachislot machine 1 according to the present embodiment with the protective panel 5 removed. FIG. 4 is a front view of the inside of the cabinet of the pachislot machine 1 according to the present embodiment. FIG. 5 is an exploded detail view of the reels 3L, 3C, 3R of the pachislot machine 1 according to the present embodiment.

  The pachi-slot machine 1 is a gaming machine that uses a game medium such as a coin or a medal, a game ball, a token, or the like, or a game medium such as a card that stores information on a game value assigned to a player. However, in the following description, medals are used.

  The casing 4 forming the entire pachislot machine 1 includes a box-shaped cabinet 60 and a front door 2 that opens and closes the cabinet 60. A reel upper display 101 is provided at the top front of the front door 2. In addition, a transparent protective panel 5 is provided in the approximate center of the front of the front door 2, and a reel effect display 103 and a side effect display 104 are provided on the left and right sides of the protection panel 5.

  In addition, as shown in FIG. 3, a dot display device 100 in which a plurality of light emitting diodes (LEDs) are arranged in a horizontally long rectangular shape is provided in the protective panel 5 as shown in FIG. A horizontally long front panel 110 shown in FIG. 6 is disposed between the dot display 100 and the protection panel 5.

  As shown in FIG. 6, the front panel 110 is configured so that part or all of the front panel 110 can transmit light from the LEDs of the dot display device 100, and a design simulating a pair of hibiscus patterns is applied to the front side of the panel. Yes.

  The hibiscus symbol is given a predetermined color and is illuminated from the dot display device 100 to constitute a notification unit 111 that notifies the player of predetermined information via the transparent protective panel 5.

  The predetermined information notified by the notification unit 111 is locked (for example, a start-time lock described later) when “bonus lip 1” or “bonus lip 2” is won during the ART winning state described later. ART winning announcements (hereinafter simply referred to as “winning announcements”) are included. In this way, the notification unit 111 constitutes a notification unit in cooperation with a sub CPU 81 described later.

  For example, the notification unit 111 notifies the player that an ART described later is in an operable state. That is, the notification unit 111 is for performing ART winning notification described later to the player.

  Note that the design of the front panel 110 shown in FIG. 6 is an example, and the design of the front panel 110 can be changed as appropriate. By changing the design of the front panel 110, it is possible to notify the player of completely different information and to perform a variety of effects.

  In the present embodiment, the front panel 110 disposed between the dot display 100 and the protection panel 5 is used for the production using the dot display 100, but the present invention is not limited to this, and there is adhesiveness. An effect using the dot display 100 may be performed by applying a predetermined design to the sheet and attaching the sheet to the front surface (or the back surface) of the front panel 110.

  Returning to FIG. 3, the dot display 100 is configured by arranging a plurality of LEDs in a horizontally long rectangular shape substantially the same as the shape of the front panel 110 at equal intervals. The dot display device 100 illuminates an arbitrary portion of the design applied to the front panel 110 (in this embodiment, the hibiscus pattern notification unit 111) from the back side by turning on (flashing) the LED at an arbitrary portion. .

  A reel illuminator 102 is provided below the dot display 100. In this embodiment, the dot display 100, the reel upper display 101, the reel illuminator 102, the reel effect display 103, and the side effect display 104 are caused to emit light using light emitting diodes (LEDs). However, organic electroluminescence is used. An existing light emitting element can be used as long as it can emit at least green, yellow, blue, and red, such as (organic EL).

  Below the reel illuminator 102, vertically long rectangular display windows 4L, 4C, 4R constituting symbol display means are provided. In the display windows 4L, 4C, and 4R, an upper right diagonal cross-up line 8a, an upper top line 8b, a middle center line 8c, a lower bottom line 8d, and a lower right diagonal cross down line 8e are displayed. .

  In the present embodiment, among these lines 8a to 8e, only the middle center line 8c is a winning line, and the other lines 8a, 8b, 8d, and 8e are displayed even if a combination of symbols related to the combination is displayed. It is just a display line that is not considered a prize.

  Therefore, the center line 8c is also referred to as a winning line 8c, and the other lines 8a, 8b, 8d, and 8e are also referred to as display lines 8a, 8b, 8d, and 8e, respectively. The winning line 8 c is activated by operating a bet button 11 (to be described later) (hereinafter referred to as “BET operation”) or by inserting medals into the medal insertion slot 22.

  Below the display windows 4L, 4C, 4R, a reel lower display 105 for displaying information related to games in the pachislot machine 1 is provided. The reel lower display 105 is provided with three digital display portions 105L, 105C, and 105R.

  These digital display portions 105L, 105C, and 105R are provided corresponding to the respective reels 3L, 3C, and 3R, and notify the order in which the corresponding reels are stopped. In this way, the reel lower display 105 constitutes a stop operation notifying means in cooperation with a sub CPU 81 described later.

  For example, in the example illustrated in FIG. 7, it is notified that the reel 3C is first stopped, the reel 3R is second stopped, and the reel 3L is third stopped. The player can win a specific small role (for example, middle bell = 9) by operating the stop button in the order of the stop operation notified to the reel lower display 105, for example, in the ART gaming state described later. it can.

  A pedestal 10 having a substantially horizontal plane is formed below the lower reel display 105. Within the horizontal plane of the pedestal 10, a medal slot 22 is provided on the right side, an information display 13 that mainly displays information on the number of medals is provided in the approximate center, and a bet button 11 is provided on the left side. . Inside the bet button 11, a bet button LED 108 (see FIG. 8) that is lit when a medal can be inserted is provided.

  By depressing the bet button 11, the number of medals used for one unit game (one game) is inserted, and the winning line 8c is activated as described above. The operation of the bet button 11 and the operation of inserting a medal into the medal insertion slot 22 (the operation of inserting a medal for playing a game) are hereinafter referred to as “BET operation”.

  The information display 13 is provided with an LED (not shown) that lights up in accordance with the number of medals inserted in the current game (hereinafter referred to as the inserted number). The information display 13 also includes information such as the number of medals to be paid out to the player as a privilege (hereinafter referred to as the number of payouts) and the number of medals deposited in the pachislot machine 1 (hereinafter referred to as the number of credits). A digital display (not shown) for digital display to the player is provided.

  Furthermore, the information display 13 digitally displays an error code indicating an error related to the operation of the pachislot machine 1, a set value, and the like on a digital display (not shown). The information display 13 also has an LED (not shown) that lights when a replay symbol is displayed, or an LED that lights when the reels 3L, 3C, 3R can be operated, or when a medal can be accepted. (Not shown) is provided.

  On the left side of the front portion of the pedestal portion 10, there is provided a settlement button 12 for switching credit / payout of medals acquired by the player in the game by a push button operation. By switching the settlement button 12, medals are paid out from the medal payout opening 15 at the lower front, and the paid-out medals are stored in the medal receiving portion 16.

  On the right side of the checkout button 12, the reels 3L, 3C, and 3R are rotated by the player's tilting operation, and a start as a start operation means for starting the display of the symbols in the display windows 4L, 4C, and 4R. The lever 6 is attached to be tiltable within a predetermined angle range.

  Stop buttons 7L, 7C, and 7R as stop operation means for stopping the rotations of the three reels 3L, 3C, and 3R by a player's pressing operation are provided in the approximate center of the front surface portion of the base portion 10, respectively. ing. In the embodiment, one game (one unit game) basically starts when the start lever 6 is operated, and ends when all the reels 3L, 3C, 3R are stopped.

  Speakers 9L and 9R that perform effects by sounds such as sound effects and voices are provided on the front of the lower part of the front door 2, and a medal payout opening 15 through which medals are paid out is provided between the speakers 9L and 9R. Yes. At the lowermost part of the front door 2, a medal receiving portion 16 for storing the paid-out medals is provided.

  In addition, a waist panel 25 with a design corresponding to the model motif is attached to the front surface of the lower part of the front door 2 between the top and bottom of the stop buttons 7L, 7C, 7R and the medal receiving part 16. It has been. The waist panel 25 is irradiated by a waist panel illuminator (not shown) provided behind.

  As shown in FIG. 4, a middle board 65 that reinforces the cabinet 60 is provided in the interior of the cabinet 60, and a plurality of reels 3 </ b> L, 3 </ b> C, and 3 </ b> R are aligned in a horizontal row on the upper surface of the middle board 65. The reel cover 350 is housed and fixed. In addition, a shielding plate 355 is provided between the left reel 3L and the middle reel 3C and between the middle reel 3C and the right reel 3R to prevent light from passing through each other.

  The reels 3L, 3C, and 3R have reel bands 300L, 300C, and 300R each having a plurality of symbols as identification information arranged by a plurality of types of symbols necessary for the game on the outer peripheral surfaces thereof. The symbols of the reel bands 300L, 300C, and 300R can be viewed from the outside of the pachislot machine 1 through the display windows 4L, 4C, and 4R (see FIG. 3). Further, each of the reels 3L, 3C, 3R rotates at a constant speed (for example, 80 rotations / minute), and the symbol row is displayed in a variable manner.

  4, in addition to the reels 3L, 3C, and 3R, a main control circuit 71 that controls the pachislot machine 1 is housed and provided in the main board case in the upper part of the cabinet 60. . On the lower left side of the middle board 65, a power supply unit 20 having a power supply main switch and a power supply board for converting an AC voltage into a DC voltage is provided. A medal payout device 40 for paying out medals when the payout / payout number exceeds a predetermined number or at the time of payment is provided at a substantially lower center of the middle board 65. Further, on the lower right side of the middle board 65, a medal auxiliary storage 45 for storing medals overflowing from the medal payout device 40 is provided.

<Detailed configuration of reel>
Next, a detailed configuration of the middle reel 3C will be described as an example of the reels 3L, 3C, and 3R with reference to FIG. Since the left reel 3L and the right reel 3R have the same configuration except for the arrangement of a plurality of symbols arranged on the middle reel band 300C, the left reel band 300L, and the right reel band 300R, description thereof is omitted.

  FIG. 5 is an exploded detail view of the middle reel 3C. The middle reel 3C includes a middle reel band 300C, a rotatable reel drum 310 that supports the middle reel band 300C on the outer peripheral portion, a motor unit 320 that is disposed inside the reel drum 310 and rotationally drives the reel drum 310, a reel Inside the drum 310, there is provided a light emitting unit 330 that is disposed behind the reel band 300C and emits light, and a reel base 340 that holds these and adheres to the upper surface of the middle board 65 (see FIG. 4).

(Reel drum)
The reel drum 310 includes a pair of first circular frame 311 and second circular frame 312 that are rotatably supported by a reel base 340 and that have a circular outer periphery. The first circular frame 311 includes a side wall 315 formed in a substantially disc shape, and is driven to rotate by the motor unit 320. In the side wall 315, an opening 315 a that transmits light along the light emitting unit 330 is formed. The second circular frame 312 includes a side wall 316 whose diametrical cross-sectional shape is formed in an approximately eight character shape, and is joined to the central portion of the first circular frame 311 at the central portion thereof. The side wall 316 is formed of a light transmissive member that transmits light.

  Reel band attachment portions 313 and 314 projecting toward opposite surfaces are formed at the end portions of the first circular frame 311 and the second circular frame 312. The outer end which is the outer end of the second circular frame 312 has a chamfered corner. The reel band attaching portion 314 is formed on the center side opposite to the outer end portion, and is provided with a step so as to be separated from the outer end portion. Specifically, the reel band attaching portion 314 is formed on the rotating shaft side of the second circular frame 312 from the outer end portion.

  In the motor unit 320, a stepping motor 49C (see FIG. 8) that rotationally drives the reel drum 310, a motor drive circuit 39 (see FIG. 8) that controls the driving of the stepping motor 49C, and the reel drum 310 rotate once. And a reel position detection circuit 50 (see FIG. 8) for detecting a reel index indicating.

[Circuit configuration of pachislot]
This completes the description of the structure of the pachislot machine 1. Next, a configuration of a circuit included in the pachislot machine 1 according to the present embodiment will be described with reference to FIGS. The pachi-slot machine 1 according to the present embodiment includes a main control circuit 71, a sub-control circuit 72, and an external concentrated terminal plate 73 and peripheral devices (actuators) that are electrically connected thereto.

<Main control circuit>
FIG. 8 shows a configuration of the main control circuit 71 of the pachislot machine 1 in the present embodiment.

(Microcomputer)
The main control circuit 71 includes a microcomputer 30 installed on a circuit board as a main component. The microcomputer 30 includes a CPU (hereinafter, main CPU) 31, a ROM (hereinafter, main ROM) 32, and a RAM (hereinafter, main RAM) 33.

  In the main ROM 32, a control program executed by the main CPU 31 shown in FIG. 59 and the like, a data table such as an internal lottery table (see FIGS. 13 to 26, 37 to 55), and various controls for the sub control circuit 72 are performed. Data for transmitting a command (command) is stored. The main RAM 33 is provided with a storage area (see FIGS. 28 to 35) for storing various data such as an internal winning combination determined by execution of the control program.

(Random number generator etc.)
The main CPU 31 is connected to a clock pulse generation circuit 34, a frequency divider 35, a random number generator 36, and a sampling circuit 37. The clock pulse generation circuit 34 and the frequency divider 35 generate clock pulses.

  The main CPU 31 executes a control program based on the generated clock pulse. The random number generator 36 generates a random number within a predetermined range (for example, 0 to 65535). The sampling circuit 37 extracts at least one value from the generated random numbers according to the application.

(Switch etc.)
A switch or the like is connected to the input port of the microcomputer 30. The main CPU 31 receives input from a switch or the like and controls the operation of peripheral devices such as stepping motors 49L, 49C, and 49R.

  The stop switch 7S constitutes a stop operation detecting means, and detects that each of the three stop buttons 7L, 7C, 7R has been pressed by the player (stop operation). The start switch 6S detects that the start lever 6 has been operated by the player (start operation).

  The medal sensor 42S detects that the medal received in the medal insertion slot 22 has passed through the selector. The bet switch 11S detects that the bet button 11 has been pressed by the player. Further, the settlement switch 12S detects that the settlement button 12 has been pressed by the player.

(Peripheral devices and circuits)
Peripheral devices whose operations are controlled by the microcomputer 30 include stepping motors 49L, 49C, 49R and a medal payout device (hereinafter referred to as a hopper) 40. A circuit for controlling the operation of each peripheral device is connected to the output port of the microcomputer 30.

  The motor drive circuit 39 constitutes symbol variation means and controls the driving of stepping motors 49L, 49C, 49R provided corresponding to the reels 3L, 3C, 3R. The reel position detection circuit 50 detects a reel index indicating that the reels 3L, 3C, and 3R have made one rotation by an optical sensor having a light emitting part and a light receiving part according to each reel 3L, 3C, and 3R.

  The stepping motors 49L, 49C, and 49R have a configuration in which the momentum is proportional to the number of output pulses and the rotation axis can be stopped at a specified angle. The driving force of the stepping motors 49L, 49C, 49R is transmitted to the reels 3L, 3C, 3R via a gear having a predetermined reduction ratio. Each time one pulse is output to the stepping motors 49L, 49C, 49R, the reels 3L, 3C, 3R rotate at a constant angle.

  The main CPU 31 counts the number of times the pulses are output to the stepping motors 49L, 49C, 49R after detecting the reel index, thereby rotating the rotation angles of the reels 3L, 3C, 3R (mainly the reels 3L, 3C, The number of symbols 3R has rotated) is managed, and the position of each symbol arranged on the surface of the reels 3L, 3C, 3R is managed.

  Normally, the pachislot machine 1 does not take into account the wait time described later, and the time from when the start lever 6 is operated until the reels 3L, 3C, 3R start normal rotation (hereinafter simply referred to as “reel operation time”) is , Almost 0 seconds.

  In the present embodiment, the main CPU 31 performs a long freeze process that takes a longer reel operation time (for example, about 12 seconds) than the normal time, and a reel operation time (for example, about 2 seconds) that is longer than the normal time and shorter than the long freeze process. Middle freeze processing and a short freeze processing that takes a longer reel operation time (for example, about 0.3 seconds) than the middle freeze processing. Hereinafter, the long freeze process, the middle freeze process, and the short freeze process are collectively referred to simply as “freeze”.

  The hopper drive circuit 41 controls the operation of the hopper 40. The payout completion signal circuit 51 manages the detection of medals performed by the medal detection unit 40S provided in the hopper 40, and checks whether or not the medals paid out from the hopper 40 have reached the payout number. .

(Display etc.)
Further, the microcomputer 30 is provided inside each of the stop buttons 7L, 7C, and 7R, and the stop button internal LEDs 107L, 107C, and 107R that display the receiving states thereof, and the information display 13 that displays information on the number of medals. And are connected.

(External concentration terminal board)
An external concentrated terminal plate 73 is connected to the output terminal 71a of the main control circuit 71 via a plurality of electric cables. The external concentrated terminal board 73 receives signals such as the number of inserted / withdrawn medals from the main control circuit 71, the number of games, and information on whether or not ART (BB, RB) is activated via the input terminal 73a. Is output from an output terminal 73b to an external display that displays the number of games, the number of ART operations, and the like, or to a host computer in a game arcade. The external indicator is installed, for example, above the pachislot machine 1, and updates the display in conjunction with the progress of the number of games and the ART operation, or notifies the ART operation by a lamp or the like.

  Here, the medal insertion signal is a signal that makes it possible to recognize the medal insertion and is output when the start lever 6 is operated. The medal payout signal is a signal that enables recognition of medal payout or replay, and is output at the time of medal payout (including credit storage) or replay operation.

  The external signal 1 is a signal for displaying the BB lip described later and making it possible to recognize from the outside that the ART is being performed. The external signal 1 is output after the start-time lock described later that occurs after the BB start flag is turned on. The

  The external signal 2 is a signal that displays an RB lip described later and makes it possible to recognize from the outside that the ART is being performed. The external signal 2 is output after a start lock described later that occurs after the RB start flag is turned on. The

  The external signals 3 and 4 are signals that make it possible to recognize an RWM error (that is, when the backup is not normal when the power is turned on), and are output during the initialization process when the power is turned on. The security signal is a signal that makes it possible to recognize when an error occurs (for example, a clogged medal), when the door is opened, when a setting is changed, and the like, and is output when each event occurs.

<Sub control circuit>
FIG. 10 shows a configuration of the sub-control circuit 72 of the pachislot machine 1 in the present embodiment. The sub control circuit 72 is electrically connected to the main control circuit 71 and performs processing such as determination and execution of effect contents based on a command transmitted from the main control circuit 71.

  The sub control circuit 72 basically includes a CPU (hereinafter referred to as sub CPU) 81, a ROM (hereinafter referred to as sub ROM) 82, a RAM (hereinafter referred to as sub RAM) 83, a DSP (digital signal processor) 84, an audio RAM 85, and a digital amplifier. 87 is comprised.

  In response to the command transmitted from the main control circuit 71, the sub CPU 81 controls the output of video, sound, and light according to the control program stored in the sub ROM 82 shown in FIG.

  The sub-RAM 83 is provided with a storage area for registering the determined contents and effects data, and a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 71. The sub ROM 82 basically includes a program storage area and a data storage area.

  A control program executed by the sub CPU 81 is stored in the program storage area. For example, in the control program, a main board communication task for controlling communication with the main control circuit 71 and determining and registering production contents (production data) based on the communication contents, dot display 100, reel upper display Device 101, reel illuminator 102, reel effect indicator 103, side effect indicator 104, reel lower indicator 105, bet button LED 108 and LED output control task for controlling light output by light emitting unit 330, by speakers 9L and 9R Includes sound control tasks that control sound output.

  The data storage area is a storage area for storing various data tables, a storage area for storing the effect data constituting each effect content, a storage area for storing animation data related to the creation of video, and first effect information related to BGM and sound effects. And a storage area for storing LED effect data as second effect information relating to the light on / off pattern.

  Further, the data storage area includes LED effect data for controlling the lighting and blinking of the dot display 100. The sub-control circuit 72 controls the dot display 100 according to the LED effect data, so that an LED at an arbitrary position among the LEDs of the dot display 100 is controlled to be lit. The LED effect data is arbitrarily designed by the designer in accordance with the design applied to the front panel 110.

  In addition, the sub-control circuit 72 includes a dot display 100, a reel upper display 101, a reel illuminator 102, a reel effect display 103, a side effect display 104, and a reel lower display as peripheral devices whose operations are controlled. The device 105, the bet button LED 108, the light emitting unit 330, and the speakers 9L and 9R are connected.

  The sub CPU 81, the DSP 84, the audio RAM 85, and the digital amplifier 87 output sounds such as BGM from the speakers 9L and 9R in accordance with the sound data specified by the production contents.

  The sub CPU 81 is configured to store specific sound data in the audio RAM 85 among the sound data stored in the sub ROM 82 at the start of the sound control task in a sound control task (see FIG. 92) described later.

  The DSP 84 is configured to reproduce the sound data transferred from the sub CPU 81 by the speakers 9L and 9R via the digital amplifier 87. Thus, the DSP 84 that executes sound data constitutes the first effect information execution means in the present embodiment.

  Further, the sub CPU 81 performs the dot display 100, the reel upper display 101, the reel illuminator 102, the reel effect display 103, the side effect display 104, the reel lower display 105, and the LED according to the LED effect data designated by the effect contents. The light emitting unit 330 is turned on and off.

  In this way, the dot display 100 that is turned on and off according to the LED effect data, the reel illuminator 102, the reel effect display 103, the side effect display 104, and the light emitting unit 330, and the output control of turning on and off each member is executed. The sub CPU 81 constitutes second effect information execution means in the present embodiment. Further, the DSP 84 that executes sound data and the sub CPU 81 that executes the output control of turning on and off each member in accordance with the LED effect data constitute effect information executing means in the present embodiment. Further, the sub CPU 81 and the DSP 84 are configured to be able to execute sound data and LED effect data by any of the peripheral devices connected to the sub control circuit 72.

[Main game state transition]
As shown in FIG. 11, the pachislot machine 1 has a main gaming state on the main control side controlled by the main control circuit 71, that is, a general gaming state (RT0 gaming state), an RT1 gaming state, and an MB gaming state.

  The RT0 gaming state is an initial state when the pachislot machine 1 is shipped. The main gaming state shifts to the RT0 gaming state when the MB gaming state ends. The RT0 gaming state is a gaming state in which a winning number is drawn based on an internal lottery table for general gaming states (see FIG. 18), and is a replay low probability state in which the winning probability of a replaying role that is a replaying role is low.

  The main gaming state shifts to the RT1 gaming state when the MB is won in the RT0 gaming state. The RT1 gaming state is a gaming state in which a winning number is determined based on the RT1 gaming state internal lottery table (see FIG. 19), and is a replay high probability state in which the winning probability of the replay role is higher than the RT0 gaming state.

  Here, the RT1 gaming state is not an RT managed by the number of games, but continues unless an MB winning combination wins. In that sense, the RT1 gaming state is infinite RT.

  The main gaming state shifts to the MB gaming state when the MB operating combination wins in the RT1 gaming state. The MB gaming state is a gaming state in which all the small combinations are internally won, and ends when the number of payouts exceeds a predetermined number of payouts (30 in this embodiment).

  Although details will be described later, the pachislot machine 1 according to the present embodiment wins the MB with a high probability in the RT0 gaming state and is difficult to win the MB operating role in the RT1 gaming state. As the main game state, the RT1 game state is almost taken.

[ART gaming state transition]
As shown in FIG. 12, the pachislot machine 1 has the normal gaming state, the ART winning state, the ART start waiting state, and a specific gaming state advantageous to the player as the ART gaming state controlled by the main control circuit 71. There is an ART state.

  Strictly speaking, the “ART gaming state” is the “AT gaming state”. However, as described above, the pachislot machine 1 is almost in the replay high probability state (RT1 gaming state) as the main gaming state. In the present embodiment, the “AT gaming state” is referred to as an “ART gaming state”.

  When one unit game is completed, the main CPU 31 can selectively execute a lock that invalidates a game operation by a player for a predetermined period when a specific internal winning combination to be described later is won. For example, the game operation by the player includes an operation for starting the next unit game, such as a BET operation, insertion of medals, and a lever operation during replay.

  The ART gaming state shifts to the normal gaming state after the setting is changed or after the prescribed number of games has been consumed in the ART state. The normal game state is a state in which the lock is restricted, and the unlocking condition is established mainly based on the release lottery table (see FIG. 52) and the release game number lottery table (see FIGS. 46 to 51). It is a gaming state that is lottery.

  Here, in the release condition, when any of special roles described later is determined as an internal winning combination, the lock is released with a probability based on the release lottery table (see FIG. 52). A case where a combination excluding a special combination is determined as an internal winning combination (others) and a probability based on the release lottery table is won, and a release game number lottery table (see FIG. 46 to FIG. 51), the number of games determined based on the number of games is included.

  The ART gaming state shifts to the ART winning state (lock winning state) when the unlocking condition is satisfied in the normal gaming state, that is, when it is determined to lock. The ART winning state is a state in which the lock is released and the ART is won, and the ART winning is mainly performed when a specific internal winning combination is internally won based on the RT1 gaming state internal lottery table (see FIG. 19). Based on the winning state transition notification mode lottery table (see FIG. 55), a game state in which it is determined that the execution of the ART winning notification indicating that it is determined to lock, that is, that the ART is won is established. is there.

  The ART gaming state shifts to an ART start waiting state when an ART winning notification execution condition is satisfied in the ART winning state. The ART start waiting state is a gaming state in which an ART winning notification is performed on the side of the sub-control circuit 72 and a method of winning a specific internal winning combination is notified (notification of a winning mode).

  In the ART gaming state, when a specific internal winning combination is won in the ART start waiting state, a lock (hereinafter referred to as “lock at start”) is executed, and the state shifts to the ART state. The ART state is a gaming state in which, on the side of the sub-control circuit 72, an advantageous winning method for an internal winning combination is notified. In other words, the ART state is a gaming state in which advantageous stop operation information related to medal granting is notified for a predetermined number of games.

  On the main control circuit 71 side, a lock (hereinafter referred to as “lock at end”) is executed when the number of digested games in the ART state reaches the specified number of games (70 games or 20 games in the present embodiment). The ART gaming state shifts to the normal gaming state.

[Various data tables on the main control side]
13 to 26 show various data tables stored in the main ROM 32.

<Pattern arrangement table>
The symbol arrangement table shown in FIG. 13 represents the arrangement of symbols arranged on the surface of each of the left reel 3L, the middle reel 3C, and the right reel 3R by data. The symbol arrangement table defines the correspondence between 21 symbol positions “0” to “20” and symbols corresponding to these symbol positions.

  Symbol positions “0” to “20” indicate the positions of symbols arranged along the rotation direction in each of the left reel 3L, the middle reel 3C, and the right reel 3R. The symbols corresponding to the symbol positions “0” to “20” can be specified by referring to the symbol arrangement table using the value of the symbol counter.

  The types of symbols are “Red 7”, “BAR”, “Cherry”, “Watermelon A”, “Watermelon B”, “Watermelon C”, “Bell”, “Replay”, “Blank A” and “Blank B” Is included.

  Here, “watermelon A”, “watermelon B”, and “watermelon C” only need to be identifiable as the pachislot machine 1 having a different internal design. In the present embodiment, the same design and game are used. Design that can be recognized by a person. Similarly, “blank A” and “blank B” need only be able to be identified that the pachislot machine 1 is internally different, and in this embodiment, the same symbol and the symbol that can be recognized by the player. And

  The symbol arrangement table shown in FIG. 13 assigns the symbol located at the middle stage of the display windows 4L, 4C, 4R (the symbol passing through the middle stage of the display window) to the symbol position “0” when the reel index is detected. A correspondence relationship in which symbol positions “0” to “20” are assigned to each of the 21 symbols is defined in the order of movement in the rotation direction of the reels 3L, 3C, and 3R.

  In this way, by specifying the middle stage of the display windows 4L, 4C, and 4R as a reference, the type of symbol positioned in the middle stage of the display windows 4L, 4C, and 4R is specified for each of the three reels 3L, 3C, and 3R. Can do.

<Design code table>
As shown in FIG. 14, each symbol arranged on each reel 3L, 3C, 3R is specified by a symbol code table, and is distinguished by 1 byte (8 bits) data. The symbol code table shown in FIG. 14 represents codes for specifying symbols arranged on the surfaces of the three reels 3L, 3C, and 3R.

  The symbols used in the pachislot machine 1 according to the present embodiment are “red 7”, “BAR”, “cherry”, “watermelon A”, “watermelon B”, “watermelon C”, “bell”, “ There are 10 types, “Replay”, “Blank A” and “Blank B”.

  In the symbol code table, “00000001” is assigned as data to the “red 7” symbol (symbol code 1). “00000010” is assigned as data to the “BAR” symbol (symbol code 2). “00000011” is assigned as data to the “cherry” symbol (symbol code 3).

  Similarly, for each of the “Watermelon A”, “Watermelon B”, “Watermelon C”, “Bell”, “Replay”, “Blank A” and “Blank B” symbols (symbol codes 4 to 10), As data, “00000100” to “0000001010” are assigned.

<Design combination table>
The symbol combination table is divided into the symbol combination table for bonus shown in FIG. 15, the symbol combination table for replay shown in FIG. 16, and the symbol combination table for small roles shown in FIG. Also in the combination table, a winning action flag and a payout number are associated with a combination of symbols.

  In the pachi-slot machine 1 according to the present embodiment, the symbol combinations arranged along the activated winning line 8c are the targets for determination for winning or operating. That is, it is determined whether or not the combination of symbols arranged along the activated pay line 8c (see FIG. 2) matches a predetermined combination of symbols.

  This predetermined symbol combination is a symbol combination defined in the symbol combination table. If the combination of symbols arranged along the activated pay line 8c matches the predetermined symbol combination, the payout of medals, the re-game operation, the bonus game operation, or the transition of the game state is performed. Is called.

(Design combination)
The symbol combination is a combination of symbols in the middle of each reel 3L, 3C, 3R. As the winning combination (display combination), there are a bonus combination, a replay combination and a small combination. The small combination includes a cherry combination, a bell combination, and a watermelon combination, and a replay combination and a bonus combination are included in the operating combination.

  As shown in FIG. 15, the bonus combination in the present embodiment is composed of “MB” as an MB operating combination. “MB” is determined when a “Blank A-BAR-Blank A” composing the MB1 transition symbol is arranged along the winning line 8c, and “MB” is displayed. The gaming state is shifted to the MB gaming state described above.

  As shown in FIG. 16, the replay role is a re-game act that allows a game with the same number of medals inserted to play a game without inserting new medals. The number of sheets is 0. The replay combination includes “BB Lip 1”, “BB Lip 2”, “RB Lip”, “Special Lip 1” to “Special Lip 11”, and “Normal Lip”.

  “BB Lip 1” is a replay in which a winning determination is made when “red 7-red 7-red 7” are arranged along the winning line 8c. “BB Lip 1” is a replay in which when the winning determination is made in the above-described ART start waiting state, the prescribed number of games shifts to an ART state of 70 games.

  “BB Lip 2” is a replay in which a winning determination is made when “Blank A-Red 7-BAR” is arranged along the winning line 8c. “BB Lip 2” is a replay in which, when a winning determination is made in an ART start waiting state, the specified number of games shifts to an ART state of 70 games, similarly to “BB Lip 1”.

  “RB Lip” is a replay in which a winning determination is made when “Red 7-Red 7-BAR” is arranged along the winning line 8c. “RB Lip” is different from “BB Lip 1” and “BB Lip 2”, and is a replay in which when the winning determination is made in the above-described ART start waiting state, the prescribed number of games shifts to the ART state of 20 games. is there.

  The “special lip 1” is determined when the “bell-red 7-red 7” is lined up along the pay line 8c, and the main control side is a normal replay as in the “normal lip” described later. . “Special Lip 2” to “Special Lip 11” are normal replays like “Special Lip 1” except that the symbols arranged along the winning line 8c are different from “Special Lip 1”.

  “Normal rep” is a normal replay in which a winning determination is made when “replay-replay-replay” is arranged along the winning line 8c.

  As shown in FIG. 17, the cherry roles include “special cherry”, “cherry 1” to “cherry 11”, and “middle cherry 1” to “middle cherry 5”. When the number is three, the payout number when winning is one.

  Here, the “special cherry” is determined to be awarded when “BAR-BAR-ANY (any symbol)” is arranged along the winning line 8c. “Cherry 1” to “Cherry 11” and “Mid-stage Cherry 1” to “Middle-stage Cherry 5” are determined to be awarded when combinations of corresponding symbols are arranged in FIG. 17 along the prize line 8c.

  “Special Bonus 1” is determined to be awarded when “Blank A-Watermelon A-Red 7” is arranged along the winning line 8c. “Special small combination 2” to “special small combination 4” are determined to be awarded when combinations of corresponding symbols are arranged in FIG. 17 along the winning line 8c. Each of these special small roles has a payout number of 1 when a prize is awarded when the number of inserted medals is 3.

  “Watermelon 1” is determined to be awarded when “Bell-Watermelon A-Red 7” is arranged along the winning line 8c. “Watermelon 2” to “Watermelon 4” are determined to be awarded when combinations of corresponding symbols are arranged in FIG. 17 along the winning line 8c. Each of these watermelons has a payout number of 4 when winning a prize when the number of inserted medals is 3.

  As for the bell role, a “middle bell” with a payout of 9 when a medal is inserted and a payout of 3 with a medal is 3 “Lower Bell 1” to “Lower Bell 3” and “Special Bell 1” to “Special Bell 40” with a payout number of 1 when the number of inserted medals is 3 are included.

  The “middle bell” is determined to be awarded when “bell-bell-bell” is arranged along the winning line 8c. “Lower Bell 1” to “Lower Bell 3” are displayed when “Watermelon A-Belle-Replay”, “Watermelon B-Belle-Replay”, and “Watermelon C-Belle-Replay” are arranged along the winning line 8c. Each win is judged.

  “Special bell 1” is determined to be awarded when “Replay-Watermelon A-BAR” is arranged along the winning line 8c. “Special bell 2” to “special bell 40” are determined to be awarded when combinations of corresponding symbols are arranged in FIG. 17 along the winning line 8c.

(Winning action flag)
The winning action flag in FIGS. 15 to 17 is data assigned corresponding to a combination of unique symbols to indicate a display combination, and includes 1 byte (8 bits) data and a storage area type. The storage area type is data for distinguishing 1-byte data. One-byte data includes data related to a combination of a plurality of symbols. Each symbol combination (display combination) is distinguished by the storage area type and 1-byte data.

  In this embodiment, as shown in FIGS. 15 to 17, since there are more than 8 types of combinations of symbols, all the symbols can be obtained with only 1 byte (8 bits) of data constituting the winning action flag. The combination cannot be identified or identified.

  For this reason, in this embodiment, 1-byte data is distinguished using storage area types 1 to 12. In this way, even if the value of 1-byte data is the same, by specifying any one of storage area types 1 to 12, combinations of more than 8 types of symbols can be combined. Can be treated as

  For example, storage area type 1 is assigned to “MB”. Storage area type 2 is assigned to “BB lip 1”, “BB lip 2”, “RB lip”, and “special lip 1” to “special lip 5”.

  Storage area type 3 is assigned to “special lip 6” to “special lip 11” and “normal lip”. Storage area type 4 is assigned to “special cherry” and “cherry 1” to “cherry 7”.

  Storage area type 5 is assigned to “cherry 8” to “cherry 11” and “middle cherry 1” to “middle cherry 4”. Storage area type 6 is assigned to “middle cherry 5”, “special small role 1” to “special small role 4”, and “watermelon 1” to “watermelon 3”.

  Storage area type 7 is assigned to “watermelon 4”, “middle bell”, “lower bell 1” to “lower bell 3”, and “special bell 1” to “special bell 3”. In this way, “special bell 4” to “special bell 40” and “encode” are assigned to storage area type 8 to storage area type 12, respectively.

  For 1-byte data, for the assigned storage area type, the bit corresponding to each display combination is set to “1”, and the remaining bits are set to “0”.

  For example, by setting the storage area type value to “2” and the 1-byte data value to “00000001”, the display combination “BB Lip 1” can be specified, and the storage area type value is set to “ 7 ”and the value of 1-byte data is“ 00000010 ”, the display combination“ middle bell ”can be designated.

(Number of payouts)
The payout number in FIGS. 15 to 17 is data indicating the number of medals to be paid out to the player corresponding to each combination of symbols. When the combination of symbols arranged along the winning line 8c matches the “combination of symbols” in the symbol combination table, the medal payout by driving the hopper device 40 and the number of credits are counted based on the corresponding payout number. The credit counter is added.

  The number of payouts for the replay role is zero. The payout number for the cherry role and special small role is 1 when the inserted number is 3, and the payout number for the watermelon role is 4 when the inserted number is 3. Also, among the bell roles, the payout number of “middle bell” is 9 when the number of inserted sheets is 3, and the payout number of “lower bell 1” to “lower bell 3” is when the inserted number is 3 sheets. The number of payouts of “special bell 1” to “special bell 40” is one when the number of inserts is three. When the inserted number is 2 (MB game state), the payout number of the cherry role, watermelon role, special small role, watermelon role, and bell role are all 2.

<Internal lottery table for general gaming state>
In the internal lottery table for the general gaming state shown in FIG. 18, the lottery value and the data pointer for each set value are associated with the winning number when the main gaming state is the general gaming state (RT0 gaming state). .

  In the present embodiment, the random number for lottery extracted from the predetermined numerical range “0 to 65535” is sequentially subtracted by the lottery value corresponding to each winning number, and whether or not the result of the subtraction becomes negative An internal lottery is performed by determining whether or not a so-called “digit” has occurred.

  Therefore, the larger the numerical value defined as the lottery value, the higher the probability that the data (that is, the dake pointer) to which it is assigned will be determined. That is, the winning probability of each winning number can be represented by “the lottery value corresponding to each winning number / the number of all random numbers that may be extracted (65536)”.

  Here, when the number of determination processes for determining whether or not the result of the subtraction has become negative exceeds the number of winning numbers, the result of the internal lottery process is “lost”. It is set so that the number of times of determination processing whether or not the result is negative does not exceed the number of winning numbers.

  The data pointer is data acquired as a result of lottery performed with reference to the internal lottery table for general gaming state, and is data for designating an internal winning combination specified by an internal winning combination determination table described later. .

  That is, the data pointer is data used to determine the storage area type and 1-byte data in the small role replay winning combination determination table shown in FIG. 20 and the bonus internal winning combination determination table shown in FIG. For the data pointer, a small role / replay data pointer and a bonus data pointer are individually defined corresponding to each of the plurality of winning numbers.

  As shown in FIG. 18, in the internal lottery table for the general gaming state, “0” is associated as a lottery value so that the winning numbers “1” and “2” are not won, and the winning numbers “3” and “31” ”To“ 35 ”are associated with common lottery values for the setting values“ 1 ”to“ 6 ”, and the winning numbers“ 4 ”to“ 30 ”and“ 36 ”are decreased as the setting value is increased. The lottery values are associated with each other.

  In the data pointer for a small role / replay, the winning numbers “1” to “35” are associated with a value matching the winning number, and the winning number “36” is associated with “0”. It has been. On the other hand, regarding the bonus data pointer, “0” is associated with the winning numbers “1” to “35”, and “1” is associated with the winning number “36”. .

<RT1 gaming state internal lottery table>
In the RT1 gaming state internal lottery table shown in FIG. 19, a lottery value and a data pointer for each set value are associated with the winning number when the main gaming state is the RT1 gaming state.

  Since the RT1 gaming state internal lottery table is configured in the same manner as the general gaming state internal lottery table shown in FIG. 18, the RT1 gaming state internal lottery table is different from the general gaming state internal lottery table. Explanation is omitted about the same parts as the internal lottery table for general gaming state including illustration.

  When the main gaming state is the RT1 gaming state, the RT1 gaming state internal lottery table is a carryover state of the MB that is not operating and won, so the winning number “36” corresponding to the winning number of the MB is Absent.

  In the RT1 gaming state internal lottery table, lottery values are associated with winning numbers “1” and “2” so as to decrease as the set value increases, and lottery numbers “3” are not won. “0” is associated with the value.

<Internal winning combination determination table for small role / replay>
In the small winning combination replay internal winning combination determination table shown in FIG. 20, an internal winning combination (small winning combination) that allows display of a combination of symbols related to the payout of medals and a replay of the small winning combination / replay data pointer. An internal winning combination (replay combination) that allows display of a combination of symbols related to operation is associated. The contents of the internal winning combination are determined according to the small combination / replay data pointers “1” to “35”.

  The small pointer / replay data pointers are “1” to “3” corresponding to the replay role, “4” to “30” corresponding to the bell role, “31” corresponding to the watermelon role, “ “32” to “34” and “35” corresponding to the special small part correspond to 12 pieces of 1-byte data.

  When the data pointer for the small role / replay is “1”, “BB Lip 1”, “BB Lip 2”, “RB Lip”, “Special Lip 1” to “Special Lip 9”, and “Normal Lip” Will be won internally.

  For the sake of convenience, such a combination of overlapping internal winning combinations (duplicate combination) is also referred to as “bonus lip 1”. In addition, “BB Lip 1”, “BB Lip 2”, and “RB Lip” correspond to the specific internal winning combination described above.

  When the data pointer for the small role / replay is “2”, “BB Lip 1”, “BB Lip 2”, “RB Lip”, “Special Lip 1” to “Special Lip 10”, and “Normal Lip” Will be won internally. This duplicated role is also referred to as “bonus lip 2” for convenience. When the small role / replay data pointer is “3”, it means that “normal rep” is won internally.

  When the small role / replay data pointer is “4”, it means that “lower bells 1 to 3” and “special bells 1 to 3” are overlapped internally. When this double combination is won, when the stop button 7C or 7R is pressed as the first stop operation among the stop buttons 7L, 7C, 7R, the pressing order is correct, and the lower bells 1 to 3 can be awarded. . This overlapping role is also referred to as “middle right 1st bell 1” for convenience.

  Similarly, when the small role / replay data pointer is “5”, the “lower bells 1 to 3” and the “special bells 4 to 6 and 10 to 12” are overlapped internally. Thus, when the small role / replay data pointer is “6”, it means that “lower bells 1 to 3” and “special bells 7 to 9” are overlapped internally.

  When the data pointer for the small role / replay is “7”, it is determined that “middle bell” and “special bells 1, 7, 13, 17, 18, 20-22” are overlapped internally. Become.

  When this double combination is won, when the stop button 7C is pressed as the first stop operation, the stop button 7L is pressed as the second stop operation, and the stop button 7R is pressed as the third stop operation, the pressing order becomes correct, and the middle bell wins the prize. It becomes possible. For convenience, this overlapping role is also referred to as “middle left and right bell 1”.

  Similarly, when the data pointer for the small role / replay is “8”, the “middle bell” and the “special bell 2, 8, 14-16, 19, 23, 24” are overlapped internally. If the data pointer for the small role / replay is “9”, the “middle bell” and the “special bells 3, 9, 13, 17, 18, 20-22” are duplicated. Will be doing.

  Further, when the small role / replay data pointer is “10”, the “middle bell” and the “special bell 4, 10, 14-16, 19, 23, 24” are overlapped internally. In other words, when the data pointer for the small role / replay is “11”, the “winning bell” and “special bells 5, 11, 13, 17, 18, 20-22” are duplicated internally. Will be.

  Furthermore, when the data pointer for the small role / replay is “12”, the “middle bell” and the “special bell 6, 12, 14-16, 19, 23, 24” are overlapped internally. In other words, when the data pointer for the small role / replay is “13”, “middle bell” and “special bells 1, 7, 13, 14, 16, 18, 19, 21, 23, 24” Duplicate internal winnings.

  When this double combination is won, when the stop button 7C is pressed as the first stop operation, the stop button 7R is pressed as the second stop operation, and the stop button 7L is pressed as the third stop operation, the pressing order is correct, and the middle bell wins the prize. It becomes possible. This overlapping combination is also referred to as “middle right left bell 1” for convenience.

  Similarly, when the data pointer for the small role / replay is “14”, the internal winning combination of “middle bell” and “special bells 2, 8, 13, 15, 17, 18, 20-23” overlaps. If the data pointer for the small role / replay is “15”, it overlaps with “middle bell” and “special bells 3, 9, 14-17, 19, 20, 22, 24”. And you will be winning inside.

  Also, when the small role / replay data pointer is “16”, it overlaps with “middle bell” and “special bells 4, 10, 13, 14, 16, 18, 19, 21, 23, 24”. When the small role / replay data pointer is “17”, “middle bell” and “special bells 5, 11, 13, 15, 17, 18, 20-23” It will be duplicated internally.

  Further, when the data pointer for the small role / replay is “18”, the “winning bell” and “special bell 6, 12, 14-17, 19, 20, 22, 24” are overlapped internally. If the small role / replay data pointer is “19”, “middle bell” and “special bells 1, 7, 25, 27, 30, 32, 34, 36, 37, 39” It will be duplicated internally.

  When this double combination is won, the pressing order is correct when the stop button 7R is pressed as the first stop operation, the stop button 7L is pressed as the second stop operation, and the stop button 7C is pressed as the third stop operation. It becomes possible. This overlapping role is also referred to as “right / left / middle bell 1” for convenience.

  Similarly, when the data pointer for the small role / replay is “20”, it overlaps with “middle bell” and “special bell 2, 8, 26, 28, 29, 31, 33, 35, 38, 40”. If the small role / replay data pointer is “21”, “middle bell” and “special bells 3, 9, 25, 27, 30, 32, 34, 36” , 37, 39 ", the internal winning is repeated.

  When the data pointer for the small role / replay is “22”, it overlaps with “middle bell” and “special bells 4, 10, 26, 28, 29, 31, 33, 35, 38, 40”. If the small role / replay data pointer is “23”, the “middle bell” and the “special bells 5, 11, 25, 27, 30, 32, 34, 36, 37, 39 "overlaps internally.

  Further, when the data pointer for the small role / replay is “24”, it overlaps with “middle bell” and “special bell 6, 12, 26, 28, 29, 31, 33, 35, 38, 40”. If the small role / replay data pointer is “25”, “middle bell” and “special bells 1, 7, 26, 28, 29, 31, 33, 35, 38, 40 "and the internal winning is repeated.

  When this double combination is won, the pressing order is correct when the stop button 7R is pressed as the first stop operation, the stop button 7C is pressed as the second stop operation, and the stop button 7L is pressed as the third stop operation. It becomes possible. This overlapping role is also referred to as “right middle left bell 1” for convenience.

  Similarly, when the data pointer for the small role / replay is “26”, it overlaps with “middle bell” and “special bell 2, 8, 25, 27, 30, 32, 34, 36, 37, 39”. When the small role / replay data pointer is “27”, “middle bell” and “special bells 3, 9, 26, 28, 29, 31, 33, 35” , 38, 40 "and the internal winning is repeated.

  When the data pointer for the small role / replay is “28”, it overlaps with “middle bell” and “special bells 4, 10, 25, 27, 30, 32, 34, 36, 37, 39”. If the small role / replay data pointer is “29”, the “middle bell” and the “special bells 5, 11, 26, 28, 29, 31, 33, 35, 38, 40 ”, and when the small role / replay data pointer is“ 30 ”,“ middle bell ”and“ special bell 6, 12, 25, 27, 30, 32, 34, 36, 37, 39 "are overlapped internally.

  When the data pointer for the small role / replay is “31”, “watermelons 1 to 4” are internally won. This overlapping role is also referred to as “watermelon” for convenience.

  When the small role / replay data pointer is “32”, it means that “special cherry” and “cherry 1 to 9” are overlapped internally. This overlapping role is also referred to as “horn cherry” for convenience.

  When the small role / replay data pointer is “33”, “special cherry” and “cherry 1 to 11” are overlapped internally. This duplicated role is also referred to as “determined cherry” for convenience.

  When the small role / replay data pointer is “34”, “special cherry”, “cherry 1 to 11”, and “middle cherry 1 to 5” are overlapped internally. This overlapping role is also referred to as “middle cherries” for convenience.

  When the data pointer for the small combination / replay is “35”, “special small combination 1 to 4” are internally won. This duplicated combination is also referred to as a “determined small combination” for convenience.

<Bonus internal winning combination determination table>
In the bonus internal winning combination determination table shown in FIG. 21, the bonus data pointer is associated with an internal winning combination that allows display of a combination of symbols related to the operation of the bonus.

  In the bonus data pointer, “0” corresponding to the loss and “1” corresponding to “MB” correspond to 12 1-byte data. When the bonus data pointer is “1”, it means that “MB” is won internally.

<Reel stop initial setting table>
In the reel stop initial setting table shown in FIG. 22, the drawing priority table selection data or the drawing priority table number and the stop table selection data group are associated with the spinning stop number. These various data indicate various table numbers to be selected in the stop control of the reels 3L, 3C, and 3R according to the progress of one unit game.

  The pull-in priority table selection data is a number for selecting a pull-in priority table selection table shown in FIG. The “pull-in priority table number” is a number for selecting a pull-in priority table shown in FIG. 24 described later.

  The “stop table selection data group” is a number for selecting a stop table or the like that stores the reel pressing position and the number of sliding frames in association with each other, although details are omitted. These numbers are data used to determine “slip piece number determination data”, that is, to determine the positions at which the three reels 3L, 3C, and 3R are stopped according to the progress of one unit game. .

  In the reel stop initial setting table, the drawing priority order table selection data is associated with the rotation stop number corresponding to the data pointer corresponding to the data pointer that is controlled differently depending on the order of the stop operation. A pull-in priority table number is associated with a rotation stop number corresponding to a data pointer whose stop control does not change.

<Pull-in priority table selection table>
In the pull-in priority table selection table shown in FIG. 23, a pull-in priority table number for a stop operation type indicating the order of stop operations is associated with each pull-in priority table selection data.

  For example, in the pull-in priority table selection data “01”, when the first stop operation is “left”, the pull-in priority table number “00” is associated and the first stop operation is “medium”. In this case, the pull-in priority table number “09” is associated.

  Further, in the pull-in priority table selection data “01”, when the first stop operation is “left” and the second stop operation is “middle” during the second stop operation (“left → middle” in the figure), When the pull-in priority table number “00” is associated, the first stop operation is “right” and the second stop operation is “left” during the second stop operation (“right → left” in the figure), The pull-in priority table number “03” is associated.

<Pull-in priority table>
The drawing priority order table shown in FIG. 24 indicates which symbol is drawn preferentially when there are a plurality of symbols that can be displayed within the drawing range (the symbol corresponding to the combination determined as an internal winning combination). ing. In FIG. 24, the data of the winning action flag is omitted for the sake of simplicity.

  In the drawing priority order table, drawing data indicating the drawing priority order of the combination of symbols related to the winning action flag (display combination) is represented. “Pull-in priority data” is information provided for the main CPU 31 to identify the pull-in priority.

  Here, “retraction” refers to the rotation of the reels 3L, 3C, 3R so that the symbols constituting the combination of symbols related to the internal winning combination within the range of the maximum number of sliding symbols are displayed along the winning line 8c. To stop.

  For example, in the drawing priority table number “00”, if it is determined that the winning operation flag “normal lip” and the winning operation flag “special lip” are likely to win, the “special lip” indicates “ Since “normal lip” has a higher priority, rotation stop control of the reels 3L, 3C, and 3R is performed so that “normal lip” is pulled in priority.

<Priority order table>
The priority order table shown in FIG. 25 defines the priority order of the number of sliding pieces when the main gaming state is other than the MB gaming state. The priority order table indicates an order (hereinafter referred to as a priority order) in which applicable numerical values are preferentially applied within a range of numerical values (ie, 0 to 4) of sliding piece number determination data predetermined as the number of sliding pieces. Stipulate.

<MB game state priority order table>
The MB gaming state priority order table shown in FIG. 26 defines the priority order of the number of sliding pieces when the main gaming state is in the MB gaming state. The MB gaming state priority order table defines the priority order of numerical values that can be applied from the numerical value range (ie, 0 or 1) of the sliding piece number determination data predetermined as the number of sliding pieces.

  In the priority order table and the MB gaming state priority order table, each numerical value is searched in the order from the higher priority (1) to the lower priority (5). Applied preferentially. The priority order table is provided on the assumption that there are a plurality of sliding pieces having the same drawing priority order, and the number of sliding pieces having a higher priority order is applied.

  The priority order table and the MB gaming state priority order table in the present embodiment define the priority order based on the number of sliding piece determination data. That is, the priority order is defined so that the numerical value corresponding to the sliding piece number determination data is the highest. As a result, the data for determining the number of sliding symbols is determined preferentially over the number of other sliding symbols, so that the display of symbols intended during the development of the stop table is prioritized.

<Relationship diagram between winning combination and winning combination according to stop operation order>
In the present embodiment, the relationship between the internal winning combination and the winning combination according to the stop operation order of the stop buttons 7L, 7C, 7R is as shown in FIG. 27 by using the various tables described above.

  For example, when an internal winning combination with a winning number 1 is extracted, the first stop operation is “left”, that is, the “normal lip” is won when the stop button 7L is first stopped.

  Further, when the internal winning combination of the winning number 1 is extracted, when the first stop operation is “medium”, that is, when the stop button 7C is first stopped, “BB Lip 1” or “BB Lip” 2 ”wins, and“ Normal Lip ”wins with an incorrect answer at the pressed position.

  Here, the correct pressing position is a range from the symbol position of the effective line (center line 8c in the present embodiment) when the player presses the stop buttons 7L, 7C, 7R to the maximum number of sliding symbols (4 frames). Inside, there is a symbol that constitutes a symbol combination related to the internal winning combination, and the symbol can be stopped on the active line.

  In the present embodiment, the priority order of “BB lip 1” or “BB lip 2” at the correct pressing position is different for each stop operation order of “middle left and right” and “middle right left”. In the case of the “left and right” stop operation sequence, the priority of “BB lip 1” is higher than “BB lip 2”.

  In addition, when the internal winning combination with the winning number 1 is extracted, if the first stop operation is “right”, that is, if the stop button 7R is operated for the first stop, “RB Lip” is won at the correct pressing position and pressed. “Normal lip” wins with incorrect position.

  Further, when the internal winning combination of the winning number 2 is extracted, the mode is opposite to the case of the winning number 1 described above, and when the first stop operation is “right”, the correct position of the pressing position is “BB Lip 1”. Or “BB Lip 2” wins, and “Normal Lip” wins with an incorrect answer at the pressed position. Further, when the first stop operation is “medium”, “RB lip” is awarded with the correct depression position, and “normal lip” is awarded with the incorrect depression position.

  Thus, in the present embodiment, “BB Lip 1” or “BB Lip 2” and “RB Lip” are used as the winning mode in which the “Bonus Lips 1 and 2” corresponding to the winning numbers 1 and 2 have been won. Lip ”. Here, “RB Lip” is the first winning mode, and “BB Lip 1” and “BB Lip 2” are the second winning mode.

  In the present embodiment, as shown in FIG. 27, “bonus lip 1” and “bonus lip 2” are either “BB lip 1” or “BB lip 2” or “RB lip” depending on the stop operation order. Each winning pattern is different.

  That is, the winning pattern (first winning pattern) according to the stop operation sequence of “Bonus Lip 1” is based on the assumption that the pressing position is correct, and “BB Lip 1” or “BB Lip” when the first stop operation is “Medium”. “2” wins, and “RB Lip” wins when the first stop operation is “right”.

  Here, the case where the first stop operation is “medium” corresponds to a first stop operation order for winning “BB lip 1” or “BB lip 2”. Further, when the first stop operation is “right”, it corresponds to a second stop operation order for winning “RB lip”.

  On the other hand, the winning pattern (second winning pattern) according to the stop operation sequence of “bonus lip 2” is based on the assumption that the pressing position is correct, and “RB lip” is awarded when the first stop operation is “medium”. When the first stop operation is “Right”, “BB Lip 1” or “BB Lip 2” is won.

  Here, the case where the first stop operation is “right” corresponds to a first stop operation order for winning “BB Lip 1” or “BB Lip 2”. In addition, when the first stop operation is “medium”, it corresponds to a second stop operation order for winning “RB lip”.

  The “lower bells 1 to 3” and the “middle bell” can be awarded when the first stop operation has a stop operation order other than “left”. In other words, these “lower bells 1 to 3” and “middle bell” are not normally awarded when the first stop operation is “left” and the main game state is the general game state.

  In addition, among the internal winning combinations related to the winning numbers 4 to 30, when the “lower bell 1 to 3” and the “middle bell” are not won, the “special bell 1 40 ”wins.

  Further, each of the internal winning combinations related to the winning numbers 31 to 36 wins the corresponding internal winning combination (for example, watermelons 1 to 4 or special cherry) with the correct pressing position. When the internal winning combination of the winning number 34 is extracted and the first stop operation is “left”, “middle cherry 1-5” rather than “special cherry” and “cherry 1-11”. Has a higher priority.

[Various storage areas on the main control side]
28 to 35 are diagrams showing examples of various storage areas stored in the main RAM 33. FIG.

<Internal winning combination storage area>
The internal winning combination storing area shown in FIG. 28 is composed of 12 storage areas of internal winning combination storing areas 1 to 12. The size of each of the internal winning combination storage areas 1 to 12 is 1 byte.

  Therefore, the total size of the internal winning combination storing areas 1 to 12 is 12 bytes. In the internal winning combination storage areas 1 to 12, data determined based on the internal winning combination data (storage area type) defined by the internal winning combination determination table for small role replay shown in FIG.

  In the internal winning combination storing area shown in the figure, for example, bit 0 of the internal winning combination storing area 1 corresponds to “MB”, and bits 1 to 7 are unused.

  Similarly, bits 0 to 4 of the internal winning combination storing area 12 correspond to “special bell 36”, “special bell 37”, “special bell 38”, “special bell 39”, and “special bell 40”, respectively. Bits 5 to 7 are unused.

<Display combination storage area>
The display combination storage area shown in FIG. 29 includes 18 storage areas of display combination storage areas 1 to 18. The size of each of the display combination storage areas 1 to 18 is 1 byte.

  Therefore, the total size of the display combination storage areas 1 to 18 is 18 bytes. The display combination storage areas 1 to 18 store data determined based on display combination data (storage area type) defined by each symbol combination table (bonus, replay, small combination) shown in FIGS. 15 to 17. . The value of the display combination storing area is used by the main CPU 31 to identify the display combination after all the reels 3L, 3C, and 3R are stopped.

  In the illustrated display combination storage area, for example, bit 0 of the display combination storage area 1 corresponds to “MB”, and bits 1 to 7 are unused.

  Similarly, bits 0 to 4 of the display combination storage area 18 correspond to “special bell 36”, “special bell 37”, “special bell 38”, “special bell 39”, and “special bell 40”, respectively. Bits 5 to 7 are unused.

<Design code storage area>
The symbol code storage area shown in FIG. 30 is configured in the same manner as the display combination storage area shown in FIG. Therefore, detailed description is omitted.

  In the symbol code storage area, data indicating a winning combination in a rotating reel is stored. For example, when all of the reels 3L, 3C, and 3R are rotating, all the winning combinations can be won, so “1” is stored in all the corresponding bits in the symbol code storage area. Thereafter, when the left reel 3L is stopped (the reels 3C and 3R are rotated), the bit corresponding to the winning combination that cannot be won with the stop of the left reel 3L is updated to “0”.

  Referring to FIG. 17, for example, when the “blank A” symbol is stopped on the left reel 3L, the bits corresponding to the special bells 33 to 36 whose symbols on the left reel 3L are “watermelon A” symbols are While it is updated to “0”, the bits corresponding to the cherry 6 and the special small roles 1 to 4 whose symbols on the left reel 3L are “blank A” symbols are maintained at “1”.

<Operation stop button storage area>
The operation stop button storage area shown in FIG. 31 is 1 byte in size. Bits 4 to 6 are storage areas indicating stop buttons 7L, 7C, and 7R that can detect a stop operation by the player, that is, effective stop buttons 7L, 7C, and 7R.

  Bits 0 to 2 are storage areas indicating the stop buttons 7L, 7C, and 7R in which the stop operation corresponding to the valid stop buttons 7L, 7C, and 7R is detected immediately before. In this embodiment, bit 3 and bit 7 are unused and “0” is stored.

  Bit 0 corresponds to the left stop button 7L. When the left stop button 7L is operated by the player, “1” is stored in bit 0. Bit 1 corresponds to the middle stop button 7C. When the middle stop button 7C is operated by the player, “1” is stored in bit 1. Bit 2 corresponds to the right stop button 7R. When the right stop button 7R is operated by the player, “1” is stored in bit 2.

  Bit 4 corresponds to the left stop button 7L. When the left stop button 7L is valid, “1” is stored in bit 4. Bit 5 corresponds to the middle stop button 7C. When the middle stop button 7C is valid, “1” is stored in bit 5. Bit 6 corresponds to the right stop button 7R.

  When the right stop button 7R is valid, “1” is stored in bit 6. In this embodiment, that the stop button is valid means that a stop operation can be detected. The stop buttons 7L, 7C and 7R corresponding to the reels rotating at a constant speed and capable of detecting the stop operation are referred to as effective stop buttons.

<Pressing order storage area>
The pressing order storage area shown in FIG. 32 is an area for storing information indicating the pressing order of the three stop buttons 7L, 7C, and 7R. This push-down order storage area has a size of 1 byte, bits 0 to 5 are used, bits 6 and 7 are unused, and “0” is stored.

  Bit 0 corresponds to the pressing order “left → middle → right”, and “1” is stored (turned on) in bit 0 when the pressing order is “left → middle → right”. Similarly, when the pressing order is “left → right → middle”, “1” is stored (on) in bit 1, and when the pressing order is “middle → left → right”, “1” is stored in bit 2. Is stored (ON), “1” is stored in bit 3 if “middle → right → left”, and “1” is stored in bit 4 if “right → left → middle”. In the case of “right → middle → left”, “1” is stored (turned on) in bit 5.

<Carry-over portion storage area>
The carryover combination storage area shown in FIG. 33 is 1 byte in size, bit 0 corresponds to “MB”, and bits 1 to 7 are unused. As a result of the internal lottery process, when the internal winning combination “MB” is determined, “1” is stored in bit 0 of the carryover combination storing area.

  By storing “1” in bit 0 of the carryover combination storage area, it is possible to determine that the player has won the “MB”. The state in which “1” is stored in bit 0 of the carryover combination storage area is held until the symbol combination corresponding to “MB” is displayed on the winning line 8c.

  That is, when “MB” is won, “1” is set in bit 0 of the carryover combination storage area in at least one unit game until the combination of symbols of these bonuses is displayed on the winning line 8c as a display combination. The stored state is retained. Maintaining a state in which “1” is stored in bit 0 from the unit game winning the bonus to the unit game winning is called “carryover”. “MB” stored in the carryover combination storage area is referred to as “carryover combination”.

  When a stop operation is performed by the player and each of the reels 3L, 3C, and 3R stops, the internal winning combination storing area is initialized, but the carryover combination storing area is not initialized. In this way, the “carry over” state can be maintained.

<Game state flag storage area>
The game state flag storage area shown in FIG. 34 indicates whether the main game state is a bonus game state or an RT1 game state and whether the ART game state is an ART winning state, an ART start waiting state, or an ART state. For storing a flag for the purpose, and the size is 1 byte.

  Bit 0 and bit 1 of the game state flag storage area relate to the bonus game state, and bit 2 relates to the main game state. Further, bits 4 to 6 of the game state flag storage area relate to the ART game state. In this embodiment, bit 3 and bit 7 of the game state flag storage area are unused.

  In the bonus gaming state, bit 0 of the gaming state flag storage area is “1” (on) in the MB gaming state, and bit 1 of the gaming state flag storage area is “1” (on) in the CB gaming state. It is said.

  When the main gaming state is the RT1 gaming state, bit 2 of the gaming state flag storage area is set to “1” (ON).

  When the ART gaming state is the ART winning state, the bit 4 of the gaming state flag storage area is set to “1” (ON), and when the ART gaming waiting state is set to the ART start waiting state, the bit 5 of the gaming state flag storage area is set to “1”. 1 ”(ON), and when in the ART state, bit 6 of the gaming state flag storage area is set to“ 1 ”(ON).

<Retrieve priority data storage area>
The pull-in priority data storage area shown in FIG. 35 includes a left reel pull-in priority data storage area, a middle reel pull-in priority data storage area, and a right reel pull-in priority data storage area.

  The contents of the middle reel pull-in priority data storage area and the right reel pull-in priority data storage area are the same as those of the left reel pull-in priority data storage area. The data storage area will be described.

  The left reel pull-in priority data storage area can store pull-in priority data for each of the symbol position data (see FIG. 13). For example, for symbol position data 0, a role (any one of 0FEH to 000H) defined in the priorities 1 to 5 in FIG. 24 is defined. One of the pull-in priority data is stored in the reels 3C and 3R according to the stop position. Thereby, the left reel 3L is controlled so as to stop or not stop the symbol corresponding to the winning combination on the winning line 8c.

  Similarly, for the symbol position data 1 to 20, the roles defined in the priority order are also defined, and from these pull-in priority data, the winning combination and the other reels 3L, 3C (3R) are set to the stop positions. In response, any pull-in priority data is stored.

<Overview of each mode>
The outline of each mode shown in FIG. 36 shows the outline of each of the plurality of stay modes in the ART gaming state.

  In the present embodiment, during the ART gaming state, the player stays in any one of modes 1 to 9, and transitions between these modes are performed based on a predetermined lottery opportunity. The number and the release lottery probability when a special small role called a rare role is established are made different. Mode 9 is a mode that is shifted only when the setting is changed.

  Specifically, mode 1 is also referred to as normal mode A, and is a mode in which the number of released games and the released lottery are disadvantageous for the player, but after the release, the mode is shifted to modes 6 and 7 which are advantageous for the player.

  Mode 2 is also referred to as normal mode B, and there is a possibility of transition from modes other than modes 1, 4, 6, and 7. In addition, transition probability is higher than other modes when shifting from modes 2, 3, 8, and 9. Is high. Therefore, mode 2 is the mode in which the user stays most during the game.

  Mode 3 is also referred to as a pullback mode, and is a mode that is shifted to when the modes 6 and 7 are completed or when the mode 2 or 8 is a confirmed winning combination. Both the number of released games and the released lottery are advantageous to the player.

  Mode 4 is also referred to as a continuous-chang preparation mode, and is a mode in which only the next mode 4 to 7 is shifted to. Next, the next mode is expected to shift to a higher mode that is advantageous for the players of modes 5 to 7. Mode. That is, the mode 4 is a mode in which it is easy to shift to the next modes 5 to 7.

  Modes 5 to 7 are also referred to as continuous channel modes A, B, and C, respectively, and are modes in which an ART state is generated continuously, so-called continuous channel is likely to occur. These modes 5 to 7 are advantageous modes for both the number of released games and the released lottery. In particular, with regard to the number of released games, it has been determined that the released games will be released within 31 games as will be described later.

  Mode 8 is also referred to as a high-accuracy mode after setting change, and is a mode that shifts only from mode 9 that stays when the setting is changed. Both the number of released games and the released lottery are advantageous to the player.

  Mode 9 is also referred to as a setting change mode, and is a mode for shifting to a setting change. That is, the mode 9 is not changed unless the setting is changed. In the present embodiment, only mode 9 is provided with mode 8 as the next mode transition destination.

[ART-related data tables]
37 to 56 show various data tables related to the ART stored in the main ROM 32.

<Mode transfer lottery table>
The mode transition lottery tables shown in FIGS. 37 to 45 show the lottery triggers when staying in each mode and the modes that can be shifted to the lottery triggers.

  As a lottery opportunity, there are a normal release, a watermelon release, a corner cherry release, a release by a decisive role, a release by a middle stage cherry and a release by a long freeze. Here, the normal release indicates a release when the number of released games is reached, or a release when “other” is released based on the release lottery table (see FIG. 52). Further, the confirmed combination refers to “determined cherry” and “determined small combination” shown in FIG.

  Moreover, watermelon cancellation | release and square cherry cancellation | release means cancellation | release when it cancels | releases with a predetermined probability using the cancellation | release lottery table (refer FIG. 52) mentioned later at the time of the double combination of watermelon or square cherry.

  In addition, the decisive combination and the middle tier cherries are confirmed to be released when they both win the corresponding internal winning combination (see FIG. 52). Therefore, the release by a confirmed combination or middle tier cherry is a release by winning of the corresponding duplicate combination. Furthermore, the release by the long freeze refers to a release in the case of accompanying a long freeze by a long freeze reservation at the start of the game.

  In this embodiment, as will be described later, a long freeze reservation lottery table (see FIG. 54) at the transition to the ART winning state or during the ART state during the ART winning state, and a long freeze reservation lottery table during the ART state (see FIG. 56). Lottery reservation lottery is performed with a winning probability according to (see). In this embodiment, when a long freeze occurs, the release is determined regardless of which release is used.

  As shown in FIG. 37, when the current mode (stay mode) is mode 1, the setting values are common to 1 to 6, and the mode is shifted to mode 6 or mode 7 except for the release with long freeze. It has become. In mode 1, the probability of transition to mode 6 is set higher than in mode 7.

  On the other hand, in the case of cancellation with long freeze, the mode is shifted to mode 7 only. In the case of the release with such a long freeze, not only mode 1 but also modes 2 to 8 other than mode 9 always shift to mode 7 only.

  As shown in FIG. 38, when the current mode (stay mode) is mode 2, the mode is shifted to one of modes 1 to 7. In this mode 2, the transition probability of each mode transition destination differs for each set value, and in particular, the transition probability to modes 4 and 5 is set higher as the set value becomes higher in normal cancellation, watermelon cancellation, and corner cherry cancellation. Has been.

  As shown in FIG. 39, when the current mode (stay mode) is mode 3, the mode is shifted to any one of modes 1, 2, 4 to 7. In this mode 3, the transition probability of each mode transition destination differs for each set value, and in particular, the transition probability to modes 4 and 5 is set higher as the set value becomes higher in normal cancellation, watermelon cancellation, and corner cherry cancellation. Has been.

  As shown in FIG. 40, when the current mode (stay mode) is mode 4, the mode is shifted to any one of modes 1, 4 to 7. In this mode 4, the transition probability of each mode transition destination differs for each set value, and in particular, the transition probability to mode 5 is set to be higher as the set value is higher in normal cancellation, watermelon cancellation, and corner cherry cancellation. Yes.

  As shown in FIG. 41, when the current mode (stay mode) is mode 5, the mode is shifted to any one of modes 1, 2, 4-7. In this mode 5, the transition probability to each mode transition destination at the time of normal release differs for each set value. The higher the set value, the higher the transition probability to modes 2 and 4, while the transition to mode 5 The probability is set to be low.

  As shown in FIG. 42, when the current mode (stay mode) is mode 6, the mode is shifted to any of modes 3, 6, and 7. In this mode 6, the transition probability to each mode transition destination at the time of normal release is different between the set values 1 to 4 and 6 and the set value 5, and the transition probability to the mode 7 is different only when the set value is 5. While set higher than the set value, the transition probability to mode 6 is set lower.

  As shown in FIG. 43, when the current mode (stay mode) is mode 7, the setting values are common to 1 to 6, and the mode is shifted to either mode 3 or 7. This mode 7 is set to shift to mode 3 only at the time of normal cancellation.

  As shown in FIG. 44, when the current mode (stay mode) is mode 8, the mode is shifted to one of modes 1-7. In this mode 8, the transition probability of each mode transition destination differs for each set value, and in particular, the transition probability to modes 4 and 5 is set higher as the set value becomes higher in normal cancellation, watermelon cancellation, and corner cherry cancellation. Has been.

  As shown in FIG. 45, when the current mode (stay mode) is mode 9, the mode is shifted to any one of modes 1, 2, 4, and 8. The lottery opportunity in mode 9 is when the setting is changed, and the transition probability of each mode transition destination differs depending on the setting value after the setting change. For example, the higher the set value after the setting change is, the higher the transition probability to mode 8 is set.

<Release game number lottery table>
The release game number lottery tables shown in FIGS. 46 to 51 show the distribution of the number of release games when staying in each mode.

  The number of released games refers to the number of games played in the ART gaming state after the end of the ART state, that is, from the next game in which the BB end flag or RB end flag shown in FIG. Game number).

  When the setting is changed, the start of the number of released games described above is the next game after the setting is changed. Therefore, in the present embodiment, after the ART state is finished or the setting is changed, when the prescribed number of released games is consumed, that is, when the number of games corresponding to the prescribed number of released games is performed, the ART is forcibly executed. The gaming state shifts from the normal gaming state to the ART winning state.

  In the present embodiment, the number of released games is between 0 and 1051, and is between a certain number of games (for example, 0 game and 31 games) and a predetermined number of games (for example, 32 games to 63 games). Sorted.

  Such distribution probability of the number of released games varies depending on the stay mode and the set value. The number of released games can be arbitrarily set, and is not limited to the number of games described above, and the distribution range can be changed as appropriate.

  As shown in FIG. 46, when the current mode (stay mode) is mode 1, the number of release games is distributed to 951 games or more in common with setting values 1 to 6, and release games of 950 games or less It is not sorted into numbers.

  As shown in FIG. 47, when the current mode (stay mode) is mode 2, the number of released games is distributed from a relatively short number of games to a relatively long number of games based on the distribution rate shown in FIG. Yes.

  In this mode 2, the distribution rate of the number of released games is slightly different for each set value. For example, the higher the set value, the smaller the distribution rate of the longest number of released games (801 games to 900 games) in this mode. It is set as follows.

  As shown in FIG. 48, when the current mode (stay mode) is mode 3, the number of released games is distributed to 31 games in common with setting values 1 to 6, and the number of released games other than 31 games. Will not be assigned.

  As shown in FIG. 49, when the current mode (stay mode) is mode 4, the number of released games is distributed from a relatively short number of games to a relatively long number of games based on the distribution rate shown in FIG. Yes.

  In this mode 4, the distribution rate of the number of released games is slightly different for each set value. For example, the higher the set value, the smaller the distribution rate of the longest number of released games (951 games to 1050 games) in this mode. It is set as follows.

  As shown in FIG. 50, when the current mode (stay mode) is modes 5 to 7, the number of released games is distributed to 0 games or 31 games in common with setting values 1 to 6, and 0 games Or it is not distributed to the number of release games other than 31 games.

  Here, in these modes 5 to 7, the distribution rate of 31 games is set to be higher than the distribution rate of 0 games.

  As shown in FIG. 51, when the current mode (stay mode) is mode 8, the number of released games is assigned to 32 games to 95 games in common with setting values 1 to 6, and 32 games to 95 There is no distribution to the number of unlocked games other than games.

  Here, in this mode 8, the distribution rate of 64 games to 95 games is set to be higher than the distribution rate of 32 games to 63 games.

<Release lottery table>
The cancellation lottery table shown in FIG. 52 shows the cancellation probability for each internal winning combination for each mode (modes 1 to 8). Note that the release probability refers to the probability of winning the release in FIG.

  As shown in FIG. 52, in the present embodiment, special roles (watermelon, horn cherry, decisive role and middle cherries) as internal winning combinations that may win a release, and a role excluding special roles from a plurality of roles ( Others). Here, when the final winning combination and the middle tier cherry are extracted as the internal winning combination in any of the modes 1 to 8 and any set value, the cancellation is finalized.

  The other internal winning combinations are set so that the release probabilities are different for each of the modes 1 to 8. For example, in mode 1, the cancellation probability is set to decrease in the order of watermelon, corner cherry, and others, while in mode 7, the cancellation probability is set to decrease in the order of watermelon and corner cherry. . The other internal winning combinations related to the cancellation refer to internal winning combinations that may win the cancellation other than watermelons, horn cherries, decisive roles, and middle cherries.

<Short freeze lottery table during transition to ART winning state>
The short freeze lottery table at the time of ART winning state transition shown in FIG. 53 is a table referred to in order to determine whether or not to perform a short freeze when shifting from the normal gaming state to the ART winning state in the ART gaming state. is there.

  In the short freeze lottery table at the time of the ART winning state transition, depending on which release trigger has entered the ART winning state among game number cancellation, watermelon cancellation, corner cherry cancellation, decisive combination cancellation, middle stage cherry cancellation, and other cancellations, Probability determined when short freeze is performed is different.

  For example, the probability of performing a short freeze is set to be highest when the corner cherry is released and lowest when the watermelon is released.

<Long freeze reservation lottery table during ART winning state transition>
54 is referred to when determining whether or not to reserve a long freeze when shifting from the normal gaming state to the ART winning state in the ART gaming state. It is a table.

  In the long freeze reservation lottery table at the time of ART winning state transition, it depends on which release trigger has entered the ART winning state among game number cancellation, watermelon cancellation, corner cherry cancellation, decisive combination cancellation, middle stage cherry cancellation, and other cancellations. The probability of making a long freeze reservation is different.

  For example, the probability of making a reservation for a long freeze is set to be highest when the middle cherries are released, and lowest when the number of games is released and others are released.

<ART winning state transition notification mode lottery table>
The ART winning state transition notification mode lottery table shown in FIG. 55 is used to determine which of the notification modes 1 to 3 is the notification mode when shifting from the normal gaming state to the ART winning state in the ART gaming state. It is a table referred to by

  The above-described notification mode is a notification by the notification unit 111 (see FIG. 6) imitating the hibiscus pattern provided on the front panel 110 when the bonus lip 1 or 2 is internally won during the ART winning state. This is a mode for determining whether or not to perform.

  Specifically, the notification mode 1 is a mode in which the notification unit 111 performs notification with a probability of 100% when either of the bonus replies 1 and 2 is internally won during the ART winning state.

  The notification mode 2 is a mode in which the notification unit 111 performs notification with a probability of 50% when either of the bonus replies 1 and 2 is internally won during the ART winning state.

  The notification mode 3 is a mode in which the notification unit 111 performs notification with a probability of 25% when either of the bonus replies 1 and 2 is internally won during the ART winning state. Thus, in this Embodiment, the probability (notification probability) which performs the notification by the notification part 111 is varied for each mode.

  In the ART winning state transition notification mode lottery table, as a lottery trigger in the notification mode, when canceling the number of games, when canceling the watermelon, when releasing the corner cherry, when releasing the decisive role, when releasing the middle cherries, when releasing other, and when releasing with long freeze Time is given.

  In this ART win state transition notification mode lottery table, the distribution rate of each notification mode differs depending on the lottery trigger. Has been.

  In the case of other cancellations, the notification mode 1 and the notification mode 2 are set to be distributed with the same probability. Further, in the case of canceling the corner cherry, the distribution rate in the notification mode 1 is the highest, and then the notification mode 2 and the notification mode 3 are distributed with the same probability.

<Long freeze reservation lottery table during ART>
The long freeze reservation lottery table during ART shown in FIG. 56 indicates that the longest transition to the next ART state is made when one of the watermelon, horn cherry, fixed combination, and middle stage cherries is won during the ART state. It is a table that is referred to in order to determine whether or not to reserve a freeze.

  In this long freeze reservation lottery table during ART, the probability of making a long freeze reservation at the next ART state transition is the highest when the middle cherry is won internally, and the lowest when the corner cherry is won internally. Is set.

[Various control side data tables]
57 to 60 are various data tables stored in the sub ROM 82. FIG.

<ART type notification distribution lottery table>
The ART type notification distribution lottery table shown in FIG. 57 is a table that is referred to when shifting from the ART winning state to the ART start waiting state in the ART gaming state, and in the bonus start 1 or 2 during the ART start waiting state. It is a table for determining a notification distribution of which one of the BB lip and the RB lip is awarded by notifying the stop operation order when the internal winning is made.

  Further, in this ART type notification distribution lottery table, the distribution rates of the BB lip and the RB lip are set to be different based on the lottery trigger and the current mode (stay mode). There are a number of lottery opportunities depending on the release type at the time of transition from the normal gaming state to the ART winning state in the ART gaming state: (other than 0) release, 0 game release, watermelon release, corner cherry release, fixed role There are cancellation, cancellation of middle cherries and other cancellations.

  Specifically, the transition from the normal gaming state to the ART winning state in the ART gaming state is any of the number of games (other than 0) release, 0 game release, watermelon release, corner cherry release, fixed role release, middle stage cherry release, and other release The distribution rate of the BB lip and the RB lip is different depending on whether or not it is performed by canceling. For example, when the lottery opportunity is 0 game release, decisive combination release, or middle-stage cherry release, the stop operation order for winning the BB lip is notified with a probability of 100%.

  Further, as described above, the distribution rate of BB lip and RB lip is different depending on the stay mode. For example, the stay mode is mode 4 and the lottery trigger is the number of games (other than 0) release, watermelon release, corner cherry release, In the case of other cancellations, the distribution rate of RB lip is set to be higher than that of BB lip.

<Normal navigation lottery table>
The normal navigation lottery table shown in FIG. 58 is referred to when determining the navigation data during ART in the ART state based on the internal winning combination when the BB malfunction flag is OFF in the start command reception process shown in FIG. It is a table to be.

  The navigation data during ART is data for informing the pressing order of the stop buttons 7L, 7C, 7R, which is advantageous to the player, that is, the stop operation order. The types of navigation data during ART are “left middle right”, “left and right There are “Middle”, “Middle Left / Right”, “Middle Right / Left”, “Right Middle Left” and “Right Middle Left”. The navigation data during ART includes “no notification”.

  In the normal navigation lottery table, for example, in the case of an internal winning combination (lower bell) corresponding to the winning numbers 4 to 6, “middle left and right”, “middle right left”, “right left middle” and “right middle left” The stop operation order of "" is set so as to be distributed with the same probability.

  Here, as shown in FIG. 20, the internal winning combination (lower bell) corresponding to the winning numbers 4 to 6 has the correct pressing order when the stop button 7C or 7R is pressed as the first stop operation. Therefore, in this normal navigation lottery table, the stop operation order of the internal winning combination (lower bell) is not assigned to the stop operation order of the incorrect answer (“left middle right” and “left / right middle”) as the navigation data during ART. It is supposed to be.

  Further, in the case of the internal winning combination (middle bell) corresponding to the winning numbers 7 to 12, 13 to 18, 19 to 24, and 25 to 30, the stop operation order becomes the correct stop operation order as navigation data during ART. It is set to be distributed with a probability of 100%.

  For example, in the internal winning combination (middle bell) corresponding to the winning numbers 7 to 12, the “middle left and right” stop operation sequence is correct as shown in FIG. 20, and therefore the corresponding stop operation sequence is 100%. It will be sorted by probability.

<Special navigation lottery table>
The special navigation lottery table shown in FIG. 59 is referred to when determining the navigation data during ART in the ART state based on the internal winning combination when the BB malfunction flag is on in the start command reception process shown in FIG. It is a table to be.

  The special navigation lottery table is different from the normal navigation lottery table. For example, in the case of an internal winning combination (lower bell) corresponding to the winning numbers 4 to 6, “middle left / right”, “middle right / left”, “right left” In addition to “middle” and “right middle left”, the “left middle right” stop operation order is set to be distributed with a predetermined probability.

  Therefore, in this special navigation lottery table, the internal winning combination (lower bell) stop operation order may be assigned to the stop operation order of incorrect answers ("left middle right") as ART navigation data. . As a result, the profit (here, the number of medals acquired by ART) given to the player when the RB should be operated by mistake or intentionally winning BB1 or BB2 is adjusted.

  Similarly, in the case of the internal winning combination (middle bell) corresponding to the winning numbers 7 to 12, 13 to 18, 19 to 24, and 25 to 30, the stop operation is not possible other than the stop operation order that is the correct stop operation order. The correct stop operation order is set to be distributed with a predetermined probability.

  For example, in the internal winning combination (middle bell) corresponding to the winning numbers 7 to 12, the stop operation order of “middle left and right” is correct as shown in FIG. 20, but in this special navigation lottery table, the stop operation order is incorrect. The “middle right left”, “right left middle”, and “right middle left” stop operation orders are also distributed with a predetermined probability.

  However, even in this case, since it is necessary to give the player at least the benefit of the RB that should have been won, the “middle right left”, “right left middle” and “right right” The probability of being assigned to the “middle left and right” stop operation order that is the correct answer to the stop operation order is set to be relatively higher than the probability of being assigned to the “middle left” stop operation order. The same applies to the internal winning combinations corresponding to the winning numbers 4 to 6 and 13 to 30.

<Unauthorized Navi lottery table>
The illegal navigation lottery table shown in FIG. 60 is in the ART state based on the internal winning combination when the BB malfunction flag is on and a sequence error has occurred in the start command reception processing shown in FIGS. It is a table referred when determining navigation data during ART.

  The illegal navigation lottery table is different from the normal navigation lottery table and the special navigation lottery table. For example, in the case of the internal winning combination corresponding to the winning numbers 4 to 6 (lower bell), the navigation data during ART is 100% “not notified” It is set to be sorted with the probability of.

  Therefore, the illegal navigation lottery table is configured so that the stop operation is not notified even if the internal winning combination (lower bell) is won as the navigation data during ART. As a result, the sub CPU 81 deliberately wins BB1 or BB2 where the RB should be originally operated, and powers off any or all of the bases constituting the pachislot machine 1 for a moment. It is highly probable that a sequence error has occurred due to an illegal act of temporarily disconnecting communication between the control circuit 71 and the sub-control circuit 72, that is, a so-called line disconnection state. A penalty is imposed to adjust the profit (here, the number of medals won by ART) given to.

  Similarly, in the case of an internal winning combination (middle bell) corresponding to the winning numbers 7 to 12, 13 to 18, 19 to 24, and 25 to 30, the stop operation is set so as not to be notified. .

  However, since a sequence error also occurs when an error occurs during communication between the main control circuit 71 and the sub control circuit 72 in addition to an illegal act by the player, the internal winning combination corresponding to the winning numbers 1 and 2 is as follows. It is configured to be distributed with a probability of 100% to the “left middle right” stop operation sequence in which a normal lip wins.

<Sound list table>
The sound list tables shown in FIGS. 61 and 62 are tables that are referred to when sound effects corresponding to the effect numbers determined by each lottery process are determined in each subflow of the sound control task shown in FIG.

  The sub CPU 81 uses the effect number determined by each lottery process or control process and the sound list table shown in FIGS. 61 and 62, and the command number corresponding to the determined effect number (shown in FIGS. 61 and 62). Sound data associated with cmd No) is transferred from the sub ROM 82 to the DSP 84, and a sound effect is executed.

  As shown in FIGS. 61 and 62, each command number includes a wav file name indicating the file name of the sound data stored in the sub ROM 82, each parameter related to each sound data, and the execution time of each sound data. The volume indicating the sound volume and the type indicating the sound type of each sound data are set.

  The wav file name is a file name of the sound data stored in the sub ROM 82. When executing each sound effect, the sub CPU 81 transfers the sound data of the file name set for each command number from the sub ROM 82 to the DSP 84 and reproduces it by the speakers 9L and 9R. Here, in this embodiment, all sound data is stored in the wav format. In addition, this is an illustration and this invention is not limited to this.

  Each parameter associated with the command number includes a channel (CH) of the digital amplifier 87, a transfer rate (kbps) of sound data, a loop (Loop) and a chain (Chain) which are sound data reproduction patterns. It is configured.

  Of the parameters associated with the command number, the channel (CH) is a parameter indicating an output channel to the digital amplifier 87. Here, in the pachislot machine 1 according to the present embodiment, the digital amplifier 87 has six channels, which are set as CH1 to CH6, respectively.

  For example, when executing a sound effect based on a command number having “1” as CH and a sound effect based on a command number having “2” as CH, the sub CPU 81 assigns CH1 and CH2 of the digital amplifier 87 to each channel. Corresponding sound data is input, and a sound effect that reproduces the sound synthesized from the sound data input to CH1 and the sound data input to CH2 from the digital amplifier 87 is executed.

  Here, when the sub CPU 81 inputs continuous sound data to the same channel, even if the sound data first input to the predetermined channel is being output, the sound input to the predetermined channel afterwards. The sound data input first is overwritten by the data, and the sound data input later is reproduced from the speakers 9L and 9R.

  Of the parameters associated with the command number, the sound data transfer rate (kbps) is transferred from the DSP 84 to the speakers 9L and 9R for one second when reproducing the sound data associated with each command number. This parameter indicates the file capacity that can be recorded.

  Among the parameters associated with the command number, whether or not to perform a so-called loop reproduction, in which the loop is executed again after the end of the sound data when the sound data associated with each command number is executed. It is a parameter which shows.

  Of the parameters associated with the command number, when the chain executes the sound data associated with each command number, whether or not to continuously execute other sound data after the end of the sound data. It is a parameter that indicates.

  The volume is associated with a sound volume when executing sound data associated with each command number. The sub CPU 81 transfers the set volume value to the digital amplifier 87 when executing the sound data associated with each command number.

  The type is a value used in the sound related data initialization process (see FIG. 93) and the sound effect execution process (see FIG. 95), and is composed of type “1” and type “2”.

  Here, the sound data set to the type “1” constitutes specific performance information in the present embodiment, and is transferred from the sub ROM 82 to the audio RAM 85 in the initialization process of the sound related data. In addition, since the sound data set to the type “1” is executed after being transferred from the audio RAM 85 to the DSP 84 in the sound effect execution process, the type “1” is referred to as the sound type in the following description. As “file”.

  In addition, since the sound data set to the type “2” is sound data that is so-called streaming playback that is executed while being transferred from the sub ROM 82 to the DSP 84 in the sound effect execution process, in the following description, Type “2” is also described as “stream” as the sound type.

  In the present embodiment, the sound data set to the type “1” is sound data that has more opportunities to be reproduced than the sound data set to the type “2”.

  The command content describes the content of the sound data associated with each command data. For example, when the gaming state is the normal state and the BET operation is executed, the sub CPU 81 transfers the sound data associated with the command number “103” from the sub ROM 82 to the DSP 84 and executes the sound effect. Thus, “[normal] bet” is set as the command content of the command number “103”.

  In the present embodiment, each sound data is configured to be executed by the DSP 84 until the reproduction ends.

<Sound sequence table>
The sound sequence table shown in FIG. 63 is a table that is referred to by the sub CPU 81 in the sound data analysis process shown in FIG. 94 and the sound effect execution process shown in FIG. 95 when a predetermined condition is satisfied.

  As shown in FIG. 63, in the sound sequence table, when the execution condition is set for each sequence number corresponding to each sound sequence and a plurality of sound effects corresponding to each sequence number are executed, the sub CPU 81 Each command number to be executed, presence / absence of a loop and a chain, and a sound production execution trigger (Trigger) associated with the command number are set. Here, the execution condition set for each sequence number constitutes a predetermined condition in the present embodiment.

  For example, the sub CPU 81 causes the player to execute the first stop operation to the left stop button 7L, the second stop operation to the middle stop button 7C, and the third stop operation to the right stop button 7R to push the replay. When the “replay navigation (left middle right)” which is the navigation is executed, the sequence number “1” is selected.

  When the sequence number “1” is selected, the sub CPU 81 uses the start switch 6S to be turned on as an execution trigger, and the sound effect corresponding to the command number “176” in the sound list table (see FIGS. 61 and 62). The sound production corresponding to the command number “177” of the sound list table is executed as an execution opportunity when the first stop operation is executed, and the execution time as the second stop operation is executed. A sound effect corresponding to the command number “178” in the sound list table is executed.

  In this embodiment, the sound sequence table is composed of fixed length tables of sequence numbers 1 to 14 and sequences 1 to 3. However, the present invention is not limited to this, and there may be a plurality of sequence numbers and sequences. It may be a variable length table.

  In the present embodiment, as shown in FIG. 63, the sub ROM 82 for storing a sound sequence as a production information group composed of a plurality of sound data set in the sound sequence table as a plurality of predetermined production information. The production information group storage means is configured.

<LED / Sound Output List Table>
The LED / sound output list table shown in FIG. 64 is a table referred to when determining LED effect data corresponding to a sound effect in each subflow of the LED output control task shown in FIG.

  The sub CPU 81 determines the LED effect data with reference to the effect number determined by each lottery process or the control process and the LED / sound output list table shown in FIG. 64, and the target portion corresponding to the determined LED effect data. A light emission effect is executed to emit light.

  Here, the pachi-slot machine 1 according to the present embodiment includes a dot display 100 (see FIG. 3), a reel effect display 103 (see FIG. 3), a side effect display 104 (see FIG. 3), and light emission. The part 330 (see FIG. 5) is a target portion that emits light.

  As shown in FIG. 64, each LED effect data is associated with an LED number (LED No). Each LED number is associated with a command number. Here, each command number represents a command number set in the sound list table shown in FIGS.

  The LED / sound output list table includes LED numbers associated with common command numbers. For example, the command number “201” is associated with three LED numbers “21”, “33”, and “34”. The sub CPU 81 executes the sound effect associated with the command number “201” as the sound effect at the time of the normal BB winning, but when winning the BB Lip 1, the sub CPU 81 displays “red 7− on the winning line 8c (see FIG. 3). Since “Red 7-Red 7” is displayed, LED number “21” and LED number “33” are executed. Further, when the sub CPU 81 wins the BB Lip 2, “red 7-red 7-red 7” is displayed on the display line 8e (see FIG. 3), so the LED number “21” and the LED number “33” are displayed. ”Is executed.

  In addition, as shown in FIG. 64, the LED effect data associated with each LED number is set to be executed when various states occur as conditions to be executed. (See FIG. 90), when the LED effect data related to the sound effect being executed is not executed even though the sound effect is being executed, the LED effect data is configured to be executed. Yes.

  As shown in FIGS. 61 to 64, in the present embodiment, the sub ROM 82 for storing sound data and LED effect data as a plurality of effect information executed in accordance with the progress of the game constitutes effect information storage means. To do.

[Main control processing]
The main CPU 31 of the main control circuit 71 executes various processes according to the flowcharts shown in FIGS.

<Main control processing>
FIG. 65 is a flowchart showing the main control process. The main control process described below starts when the pachislot machine 1 is powered on.

  First, when the pachislot machine 1 is powered on, the main CPU 31 executes the power-on process shown in FIG. 66 (S10). In this power-on process, it is determined whether the backup is normal or the setting has been changed appropriately, and an initialization process is executed according to the determination result.

  Next, the main CPU 31 executes an initialization process at the end of one game (one unit game) (S11). In this initialization process, for example, a storage area designated in advance to be initialized at the end of one game is initialized. As a result of this initialization processing, the data stored in the internal winning combination storing area, the display winning combination storing area, etc. of the main RAM 33 is cleared.

  Next, the main CPU 31 executes a medal acceptance / start check process shown in FIG. 67 (S12). In the medal acceptance / start check process, a process for detecting a medal inserted by the player and a process for detecting a start operation are executed.

  Next, the main CPU 31 extracts three random number values (random number values 1 to 3) and stores them in the random value storage area assigned to the main RAM 33 (S13). Here, the random value 1 is a value used for the internal lottery process, and is extracted from 0 to 65535 in the present embodiment.

  The random numbers 2 and 3 are values used for other lottery processing, and are extracted from 0 to 65535 and 0 to 255, respectively, in the present embodiment. The main CPU 31 does not need to extract the random number values 2 and 3 in step S13, and may extract the random number values 2 and 3 when they are used.

  Next, the main CPU 31 executes an internal lottery process shown in FIG. 68 (S14). The main CPU 31 that executes the internal lottery process constitutes an internal winning combination determining means.

  Next, the main CPU 31 executes an ART gaming state lottery process shown in FIG. 69 (S15). This ART gaming state lottery processing includes lottery processing relating to the transition of the ART gaming state and lottery processing for determining whether or not to set a flag referred to in each ART gaming state.

  Next, the main CPU 31 executes a reel stop initial setting process shown in FIG. 73 (S16). By this reel stop initial setting process, each piece of information (for example, stop table number) related to reel stop control is stored in the corresponding area of the main RAM 33 based on the result of the internal lottery process (internal winning combination).

  Next, the main CPU 31 generates start command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated start command data in the communication data storage area allocated to the main RAM 33 (S17).

  The start command data represents, for example, a game state flag type, a bonus end number counter value, an internal winning combination type, a flag type related to lock, a timer value for performance, and the like.

  Next, the main CPU 31 executes a game start freezing process shown in FIG. 74 (S18). In the freezing process at the start of the game, freezing is executed based on various flags referred to in each ART gaming state.

  Next, the main CPU 31 executes a wait process (S19). In this wait process, it is determined whether or not a predetermined time has elapsed since the start of the previous game (start of the previous unit game), and if it is determined that the predetermined time has not elapsed, the predetermined time has elapsed. Wait until you are digested. The predetermined time in the wait process, that is, the wait time is set to 4.1 seconds from the start of the previous unit game, for example.

  Next, the main CPU 31 executes a reel rotation process for rotating all the reels 3L, 3C, 3R according to the number of inserted medals (S20). With this reel rotation start process, “01110000” is stored in the operation stop button storage area (see FIG. 31). The reel rotation start process is executed by the interrupt process shown in FIG. This interrupt process is a process executed at a constant cycle (1.1172 ms).

  By this interruption process, the driving of the stepping motors 49L, 49C, 49R is controlled, and the rotation of the reels 3L, 3C, 3R is started. Thereafter, the driving of the stepping motors 49L, 49C, 49R is controlled by this interruption process, and the rotation of the reels 3L, 3C, 3R is accelerated until reaching a constant speed.

  Further, when the rotation of the reels 3L, 3C, and 3R reaches a constant speed, the interruption processing controls the driving of the stepping motors 49L, 49C, and 49R so that the reels 3L, 3C, and 3R rotate at a constant speed. Maintained.

  Next, the main CPU 31 generates reel rotation start command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated reel rotation start command data in a communication data storage area assigned to the main RAM 33 ( S21).

  By receiving this reel rotation start command data, the sub-control circuit 72 can recognize the start of reel rotation and can determine the timing for executing various effects.

  Next, the main CPU 31 executes a drawing priority order storage process (S22). In the pull-in priority storage process, the pull-in priority table selection process shown in FIG. 77 is executed to determine the pull-in priority of all symbols on the rotating reels 3L, 3C, 3R. In other words, in the pull-in priority storage process, stop information is stored in the pull-in priority data storage area for each symbol position of each rotating reel based on the internal winning combination.

  For example, for each symbol of each reel 3L, 3C, 3R, if the corresponding symbol is permitted to stop, the drawing priority data is stored in the drawing priority data storage area based on the priority table, and the stop is not stopped. In the case of permission (for example, when a winning combination is won), data indicating prohibition of stoppage is stored in the drawing priority data storage area.

  Next, the main CPU 31 executes a reel stop control process shown in FIG. 78 (S23). By this process, the stop control of the reels 3L, 3C, 3R is performed. Next, the main CPU 31 executes a winning search process (S24).

  In this winning search process, after all the reels 3L, 3C, 3R are stopped, the symbol combination displayed on the winning line 8c and the symbol combination table are collated to determine the symbol combination displayed on the winning line 8c. The

  Specifically, the data stored in the symbol code storage area (see FIG. 30) and the data in the symbol combination table (see FIGS. 15 to 17) are collated, and the collation result is displayed in the display combination storage area (FIG. 29). Stored).

  More specifically, the data in the symbol code storage area is copied as it is into the display combination storage area. At this time, the payout number is obtained by referring to the symbol combination table. By the winning search process, the combination of symbols displayed on the display windows 4L, 4C, 4R is specified by stopping all the reels 3L, 3C, 3R.

  Next, the main CPU 31 executes payout of the number of medals according to the displayed symbol combination based on the result of the winning search process (S25). Along with this medal payout process, the control of the hopper drive circuit 41 and the update of the credit number are performed based on the payout number counter.

  Next, the main CPU 31 executes an ART-related process shown in FIG. 80 (S26). This ART-related processing includes management of the number of games related to the ART gaming state, processing for setting a flag referred to in each ART gaming state, and the like.

  Next, the main CPU 31 executes a game end lock process shown in FIG. 81 (S27). In the game end lock process, the lock is executed based on various flags referred to in each ART gaming state.

  Next, the main CPU 31 generates winning operation command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated winning operation command data in a communication data storage area assigned to the main RAM 33 (S28). . The winning operation command data represents, for example, a type of display combination, a flag related to lock, a medal payout number, and the like.

  Next, the main CPU 31 executes a bonus end check process shown in FIG. 82 (S29). By this bonus end check process, a process for ending the MB operation when the MB end condition is satisfied is executed.

  Next, the main CPU 31 executes a bonus operation check process shown in FIG. 83 (S30). By this bonus operation check process, a process of operating the MB based on the combination of symbols displayed by the reels 3L, 3C, 3R is executed. After executing the process of step S30, the main CPU 31 executes the process of step S11.

<Power-on processing>
FIG. 66 is a flowchart showing the power-on process executed in step S10 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the backup is normal (S40). In this determination process, it is determined whether the backup is normal or not by error detection using the checksum value.

  For example, the main CPU 31 stores the set value of the pachislot machine 1 and the checksum value calculated from the set value when the power is turned off in the main RAM 33 as backup data, and the determination process when the power is turned on (S40). , The set value and the checksum value stored in the main RAM 33 are read out.

  Then, the main CPU 31 compares the checksum calculated from the read set value and the checksum that has been backed up, and determines that the backup is normal if the comparison results match.

  When determining that the backup is normal (YES), the main CPU 31 sets the backed up setting values and the like (S41). As a result, when the backup is normal, the set value before the power is turned off is set.

  After executing the process of step S41 or when it is determined in step S40 that the backup is not normal (NO), the main CPU 31 has the setting change switch provided in the cabinet 60 of the pachislot machine 1 turned on. Whether or not (S42). Here, when the main CPU 31 determines that the setting change switch is on (YES), the main CPU 31 executes initialization processing at the time of setting change (S43).

  In the initialization process at the time of changing the setting, for example, the data stored in the internal winning combination storing area and the display winning combination storing area of the main RAM 33 are cleared and the setting value is cleared.

  Subsequently, the main CPU 31 sets the release mode stored in the main RAM 33 to mode 9, and clears the number of released games stored in the main RAM 33 to 0 (S44). Next, the main CPU 31 generates initialization command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated initialization command data in a communication data storage area assigned to the main RAM 33 (S45). . The initialization command data represents, for example, whether or not a set value has been changed and a set value.

  Next, the main CPU 31 executes a setting value change process (S46). In this setting value changing process, the setting value is selected from 1 to 6 according to the operation result of the reset switch, and the setting value selected when the start lever 6 operated subsequently is operated. Is finalized.

  Next, the main CPU 31 determines whether or not the setting change switch is in the on state (S47), and repeatedly executes the process of step S47 until a determination result that is not in the on state is obtained.

  Here, when the determination result that the setting change switch is not in the ON state is obtained (NO), it means that the setting value changing process has been completed, and thus the main CPU 31 extracts the random number value 3. , Referring to the mode transition lottery table (see FIGS. 37 to 45), based on the current cancellation mode, the set value, the lottery trigger, and the random number value 3, the transition destination cancellation mode, that is, the transition destination mode. Is determined (S48).

  Next, the main CPU 31 refers to the release game number lottery table (see FIGS. 46 to 51), and determines the number of release games based on the release mode, the set value, and the random value 3 (S49). Here, if the main CPU 31 determines the number of released games represented by a range such as “0 to 31” as the number of released games, the main CPU 31 randomly determines the number of released games from this range. To do.

  Next, the main CPU 31 generates initialization command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated initialization command data in a communication data storage area assigned to the main RAM 33 (S50). The power-on process is terminated.

  If the main CPU 31 determines in step S42 that the setting change switch is not on (NO), it determines whether the backup is normal (S51). If it is determined that the backup is not normal (NO), the main CPU 31 executes power-on error processing (S52).

  In power-on error processing, the main CPU 31 displays an error display or the like indicating that the backup is not normal. Note that the main CPU 31 does not cancel the error state depending on the operation of the stop release switch or the reset switch in the state where the backup is not normal (backup error), and a new setting change has been made. Only when the error state is cleared.

  If it is determined in step S51 that the backup is normal (YES), the main CPU 31 returns the state of the pachislot machine 1 to the state before the power is turned off based on the backup data stored in the main RAM 33. (S53), the power-on process is terminated.

<Medal reception / start check processing>
FIG. 67 is a flowchart showing the medal acceptance / start check process executed in step S12 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not there is an automatic insertion request (S60). When a replay role is won in the previous unit game, medals are automatically inserted in the current unit game. That is, in the determination process in step S60, it may be determined whether or not a replay combination has been won in the previous unit game.

  In step S60, when determining that there is an automatic insertion request (YES), the main CPU 31 executes an automatic insertion process for automatically inserting the same number of medals as the medals inserted in the previous unit game (S61). Specifically, the main CPU 31 copies the automatic insertion counter to the insertion number counter and clears the automatic insertion counter.

  Subsequently, the main CPU 31 generates medal insertion command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated medal insertion command data in a communication data storage area allocated to the main RAM 33 (S62). . Here, the medal insertion command data represents, for example, the presence / absence of medal insertion, the value of the inserted number counter, the value of the credit counter, and the like.

  If the main CPU 31 determines in step S60 that there is no automatic insertion request (NO), it accepts medals (S63). For example, the main CPU 31 drives a solenoid of a selector (not shown) to form a path so that medals inserted into the medal insertion slot 22 pass through the selector.

  When the main CPU 31 determines in step S60 that there is an automatic insertion request (YES), the medal acceptance process is prohibited since the medal acceptance is prohibited from the previous unit game. Does not execute.

  After the process of step S62 or S63 is executed, the main CPU 31 sets the maximum number of inserted sheets according to the gaming state (S64). In the present embodiment, three are set when the main gaming state is a gaming state other than the MB gaming state, and two are set when the MB gaming state.

  Next, the main CPU 31 determines whether or not acceptance of medals is permitted (S65). If it is determined that the acceptance of medals is permitted (YES), the main CPU 31 executes a medal insertion check process for checking the number of inserted medals (S66). In this medal insertion check process, the value of the insertion number counter is updated according to the number of checked medals.

  Subsequently, the main CPU 31 generates medal insertion command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated medal insertion command data in a communication data storage area assigned to the main RAM 33 (S67). .

  Next, the main CPU 31 determines whether or not medals can be inserted or credited (S68). In the present embodiment, the main CPU 31 determines that the number of inserted games is 3 in the game state other than the MB game state, 2 in the MB game state, and the credit is 50, or On condition that the automatic insertion process of step S61 has been executed, it is determined that a medal cannot be inserted or credited when the condition is satisfied, and a medal can be inserted or credited when the condition is not satisfied. to decide.

  If it is determined in step S68 that a medal cannot be inserted or credited (NO), the main CPU 31 prohibits medal acceptance (S69). For example, the main CPU 31 forms a path through which the medal inserted into the medal insertion slot 22 is discharged from the medal payout opening 15 without driving the selector solenoid.

  When it is determined in step S65 that acceptance of medals is not permitted (NO), in step S68, when it is determined that medals can be inserted or credited (YES), or after the processing of step S69 is executed. The main CPU 31 determines whether or not the number of inserted medals is the number that can start the game (S70).

  That is, the main CPU 31 determines whether or not the number of inserted medals is the number that can start the unit game according to the gaming state. In the present embodiment, the main CPU 31 determines whether or not three medals have been inserted when the main control gaming state is a gaming state other than the MB gaming state, and two medals have been inserted in the MB gaming state. It is determined whether or not.

  Here, when it is determined that the number of inserted medals is not the number that can start the game (NO), the main CPU 31 executes the process of step S65. On the other hand, when it is determined that the number of inserted medals is the number that can start the game (YES), the main CPU 31 determines whether or not the start switch 6S is on (S71).

  If it is determined that the start switch 6S is not on (NO), the main CPU 31 executes the process of step S65. On the other hand, if it is determined that the start switch 6S is on (YES), the main CPU 31 prohibits the reception of medals (S72) and ends the medal reception / start check process.

<Internal lottery processing>
FIG. 68 is a flowchart showing an internal lottery process executed in step S14 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the main gaming state is the MB gaming state (step S80). This determination process is executed based on whether or not bit 0 of the gaming state flag storage area corresponding to the MB gaming state is “1” with reference to the gaming state flag storage area (see FIG. 34).

  That is, when bit 0 of the game state flag storage area is “1”, it is determined that the main game state is the MB game state, and when bit 0 of the game state flag storage area is “0”. It is determined that the main gaming state is not the MB gaming state.

  Here, when the main CPU 31 determines that the gaming state is the MB gaming state (YES), the main CPU 31 executes a process during MB operation (S81). In the processing during MB operation, bits corresponding to all the small combinations in the internal winning combination storing area (see FIG. 28), that is, all the bits in the internal winning combination storing areas 4 to 11 and 0 to 4 in the internal winning combination storing area 12 are stored. All bits are updated to “1”. When the process during MB operation is executed, the main CPU 31 ends the internal lottery process.

  On the other hand, when determining in step S80 that the main gaming state is not the MB gaming state (NO), the main CPU 31 sets an internal lottery table corresponding to the main gaming state (S82).

  In the present embodiment, when the main gaming state is the general gaming state, the main CPU 31 sets the general gaming state internal lottery table (see FIG. 18), and when the main gaming state is the RT1 gaming state. Sets the RT1 gaming state internal lottery table (see FIG. 19).

  Next, the main CPU 31 acquires the random value 1 stored in the random value storage area (S83). Next, the main CPU 31 refers to the predetermined area of the internal lottery table set in step S82, and the lottery value associated with each winning number (1 to 36 in the present embodiment) of the corresponding setting value. Are obtained one by one, and the lottery value is subtracted from the random value 1 (S84). That is, the main CPU 31 verifies the internal winning combination.

  Next, the main CPU 31 determines whether or not the subtraction result obtained in step S84 is smaller than 0 (S85). Here, when the main CPU 31 determines that the subtraction result is not smaller than 0 (NO), that is, when it is determined that so-called borrowing is not performed, the main CPU 31 updates the random number value 1 and the winning number (S86). ).

  Next, the main CPU 31 determines whether or not all winning numbers in the internal lottery table being used have been checked (S87). If it is determined that all winning numbers have not been checked (NO) Then, the process of step S84 is executed.

  On the other hand, if the main CPU 31 determines that all winning numbers have been checked (YES), it sets 0 as the value of the data pointer (S88). In the present embodiment, the internal lottery table for the general gaming state and the internal lottery table for the RT1 gaming state are set so that the subtraction result does not necessarily become 0 or more when the main CPU 31 finishes checking all the winning numbers. Therefore, step S88 is not executed.

  In step S85, if the main CPU 31 determines that the subtraction result is smaller than 0 (YES), that is, if it is determined that so-called borrowing has been performed, the winning number is referred to the set internal lottery table. The value of the data pointer for the small part / replay and the value of the data pointer for the bonus are obtained from (S89).

  After executing the processing of step S88 or S89, the main CPU 31 refers to the small winning combination replay internal winning combination determination table (see FIG. 20) and determines the internal winning combination based on the value of the small winning combination / replay data pointer. Obtain (S90).

  In the process of step S90, the internal winning combination determination table for the small combination / replay is referred to, and 12 bytes indicating the internal winning combination corresponding to the value of the data pointer for small combination / replay acquired in the process of step S88 or S89. Data values are determined.

  Next, the main CPU 31 stores the internal winning combination acquired in step S90 in the internal winning combination storing area (see FIG. 28) (S91). In the process of step S91, a 12-byte data value indicating the internal winning combination determined in the process of step S90 is stored in the internal winning combination storing area (storage areas 1 to 3).

  Next, the main CPU 31 determines whether or not the value of the carryover combination storage area (see FIG. 33) is 0 (S92). In the present embodiment, in this determination process, it is determined whether “MB” is not carried over.

  If the main CPU 31 determines in step S92 that the value of the carryover combination storage area is 0 (YES), it refers to the bonus internal winning combination determination table (see FIG. 21), and determines the value of the bonus data pointer. An internal winning combination is acquired based on (S93).

  In the process of step S93, the bonus internal winning combination determination table is referred to, and a 12-byte data value indicating the internal winning combination corresponding to the value of the bonus data pointer acquired in the process of step S88 or S89 is determined. The

  Subsequently, the main CPU 31 stores the internal winning combination acquired in step S93 in the carryover combination storage area (see FIG. 33) (S94). In the process of step S94, when “MB” is acquired as the internal winning combination in step S93, bit 0 corresponding to “MB” of the carryover storage area is set to “1”.

  Next, the main CPU 31 determines whether or not the value of the carryover combination storage area (see FIG. 33) is 0 (S95). In this determination process, it is determined whether or not bit 0 corresponding to “MB” in the carryover storage area is set to “1” in step S94.

  If it is determined in step S95 that the value of the carryover combination storage area is not 0 (NO), the main CPU 31 sets bit 2 corresponding to “RT1 gaming state” in the gaming state flag storage area (see FIG. 34) to “ 1 ”(S96). By the processing in step S96, the main gaming state becomes the RT1 gaming state.

  If it is determined in step S92 that the value of the carryover combination storage area is not 0 (NO), if it is determined in step S95 that the value of the carryover combination storage area is 0 (YES), or after executing the process of step S96 The main CPU 31 updates the internal winning combination storing area based on the internal winning combination stored in the carryover combination storing area (S97).

  In the process of step S97, the 12-byte data value in the internal symbol combination storage area (see FIG. 28) is updated based on the type of internal symbol combination stored in the carryover combination storage area (see FIG. 33). . After executing the process of step S97, the main CPU 31 ends the internal lottery process.

<ART gaming state lottery processing>
FIG. 69 is a flowchart showing the ART gaming state lottery processing executed in step S15 of the main control processing shown in FIG.

  First, the main CPU 31 determines whether or not the main gaming state is the MB gaming state (step S100). In this determination processing, when bit 0 corresponding to “MB gaming state” in the gaming state flag storage area (see FIG. 34) is “1”, it is determined that the main gaming state is the MB gaming state, and “ If it is “0”, it is determined that the main gaming state is not the MB gaming state.

  Here, if it is determined that the main gaming state is the MB gaming state (YES), the main CPU 31 ends the ART gaming state lottery process. On the other hand, when determining that the main gaming state is not the MB gaming state (NO), the main CPU 31 determines whether or not the ART gaming state is the ART state (S101).

  In this determination process, when the bit 6 corresponding to the “ART state” in the gaming state flag storage area (see FIG. 34) is “1”, it is determined that the ART gaming state is the ART state, and “0”. If it is, it is determined that the ART gaming state is not the ART state.

  Here, when the main CPU 31 determines that the ART gaming state is the ART state (YES), the main CPU 31 executes the ART state processing shown in FIG. 70 (S102). On the other hand, when determining that the ART gaming state is not the ART state (NO), the main CPU 31 determines whether or not the ART gaming state is the ART winning state (S103).

  In this determination process, when the bit 4 corresponding to the “ART winning state” in the gaming state flag storage area (see FIG. 34) is “1”, it is determined that the ART gaming state is the ART winning state. When it is “0”, it is determined that the ART gaming state is not the ART winning state.

  If the main CPU 31 determines that the ART gaming state is the ART winning state (YES), the main CPU 31 executes the ART winning state processing shown in FIG. 71 (S104). On the other hand, when determining that the ART gaming state is not the ART winning state (NO), the main CPU 31 determines whether or not the ART gaming state is an ART start waiting state (S105).

  In this determination process, if bit 5 corresponding to the “ART start waiting state” in the gaming state flag storage area (see FIG. 34) is “1”, it is determined that the ART gaming state is the ART winning state, When it is “0”, it is determined that the ART gaming state is not the ART winning state.

  If the main CPU 31 determines that the ART gaming state is the ART winning state (YES), the main CPU 31 ends the ART gaming state lottery process. On the other hand, when the main CPU 31 determines that the ART gaming state is not the ART winning state (NO), the main CPU 31 refers to the release lottery table (see FIG. 52), determines the current release mode, the set value, Based on the internal winning combination and the random number 2, it is determined whether or not the start lock release lottery has been won (S106), and based on the determined result whether or not the start lock release lottery has been won. Is determined (S107).

  Here, if the main CPU 31 determines that it has not won the starting lock release lottery (NO), it subtracts 1 from the number of released games (S108). Subsequently, the main CPU 31 determines whether or not the number of released games is 0 (S109). If the main CPU 31 determines that the number of released games is not 0 (NO), the main CPU 31 performs an ART gaming state lottery process. finish.

  If it is determined in step S107 that the starting lock release lottery has been won (YES), or if it is determined in step S109 that the number of released games is 0 (YES), the main CPU 31 determines that the ART gaming state Then, the ART winning state is set (S110).

  The process of step S110 is a process of setting bit 4 corresponding to the “ART winning state” in the game state flag storage area (see FIG. 34) to “1”. The main CPU 31 that executes such processing constitutes a game state transition means.

  Subsequently, the main CPU 31 executes the ART winning state transition process shown in FIG. 72 (S111). This ART winning state transition processing includes processing for determining the transition destination mode, the number of games to be released next time, whether or not to perform a short freeze, a notification mode, and the like. When the ART winning state transition process is executed, the main CPU 31 ends the ART gaming state lottery process.

<Processing during ART state>
FIG. 70 is a flowchart showing the ART gaming process executed in step S102 of the ART gaming state lottery process shown in FIG.

  First, the main CPU 31 refers to the long freeze reservation lottery table during ART shown in FIG. 56 and determines whether or not a long freeze reservation has been won based on the internal winning combination and the random number value 2 (S121). Based on the determined result, it is determined whether or not a long freeze reservation is won (S122).

  If it is determined that the long freeze reservation has not been won (NO), the main CPU 31 ends the ART state process. On the other hand, if it is determined that the long freeze reservation is won (YES), the main CPU 31 sets the long freeze reservation flag stored in the main RAM 33 to ON (S123).

  Subsequently, the main CPU 31 refers to the mode transition lottery table (see FIGS. 37 to 45) and determines the transition destination mode based on the current release mode, the lottery trigger, and the random value 3 (S124). Then, the processing in the ART state is terminated.

<Process during ART winning state>
FIG. 71 is a flowchart showing the ART winning state process executed in step S104 of the ART gaming state lottery process shown in FIG.

  First, the main CPU 31 determines whether or not the bonus lip 1 or 2 is internally won (S130).

  If it is determined that the bonus lip 1 or 2 has not been won internally (NO), the main CPU 31 ends the ART winning state process. On the other hand, when it is determined that the bonus lip 1 or 2 is internally won (YES), the main CPU 31 determines whether or not the announcement is won based on the notification mode stored in the main RAM 33. (S131) Based on the determined result, it is determined whether or not the announcement is won (S132).

  That is, the main CPU 31 determines whether or not to execute the ART winning notification based on the notification probability in the determined notification mode (see FIG. 72) every time the bonus lip 1 or 2 is internally won in the game in the ART winning state. To decide.

  The main CPU 31 that executes such processing constitutes a winning notification determining means. If it is decided to execute the ART winning announcement, the ART winning announcement is actually executed on the sub CPU 81 side.

  If it is determined that the notification has not been won (NO), the main CPU 31 ends the ART winning state process. On the other hand, if it is determined that the notification is won (YES), an ART start waiting state is set as the ART gaming state (S133).

  In the process of step S133, bit 4 corresponding to the “ART winning state” in the gaming state flag storage area (see FIG. 34) is reset to “0”, and bit 5 corresponding to the “ART start waiting state” is set to “1”. Is set.

  Subsequently, the main CPU 31 turns on the notification flag stored in the main RAM 33 (S134), and ends the ART winning state processing.

<Process during ART winning state transition>
FIG. 72 is a flowchart showing the ART win state transition process executed in step S111 of the ART gaming state lottery process shown in FIG.

  First, the main CPU 31 refers to the mode transition lottery table (see FIGS. 37 to 45) and determines the transition destination mode based on the current release mode, the set value, the lottery trigger, and the random number value 3 ( S140).

  Next, the main CPU 31 refers to the release game number lottery table (see FIGS. 46 to 51), and determines the next release game number based on the current release mode, the set value, and the random value 3. (S141).

  Next, the main CPU 31 refers to the short freeze lottery table (see FIG. 53) upon transition to the ART winning state, and determines whether or not the short freeze has been won based on the release opportunity and the random number value 3 (S142). Based on the determined result, it is determined whether or not the short freeze has been won (S143).

  If it is determined that the short freeze has been won (YES), the main CPU 31 sets the short freeze flag stored in the main RAM 33 to on (S144).

  If it is determined in step S143 that the short freeze has not been won (NO), or after the short freeze flag is turned on, the main CPU 31 determines whether or not the long freeze reservation flag is on (S145). .

  Here, if it is determined that the long freeze reservation flag is not ON (NO), the main CPU 31 refers to the long freeze reservation lottery table (see FIG. 54) at the time of the ART winning state transition, the release opportunity, and the random value 2 Based on the above, it is determined whether or not a long freeze reservation has been won (S146), and based on the determined result, it is determined whether or not a long freeze reservation has been won (S147).

  If it is determined that the long freeze reservation has been won (YES), the main CPU 31 sets the long freeze reservation flag to ON (S148). Next, the main CPU 31 refers to the mode transition lottery table (see FIGS. 37 to 45) and determines the transition destination mode based on the current release mode, the set value, the lottery trigger, and the random number value 3. (S149).

  If it is determined in step S145 that the long freeze reservation flag is ON (YES), if it is determined in step S147 that the long freeze reservation has not been won (NO), or the long freeze reservation flag is set ON. After that, the main CPU 31 refers to the ART winning state transition notification mode lottery table, and determines the notification mode based on the lottery trigger and the random value 2 (S150).

  That is, the main CPU 31 determines any one of the notification modes 1 to 3 having different notification probabilities in which it is determined to execute the ART winning notification. At this time, the main CPU 31 determines the notification mode with the notification mode distribution probability associated with each release condition in the ART win state transition notification mode lottery table shown in FIG.

  For example, when the number of games is canceled, it is distributed to the notification mode 1 with a probability of 100%, and when it is canceled the watermelon, it is distributed to either the notification mode 1 or the notification mode 2. The main CPU 31 that executes such processing constitutes notification mode determination means.

<Reel stop initial setting process>
FIG. 73 is a flowchart showing the reel stop initial setting process executed in step S16 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the main gaming state is the MB gaming state (S160). Here, when it is determined that the main gaming state is the MB gaming state (YES), the main CPU 31 sets 36 as a rotation stop number (S161).

  On the other hand, if it is determined that the main gaming state is not the MB gaming state (NO), the main CPU 31 is the same as the small role / replay data pointer acquired in step S89 of the internal lottery process shown in FIG. The value is set as a rotating cylinder stop number (S162).

  When the turning stop number is set in this way, the main CPU 31 refers to the reel stop initial setting table (see FIG. 22), and acquires each piece of information based on the turning stop number (S163).

  In the process of step S163, for example, the main CPU 31 specifies the numbers of stop tables used at the time of the first to third stops and information necessary for performing control change in the control change process (that is, the reels 3L, 3C, and 3R are identified) When the information is stopped in this order, information used for reselecting the stop table when it is stopped (or pressed) at a specific position is acquired.

  The stop table stores information on the number of sliding pieces for the pressed position, either directly or indirectly. Using this information, there is a limit that does not cause a disadvantage to the player and does not cause an erroneous winning prize. Are configured to stop at a stop position intended by the developer.

  Next, the main CPU 31 stores the rotating identifier in each storage area of the symbol code storage area (see FIG. 30) (S164), stores 3 in the stop button non-operation counter (S165), and sets the reel stop initial setting. The process ends.

<Freeze process at game start>
FIG. 74 is a flowchart showing the game start freeze process executed in step S18 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the short freeze flag is on (S170). If it is determined that the short freeze flag is on (YES), the main CPU 31 sets 269 (about 0.3 seconds) in the effect freeze timer (S171).

  On the other hand, when determining that the short freeze flag is not on (NO), the main CPU 31 determines whether or not the notification flag is on (S172). Here, if it is determined that the notification flag is not ON (NO), the main CPU 31 ends the freezing process at the start of the game. On the other hand, if it is determined that the notification flag is on (YES), the main CPU 31 determines whether or not the long freeze reservation flag is on (S173).

  If it is determined that the long freeze reservation flag is ON (YES), the main CPU 31 sets 10742 (about 12 seconds) in the effect freeze timer (S174). On the other hand, when determining that the long freeze reservation flag is not ON (NO), the main CPU 31 sets 1791 (about 2 seconds) in the effect freeze timer (S175).

  Thus, when a value is set in the effect freeze timer in steps S171, S174, and S175, the main CPU 31 waits for the value of the effect freeze timer to become 0 (S176).

  That is, when it is determined that the value of the effect freeze timer is not 0 (NO), the main CPU 31 executes the process of step S176. On the other hand, if it is determined that the value of the effect freeze timer has become 0 (YES), the main CPU 31 clears each used flag to OFF (NO), and ends the freezing process at the start of the game.

<Retrieve priority storage process>
FIG. 75 is a flowchart showing the pull-in priority storage process executed in step S22 of the main control process shown in FIG. 65 and step S234 of the reel stop control process shown in FIG.

  First, the main CPU 31 stores the value of the stop button non-operating counter in the main RAM 33 as the number of searches (S180). Next, the main CPU 31 executes a search target reel determination process for determining a search target reel. In this process, among the rotating reels, for example, one reel on the left side is determined as a search target reel.

  Next, the main CPU 31 executes a pull-in priority table selection process shown in FIG. 77 (S181). In this pull-in priority table selection process, one pull-in priority table number is selected from the pull-in priority table (see FIG. 24) (S182).

  Next, the main CPU 31 sets 21 (the number of symbols on each reel) to the number of symbol checks stored in the main RAM 33, and sets 0 to the search symbol position (S183).

  Next, the main CPU 31 executes a symbol code storing process shown in FIG. 76 (S184). In the symbol code storage process, a symbol code of the symbol position data for checking for checking the symbol position of the rotating reel is acquired.

  Next, the main CPU 31 updates the display combination storing area (see FIG. 29) based on the acquired symbol code and the symbol code storing area (see FIG. 30) (S185). Next, the main CPU 31 executes a pull-in priority data acquisition process (S186).

  This pull-in priority data acquisition processing is performed in step S182 for a combination in which the corresponding bit is 1 in the display combination storage area and the corresponding bit is 1 in the internal winning combination storage area (see FIG. 28). With reference to the selected pull-in priority table, pull-in priority data is acquired.

  In the drawing priority order data acquisition process, “stop prohibition” (000H) is set for the symbol positions that are erroneously won when stopped, and no internal winnings are made. For the symbol position, “stoppable” (001H) is set.

  Next, the main CPU 31 stores the acquired drawing priority data in the drawing priority data storage area corresponding to the search target reel (S187). Next, the main CPU 31 subtracts 1 from the number of symbol checks, and adds 1 to the retrieved symbol position (S188).

  Next, the main CPU 31 determines whether or not the number of symbol checks is 0 (S189). Here, when it is determined that the number of symbol checks is not 0 (NO), the main CPU 31 executes the process of step S184.

  On the other hand, if it is determined that the number of symbol checks is 0 (YES), the main CPU 31 determines whether or not a search for the number of searches has been executed (S190). If it is determined that the search for the number of times of search has been executed (YES), the main CPU 31 ends the pull-in priority storage process. On the other hand, if it is determined that the search for the number of times of search has been executed (YES), the main CPU 31 executes the process of step S184.

<Design code storage processing>
FIG. 76 is a flowchart showing the symbol code storage process executed in step S184 of the drawing priority order storage process shown in FIG.

  First, the main CPU 31 sets valid line data (S200). In the present embodiment, one effective line (medium-medium-medium) is set.

  Next, the main CPU 31 sets check symbol position data for the search target reel based on the search symbol position and the effective line data (S201). In the present embodiment, for example, the middle symbol position is set as check symbol position data for each reel.

  Next, the main CPU 31 acquires the symbol code of the symbol position data for check (S202), and ends the symbol code storage process.

<Pull-in priority table selection processing>
FIG. 77 is a flowchart showing a pull-in priority table selection process executed in step S182 of the pull-in priority storage process shown in FIG.

  First, the main CPU 31 determines whether or not pull-in priority table selection data is set (S210). If it is determined that the pull-in priority table selection data is set (YES), the main CPU 31 refers to the pressing order storage area (see FIG. 32) and the operation stop button storage area (see FIG. 31). Then, the drawing priority table number corresponding to the drawing priority table selection data is set from the drawing priority table selection table (see FIG. 24) (S211), and the drawing priority table selection process is terminated.

  On the other hand, if it is determined that the pull-in priority table selection data is not set (NO), the main CPU 31 sets a pull-in priority table corresponding to the pull-in priority table number (S212), and the pull-in priority table The selection process ends.

<Reel stop control process>
FIG. 78 is a flowchart showing the reel stop control process executed in step S23 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not a valid stop button has been pressed (S220). This process is a process for determining whether or not a signal is output from the stop switch 7S. If the main CPU 31 determines that a valid stop button has not been pressed (NO), it repeatedly executes the process of step S220.

  On the other hand, when the main CPU 31 determines that a valid stop button has been pressed (YES), the main CPU 31 selects a pressing order storage area (see FIG. 32) and an operation stop button storage area (see FIG. 32) according to the pressed stop button. 31) is updated (S221).

  Here, the main CPU 31 stores the type of the operation stop button corresponding to each of the first stop operation, the second stop operation, and the third stop operation in the pressing order storage area (see FIG. 32). , It is possible to determine the pressing order of the stop buttons 7L, 7C, 7R.

  Subsequently, the main CPU 31 subtracts 1 from the stop button non-operation counter (S222), determines a search target reel from the operation stop button (S223), and stores the stop start position in the main RAM 33 based on the symbol counter (S223). S224). The stop start position is a symbol position corresponding to the symbol counter of the reel when the stop operation is detected by the stop switch 7S.

  Next, the main CPU 31 executes a sliding piece number determination process (S225). In this sliding piece number determination process, the number of sliding pieces defined at the stop start position is determined based on the stop table selection data group selected based on the internal winning combination from the reel stop initial setting table (see FIG. 22). It is processing.

  Next, the main CPU 31 executes a priority pull-in control process shown in FIG. 79 (S226). The priority pull-in control process is performed so that the drawing priority data of the number of sliding symbols acquired in step S225 stops at the symbol position corresponding to the higher drawing priority data within the range of the maximum number of sliding symbols. This is a process of correcting the number.

  Next, the main CPU 31 generates reel stop command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated reel stop command data in the communication data storage area assigned to the main RAM 33 (S227). . This reel stop command data represents the type of reel to be stopped, the stop start position, the number of sliding pieces (or planned stop position), and the like.

  Next, the main CPU 31 determines a planned stop position based on the stop start position and the number of sliding pieces, and stores it in the main RAM 33 (S228). The scheduled stop position is a symbol position obtained by adding any of predetermined numerical values “0” to “4” defined as the number of sliding pieces to the stop start position, and the symbol position where the reel rotation stops. It is.

  Next, the main CPU 31 sets the planned stop position as a search symbol position (S229). Next, the main CPU 31 executes a symbol code storage process (see FIG. 76) (S230).

  Next, the main CPU 31 updates the symbol code storage area from the symbol code acquired in the symbol code storage process (S231). Next, the main CPU 31 performs a control change process (S232). In this control change process, the reel stop information group is updated when a specific stop position is reached.

  Next, the main CPU 31 determines whether or not the stop button non-operation counter is 0 (S233). Here, when it is determined that the stop button non-operation counter is not 0 (NO), the main CPU 31 executes the pull-in priority storage process (see FIG. 75) (S234), and executes the process of step S220. On the other hand, when it is determined that the stop button non-operation counter is 0 (YES), the main CPU 31 ends the reel stop control process.

<Priority pull-in control processing>
FIG. 79 is a flowchart showing the priority pull-in control process executed in step S226 of the reel stop control process shown in FIG.

  First, the main CPU 31 sets a pull-in priority data storage area corresponding to the operation stop button (S240). Next, the main CPU 31 obtains the stop start position stored in the main RAM 33 (S241).

  Next, the main CPU 31 determines whether or not the MB is operating (S242). In this determination process, when bit 0 of the game state flag storage area (see FIG. 34) is “1”, it is determined that the MB is in operation, and when it is “0”, the MB is in operation. Judge that it is not inside.

  If it is determined that the MB is operating (YES), the main CPU 31 determines whether or not the search target reel determined in step S223 of the reel stop control process shown in FIG. 78 is the left reel 3L. Is determined (S243).

  If it is determined in step S242 that the MB is not operating (NO), or if it is determined in step S243 that the search target reel is not the left reel 3L (NO), the main CPU 31 performs a step of reel stop control processing. A priority order table (see FIG. 25) corresponding to the number of sliding piece determination data determined in S225 is set (S244).

  For example, if the number of sliding symbols determined by the stop table (stop data table) is 4, the row (address) in which the number of sliding symbols determined in the priority order table is 4 is set. Next, the main CPU 31 sets 5 as the initial value of the priority order and the number of checks (S245). That is, it is determined to search five times from 0 to 4 frames.

  If it is determined in step S243 that the search target reel is the left reel 3L (YES), the main CPU 31 sets an MB gaming state priority order table (see FIG. 26) according to the number of sliding piece determination data. (S246). Subsequently, the main CPU 31 sets 3 as the initial value of the priority order and sets 2 as the number of checks (S247).

  After executing the processing of step S245 or S246, the main CPU 31 sets the sliding piece number determination data as the number of sliding pieces (S248). Next, the main CPU 31 extracts a stop search position based on the stop start position and the priority order (S249).

  Next, the main CPU 31 acquires pull-in priority order data of the stop search position (S250). Next, the main CPU 31 determines whether or not the pull-in priority data acquired in the process of S250 is equal to or higher than the pull-in priority data acquired previously (S251).

  If it is determined that the pull-in priority data acquired in the process of S250 is greater than or equal to the pull-in priority data acquired previously (YES), the main CPU 31 updates the number of sliding frames (S252).

  In step S251, when it is determined that the pull-in priority data acquired in the process of S250 is not higher than the pull-in priority data acquired previously (NO), or after executing the process of S251, the main CPU 31 1 is subtracted from each check count (S253).

  Next, the main CPU 31 determines whether or not the number of checks is 0 (S254). Here, if it is determined that the number of checks is 0 (YES), the main CPU 31 sets the number of sliding frames (S255) and ends the priority pull-in control process. On the other hand, if it is determined that the number of checks is not 0 (NO), the main CPU 31 executes the process of S249.

<ART-related processing>
FIG. 80 is a flowchart showing the ART-related processing executed in step S26 of the main control processing shown in FIG.

  First, the main CPU 31 determines whether or not the main gaming state is the MB gaming state (S260). In this determination process, when bit 0 of the game state flag storage area (see FIG. 34) is “1”, it is determined that the main game state is the MB game state, and when bit 0 is “0”, It is determined that the main gaming state is not the MB gaming state.

  Here, when it is determined that the main gaming state is the MB gaming state (YES), the main CPU 31 ends the ART-related processing. On the other hand, when determining that the main gaming state is not the MB gaming state (NO), the main CPU 31 determines whether or not the ART gaming state is the ART state (S261).

  In this determination process, if bit 6 of the gaming state flag storage area is “1”, it is determined that the ART gaming state is the ART state, and if it is “0”, the ART gaming state is the ART state. It is judged that it is not.

  If it is determined that the ART gaming state is the ART state (YES), the main CPU 31 subtracts 1 from the number of ART games stored in the main RAM 33 (S262).

  Next, the main CPU 31 determines whether or not the number of ART games is 0 (S263). If it is determined that the number of ART games is not 0 (NO), the main CPU 31 ends the ART-related processing.

  On the other hand, if it is determined that the number of ART games is 0 (YES), the main CPU 31 determines that the ART state has shifted to the end of the BB Lip 1 or BB Lip 2 winning (hereinafter simply referred to as “BB End”). (S264).

  If it is determined that it is time to end the BB (YES), the main CPU 31 sets the BB end flag stored in the main RAM 33 to “1” (S265), and ends the ART-related processing.

  On the other hand, when it is determined that the ART state shifted by winning the BB Lip 1 or BB Lip 2, that is, the ART state shifted by winning the RB Lip is not finished (NO), the main CPU 31 stores it in the main RAM 33. The RB end flag thus set is set to “1” (S266), and the ART related processing is ended.

  If it is determined in step S261 that the ART gaming state is not the ART state (NO), the main CPU 31 determines whether or not the ART gaming state is an ART start waiting state (S267).

  In this determination process, when bit 5 of the game state flag storage area (see FIG. 34) is “1”, it is determined that the ART game state is an ART start wait state, and when it is “0”. , It is determined that the ART gaming state is not an ART start waiting state.

  Here, if it is determined that the ART gaming state is not an ART start waiting state (NO), the main CPU 31 ends the ART-related processing. On the other hand, if it is determined that the ART gaming state is an ART start waiting state (YES), the main CPU 31 is in the BB Lip 1 or BB Lip 2 winning (hereinafter simply referred to as “BB Lip Winning”). It is determined whether or not there is (S268).

  If the main CPU 31 determines that the BB Lip prize is received (YES), the main CPU 31 sets the BB start flag stored in the main RAM 33 to “1” (S269), and sets, for example, 70 games as the number of ART games. (S270), ART-related processing is terminated.

  On the other hand, if it is determined that it is not BB lip winning (NO), the main CPU 31 determines whether it is RB lip winning (hereinafter simply referred to as “RB lip winning”) (S271). . Here, if it is determined that it is at the time of RB lip winning (YES), the main CPU 31 sets the RB start flag stored in the main RAM 33 to “1” (S272), and the number of ART games is, for example, 20 games Is set (S273), and the ART-related processing is terminated.

  In this way, the main CPU 31 that executes the ART-related processing shown in FIG. 80 constitutes a lock determination unit.

<Lock process at the end of the game>
FIG. 81 is a flowchart showing the game end lock process executed in step S27 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the BB start flag is on (S280). If it is determined that the BB start flag is on, the main CPU 31 sets 4476 (about 5 seconds) in the effect lock timer (S281), and turns on the external signal 1 (S282). That is, the main CPU 31 turns on (first state) the external signal 1 transmitted to the outside of the gaming machine on condition that the start-time lock is performed.

  On the other hand, when determining that the BB start flag is not on, the main CPU 31 determines whether or not the RB start flag is on (S283). If it is determined that the RB start flag is on, the main CPU 31 sets 1 to the effect lock timer (S284) and turns on the external signal 2 (S285). That is, the main CPU 31 turns on the external signal 2 transmitted to the outside of the gaming machine on the condition that the start time lock is performed (first state).

  After executing the processing of step S282 or S285, the main CPU 31 sets the ART state as the ART gaming state (S286). In the process of step S286, bit 5 corresponding to “ART start waiting state” in the gaming state flag storage area (see FIG. 34) is reset to “0”, and bit 6 corresponding to “ART state” is set to “1”. Set to

  If it is determined in step S283 that the RB start flag is not on, the main CPU 31 determines whether or not the BB end flag is on (S287). If it is determined that the BB end flag is on, the main CPU 31 sets 3581 (about 4 seconds) in the effect lock timer (S288), and turns off the external signal 1 (S289). That is, the main CPU 31 turns off the external signal 1 turned on in step S282 (second state) on the condition that the lock at the time of termination is performed.

  On the other hand, when determining that the BB end flag is not on, the main CPU 31 determines whether or not the RB end flag is on (S290). If it is determined that the RB end flag is ON, the main CPU 31 sets 1 in the effect lock timer (S284) and turns off the external signal 2 (S292). That is, the main CPU 31 turns off the external signal 2 turned on in step S285 (second state) on the condition that the lock at the end is performed.

  After executing the process of step S289 or S292, the main CPU 31 sets the normal gaming state as the ART gaming state (S293). In the process of step S293, bit 6 corresponding to the “ART state” in the game state flag storage area (see FIG. 34) is reset to “0”.

  After executing the processing of step S286 or S293, the main CPU 31 waits for the value of the effect lock timer to become 0 (S294). That is, when determining that the value of the effect freeze timer is not 0 (NO), the main CPU 31 executes the process of step S294.

  On the other hand, if it is determined that the value of the effect freeze timer has become 0 (YES), the main CPU 31 clears each used flag to off (NO), and the game end lock process ends.

  As described above, the main CPU 31 that executes the ART related process shown in FIG. 80 and the game end lock process shown in FIG. 81 constitutes an external signal control means, a start lock execution means, and an end lock execution means.

  In the present embodiment, the main CPU 31 turns on the external signals 1 and 2 when the BB start flag or RB start flag is on, and the external signal when the BB end flag or RB end flag is on. It demonstrated that 1 and 2 were each turned off.

  On the other hand, the main CPU 31 turns off the external signals 1 and 2 when the BB start flag or the RB start flag is on, and outputs the external signals 1 and 2 when the BB end flag or the RB end flag is on. Each may be turned on. In this case, the state in which the external signals 1 and 2 are on corresponds to the first state, and the state in which the external signals 1 and 2 are off corresponds to the second state.

<Bonus end check process>
FIG. 82 is a flowchart showing the bonus end check process executed in step S29 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the MB is operating (S300). In this process, when bit 0 of the game state flag storage area is “1”, it is determined that the MB is operating. When bit 0 of the game state flag storage area is “0”, the MB operation is performed. Judged not to be inside.

  If it is determined that the MB is operating (YES), the main CPU 31 ends the bonus end check process. On the other hand, if it is determined that the MB is operating (YES), the main CPU 31 executes CB termination processing (S301). In this CB end processing, bit 1 of the game state flag storage area is reset to “0”.

  Subsequently, the main CPU 31 updates the bonus end number counter indicating the remaining payout number (S302), and determines whether or not the value of the bonus end number counter is less than 0 (S303).

  If it is determined that the value of the bonus end number counter is not less than 0 (NO), the main CPU 31 ends the bonus end check process. On the other hand, when determining that the value of the bonus end number counter is less than 0, the main CPU 31 performs MB end processing (S304). In the MB end process, bit 0 of the game state flag storage area is reset to “0”.

  Subsequently, the main CPU 31 generates bonus end command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated bonus end command data in a communication data storage area allocated to the main RAM 33 (S227). The bonus end check process is terminated. Here, the bonus end command data represents, for example, that the bonus has ended.

<Bonus activation check process>
FIG. 83 is a flowchart showing the bonus operation check process executed in step S30 of the main control process shown in FIG.

  First, the main CPU 31 determines whether or not the MB is operating (S310). In this process, when bit 0 of the gaming state flag storage area is “1”, it is determined that the MB is operating, and when bit 0 of the gaming state flag storage area is “0”, MB is determined. Judged not working.

  If it is determined that the MB is in operation (YES), the main CPU 31 executes the CB operation process (S311) and ends the bonus operation check process. In the CB operation process, bit 1 of the game state flag storage area is set to “1”.

  On the other hand, when determining that the MB is not operating (NO), the main CPU 31 determines whether or not the MB has won (S312). Here, when it is determined that the MB has won, the main CPU 31 executes MB operation processing (S313).

  In the MB operation process, bit 0 of the game state flag storage area is set to “1”, for example, 30 is set to the bonus end number counter, and the bit of the game state flag storage area is set to “1”.

  Next, the main CPU 31 clears the value of the carryover combination storage area (S314), generates bonus start command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated bonus start command data in the main RAM 33. The stored data is stored in the assigned communication data storage area (S315), and the bonus operation check process is terminated.

  If it is determined in step S312 that the MB has not won, the main CPU 31 executes replay (“BB lip 1”, “BB lip 2”, “RB lip”, “normal lip”, and “special replay 1” to It is determined whether or not “special replay 11” is displayed (S316).

  If it is determined that no replay is displayed (NO), the main CPU 31 ends the bonus operation check process. On the other hand, if it is determined that the replay is displayed (YES), the main CPU 31 makes an automatic insertion request for copying the value of the insertion number counter to the automatic insertion number counter (S317), and ends the bonus operation check process.

<Interrupt processing under main CPU control>
FIG. 84 is a flowchart showing an interrupt process under the control of the main CPU 31. This process is executed every 1.1172 milliseconds.

  First, the main CPU 31 saves the register (S320). Next, the main CPU 31 executes an input port check process shown in FIG. 85 (S321). In this process, the main CPU 31 confirms the presence or absence of a signal transmitted to the sub control circuit 72.

  For example, the main CPU 31 stores input state command data representing on-edge and off-edge information of various switches including the on-edge and off-edge of the start switch 6S and stop switch 7S in the communication data storage area of the main RAM 33.

  Next, the main CPU 31 executes timer update processing (S322). Next, the main CPU 31 executes communication data transmission processing shown in FIG. 86 (S323). In this process, the command data stored in the communication data storage area of the main RAM 33 is transmitted to the sub control circuit 72.

  Next, the main CPU 31 executes a reel control process for controlling the rotation of the reels 3L, 3C, 3R (S324). More specifically, the main CPU 31 starts the rotation of the reels 3L, 3C, and 3R in response to a request for starting the rotation of the reels 3L, 3C, and 3R, that is, in response to the start operation. Control is performed so that 3L, 3C, and 3R rotate. Further, the main CPU 31 performs control so that the rotation of the reels 3L, 3C, and 3R corresponding to the stop operation stops in response to the stop operation.

  Next, the main CPU 31 executes a lamp / 7SEG drive process (S325). For example, the main CPU 31 displays the number of credited medals, the number of payouts, etc. on various display units. Next, the main CPU 31 restores the register (S326), and terminates the interrupt process that occurs periodically.

<Input port check processing>
FIG. 85 is a flowchart showing the input port check process executed in step S321 of the interrupt process under the control of the main CPU 31.

  First, the main CPU 31 checks the state of each input port (S330). Next, the main CPU 31 stores the previous interrupt, that is, the state of the input port before one interrupt in the main RAM 33 (S331), and stores the current input port state in the main RAM 33 (S332).

  As described above, the main CPU 31 can check the states of both input ports by comparing the state of the input port before one interrupt with the current state of the input port. Thus, it is checked whether the state of the input port has changed, for example, whether or not the bet button 11 has been pressed.

  Next, the main CPU 31 stores the on-edge state in the main RAM 33 (S333). In the present embodiment, the on-edge refers to a state where the button is pressed, and the off-edge refers to a state where the button is released.

  Next, the main CPU 31 generates input state command data to be transmitted from the main control circuit 71 to the sub control circuit 72, and stores the generated input state command data in a communication data storage area assigned to the main RAM 33 (S334). The input port check process is terminated.

<Communication data transmission processing>
FIG. 86 is a flowchart showing the communication data transmission process executed in step S323 of the interrupt process under the control of the main CPU 31.

  First, the main CPU 31 subtracts 1 from the communication data transmission timer (S340). Next, the main CPU 31 determines whether or not the communication data transmission timer is 0 (S341).

  If it is determined that the communication data transmission timer is not 0 (NO), the main CPU 31 ends the communication data transmission process. On the other hand, when it is determined that the communication data transmission timer is 0 (YES), the main CPU 31 determines whether there is untransmitted data in the communication data storage area (S342).

  If it is determined that there is no untransmitted data in the communication data storage area (NO), the main CPU 31 generates no-operation command data indicating that there is no data to be transmitted, and the generated no-operation command data Is stored in the communication data storage area allocated to the main RAM 33 (S343).

  In step S342, when it is determined that there is untransmitted data in the communication data storage area, or after executing the process of step S343, the main CPU 31 sets, for example, 14 as an initial value in the communication data transmission timer (S344).

  Next, the main CPU 31 transmits the communication data stored in the communication data storage area to the sub control circuit 72 (S345). Next, the main CPU 31 determines whether or not transmission of communication data has been completed (S346).

  Here, when it is determined that the transmission of the communication data is not completed (NO), the main CPU 31 executes the process of step S345. On the other hand, if it is determined that the transmission of the communication data has been completed (YES), the main CPU 31 updates the communication data storage area to be cleared (S347), and ends the communication data transmission process.

  Thus, the main CPU 31 that outputs the communication data, which is information related to the progress of the game stored in the communication data storage area, to the sub-control circuit 72 constitutes the information output means in the present embodiment.

[Sub-control processing]
The sub CPU 81 of the sub control circuit 72 executes various processes according to the flowcharts shown in FIGS.

<Power-on processing>
FIG. 87 is a flowchart showing power-on processing of the sub CPU 81 at power-on.

  First, the sub CPU 81 executes an initialization process (S350). In this process, the sub CPU 81 performs error check of the sub RAM 83 and the like and initializes the OS. The OS includes a mother task shown in FIG. 88 which is a task group of a main control board communication task, an LED output control task, and a sound control task which are task groups for timer interrupt synchronization.

  Next, the sub CPU 81 activates the mother task (S351) and aborts the power-on process.

<Mother task>
FIG. 88 is a flowchart showing the mother task activated in step S351 of the power-on process shown in FIG.

  In the mother task, first, the sub CPU 81 activates a main board communication task (S360).

  Next, the sub CPU 81 activates the LED output control task shown in FIG. 89 (S361). The LED output control task waits for the sub CPU 81 to receive a timer interrupt event message activated every 2 milliseconds for the sub CPU 81, and in response to receiving this timer interrupt event message, Is a process of executing a process of controlling the lighting state and the dot display 100.

  Next, the sub CPU 81 activates the sound control task shown in FIG. 92 (S362). In the sound control task, the sub CPU 81 controls the sound output state from the speakers 9L and 9R.

<LED output control task>
FIG. 89 is a flowchart showing the LED output control task activated in step S361 of the mother task shown in FIG.

  First, the sub CPU 81 executes LED output related data initialization processing (S370).

  Next, the sub CPU 81 executes LED output data analysis processing shown in FIG. 90 (S371). In this process, the sub CPU 81 determines LED effect data to be executed from each control information.

  Next, the sub CPU 81 executes the LED output control execution process shown in FIG. 91 (S372), and executes the process of step S371. In this process, the sub CPU 81 executes the LED effect determined by the LED output data analysis process based on the result of the LED output data analysis process executed in step S371.

<LED output data analysis processing>
FIG. 90 is a flowchart showing LED output data analysis processing executed in step S371 of the LED output control task shown in FIG.

  First, the sub CPU 81 determines whether or not the effect registration information is set (S530). In this process, the sub CPU 81 sets the effect registration information set based on the effect data in a predetermined area of the sub RAM 83 in the LED data determination process (see step S411) of the command analysis process (see FIG. 98). It is determined whether or not.

  If it is determined in the process of step S530 that the effect registration information is set (YES), the sub CPU 81 acquires LED effect data (S531). In this process, the sub CPU 81 obtains LED effect data with reference to the effect number corresponding to the effect registration information and the LED / sound output list table (see FIG. 64).

  Next, the sub CPU 81 sets the LED effect data in the request registration information (S532), and ends the LED output data analysis process. In this process, the sub CPU 81 sets the LED effect data acquired in step S531 in the request registration information.

  If it is determined in step S530 that the effect registration information is not set (NO), the sub CPU 81 determines whether or not the LED effect is being executed (S533). In this process, the sub CPU 81 refers to the LED control state information that is information related to the current execution state of the LED effect data, and determines whether or not the LED effect is being executed. It is confirmed whether or not the registered LED effect data is executed without omission.

  If it is determined in step S533 that the LED effect is being executed (YES), the LED output data analysis process is terminated. On the other hand, if it is determined in step S533 that the LED effect is not being executed (NO), the sub CPU 81 obtains sound reproduction information (S534). In this process, the sub CPU 81 acquires sound reproduction information and confirms the current execution state of the sound effect.

  Next, the sub CPU 81 determines whether there is sound data being reproduced (S535). In this process, the sub CPU 81 determines whether or not a predetermined playback time set for the sound data executed by the DSP 84 has elapsed since the DSP 84 started executing the sound data based on the sound playback information acquired in step S534. By checking whether or not, it is determined whether or not the sound production is currently being executed.

  If it is determined in step S535 that there is no sound data being reproduced (NO), the sub CPU 81 ends the LED output data analysis process. On the other hand, if it is determined in step S535 that there is sound data being played back (NO), the sub CPU 81 acquires LED effect data from the LED / sound output list table (S536). In this process, the sub CPU 81 refers to the command number corresponding to the sound data being reproduced and the LED / sound output list table, and acquires LED effect data.

  Next, the sub CPU 81 determines whether or not the LED effect data has been acquired (S537). In this process, the sub CPU 81 determines whether or not the LED effect data has been acquired in the process of step S536.

  If the LED effect data cannot be acquired in the process of step S537 (NO), the sub CPU 81 ends the LED output data analysis process. On the other hand, if the LED effect data has been acquired in the process of step S537 (YES), the sub CPU 81 sets the LED effect data in the request registration information (S538), and ends the LED output data analysis process.

  In this way, when the DSP 84 is executing sound data, the LED effect data associated with the sound data being executed by the DSP 84 is transferred to the sub CPU 81 and each part of the pachislot machine 1 that executes the LED effect data ( The sub CPU 81 that determines whether or not the dot display 100, the reel effect display 103, the side effect display 104, and the light emitting unit 330) are executing constitutes the effect information determination means in the present embodiment.

  Further, as shown in the processing in steps S533 to S538, the sub CPU 81 executes the LED effect data associated with the sound data being executed by the DSP 84 by each part of the pachislot machine 1 that executes the LED effect data. If it is determined that the LED effect data associated with the sound data is set in the request registration information, the LED effect data is transferred from the sub ROM 82 to the sub CPU 81.

  With this configuration, the pachislot machine 1 according to the present embodiment has the LED effect data associated with the sound data, the sound data being executed, and the LED effect data associated with the sound data being executed. Is not executed, the associated LED effect data is transferred from the sub ROM 82 to the sub CPU 81 and executed, so that the occurrence of bugs can be suppressed with a simple configuration. An increase in design man-hours can be prevented.

  Further, in the pachislot machine 1 according to the present embodiment, the LED effect data associated with the sound data being executed is not executed until the predetermined reproduction time elapses from the start of the execution of the sound data. Since the sub CPU 81 manages the execution of the sound data, it is not necessary to determine whether or not the sound data is being executed, the number of executions of the control process can be reduced, and the occurrence of bugs is suppressed. be able to.

<LED output control execution processing>
FIG. 91 is a flowchart showing LED output control execution processing executed in step S372 of the LED output control task shown in FIG.

  First, the sub CPU 81 executes an LED effect request registration information acquisition process (S540). In this process, the sub CPU 81 obtains the current set status of the LED effect data request registration information set in step S532 or step S538 of the LED output data analysis process (see FIG. 90).

  Next, the sub CPU 81 determines whether request registration information is set (S541). In this process, the sub CPU 81 determines whether or not the request registration information is set from the request registration information acquired in the process of step S540.

  If it is determined in step S541 that the request registration information is set (YES), the sub CPU 81 executes an LED output control process based on the request registration information (S542). In this process, the sub CPU 81 executes an output control process for controlling the LED of the target part for executing the LED effect data associated with each LED effect data, based on the request registration information.

  In the process of step S542, the sub CPU 81 obtains new request registration information during execution of the LED effect data, that is, when new request registration information is transferred, the LED effect data based on the newly transferred request registration information is obtained. Configured to run.

  With this configuration, the pachislot machine 1 according to the present embodiment preferentially executes new LED effect data when new LED effect data is transferred even when LED effect data is being executed. The LED effect data associated with the sound data can be reliably executed at the time of executing the sound data, and whether or not the LED effect data associated with the sound data is executed at the time of executing the sound data at the design time. It is possible to easily check whether or not the design man-hours can be reduced and the occurrence of bugs can be suppressed.

  If it is determined in the process of step S541 that the request registration information is not set (NO) or after executing the process of step S542, the sub CPU 81 updates the LED control state information (S543) and executes the LED output control. The process ends. In this process, the sub CPU 81 determines whether or not the current LED effect is being executed, and if the LED effect is being executed, the LED effect data being executed and the time elapsed since the start of the LED effect being executed. The process which reflects the information concerned on LED control status information is performed.

<Sound control task>
FIG. 92 is a flowchart showing the sound control task activated in step S362 of the mother task shown in FIG.

  First, the sub CPU 81 executes a sound related data initialization process shown in FIG. 93 (S380). In this process, the sub CPU 81 executes an initial setting process for each sound data related to the sound output state from the speakers 9L and 9R.

  Next, the sub CPU 81 executes sound data analysis processing shown in FIG. 94 (S381). In this process, the sub CPU 81 determines sound data to be executed from each control information.

  Next, the sub CPU 81 performs a sound effect execution process shown in FIG. 95 (S382), and executes the process of step S381. In this process, the sub CPU 81 executes the sound effect determined by the sound data analysis process based on the result of the sound data analysis process executed in step S381.

<Initialization of sound-related data>
FIG. 93 is a flowchart showing the sound-related data initialization process executed in step S380 of the sound control task shown in FIG.

  First, the sub CPU 81 transfers the sound data of the sound type “file” in the sound list table (see FIGS. 61 and 62) to the DSP 84 (S490). In this process, the sub CPU 81 refers to the sound list table, transfers the sound data of the sound type “file” set to the type “1” among the sound data to the DSP 84 and stores it in the audio RAM 85.

  Next, the sub CPU 81 generates a management table for registering the sound data of the sound type “file” and the sound data of the sound type “stream” (S491), and ends the initialization processing of the sound related data. In this processing, the sub CPU 81 refers to the sound list table, and generates a management table for classifying and registering each sound data for each sound type in a predetermined area of the sub RAM 83.

  As described above, when the sub control circuit 72 is activated, the audio RAM 85 that stores the sound data set to the type “1” among the plurality of sound data stored in the sub ROM 82 has the specific effect in the present embodiment. Information storage means is configured.

  Further, in the process of step S490, the sub CPU 81 performs sub-control on the sound data set to type “1” that has more opportunities to be transferred to the DSP 84 than the sound data set to type “2”. The audio RAM 85 is configured to store the circuit 72 when the circuit 72 is activated.

  With this configuration, the pachislot machine 1 according to the present embodiment, when the sub-control circuit 72 is started, outputs the sound data set to the type “1” that requires a high response with many opportunities to be executed by the DSP 84. When the sound data stored in the audio RAM 85 from the sub ROM 82 and set to the type “1” is executed, the sound data is transferred from the audio RAM 85 to the DSP 84 and executed. It can be prevented from occurring, and an effect that satisfies the required responsiveness can be executed.

<Sound data analysis processing>
FIG. 94 is a flowchart showing the sound data analysis process executed in step S381 of the sound control task shown in FIG.

  First, the sub CPU 81 determines whether or not the effect registration information is set (S500). In this process, the sub CPU 81 sets the effect registration information set based on the effect data in a predetermined area of the sub RAM 83 in the sound data determination process (see step S412) of the command analysis process (see FIG. 93). It is determined whether or not.

  If it is determined in the process of step S500 that the effect registration information is not set (NO), the sub CPU 81 ends the sound data analysis process. On the other hand, if it is determined in step S500 that the effect registration information is set (YES), the sub CPU 81 determines whether the set effect registration information is sequence reproduction information ( S501).

  If it is determined in step S501 that the effect registration information is sequence reproduction information (YES), the sub CPU 81 executes a sequence reproduction request request process (S502), and ends the sound data analysis process. In the processing of step S501 and step S502, the sub CPU 81 refers to the sound sequence table (see FIG. 63) when the effect registration information is sequence reproduction information set by satisfying a predetermined condition. Then, request registration information for requesting the DSP 84 to execute the sequence number corresponding to the sequence reproduction information is set.

  Here, the request request means that the sub CPU 81 makes a request registration request to the driver for requesting the DSP 84 to transfer and execute each data. Based on the above, control processing to the DSP 84 is executed.

  If it is determined in the process of step S501 that the effect registration information is not sequence reproduction registration (NO), the sub CPU 81 acquires sound reproduction information (S503). In this process, the sub CPU 81 obtains sound reproduction information which is information composed of the contents of the sound effect being executed, that is, the sound data being executed and the time elapsed since the start of the sound effect being executed. To do.

  Next, the sub CPU 81 determines whether or not there is a request for a sound being reproduced or a sound reproduction request (S504). In this process, the sub CPU 81 determines whether or not there is a sound reproduction request that has already been executed by the DSP 84 or has not been executed, based on the sound reproduction information acquired in step S503.

  If it is determined in the process of step S504 that there is a sound being reproduced or a sound reproduction request is already requested (YES), the sub CPU 81 executes a sound reproduction next request request process based on the effect registration information (S505). End the data analysis process. In this processing, the sub CPU 81 executes the sound currently being reproduced or the already set sound reproduction request request, and then from the effect number confirmed in step S500 and the sound list table (see FIGS. 61 and 62). Next, a sound reproduction next request request is executed to the DSP 84 so as to execute the sound data associated with the determined command number.

  If it is determined in the process of step S504 that there is no sound being played or a sound playback request is already requested (NO), the sub CPU 81 executes a sound playback request request process based on the effect registration information (S506), and the sound data End the analysis process. In this process, the sub CPU 81 sends a sound to the DSP 84 so as to execute the sound data associated with the command number determined from the effect number confirmed in step S500 and the sound list table (see FIGS. 61 and 62). Execute playback request request.

<Sound production execution processing>
FIG. 95 is a flowchart showing a sound effect execution process executed in step S382 of the sound control task shown in FIG.

  First, the sub CPU 81 executes processing for acquiring sound request registration information (S510). In this process, the sub CPU 81 is set in a predetermined area of the sub RAM 83 when a sequence reproduction request or a sound reproduction request request is executed in step S502 or step S506 of the sound data analysis process (see FIG. 94). Get the current set status of request registration information.

  Next, the sub CPU 81 determines whether request registration information is set (S511). In this process, the sub CPU 81 determines whether or not the request registration information is set from the request registration information acquired in the process of step S510.

  If it is determined in step S511 that the request registration information has not been set (NO), the sub CPU 81 updates the sound reproduction information (S512) and ends the sound effect execution process. In this process, the sub CPU 81 relates to the presence / absence of the current sound effect by the DSP 84, the sound data being executed if the sound effect is being executed, and the time elapsed since the start of the sound effect being executed. A process of reflecting the information on the sound reproduction information is executed.

  If it is determined in the processing of step S511 that the request registration information is set (YES), the sub CPU 81 determines whether the set request registration information is a sequence reproduction request (S513). In this process, if it is determined that the sequence reproduction information is set, the sub CPU 81 executes the sequence reproduction request process (S514), and ends the sound effect execution process.

  In the processing of step S513 and step S514, the sub CPU 81 determines the sound sequence table (see FIG. 63) because the set request registration information is a sequence reproduction request that is set when a predetermined condition is satisfied. The sequence number corresponding to the sequence playback information for which the sequence playback request has been executed is determined, and the DSP 84 is requested to continuously execute a plurality of sound data associated with the sequence number.

  If it is determined in step S513 that the set request registration information is not a sequence reproduction request (NO), the sub CPU 81 obtains a command number corresponding to the sound reproduction request set in the request registration information. (S515). In this process, the sub CPU 81 refers to the effect number corresponding to the sound reproduction request and the sound list table (see FIGS. 61 and 62), and acquires the command number corresponding to the effect number.

  Next, the sub CPU 81 acquires the sound type from the command number (S516). In this process, the sub CPU 81 refers to the sound list table (see FIGS. 61 and 62) and acquires the value set in the command number type acquired in step S515.

  Next, the sub CPU 81 determines whether or not the sound type is “file” (S517). In this process, the sub CPU 81 determines whether or not the sound type of the command number acquired in the process of step S516 is “file”.

  If it is determined in step S517 that the sound type is “file” (YES), the sub CPU 81 generates access reproduction request information for sound data of the sound type “file” (S518).

  In the process of step S518, the sub CPU 81 obtains the command number acquired in step S515 and the sound data of the sound type “file” extracted from the management table generated in step S491 of the sound related data initialization process (see FIG. 93). And the access reproduction request information of the sound data corresponding to the sound reproduction request. Here, the access reproduction request information is information used when making a request for the DSP 84 to execute sound data.

  Further, the access reproduction request information generated in the process of step S518 is configured to cause the DSP 84 to execute the sound data stored in the audio RAM 85.

  That is, in this embodiment, when the sub CPU 81 causes the DSP 84 to execute the sound data set to the type “1”, the sub CPU 81 stores the sound data set to the type “1” stored in the audio RAM 85 to the DSP 84. Configured to forward.

  If it is determined in step S517 that the sound type is not “file” (NO), the sub CPU 81 generates access reproduction request information for sound data of the sound type “stream” (S519). In this process, the sub CPU 81 uses the command number acquired in step S515 and the access information of the sound data of the sound type “stream” extracted from the management table generated in step S491 of the sound related data initialization process. Access data playback request information corresponding to the sound playback request is generated.

  After executing the process of step S518 or step S519, the sub CPU 81 executes a sound data reproduction request to the DSP 84 based on the access reproduction request information (S520), and ends the sound effect execution process. In this process, the sub CPU 81 executes a request for causing the DSP 84 to reproduce sound data corresponding to the sound reproduction request, based on the access reproduction request information generated in the processes of steps S518 and S519.

  94 and 95, the sound data request registration information is set from the production number, and the sound data to be executed by the DSP 84 is transferred from the sub ROM 82 or the audio RAM 85 by executing a sound data reproduction request to the DSP 84. The sub CPU 81 constitutes effect information transfer means in the present embodiment.

  93 to 95, the pachislot machine 1 according to the present embodiment converts the sound data set to the type “1” when the sub-control circuit 72 is activated in the initialization process of the sound related data. By changing the sound data transfer source according to the type of sound data stored in the audio RAM 85 from the sub-ROM 82 and executed by the DSP 84, it is possible to prevent a problem in responsiveness caused by the transfer of the sound data. The performance that satisfies the responsiveness can be executed.

  As shown in FIGS. 94 and 95, when predetermined conditions are established as sound data to be executed by the DSP 84, the sound sequence is transferred to the DSP 84, and a plurality of sound data constituting the transferred sound sequence is converted to the DSP 84. The sub CPU 81 that is continuously executed constitutes the effect information group transfer means in the present embodiment.

  With this configuration, the pachislot machine 1 according to the present embodiment stores the sound sequence in the sound sequence table of the sub ROM 82 in advance as a sound sequence when a plurality of sound data is to be continuously executed by the DSP 84. Since multiple sound data can be executed continuously by selecting, even if multiple sound data are executed continuously, it is possible to prevent problems in response due to transfer of sound data. It is possible to perform an effect that satisfies the required responsiveness.

  For this reason, the pachislot machine 1 according to the present embodiment sets, for example, that a predetermined condition is satisfied when confirming the behavior of the pachislot machine 1 when a plurality of arbitrary sound data is continuously executed. By creating a sound sequence composed of a plurality of arbitrary sound data, the behavior of the pachislot machine 1 can be confirmed, and sound data can be easily confirmed and corrected.

<Main board communication task>
FIG. 96 is a flowchart showing the main board communication task activated in step S360 of the mother task shown in FIG.

  First, the sub CPU 81 executes initialization of the communication message queue (S390), and checks the received command (S391).

  Next, the sub CPU 81 creates game information from the received command, and stores the created game information in the sub RAM 83 (S392). Next, the sub CPU 81 executes a command analysis process shown in FIG. 98 (S393), and executes the process of step S391.

<Received command check processing>
FIG. 97 is a flowchart showing the received command check process executed in step S391 of the main board task shown in FIG.

  First, the sub CPU 81 checks the order of the command received this time and the command received last time (S400), and determines whether the command order is normal (S401). In this process, for example, when the command received this time is a “start command”, if the command received immediately before is a “medal insertion command”, the sub CPU 81 determines that the order is normal, If a command other than the “input command” is received immediately before receiving the current command, it is determined that the order is abnormal. If the received command is an input state command, the sub CPU 81 does not determine the order of the commands.

  If it is determined in step S401 that the command order is normal (YES), the sub CPU 81 ends the received command check process. On the other hand, if it is determined in step S401 that the command order is abnormal (NO), the sub CPU 81 sets a sequence error (S402) and ends the received command check process. Here, the sequence error is an error that occurs when commands are received in an order that cannot occur in a normal game, and can be canceled by resetting the door key and changing the setting.

  Thus, in the present embodiment, the sub CPU 81 constitutes a reception order determination unit.

<Command analysis processing>
FIG. 98 is a flowchart showing command analysis processing executed in step S393 of the main board communication task shown in FIG.

  First, the sub CPU 81 executes effect content determination processing shown in FIG. 99 (S410). In this process, the sub CPU 81 executes effect content determination processing for determining effect data based on command data included in the information data output from the main CPU 31.

  Next, the sub CPU 81 executes LED effect data determination processing (S411). In this process, the sub CPU 81 sets effect registration information related to the LED effect based on the effect data determined in S410.

  Next, the sub CPU 81 executes sound data determination processing (S412). In this process, the sub CPU 81 sets the effect registration information related to the sound effect based on the effect data determined in S410.

  Next, the sub CPU 81 registers each determined data (S413), and ends the command analysis processing.

  As described above, the sub CPU 81 that determines the effect data based on the communication data output from the main CPU 31 and determines the effect registration information to be executed from the plurality of effect registration information based on the determined effect data. The effect information determination means in the embodiment is configured.

<Production content determination process>
FIG. 99 is a flowchart showing the effect content determination process executed in step S410 of the command analysis process shown in FIG.

  First, the sub CPU 81 determines whether or not an initialization command has been received (S430). If it is determined that the initialization command has been received (YES), the sub CPU 81 executes the initialization command reception process (S431), and ends the effect content determination process. In the initialization command reception process, for example, effect data based on information transmitted as the initialization command is set.

  On the other hand, when determining that the initialization command has not been received (NO), the sub CPU 81 determines whether or not a medal insertion command has been received (S432). If it is determined that a medal insertion command has been received (YES), the sub CPU 81 executes a medal insertion command reception process (S433), and ends the effect content determination process. In the medal insertion command reception process, for example, effect data based on information transmitted as a medal insertion command is set.

  On the other hand, if it is determined that a medal insertion command has not been received (NO), the sub CPU 81 determines whether a start command has been received (S434). If it is determined that a start command has been received (YES), the sub CPU 81 executes a start command reception process shown in FIG. 100 (S435), and ends the effect content determination process. In the start command receiving process, for example, effect data based on information transmitted as a start command is set.

  On the other hand, if it is determined that a start command has not been received (NO), the sub CPU 81 determines whether a reel rotation start command has been received (S436). If it is determined that a reel rotation start command has been received (YES), the sub CPU 81 executes a reel rotation start command reception process (S437), and ends the effect content determination process. In the reel rotation start command reception process, for example, effect data based on information transmitted as a reel rotation start command is set.

  On the other hand, if it is determined that the reel rotation start command has not been received (NO), the sub CPU 81 determines whether or not a reel stop command has been received (S438). If it is determined that a reel stop command has been received (YES), the sub CPU 81 executes a reel stop command reception process (S439), and ends the effect content determination process. In the reel rotation start command reception process, for example, effect data based on information transmitted as a reel rotation start command is set.

  On the other hand, when it is determined that the reel stop command has not been received (NO), the sub CPU 81 determines whether or not a winning operation command has been received (S440). If it is determined that a winning action command has been received (YES), the sub CPU 81 executes a winning action command reception process shown in FIG. 102 (S441), and ends the effect content determination process. In the winning operation command reception process, for example, effect data based on information transmitted as a winning operation command is set.

  On the other hand, if it is determined that the winning operation command has not been received (NO), the sub CPU 81 determines whether or not a bonus start command has been received (S442). If it is determined that a bonus start command has been received (YES), the sub CPU 81 executes a bonus start command reception process (S443), and ends the effect content determination process. In the bonus start command reception process, for example, effect data based on information transmitted as a bonus start command is set.

  On the other hand, if it is determined that a bonus start command has not been received (NO), the sub CPU 81 determines whether a bonus end command has been received (S444). If it is determined that a bonus end command has been received (YES), the sub CPU 81 executes bonus end command reception processing (S445), and ends the effect content determination processing. In the bonus end command reception process, for example, effect data based on information transmitted as a bonus end command is set.

  On the other hand, if it is determined that a bonus end command has not been received (NO), the sub CPU 81 determines whether an input state command has been received (S446). If it is determined that the input state command has been received (YES), the sub CPU 81 executes the input state command reception process (S447), and ends the effect content determination process.

  In the input state command reception process, for example, the main CPU 31 transmits, as an input state command, whether each operation unit is in an on-edge state or an off-edge state. On the other hand, if it is determined in S446 that the input state command has not been received (NO), the sub CPU 81 ends the effect content determination process.

  The order of the commands received by the sub CPU 81 in the effect content determination process constitutes the predetermined order in the present embodiment. In the present embodiment, the main CPU 31 that transmits various commands to the sub CPU 81 constitutes a command transmission unit.

<Processing when receiving a start command>
100 and 101 are flowcharts showing the start command reception process executed in step S435 of the effect content determination process shown in FIG.

  First, the sub CPU 81 extracts an effect random number value, and stores the extracted effect random number value in the effect random value storage area of the sub RAM 83 (S450). Next, the sub CPU 81 determines whether or not the ART gaming state is the ART state (S451).

  If it is determined that the state is the ART state (YES), the sub CPU 81 determines whether or not the BB malfunction check flag stored in the sub RAM 83 is on (S452). Specifically, despite the fact that the second stop operation sequence, which is a notification of the winning mode of the predetermined internal winning combination for winning the “RB Lip”, has been notified, “BB Lip 1”, “BB It is determined whether or not any of “Rip 2” or “RB Lip” has been won.

  Here, normally, the sub CPU 81 should have won “BB lip 1”, “BB lip 2” or “RB lip” in the ART state. In step S482 or step S485, the BB malfunction check flag is turned off when "BB lip 1", "BB lip 2", or "RB lip" is won.

  For this reason, the sub CPU 81 determines whether or not the BB malfunction check flag is on. If it is determined that the sub CPU 81 is on, there is a possibility that an illegal act causing a power interruption or a line disconnection state has been performed. Judged to be high.

  If it is determined in the process of step S452 that the BB malfunction check flag is on (YES), the sub CPU 81 determines whether or not the winning combination of the previous game is stored (S453). Specifically, the sub CPU 81 causes “BB lip 1” or “BB lip 2” to win even though the RB lip notification is informed, and performs a process upon receiving a winning action command, which will be described later. It is determined whether or not the person has been prevented from executing by cheating. In other words, the sub CPU 81 is configured to execute a double check as to whether or not an illegal act that causes a power interruption or line disconnection state has been executed by executing the processing of step S452 and the processing of step S453. ing.

  If it is determined that the winning combination of the previous game has not been saved (NO), the sub CPU 81 turns off the BB malfunction check flag (S454) and turns on the navigation prohibition flag (S455). In this process, the sub CPU 81 determines that the player has performed an illegal act so that the process upon receiving a winning command is not executed. Therefore, by turning on the navigation prohibition flag, the stop normally performed in the ART state is performed. Impose a penalty for not reporting the sequence of operations.

  If it is determined in step S452 that the BB malfunction check flag is not ON (NO), if it is determined in step S453 that the winning combination of the previous game is stored (YES) or step S455 After executing the above, the sub CPU 81 determines whether or not the navigation prohibition flag is on (S456). In this process, if it is determined that the navigation prohibition flag is on (YES), the sub CPU 81 ends the start command reception process.

  On the other hand, if it is determined in the process of step S456 that the navigation prohibition flag is off (NO), the sub CPU 81 determines whether or not the BB malfunction flag stored in the sub RAM 83 is on ( S457). Specifically, the sub CPU 81 receives the “BB Lip 1” or “BB Lip 2” in spite of being notified of the second stop operation order for winning the “RB Lip”. It is determined whether or not “bonus lip 1 or 2” has won in the second winning mode (BB lip 1 or BB lip 2) according to the first stop operation order.

  The BB malfunction flag is turned on when “Bonus Lip 1 or 2” wins in the second winning mode (BB Lip 1 or BB Lip 2) even though the second stop operation order is notified. It becomes.

  If it is determined that the BB malfunction flag is on (YES), the sub CPU 81 determines whether or not a sequence error is occurring (S458). Specifically, the sub CPU 81 determines whether or not a sequence error is set in step S402 of the received command check process (see FIG. 97).

  If it is determined in the process of step S458 that a sequence error is occurring (YES), the sub CPU 81 determines that the order of the received commands is abnormal, so that the unauthorized navigation lottery table (see FIG. 60). , The navigation data during ART is determined based on the winning combination and the random number for presentation (S459), and the start command receiving process is terminated.

  Specifically, the sub CPU 81 refers to an unauthorized navigation lottery table for informing predetermined stop operation information, and does not change the number of ART games (70 games) generated by the second winning mode, thereby winning the winning number. A penalty for notifying the stop operation information that can win the winning combination when notifying the internal operation to other internal winning combination is notified when the internal winning is 1 or 2, impose. Here, the predetermined stop operation information refers to stop operation information that notifies only the stop operation order for winning the normal replay and does not notify the stop operation order related to other winning combinations.

  If it is determined in step S458 that a sequence error has not occurred (NO), the sub CPU 81 refers to the special navigation lottery table (see FIG. 59) and based on the winning combination and the random number value for performance. Then, the navigation data during ART is determined (S460), and the start command reception process is terminated.

  Specifically, by referring to the special navigation lottery table, the sub CPU 81 is notified of the first stop operation order without changing the number of ART games (70 games) generated in the second winning mode. In the state, advantageous stop operation information (stop operation order) related to the medal grant is notified with a lower probability than when winning “bonus lip 1 or 2” in the second winning mode (BB lip 1 or BB lip 2). To do.

  More preferably, when the sub CPU 81 wins in the second winning mode (BB Lip 1 or BB Lip 2) due to a player's mistaken operation or action, the sub CPU 81 wins in the first winning mode (RB Lip). In this case, the stop operation order is notified with a probability that medals equivalent to the medals to be given are given.

  On the other hand, if it is determined that the BB malfunction flag is not on (NO), the sub CPU 81 refers to the normal navigation lottery table (see FIG. 58), and based on the winning combination and the rendering random number, The navigation data is determined (S461), and the start command reception process is terminated. Here, in the present embodiment, the stop operation information notified using the normal navigation lottery table, the special navigation lottery table, or the unauthorized navigation lottery table constitutes stop operation information useful to the player. Moreover, in this Embodiment, among the stop operation information alert | reported using a normal navigation lottery table, it wins in any of winning numbers 4-6, 7-12, 13-18, 19-24, 25-30. The stop operation information notified in the case of making up constitutes specific stop operation information related to the provision of the game medium with a predetermined probability.

  If it is determined in step S451 that the state is not the ART state (NO), the sub CPU 81 turns off the navigation prohibition flag (S462) and turns off the BB malfunction flag (S463). In this process, the sub CPU 81 releases the penalty when a penalty for turning on the navigation prohibition flag is imposed in the ART state.

  Next, the sub CPU 81 determines whether or not the notification flag is on (S464). If it is determined that the notification flag is not on (NO), the sub CPU 81 ends the start command reception process.

  On the other hand, if it is determined that the notification flag is on (YES), the sub CPU 81 refers to the notification mode lottery table shown in FIG. 60, and based on the current mode (stay mode) and the random number for performance. Then, notification data (notification mode) is determined (S465).

  Next, the sub CPU 81 determines whether or not the determined notification mode is the notification mode C or the notification mode D (S466). When it is determined that the determined notification mode is the notification mode C or the notification mode D (YES), the sub CPU 81 turns on / off notification lamps 111L and 111R, which will be described later, based on the value of the effect timer. The start timing of turning on and off the notification lamps 111L and 111R in the timing pattern is determined (S467).

  By such processing, for example, in step S372 of the LED output control task shown in FIG. 89, a notification effect based on the notification effect data is performed. The notification effect in the present embodiment is performed by the notification lamps 111L and 111R.

  Note that in S382 of the sound control task shown in FIG. 92, a notification effect based on notification effect data may be performed. In addition, in both the LED output control task step S372 shown in FIG. 89 and the sound control task S382 shown in FIG. 92, a notification effect based on the notification effect data may be performed.

  In step S466, when it is determined that the determined notification mode is not the notification mode C or the notification mode D (NO), or after executing the process of step S467, the sub CPU 81 determines the ART type notification distribution lottery table (FIG. 57), the notification distribution is determined based on the current release mode and the random number for presentation (S468). Thus, the sub CPU 81 constitutes a winning mode distribution unit.

  Next, the sub CPU 81 determines the navigation data at the start of ART based on the determined notification distribution and the type of bonus lip (S469). Next, the sub CPU 81 determines whether or not the notification distribution is RB lip notification (S470).

  If it is determined that the notification distribution is not the RB lip notification (NO), the sub CPU 81 ends the start command reception process. On the other hand, if it is determined that the notification distribution is RB lip notification (YES), the sub CPU 81 turns on the BB malfunction check flag stored in the sub RAM 83 (S471), and ends the process when the start command is received. To do.

  As described above, the pachislot machine 1 according to the present embodiment has the illegal navigation lottery table (when the sequence error occurs during the communication between the main control circuit 71 and the sub control circuit 72 and shifts to the ART state. 60), when the winning number 4-6, 7-12, 13-18, 19-24, 25-30 is won, the winning operation for winning each internal winning combination won By imposing a penalty for not informing information, it is possible to prevent a fraudulent act from causing a sequence error during communication between the main control circuit 71 and the sub-control circuit 72 and illegally obtaining a game profit.

  In addition, the pachislot machine 1 according to the present embodiment, when the RB lip notification is made, can win the BB lip 1 or the BB lip 2 and can enjoy the profit by winning the BB lip 1 or the BB lip 2 In order to illegally acquire the player, if the player performs an illegal act and a sequence error occurs during communication between the main control circuit 71 and the sub-control circuit 72, the illegal navigation lottery table (see FIG. 60) is used. Then, when winning any of winning numbers 4-6, 7-12, 13-18, 19-24, 25-30, a penalty is not given to not notify stop operation information for winning each winning internal winning combination. Accordingly, it is possible to prevent illegally obtaining a profit that can be obtained by winning the BB Lip 1 or the BB Lip 2.

  In addition, the pachislot machine 1 according to the present embodiment is configured so that an illegal action is executed during communication between the main control circuit 71 and the sub control circuit 72 so that the sub control circuit 72 does not detect the winning combination. By imposing a penalty that does not notify stop operation information in the game, it is possible to prevent a fraudulent act from causing a sequence error during communication between the main control circuit 71 and the sub-control circuit 72 and illegally obtaining a game profit. it can.

  Further, the pachislot machine 1 according to the present embodiment, when the RB lip notification is made, causes the BB lip 1 or BB lip 2 different from the RB lip to win, and wins the BB lip 1 or BB lip 2 By improper acts being performed during communication between the main control circuit 71 and the sub control circuit 72 so as not to be detected by the sub control circuit 72, by imposing a penalty not to notify stop operation information in the ART state, It is possible to prevent a sequence error from occurring during communication between the main control circuit 71 and the sub control circuit 72 and illegally gaining a game profit.

  In the present embodiment, the sub CPU 81 constitutes a winning mode notifying unit and a winning mode determining unit.

<Process when receiving a winning action command>
FIG. 102 is a flowchart showing a winning action command reception process executed in step S441 of the effect content determination process shown in FIG.

  First, the sub CPU 81 determines whether or not the BB malfunction check flag is on (S480). Here, if it is determined that the BB malfunction check flag is on (YES), the sub CPU 81 determines whether or not the BB Lip 1 or BB Lip 2 has been won (S481).

  If it is determined in the process of step S481 that BB Lip 1 or BB Lip 2 has been won (YES), the sub CPU 81 turns off the BB malfunction check flag (S482) and turns on the BB malfunction flag. (S483). In this process, the sub CPU 81 turns on the BB malfunction flag because the BB lip 1 or the BB lip 2 has won despite the RB lip notification.

  On the other hand, if it is determined in the process of step S481 that the BB lip 1 and the BB lip 2 have not been won (NO), the sub CPU 81 determines whether or not the RB lip has been won (S484). In this process, if it is determined that the RB lip is won (YES), the BB malfunction check flag is turned off because the RB lip is notified and the RB lip is won (S485).

  If the BB malfunction check flag is OFF in the process of step S480 (NO), if the RB lip is not won in the process of step S484 (NO), or after executing the process of step S485, the sub CPU 81 The established winning combination is saved (S486). In this process, the sub CPU 81 saves the established winning combination in the winning combination storage area, which is the area for storing the winning combination in the sub RAM 83. The winning combination storage area is cleared by the sub CPU 81 when the reel rotation start command is received.

  Next, the sub CPU 81 sets effect data based on the established winning combination (S487), and ends the winning command reception process. In this process, the sub CPU 81 sets the effect number related to the sound data to be executed and the LED effect data based on the established winning combination.

  Thus, in the present embodiment, the sub CPU 81 constitutes a winning combination storing unit.

  As described above, the pachislot machine 1 according to the present embodiment stores the sound data set to the type “1” from the sub ROM 82 to the audio RAM 85 when the sub control circuit 72 is activated, and causes the DSP 84 to execute the sound data. By changing the transfer source of the sound data depending on the type, it is possible to prevent a problem in the responsiveness due to the transfer of the sound data, and it is possible to execute an effect that satisfies the required responsiveness.

  In addition, the pachislot machine 1 according to the present embodiment uses the sub ROM 82 when the sub-control circuit 72 starts up the sound data set to the type “1”, which is frequently executed by the DSP 84 and requires high responsiveness. When the sound data stored in the audio RAM 85 and the sound data set to the type “1” is executed, the sound data is transferred from the audio RAM 85 to the DSP 84 and executed. Can be prevented, and an effect that satisfies the required responsiveness can be executed.

  In addition, the pachislot machine 1 according to the present embodiment selects a sound sequence by previously storing a plurality of sound data in the sound sequence table of the sub ROM 82 as a sound sequence when the DSP 84 wants to execute the sound data continuously. Since multiple sound data can be executed continuously, even if multiple sound data are executed continuously, it is possible to prevent problems in response due to transfer of sound data, An effect that satisfies the required responsiveness can be executed.

  For this reason, the pachislot machine 1 according to the present embodiment sets, for example, that a predetermined condition is satisfied when confirming the behavior of the pachislot machine 1 when a plurality of arbitrary sound data is continuously executed. By creating a sound sequence composed of a plurality of arbitrary sound data, the behavior of the pachislot machine 1 can be confirmed, and sound data can be easily confirmed and corrected.

  Further, in the pachislot machine 1 according to the present embodiment, the LED effect data is associated with the sound data, the sound data is executed, and the LED effect data associated with the sound data being executed is executed. If not, since the associated LED effect data is transferred from the sub ROM 82 to the sub CPU 81 and executed, it is possible to suppress the occurrence of bugs with a simple configuration and to reduce the design man-hours. Can be prevented.

  Further, in the pachislot machine 1 according to the present embodiment, the LED effect data associated with the sound data being executed is not executed until the predetermined reproduction time elapses from the start of the execution of the sound data. Since the sub CPU 81 manages the execution of the sound data, it is not necessary to determine whether or not the sound data is being executed, the number of executions of the control process can be reduced, and the occurrence of bugs is suppressed. be able to.

  In addition, the pachislot machine 1 according to the present embodiment preferentially executes the new LED effect data when the new LED effect data is transferred even when the LED effect data is being executed. Whether or not the LED effect data associated with the sound data can be reliably executed at the time of execution of the data, and whether or not the LED effect data associated with the sound data is executed at the time of execution of the sound data at the time of design. It can be easily confirmed, design man-hours can be reduced, and the occurrence of bugs can be suppressed.

[Configuration of pachinko machines]
The present invention is not limited to a pachislot machine but can also be applied to a pachinko gaming machine. Hereinafter, the pachinko gaming machine will be described.

  103 and 104, a pachinko machine 1010 as a gaming machine includes a glass door 1011, a wooden frame 1012, a base door 1013, a game board 1014, a dish unit 1020, a liquid crystal display device 1032 for displaying an image, and a game ball. Is composed of a launching device 1130 for launching the battery, a dispensing unit (not shown), a substrate unit, and the like.

  The glass door 1011 is attached to the base door 1013 so that it can be opened and closed by a rotating shaft. An opening 1011a is formed at the center of the glass door 1011. A protective glass 1019 having transparency is disposed in the opening 1011a.

  The dish unit 1020 is a unit body in which the upper dish 1021 and the lower dish 1022 are integrated, and is disposed below the glass door 1011 in the base door 1013. The upper plate 1021 and the lower plate 1022 are provided with payout ports 1021a and 1022a for renting out game balls and paying out game balls (prize balls). If predetermined payout conditions are met, The balls are discharged, and in particular, the upper plate 1021 stores game balls for launching into a game area 1015 described later.

  The launching device 1130 includes a launching handle 1026 that is disposed at the lower right portion of the base door 1013 and can be operated by the player, and a panel body 1027 that fits in the lower right portion of the dish unit 1020. The firing handle 1026 is provided on the front side of the panel body 1027. A drive device for launching a game ball is provided on the back side of the panel body 1027. A player can advance the game by firing the game ball by operating the launch handle 1026.

  The game board 1014 is disposed in front of the base door 1013 so as to be positioned behind the protective glass 1019. A liquid crystal display device 1032 and the like are disposed behind the game board 1014. A payout unit and a substrate unit are disposed behind the base door 1013. An effect speaker 1046 (see FIG. 105) is disposed below the lower plate 1022.

  The game board 1014 is formed of various types of resin (permeability members) such as plate-shaped acrylic resin, polycarbonate resin, and methacrylic resin, all of which are permeable. In addition, the game board 1014 has a game area 1015 on the front side thereof in which the launched game ball can roll down. In the game area 1015, a plurality of game nails 1017 are driven. In addition, an LED unit 1053 is provided at the lower left portion of the game board 1014.

  The liquid crystal display device 1032 is disposed behind the game board 1014 (on the back side). The liquid crystal display device 1032 has a display area 1032a that enables display of an image relating to a game. In the display area 1032a, various kinds of images such as an identification pattern for effect, an effect image, and a decoration image for decoration are displayed.

  The firing handle 1026 is rotatable, and a firing solenoid (not shown) as a driving device is provided on the back side thereof. Further, a touch sensor (not shown) is provided on the peripheral edge of the firing handle 1026. Inside the firing handle 1026 is provided a firing volume that changes the resistance value according to the amount of rotation of the firing handle 1026 and changes the power supplied to the firing solenoid (not shown).

  When the player touches a touch sensor (not shown), it is detected that the firing handle 1026 is gripped by the player. When the firing handle 1026 is gripped by the player and rotated clockwise, the resistance value of the firing volume (not shown) changes according to the rotation angle, and corresponds to the resistance value at this time. Electric power is supplied to a firing solenoid (not shown). As a result, the game balls stored in the upper plate 1021 are sequentially launched into the game area 1015 and the game is advanced. When a firing stop button (not shown) is pressed, the game ball is stopped firing even when the firing handle 1026 is held and rotated.

  On the lower left side of the game board 1014, members forming the general winning ports 1056a, 1056b, and 1056c are arranged, and a portion of the member facing the LED unit 1053 is transparent. For this reason, the LED unit 1053 is visible from the lower left of the game board 1014. The LED unit 1053 includes a special symbol display device illustrated in FIG. 105, a normal symbol display device 1033, first special symbol hold display LEDs 1034a and 1034b, second special symbol hold display LEDs 1034c and 1034d, normal symbol hold display LEDs 1050a and 1050b, and the like. Is provided.

  The special symbol display device is composed of 16 LEDs. These 16 LEDs are divided into two groups of 8 LEDs, one of which is a variable display triggered by the start winning to the first start port 1023, the other group is The change display is performed in response to the start winning at the second start port 1044. For convenience of the following description, one LED group is referred to as a first special symbol display device 1035a (see FIG. 105), and the other LED group is referred to as a second special symbol display device 1035b (see FIG. 105).

  The LEDs of the first and second special symbol display devices 1035a and 1035b perform special symbol variation display by repeatedly turning on and off in units of groups when a predetermined special symbol variation display start condition is satisfied. When the special symbol is in a specific stop display mode, the gaming state shifts from a normal gaming state to a winning gaming state (special gaming state) that is advantageous to the player. In this winning game state, as will be described later, the shutter 1040 is controlled to be in the open state, and the game ball can be received in the special winning opening 1039.

  The normal symbol display device 1033 is variably displayed as a normal symbol by alternately turning on and off the two display lamps, and the normal electric accessory 1048 is opened according to the stop mode.

  The normal symbol hold display LEDs 1050a and 1050b display the number of executions of fluctuation display of the normal symbols that are held by turning on, turning off, or blinking (so-called “hold number”, “hold number related to normal symbols”).

  The first special symbol hold display LEDs 1034a and 1034b and the second special symbol hold display LEDs 1034c and 1034d are executed by the number of executions of the variable symbol variable display held by turning on, turning off, or blinking (so-called “hold number”, “special symbols”). Display the number of pending items ").

  In the display area of the liquid crystal display device 1032, an effect image related to the special symbol displayed on the first special symbol display device 1035 a and the second special symbol display device 1035 b is displayed.

  As shown in FIG. 104, on the game board 1014, there are two guide rails 1030 (1030a and 1030b), a stage 1055, a first start port 1023, a second start port 1044, a pass gate 1054, a shutter 1040, and a prize winning port. 1039, a general winning opening 1056a, 1056b, 1056c, 1056d, an ordinary electric accessory 1048, etc. are provided. Here, in the present embodiment, the first start port 1023 and the second start port 1044 constitute a detection region.

  The stage 1055 is provided on the upper part of the game board 1014, and the guide rail 1030 is provided so as to surround the game area 1015.

  The guide rail 1030 includes an outer rail 1030a and an inner rail 1030b. The launched game ball is guided by the guide rail 1030 and moves to the upper part of the game board 1014, and its traveling direction is changed by the collision with the plurality of game nails (not shown), the stage 1055, etc. It flows down toward the bottom of the game board 1014. Specifically, a system that flows down the left side of the stage 1055 (so-called left-handed) and a firing handle 1026 are rotated to the right to the maximum, and a game ball is driven into the right side of the stage 1055 and flows down the right side of the stage 1055. There is a system (so-called right-handed).

  The first start port 1023 is provided below the center of the game board 1014. The passage gate 1054 is provided on the upper right side of the stage 1055, and a second start port 1044 is provided below the passage gate 1054. The ordinary electric accessory 1048 is provided at the second start port 1044.

  The ordinary electric accessory 1048 includes a tongue-like member 1048a that projects and retracts in the front-rear direction with respect to the game board surface. The ordinary electric accessory 1048 can win a game ball to the second start port 1044 when the tongue-like member 1048a protrudes, and cannot win a game ball to the second start port 1044 when retracted. The ordinary electric accessory 1048 may be a pair of blade members that are opened and closed (so-called electric tulips).

  Further, when the player strikes the right side, the game nail 1017 is configured such that the game ball cannot enter the first start port 1023 from the right side of the stage 1055.

  If the game ball passes through the passing gate 1054 during the normal symbol variation display, the display mode by the normal symbol hold display LEDs 1050a and 1050b is switched until the normal symbol during the variation display is stopped and displayed. Execution (start) of the normal symbol variation display based on the passing of the game ball to the passing gate 1054 is suspended. After that, when the normal symbol that has been variably displayed is stopped and displayed, the variably displayed normal symbol that has been suspended is started.

  When a specific symbol is stopped and displayed as a normal symbol on the normal symbol display device 1033, an effect image for allowing the player to grasp that the normal symbol lottery is won is displayed in the display area of the liquid crystal display device 1032. You may make it do.

  The shutter 1040 is disposed directly below the first start port 1023, and opens and closes the big prize port 1039. An out port 1057 is formed at the lowermost part of the game area 1015 immediately below the shutter 1040. The general winning ports 1056a, 1056b, 1056c are provided in the lower left part of the game area 1015. Further, a general winning opening 1056d is provided at the lower right side of the game area 1015.

  Further, a winning area is provided in the first starting port 1023 described above, and a first starting winning port switch 1116 (see FIG. 105) is provided in this winning area. A winning area is provided in the second starting opening 1044, and a second starting winning opening switch 1117 (see FIG. 105) is provided in the winning area. When the game ball is detected by the first start winning a prize opening switch 1116, the first special symbol display device 1035a starts to display the variation of the special symbol.

  In addition, when a game ball enters the first start port 1023 during the special symbol variation display, the game ball enters the first start port 1023 until the special symbol during the variation display is stopped and displayed. Execution (start) of the special symbol variation display based on is suspended. Thereafter, when the special symbol that has been variably displayed is stopped and displayed, the variably displayed suspended special symbol is started. In the following description, the special symbol variably displayed on the first special symbol display device 1035a based on the game ball entering the first start port 1023 is referred to as a first special symbol.

  When the game ball is detected by the second start winning a prize opening switch 1117, the special symbol variation display by the second special symbol display device 1035b is started. In addition, when a game ball enters the second start opening 1044 during the variation display of the special symbol, the game ball enters the second start opening 1044 until the special symbol during the variation display is stopped and displayed. Execution (start) of the special symbol variation display based on is suspended. Thereafter, when the special symbol that has been variably displayed is stopped and displayed, the variably displayed suspended special symbol is started. In the following description, the special symbol variably displayed on the second special symbol display device 1035b based on the game ball entering the second start port 1044 is referred to as a second special symbol.

  Here, the first special symbol display device 1035a and the second special symbol display device 1035b do not fluctuate at the same time. In addition, the special symbol variation display is performed with priority given to the start winning at the second start port 1044.

  It should be noted that the upper limit of the number of suspensions of the special symbol variation display by entering the first start port 1023 and the second start port 1044 is four times. Therefore, a maximum of 8 holds is possible.

  In addition, as another condition (start of variable display of a predetermined special symbol), the special symbol is stopped and displayed. In other words, every time a predetermined special symbol variable display start condition is satisfied, the special symbol variable display is started.

  In the first special symbol display device 1035a and the second special symbol display device 1035b, when the special symbol becomes a specific stop display mode and the gaming state is shifted to the big hit gaming state, the shutter 1040 is opened. Driven. As a result, the special winning opening 1039 is in an open state (first state) in which a game ball can be easily received.

  On the other hand, the special winning opening 1039 provided on the back side (rear) of the shutter 1040 has an area (not shown) having a count switch 1104 (see FIG. 105), and a predetermined number of game balls (for example, 7) or the shutter 1040 is driven to the open state until a predetermined time (for example, about 0.1 second or about 30 seconds) elapses. When either a predetermined number of game balls are awarded to the big winning opening 1039 or a predetermined time has elapsed in the open state, the shutter 1040 is driven to be in the closed state. As a result, the special winning opening 1039 is in a closed state in which it is difficult to accept a game ball (second state).

  Note that a game in which the special winning opening 1039 easily accepts a game ball for a certain period of time is referred to as a round game. Therefore, the shutter 1040 is opened during the round game and is closed between the round games. A round game is counted as the number of rounds such as “1” round, “2” round, and the like. For example, the first round game may be referred to as the first round and the second round as the second round. In this example, in one round, the shutter 1040 is opened and closed a plurality of times, and the open time may be set to a certain time.

  Subsequently, the shutter 1040 driven from the open state to the closed state (second state) is driven again to the open state. That is, when the round game is finished, it is possible to continue to the next round game. A game from the first round game until the end of the (final) round game that cannot continue to the next round game is called a special game or a big hit game. In this example, all jackpots are 15 rounds.

  Further, when a game ball is won in the first start port 1023, the second start port 1044, the general winning ports 1056a to 1056d, and the big winning port 1039, the number set in advance according to the type of each winning port. Of the game balls are paid out to the upper plate 1021 or the lower plate 1022.

  Also, in this example, after the big hit game is over, there is a case where the winning probability of the normal symbol lottery becomes a high probability state, and the support by the normal electric game object 1048 shifts to the short time state where the reserved balls of the special symbol game are easily stored. . Here, in the short-time state, passing the game ball to the passing gate 1054 is a condition for executing the normal symbol lottery, so that the game proceeds while making a right strike.

  Further, when a big hit occurs in the right-handed state, it is possible to win the big winning opening 1039 by continuing the right-handed as it is. Further, when the support by the ordinary electric accessory 1048 cannot be received, the game is advanced while making a left strike.

  Also, as shown in FIG. 103, the production buttons 1080a, 1080b, and 1080c are provided on the front surface of the upper plate 1021, and these productions are performed during a mini-game such as an open game, a card turning, and a sugoroku. By pressing the button, the effect display content on the liquid crystal display device 1032 can be changed.

  In the pachinko machine 1010, a liquid crystal display device is described as an example of the production means. However, the present invention is not limited to this, and a plasma display, a rear projection display, a CRT display, a lamp / LED 1132, a speaker 1046, or a movable accessory shown in FIG. Peripheral devices such as these may be used as production means.

  Next, the electrical configuration of the pachinko machine 1010 will be described with reference to FIG.

  As shown in FIG. 105, the pachinko machine 1010 mainly includes a main control circuit 1060 that controls a game and a sub-control circuit 1200 that controls an effect according to the progress of the game.

  The main control circuit 1060 includes a main CPU 1066, a main ROM 1068 (read only memory), and a main RAM 1070 (read / write memory).

  The main CPU 1066 has the same configuration as the main CPU 31 (see FIG. 8) described in the pachislot machine of the present embodiment. That is, the main CPU 1066 constitutes information output means for outputting various commands as information relating to the progress of the game to the sub-control circuit 1200 via the command output port 1060, and executes each process relating to the progress of the game. ing. Specifically, the main CPU 1066 detects that the game ball has passed through the first start opening 1023 by a first start winning opening switch 1116 described later, or sets the second start opening 1044 by the second start winning opening switch 1117. When it is detected that the game ball has passed, lottery means for lottery for determining whether or not to shift the game state to the big hit state which is a game state advantageous to the player is configured.

  The main CPU 1066 is connected to a main ROM 1068, a main RAM 1070, and the like, and has a function of executing various processes according to a program stored in the main ROM 1068.

  The main ROM 1068 stores a program for controlling the operation of the pachinko machine 1010 by the main CPU 1066, a program for causing the main CPU 1066 to execute main processing, and various tables.

  The main RAM 1070 has a function of storing various flags and variable values as a temporary storage area of the main CPU 1066. The temporary storage area of the main CPU 1066 is not limited to the main RAM 1070, and other readable / writable storage media may be used.

  The main control circuit 1060 includes an initial reset circuit 1064 that generates a reset signal when the power is turned on, an I / O port 1071, and a command output port 1072. The initial reset circuit 1064 is connected to the main CPU 1066. The I / O port 1071 is used to transmit input signals from various devices to the main CPU 1066 and output signals from the main CPU 1066 to various devices.

  The command output port 1072 transmits a command from the main CPU 1066 to the sub control circuit 1200. The main control circuit 1060 includes a backup capacitor 1074. The backup capacitor 1074 is used to hold various data stored in the main RAM 1070, for example, by quickly supplying power to the main RAM 1070 when power is interrupted.

  Various devices are connected to the main control circuit 1060. For example, the main control circuit 1060 includes a first special symbol display device 1035a and a second special symbol display device 1035b, first special symbol hold display LEDs 1034a and 1034b, second special symbol hold display LEDs 1034c and 1034d, and a normal symbol display device 1033. The normal symbol hold display LEDs 1050a and 1050b, the start-port solenoid 1118 that causes the tongue-like member 1048a of the ordinary electric accessory 1048 to be in the protruding state or the retracted state, and the shutter 1040 are driven, and the grand prize winning port 1039 is opened or closed. A big prize solenoid 1120 or the like is connected.

  Further, the main control circuit 1060 has a call device (not shown) having a function of calling a hall attendant and a function of displaying the number of hits, and an external terminal used for transmitting data to a hall computer 1400 that manages pachinko machines for the entire hall. A plate 1310 is connected.

  The main control circuit 1060 also includes, for example, a count switch 1104 that supplies a predetermined detection signal to the main control circuit 1060 when a game ball passes through an area of the big prize opening 1039, and each general winning opening 1056. When a game ball passes through the general prize opening switches 1106, 1108, 1110, 1112 and the pass gate 1054, which supply a predetermined detection signal to the main control circuit 60 when the game passes, the predetermined detection signal is sent to the main control circuit 60. When the game ball wins the passing gate switch 1114 and the first starting port 1023 supplied to 1060, the first starting winning port switch 1116 and the second starting port 1044 that supply a predetermined detection signal to the main control circuit 1060 are played. Second start winning port switch 1117 for supplying a predetermined detection signal to the main control circuit 1060 when the ball has won, Such as backup clear switch 1124 to clear depending on the administrator of the operation of the game arcade is connected to a backup data in such.

  The main control circuit 1060 is connected to a payout / firing control circuit 1126. Connected to the payout / launch control circuit 1126 are a payout device 1128 for paying out game balls, a launch device 1130 for launching game balls, and a card unit 1300. The card unit 1300 can be transmitted / received to / from a ball lending operation panel 1155 that outputs a signal requesting the card unit 1300 to lend a game ball to the card unit 1300 by an operation of the player.

  The payout / launch control circuit 1126 receives a prize ball control command supplied from the main control circuit 1060 and a lending ball control signal supplied from the card unit 1300, and transmits a predetermined signal to the payout device 1128. The payout device 1128 is caused to pay out the game ball. Further, the payout / firing control circuit 1126 supplies electric power to the firing solenoid according to the turning angle when the launching handle 1026 is gripped by the player and is turned clockwise. Control to fire the ball.

  A sub control circuit 1200 is connected to the command output port 1072. The sub control circuit 1200 includes a sub ROM 1202, a sub RAM 1203, a DSP 1204, an audio RAM 1205, and a digital amplifier 1206, similar to the sub control circuit 70 (see FIG. 10) described in the pachislot machine of the present embodiment. Various processes similar to those of the sub-control circuit 70 can be executed. The sub CPU 1201 constitutes effect information determination means, effect information execution means, second effect information execution means, effect information transfer means, effect information group transfer means, and effect information determination means according to the present invention. The sub ROM 1202 constitutes effect information storage means and effect information group storage means according to the present invention. The DSP 1204 constitutes effect information execution means and first effect information execution means according to the present invention. Also, the audio RAM 1205 constitutes specific effect information storage means according to the present invention.

  As described above, according to the pachinko gaming machine according to the present embodiment, the same effects as those of the pachislot gaming machine according to the above embodiment can be obtained.

1 Pachislot machine (game machine)
3L, 3C, 3R reel 4L, 4C, 4R Display window (design display means)
6 Start lever 6S Start switch (Starting operation detection means)
7L, 7C, 7R Stop button 7S Stop switch (stop operation detection means)
8c winning line 9L, 9R, 1046 Speaker (peripheral equipment)
11 bet button 11S bet switch 31, 1066 main CPU (internal winning combination determining means, winning determination means, information output means, lottery means)
39 Motor drive circuit (design variation means, reel stop control means)
40 Hopper 42S Medal sensor 49L, 49C, 49R Stepping motor (reel stop control means)
50 reel position detection circuit 71, 1060 main control circuit 72, 1200 sub control circuit 81, 1201 sub CPU (effect information determination means, effect information execution means, second effect information execution means, effect information transfer means, effect information group transfer Means, production information judgment means)
82, 1202 Sub ROM (effect information storage means, effect information group storage means)
84, 1204 DSP (effect information execution means, first effect information execution means)
85, 1205 Audio RAM (specific effect information storage means)
100 dot display (peripheral device)
101 Reel upper display (peripheral equipment)
103 Reel display (peripheral equipment)
104 Side effect display (peripheral equipment)
105 Reel lower indicator (peripheral equipment, stop operation notification means)
105L, 105C, 105R Digital display section 110 Front panel 111 Notification section (notification means)
330 Light Emitting Unit (Peripheral Equipment)
1010 Pachinko machine (game machine)
1014 Game board 1015 Game area 1023 First start port (detection area)
1044 Second start port (detection area)
1132 Lamp / LED (Peripheral equipment)

Claims (5)

A plurality of reels displaying a plurality of symbols, a symbol display means for displaying a part of the symbols displayed on the reels, a main control circuit for controlling the progress of the game, and a sub-control for controlling the effects related to the game In a gaming machine equipped with a control circuit,
The main control circuit includes:
Start operation detecting means for detecting a start operation by the player;
On the condition that the start operation is detected by the start operation detection unit, a symbol variation unit that varies the symbol by rotating the reel;
An internal winning combination determining means for determining an internal winning combination with a predetermined probability from a plurality of combinations including a specific internal winning combination on the condition that the starting operation is detected by the starting operation detecting means;
A stop operation detecting means provided corresponding to the plurality of reels for detecting a stop operation for stopping each reel;
Based on the internal winning combination determined by the internal winning combination determining means and the timing when the stop operation is detected by the stop operation detecting means, the rotation of the reel is stopped and displayed on the symbol display means. Reel stop control means for stopping the fluctuation of the design,
Based on the fact that the change of the symbol is stopped by the reel stop control means, a winning determination for determining whether or not a winning combination is made based on a combination of symbols stopped on an active line provided on the symbol display means. Means,
Information output means for outputting information on the progress of the game to the sub-control circuit,
The sub-control circuit is
Connected to multiple peripherals,
Production information storage means for storing a plurality of production information;
Effect information determining means for determining effect information from the plurality of effect information based on the information output by the information output means;
Effect information executing means for executing the effect information determined by the effect information determining means;
Effect information transfer means for transferring the effect information to be executed by the effect information execution means;
Specific effect information storage means for storing specific effect information among the plurality of effect information stored in the effect information storage means when the sub control circuit is activated,
The effect information transfer means, when causing the effect information execution means to execute the specific effect information, transfers the specific effect information stored in the specific effect information storage means to the effect information execution means. A gaming machine characterized by   The gaming machine according to claim 1, wherein the specific effect information is effect information that has more opportunities to be executed by the effect information execution unit than other effect information. The sub-control circuit is
Effect information group storage means for storing an effect information group composed of a plurality of predetermined effect information;
Production information group transfer means for continuously transferring the production information from the production information group to the production information execution means when a predetermined condition is satisfied as the production information to be executed by the production information execution means. The gaming machine according to claim 1 or 2, further comprising: Controls the game area in which the game ball rolls, a game board having a detection area formed in the game area for detecting the passage of the game ball, a main control circuit for controlling the progress of the game, and effects related to the game In a gaming machine equipped with a sub-control circuit that
The main control circuit includes:
Lottery means for executing lottery processing for determining whether or not to shift to a gaming state advantageous to the player, when the game ball has passed through the detection area;
Information output means for outputting information related to the progress of the game based on the result of the lottery processing by the lottery means to the sub-control circuit;
The sub-control circuit is
Connected to multiple peripherals,
Production information storage means for storing a plurality of production information;
Effect information determining means for determining effect information from the plurality of effect information based on the information output by the information output means;
Effect information executing means for executing the effect information determined by the effect information determining means;
Effect information transfer means for transferring the effect information to be executed by the effect information execution means;
Specific effect information storage means for storing specific effect information among the plurality of effect information stored in the effect information storage means when the sub control circuit is activated,
The effect information transfer means, when causing the effect information execution means to execute the specific effect information, transfers the specific effect information stored in the specific effect information storage means to the effect information execution means. A gaming machine characterized by The sub-control circuit is
Effect information group storage means for storing an effect information group composed of a plurality of predetermined effect information;
Production information group transfer means for continuously transferring the production information from the production information group to the production information execution means when a predetermined condition is satisfied as the production information to be executed by the production information execution means. The gaming machine according to claim 4, further comprising:

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