JP2015133698A5 - - Google Patents

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Publication number
JP2015133698A5
JP2015133698A5 JP2015001491A JP2015001491A JP2015133698A5 JP 2015133698 A5 JP2015133698 A5 JP 2015133698A5 JP 2015001491 A JP2015001491 A JP 2015001491A JP 2015001491 A JP2015001491 A JP 2015001491A JP 2015133698 A5 JP2015133698 A5 JP 2015133698A5
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JP
Japan
Prior art keywords
signal
node
antenna
port
antenna port
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JP2015001491A
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English (en)
Japanese (ja)
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JP2015133698A (ja
JP6496553B2 (ja
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Priority claimed from US14/153,935 external-priority patent/US9780740B2/en
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Publication of JP2015133698A5 publication Critical patent/JP2015133698A5/ja
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Publication of JP6496553B2 publication Critical patent/JP6496553B2/ja
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JP2015001491A 2014-01-13 2015-01-07 パワー増幅器における予歪みのためのパッシブフィードバック経路 Active JP6496553B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/153,935 2014-01-13
US14/153,935 US9780740B2 (en) 2014-01-13 2014-01-13 Passive feedback path for pre-distortion in power amplifiers

Publications (3)

Publication Number Publication Date
JP2015133698A JP2015133698A (ja) 2015-07-23
JP2015133698A5 true JP2015133698A5 (cg-RX-API-DMAC7.html) 2018-02-15
JP6496553B2 JP6496553B2 (ja) 2019-04-03

Family

ID=53491718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015001491A Active JP6496553B2 (ja) 2014-01-13 2015-01-07 パワー増幅器における予歪みのためのパッシブフィードバック経路

Country Status (7)

Country Link
US (1) US9780740B2 (cg-RX-API-DMAC7.html)
JP (1) JP6496553B2 (cg-RX-API-DMAC7.html)
KR (1) KR102361113B1 (cg-RX-API-DMAC7.html)
CN (1) CN104779991B (cg-RX-API-DMAC7.html)
FR (1) FR3016490B1 (cg-RX-API-DMAC7.html)
IL (1) IL236267B (cg-RX-API-DMAC7.html)
TW (1) TWI647923B (cg-RX-API-DMAC7.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10009054B2 (en) 2015-05-28 2018-06-26 Skyworks Solutions, Inc. Impedance matching integrous signal combiner
US9813085B1 (en) * 2016-09-23 2017-11-07 Qualcomm Incorporated Closed loop digital pre-distortion
EP3646462A1 (en) * 2017-06-30 2020-05-06 INTEL Corporation Wireless architectures and digital pre-distortion (dpd) techniques using closed loop feedback for phased array transmitters
US11405064B1 (en) * 2021-07-01 2022-08-02 Psemi Corporation Bypass path reuse as feedback path in frontend module

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4584541A (en) * 1984-12-28 1986-04-22 Rca Corporation Digital modulator with variations of phase and amplitude modulation
JP2001313532A (ja) * 2000-05-01 2001-11-09 Sony Corp 歪み補償装置
JP4033794B2 (ja) * 2003-03-24 2008-01-16 株式会社エヌ・ティ・ティ・ドコモ 高効率線形電力増幅器
JP2007124202A (ja) * 2005-10-27 2007-05-17 Kyocera Corp 高周波モジュールおよび無線通信装置
US8195103B2 (en) * 2006-02-15 2012-06-05 Texas Instruments Incorporated Linearization of a transmit amplifier
AU2007260547B2 (en) * 2006-06-14 2010-08-12 Blackberry Limited Input drive control for switcher regulated power amplifier modules
US8126036B2 (en) * 2008-06-21 2012-02-28 Vyycore Corporation Predistortion and post-distortion correction of both a receiver and transmitter during calibration
JP2011239229A (ja) * 2010-05-11 2011-11-24 Nippon Telegr & Teleph Corp <Ntt> 無線通信システムおよび無線通信方法
EP2428814A1 (en) * 2010-09-13 2012-03-14 France Telecom Object detection method, device and system
US8514918B2 (en) * 2010-09-24 2013-08-20 Intel Corporation Close-loop power transmission calibration
JP5679193B2 (ja) * 2011-04-22 2015-03-04 日本電信電話株式会社 送信機及び送受信機
US8699972B2 (en) * 2011-11-15 2014-04-15 Qualcomm Incorporated Transmit power calibration in a communication system

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