JP2015133407A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve withstand voltage while reducing contact resistance.SOLUTION: A semiconductor device includes: a nitride semiconductor laminated structure 5 that includes an electron transit layer 3 and electron supply layer 4; a drain electrode 7 and source electrode 8 that are provided on the electron supply layer 4; and a gate electrode 6 that is provided on an upper part of the nitride semiconductor laminated structure 5. The drain electrode 7 is formed so that a plurality of recesses 7X and a plurality of protrusions 7Y, which extend in parallel in a width direction of the gate electrode, are provided in a contact part 7A contacting the electron supply layer 4 and so that a recess is arranged closest to the gate electrode 6.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  Conventionally, various techniques for reducing contact resistance have been proposed for semiconductor devices using silicon-based semiconductors.

JP 2004-260003 A JP-A-3-280532 JP-A-5-109643

By the way, as a semiconductor device using a nitride semiconductor, for example, there is a field effect transistor using GaN such as a high electron mobility transistor (HEMT; GaN-HEMT) using GaN.
In such a transistor, the ratio of the contact resistance of the drain electrode and the source electrode in the on-resistance may increase. In this case, it is necessary to reduce the contact resistance in order to reduce the on-resistance of the transistor.

On the other hand, it is necessary to improve the breakdown voltage of such a transistor.
Therefore, it is desirable to improve the breakdown voltage while reducing the contact resistance.

  The semiconductor device includes a nitride semiconductor multilayer structure including an electron transit layer and an electron supply layer, a drain electrode and a source electrode provided on the electron supply layer, a gate electrode provided above the nitride semiconductor multilayer structure, The drain electrode has a plurality of recesses and a plurality of projections extending in parallel to the width direction of the gate electrode at the contact portion in contact with the electron supply layer, and the recess is located closest to the gate electrode.

  The method for manufacturing the semiconductor device includes a step of forming a nitride semiconductor multilayer structure including an electron transit layer and an electron supply layer, a step of forming a gate electrode above the nitride semiconductor multilayer structure, and a drain on the electron supply layer. The step of forming the drain electrode and the source electrode, the contact portion in contact with the electron supply layer having a plurality of recesses and a plurality of projections extending in parallel to the width direction of the gate electrode. Then, a drain electrode having a concave portion on the most gate electrode side is formed.

  Therefore, according to the present semiconductor device and the manufacturing method thereof, there is an advantage that the breakdown voltage can be improved while reducing the contact resistance.

It is a typical sectional view showing the composition of the semiconductor device concerning this embodiment. (A)-(C) are the schematic diagrams which show the structure of the semiconductor device concerning this embodiment, (A) is a top view, (B) is along ab direction in (A). It is sectional drawing, (C) is sectional drawing which follows a cd direction in (A). (A) to (F) show the simulation results of the electric field strength applied to the gate electrode side edge of the drain electrode and the electric field strength applied to the surface side of the electron transit layer in the vicinity of the interface between the electron supply layer and the electron transit layer. FIG. It is the figure which matched the electric field strength concerning the surface of the electron transit layer in FIG. 3 (A)-FIG. 3 (F), matched with the X-axis direction position. It is typical sectional drawing which shows the structure of the semiconductor device of a comparative example. It is typical sectional drawing for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. It is typical sectional drawing for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. It is typical sectional drawing for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. It is typical sectional drawing for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. It is typical sectional drawing for demonstrating the manufacturing method of the semiconductor device concerning this embodiment. It is typical sectional drawing for demonstrating the manufacturing method of the semiconductor device concerning this embodiment.

Hereinafter, a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to FIGS.
The semiconductor device according to the present embodiment is a semiconductor device including a nitride semiconductor multilayer structure using, for example, a nitride semiconductor.
In the present embodiment, the semiconductor device includes an FET using a nitride semiconductor, specifically, a nitride semiconductor stacked structure (HEMT structure) using GaN as an electron transit layer and AlGaN as an electron supply layer, An enhancement mode (E-mode) AlGaN / GaN-HEMT including a p-GaN layer as a p-type semiconductor layer immediately below the gate electrode will be described as an example.

  AlGaN / GaN-HEMT is also referred to as AlGaN / GaN-FET. The nitride semiconductor multilayer structure is also referred to as a III-V group nitride semiconductor multilayer structure or a GaN-based semiconductor multilayer structure. The semiconductor device is also referred to as a nitride semiconductor device, a III-V group nitride semiconductor device, a GaN-based semiconductor device, or a GaN device. Enhancement mode AlGaN / GaN-HEMT is also referred to as normally-off type AlGaN / GaN-HEMT.

  As shown in FIGS. 2A to 2C, the present AlGaN / GaN-HEMT includes a buffer layer 2 provided as necessary on a substrate (semiconductor substrate) 1 such as a Si substrate or a SiC substrate. A nitride semiconductor multilayer structure 5 in which a GaN electron transit layer (channel layer) 3 and an AlGaN electron supply layer 4 are laminated. In this case, a two-dimensional electron gas (2DEG) is generated near the interface between the electron transit layer 3 and the electron supply layer 4. Each of the semiconductor layers 2 to 4 is also referred to as a group III-V nitride semiconductor layer or a nitride semiconductor layer. 2B and 2C, reference numeral 15 denotes an element isolation region.

A gate electrode 6, a drain electrode 7, and a source electrode 8 are provided above the nitride semiconductor multilayer structure 5 described above.
In the present embodiment, the gate electrode 6 is provided above the nitride semiconductor multilayer structure 5 with the p-GaN layer 9 interposed therebetween. That is, the p-GaN layer 9 is provided on the AlGaN electron supply layer 4 constituting the uppermost layer of the nitride semiconductor multilayer structure 5 described above, and the gate electrode 6 is provided on the p-GaN layer 9. . A drain electrode 7 and a source electrode 8 are provided on the AlGaN electron supply layer 4. The drain electrode 7 and the source electrode 8 are provided on both sides of the gate electrode 6, and the lower ends thereof are in contact with the surface of the AlGaN electron supply layer 4. Since the lower end portions of the drain electrode 7 and the source electrode 8 are in contact with the AlGaN electron supply layer 4, they are also referred to as contact portions in contact with the AlGaN electron supply layer 4.

Furthermore, in this embodiment, the insulating film 10 (interlayer insulating film; for example, SiN film) is formed on the AlGaN electron supply layer 4 constituting the uppermost layer of the nitride semiconductor multilayer structure 5 so as to cover the entire surface. Is provided.
In particular, in the present embodiment, the drain electrode 7 is a metal electrode, and as shown in FIG. 1, the contact electrode 7A in contact with the AlGaN electron supply layer 4 has a width direction of the gate electrode 6 [in FIG. A plurality of concave portions 7X and a plurality of convex portions 7Y extending in parallel with the [vertical direction] are provided, and the gate electrode 6 side is the concave portion 7X. Thereby, the breakdown voltage can be improved while reducing the contact resistance.

  That is, the drain electrode 7 extends in parallel with the width direction of the gate electrode 6 to the contact portion 7A in contact with the AlGaN electron supply layer 4, that is, a plurality of recesses 7X and a plurality of recesses 7X extending in the cd direction in FIG. Convex portion 7Y. That is, the plurality of recesses 7X and the plurality of protrusions 7Y included in the contact portion 7A in contact with the AlGaN electron supply layer 4 by the drain electrode 7 are currents flowing between the drain electrode 7 and the source electrode 8, that is, the drain electrode 7 and The channel extends in a direction orthogonal to the channel extending between the source electrode 8 and the source electrode 8.

  As a result, the contact surface (interface) between the drain electrode 7 and the source electrode 8 and the AlGaN electron supply layer 4 becomes an uneven surface, and the surface area increases, so that the contact resistance can be reduced (low resistance). . Further, since the plurality of concave portions 7X and the plurality of convex portions 7Y are provided so as to extend in parallel to the width direction of the gate electrode 6, the edge of the drain electrode 7 on the gate electrode 6 side is parallel to the width direction of the gate electrode 6. Will extend in a straight line. As a result, the electric field applied to the edge of the drain electrode 7 on the gate electrode 6 side can be made uniform in a direction extending parallel to the width direction of the gate electrode 6, and the breakdown voltage can be improved. On the other hand, if such irregularities are provided so as to extend in a direction perpendicular to the width direction of the gate electrode, the edge of the drain electrode on the gate electrode side changes stepwise along the width direction of the gate electrode. Since the electric field may concentrate on each corner, it is difficult to improve the breakdown voltage.

  In addition, the cross-sectional shape of the recessed part 7X and the convex part 7Y is not restricted to the cross-sectional rectangular shape as shown in FIG. 1, For example, cross-sectional trapezoid shape etc. may be sufficient. Further, the position of the bottom surface of the recess 7X is made to coincide with the position of the AlGaN electron supply layer 4, but the present invention is not limited to this, and it may be shifted in the thickness direction of the AlGaN electron supply layer 4. For example, the AlGaN electron supply layer 4 may have a recess in the drain electrode formation region, and the position of the bottom surface of the recess 7X may coincide with the position of the bottom surface of the recess. In the present embodiment, in the drain electrode formation region of the AlGaN electron supply layer 4, it can be considered that only the portion where the convex portion 7 </ b> Y of the drain electrode 7 is provided is a recess.

  Then, as described above, when the drain electrode 7 has a plurality of concave portions 7X and a plurality of convex portions 7Y extending in parallel to the width direction of the gate electrode 6 in the contact portion 7A in contact with the AlGaN electron supply layer 4. As shown in FIG. 1, the gate electrode 6 side is the most recessed portion 7X. In this case, on the wall surface of the drain electrode 7 on the gate electrode 6 side, the wall surface of the contact portion 7A having a plurality of concave portions 7X and the plurality of convex portions 7Y (that is, the wall surface of the convex portion 7Y closest to the gate electrode 6) is the gate. It is shifted in a direction far from the electrode 6.

  Here, the two-dimensional electron gas concentration is high on the surface side of the GaN electron transit layer 3 in the vicinity of the interface between the AlGaN electron supply layer 4 and the GaN electron transit layer 3, and is applied to the surface side of the GaN electron transit layer 3. When the electric field strength is high, the leak current increases due to impact ionization, and the withstand voltage decreases. The height of the electric field strength applied to the surface side of the GaN electron transit layer 3 depends on the height of the electric field strength applied to the edge of the contact portion 7A of the drain electrode 7 on the gate electrode 6 side [for example, FIG. )reference].

  As described above, in the contact portion 7A of the drain electrode 7, by making the gate electrode 6 side the most concave portion 7X, there are two edges on the gate electrode 6 side [see, for example, FIG. The edge on the electrode 6 side [see the left edge E1 in FIG. 3B, for example] is far from the surface of the GaN electron transit layer 3. In this case, the height of the electric field strength applied to the surface side of the GaN electron transit layer 3 is the edge closer to the surface of the GaN electron transit layer 3 [see, for example, the right edge E2 in FIG. 3B]. It depends on the height of the electric field strength. Since the edge closer to the surface of the GaN electron transit layer 3 is farther from the gate electrode 6 than the edge far from the surface of the GaN electron transit layer 3, it is closer to the surface of the GaN electron transit layer 3. The electric field strength applied to one edge is lower than the electric field strength applied to the edge farther from the surface of the GaN electron transit layer 3 [see, for example, FIG. 3B]. For this reason, by making the gate electrode 6 side closest to the recess 7X in the contact portion 7A of the drain electrode 7, the electric field strength applied to the surface side of the GaN electron transit layer 3 can be reduced [for example, FIG. 3 (A) and FIG. 3 (B)], the withstand voltage can be improved.

  In particular, the width of the recess 7X closest to the gate electrode 6, that is, the length in the direction orthogonal to the direction in which the recess 7X of the recess 7X closest to the gate electrode 6 extends (longitudinal direction; the width direction of the gate electrode 6) is about It is preferably 15 nm or more and about 80 nm or less. In this case, on the wall surface of the drain electrode 7 on the gate electrode 6 side, the wall surface of the contact portion 7A having the plurality of concave portions 7X and the plurality of convex portions 7Y (that is, the wall surface of the convex portion 7Y closest to the gate electrode 6) is about The distance is shifted from the gate electrode 6 by a distance of 15 nm or more and about 80 nm or less. That is, the position where the convex portion 7Y closest to the gate electrode 6 is provided in the contact portion 7A is limited, and the position of the wall surface of the convex portion 7Y closest to the gate electrode 6 is the gate other than the contact portion 7A of the drain electrode 7. The distance from the gate electrode 6 is shifted by a distance of about 15 nm to about 80 nm with respect to the wall surface on the electrode 6 side.

Further, the width of the recess 7X closest to the gate electrode 6 is more preferably about 25 nm or more and about 80 nm or less.
Further, the width of the recess 7X closest to the gate electrode 6 is most preferably not less than about 50 nm and not more than about 80 nm.
Here, FIG. 3A to FIG. 3F show the electric field strength applied to the edge of the drain electrode on the gate electrode side and the surface side of the electron transit layer in the vicinity of the interface between the electron supply layer and the electron transit layer. The simulation result of such electric field intensity is shown. FIG. 4 shows the electric field strength applied to the surface of the electron transit layer in FIGS. 3A to 3F in association with the position in the X-axis direction.

  3A to 3F, the electric field strength applied to the edge of the drain electrode on the gate electrode side and the surface side of the electron transit layer in the vicinity of the interface between the electron supply layer and the electron transit layer. The electric field strength is shown deeply, which means that the electric field strength is high. However, in other parts, for example, in FIG. 3 (B) to FIG. 3 (F), the electric field strength applied in the vicinity of the step indicated by the symbol D is also shown deeply, but the electric field strength in that part is the lowest. ing. FIG. 3A shows a simulation result in the case where the contact portion 7A of the drain electrode 7 is not the concave portion 7X but the convex portion 7Y as a comparative example. FIG. 3B shows a simulation result when the width A of the recess 7X closest to the gate electrode 6 is about 15 nm (A = about 15 nm). FIG. 3C shows a simulation result when the width A of the recess 7X closest to the gate electrode 6 is about 25 nm (A = about 25 nm). FIG. 3D shows a simulation result when the width A of the recess 7X closest to the gate electrode 6 is about 50 nm (A = about 50 nm). FIG. 3E shows the simulation result when the width A of the recess 7X closest to the gate electrode 6 is about 80 nm (A = about 80 nm). FIG. 3F shows a simulation result when the width A of the recess 7X closest to the gate electrode 6 is about 90 nm (A = about 90 nm).

  In FIG. 4, a solid line A indicates the electric field strength applied to the surface of the electron transit layer in FIG. 3A, and a solid line B indicates the electric field strength applied to the surface of the electron transit layer in FIG. The solid line C indicates the electric field strength applied to the surface of the electron transit layer in FIG. 3C, and the solid line D indicates the electric field strength applied to the surface of the electron transit layer in FIG. The solid line E indicates the electric field strength applied to the surface of the electron transit layer in FIG. 3E, and the solid line F indicates the electric field strength applied to the surface of the electron transit layer in FIG.

  As shown in FIGS. 3A to 3F and FIG. 4, the contact portion 7A of the drain electrode 7 is not the concave portion 7X on the most side of the gate electrode 6 but is compared with the convex portion 7Y. Then, by setting the width of the concave portion 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 to about 15 nm, about 25 nm, about 50 nm, about 80 nm, and about 90 nm, the surface side of the GaN electron transit layer 3 It is possible to reduce the electric field strength applied to the film, and to improve the breakdown voltage.

Further, as shown by solid lines B to E in FIGS. 3B to 3E and 4, the width of the recess 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 is about 80 nm. By increasing this width, the effect of reducing the electric field strength applied to the surface side of the GaN electron transit layer 3 and improving the breakdown voltage also increases.
On the other hand, as shown by solid line E and solid line F in FIGS. 3 (E), 3 (F), and 4, the width of the recess 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 is Even if it is about 80 nm or about 90 nm, the electric field strength applied to the surface side of the GaN electron transit layer 3 does not change much. That is, when the width of the recess 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 is larger than about 80 nm, the electric field strength applied to the surface side of the GaN electron transit layer 3 is reduced even if the width is increased. However, the effect of improving the breakdown voltage is not so great.

On the other hand, in the contact portion 7A of the drain electrode 7, the width of the concave portion 7X closest to the gate electrode 6 is increased, and the region where the concave portion 7X and the convex portion 7Y of the contact portion 7A of the drain electrode 7 are provided is narrowed. The effect of reducing becomes smaller.
Considering such points, as described above, the width of the concave portion 7X closest to the gate electrode 6 is preferably about 15 nm or more and about 80 nm or less. Thereby, the effect of reducing the contact resistance can be sufficiently obtained while reducing the electric field strength applied to the surface side of the GaN electron transit layer 3 and improving the breakdown voltage.

3B, FIG. 3C, and FIG. 4, the width of the concave portion 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 is about 15 nm. The effect of reducing the electric field strength applied to the surface side of the GaN electron transit layer 3 and improving the withstand voltage is greater when the thickness is about 25 nm than when the thickness is about 25 nm.
Considering this point, as described above, the width of the recess 7X closest to the gate electrode 6 is more preferably about 25 nm or more and about 80 nm or less. As a result, the effect of reducing the contact resistance can be sufficiently obtained while obtaining the effect of reducing the electric field strength applied to the surface side of the GaN electron transit layer 3 and improving the breakdown voltage.

  3C, FIG. 3D, and FIG. 4, the width of the concave portion 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 is about 25 nm. The effect of reducing the electric field strength applied to the surface side of the GaN electron transit layer 3 and improving the breakdown voltage is greater when the thickness is about 50 nm than when the thickness is about 50 nm. The width of the concave portion 7X closest to the gate electrode 6 in the contact portion 7A of the drain electrode 7 is about 50 nm, thereby reducing the electric field strength applied to the surface side of the GaN electron transit layer 3 and improving the breakdown voltage. Is sufficiently obtained.

Considering this point, as described above, the width of the concave portion 7X closest to the gate electrode 6 is most preferably about 50 nm or more and about 80 nm or less. As a result, the electric field strength applied to the surface side of the GaN electron transit layer 3 is sufficiently reduced, and the effect of reducing the contact resistance is sufficiently obtained while the effect of improving the breakdown voltage is sufficiently obtained.
Similarly to the drain electrode 7 described above, the source electrode 8 is also a metal electrode. As shown in FIG. 2B, the contact portion 8A in contact with the AlGaN electron supply layer 4 is arranged in the width direction of the gate electrode 6. It is preferable to have a plurality of concave portions 8X and a plurality of convex portions 8Y extending in parallel. As a result, the contact resistance can be further reduced.

By the way, the reason for the above configuration is as follows.
For example, in the case of an AlGaN / GaN-HEMT having a low breakdown voltage with a short distance between the gate electrode and the drain electrode, the contact resistance (SD contact resistance) of the drain electrode and the source electrode occupying the on-resistance (Ron) of the transistor ) Becomes larger. In particular, in the enhancement mode AlGaN / GaN-HEMT having a low breakdown voltage with a short distance between the gate electrode and the drain electrode, the ratio of the contact resistance of the drain electrode and the source electrode in the entire on-resistance of the transistor is about It becomes about 1/3.

For this reason, it is necessary to reduce the contact resistance in order to reduce the on-resistance of the transistor.
For example, as shown in FIG. 5, recess etching is performed on the AlGaN electron supply layer 4 in the region where the drain electrode 7 and the source electrode 8 are formed, that is, recesses 11 and 12 formed by etching the AlGaN electron supply layer 4. It is also conceivable to provide the drain electrode 7 and the source electrode 8 on each other. For example, the AlGaN electron supply layer 4 is etched by, for example, dry etching to form the recesses 11 and 12 using a resist mask having openings in the drain electrode formation region and the source electrode formation region, and these recesses 11 and 12 are formed. It is also conceivable to provide the drain electrode 7 and the source electrode 8 on each other. However, with this method, it is difficult to sufficiently reduce the contact resistance.

On the other hand, it is necessary to improve the breakdown voltage of such a transistor.
In view of this, the structure is configured as described above in order to improve the breakdown voltage while reducing the contact resistance.
Next, a method for manufacturing the semiconductor device (enhancement mode AlGaN / GaN-HEMT) according to the present embodiment will be described with reference to FIGS.

  First, as shown in FIG. 6, a buffer layer 2 is formed on a substrate 1 such as a Si substrate or a SiC substrate, if necessary, for example, by a metal organic chemical vapor deposition (MOCVD) method. The nitride semiconductor multilayer structure 5 is formed by laminating the GaN electron transit layer 3 and the AlGaN electron supply layer 4, and the p-GaN layer 9X is further laminated thereon.

Instead of the MOCVD method, a metal organic vapor phase epitaxy (MOVPE) method, a molecular beam epitaxy (MBE) method, or the like may be used.
Here, the buffer layer 2 is a laminated film of Al _x Ga _(1-x) N (0 <x ≦ 1), and has a thickness of about 1 to about 3 μm, for example, about 2.6 μm. is there. The thickness of the GaN electron transit layer 3 is, for example, about 0.9 μm to about 1.5 μm, for example, about 1.1 μm. The AlGaN electron supply layer 4 has an Al composition of about 15% to about 25%, for example, about 20%, and has a thickness of about 10 nm to about 20 nm, for example, about 12 nm. The p-GaN layer 9X has a thickness of about 40 nm to about 80 nm, for example, about 65 nm as an example. For example, Mg is used as a p-type impurity, and the doping concentration is about 1 × 10 ^19, for example. It is about cm ⁻³ to about 3 × 10 ¹⁹ cm ⁻³ , and is about 2 × 10 ¹⁹ cm ⁻³ as an example.

Next, as shown in FIG. 7, a sacrificial layer 13 such as a p-SiN layer having a thickness of 40 nm is formed on the p-GaN layer 9 </ b> X, and an element isolation region is further formed using, for example, a photolithography technique. A resist mask 14 having an opening above the region to be formed is formed.
Then, using this resist mask 14, an element isolation region 15 is formed by ion implantation, for example.

Here, when the element isolation region 15 is formed by the ion implantation method, for example, an Ar or B system is used. As an example, Ar is implanted at about 170 keV and about 5 × 10 ¹³ cm ⁻² , and Ar is continuously about 100 keV. Inject at about 1 × 10 ¹³ cm ⁻² . However, the present invention is not limited to this. For example, element isolation may be performed by dry etching using a chlorine-based gas.
Next, after removing the resist mask 14 and the sacrificial layer 13, a gate metal layer 6X is formed on the entire surface as shown in FIG. Here, the gate metal layer 6X is, for example, a metal layer such as Ti, TiN, TaN, Al, or W, and is a TiN layer having a thickness of about 100 nm as an example. The gate metal layer 6X may be a stack of metal layers.

Further, a resist mask 16 is formed on the gate metal layer 6X to cover the upper portion of the gate electrode formation region using, for example, a photolithography technique.
Then, the gate metal layer 6X is etched using the resist mask 16 to form the gate electrode 6 as shown in FIG. Subsequently, the p-GaN layer 9 </ b> X is also etched so that the p-GaN layer 9 remains only directly under the gate electrode 6.

In this manner, the gate electrode 6 is formed above the nitride semiconductor multilayer structure 5 including the GaN electron transit layer 3 and the AlGaN electron supply layer 4 with the p-GaN layer 9 interposed therebetween.
Next, after removing the resist mask 16, as shown in FIG. 9, a resist film is formed on the entire surface, and regions for forming the contact portions 7A and 8A of the drain electrode 7 and the source electrode 8 are formed as gate electrodes. A resist mask 17 is formed by opening a plurality of slits so as to extend in parallel with the width direction 6.

Here, the resist mask 17 is patterned so that the region of the drain electrode 7 where the contact portion 7A is to be formed is left most on the gate electrode 6 side. That is, the resist mask 17 is patterned so that a slit-like opening is not provided on the most side of the gate electrode 6 in the region where the contact portion 7A of the drain electrode 7 is formed.
Here, the width of each opening (slit width), that is, the length in the direction orthogonal to the direction in which the opening extends is, for example, about 0.2 μm to about 1.0 μm. Here, the width of the portion where the resist is left between the openings is about the same.

Then, using this resist mask 17, the AlGaN electron supply layer 4 in the region where the contact portions 7A and 8A of the drain electrode 7 and the source electrode 8 are formed is etched by, for example, dry etching. Here, the etching amount, that is, the depth at which the AlGaN electron supply layer 4 is etched is, for example, about 5 nm to about 15 nm. As the gas system, for example, chlorine or SF _x may be used. Note that anisotropic etching or isotropic etching may be used.

  In this case, since the surface of the AlGaN electron supply layer 4 in the region where the contact portions 7A and 8A of the drain electrode 7 and the source electrode 8 are formed is etched through each opening of the resist mask 17, each opening of the resist mask 17 is formed. It becomes a recessed part in the position of, and becomes a convex part in the position of the part left between each opening. That is, the surface of the AlGaN electron supply layer 4 in the region where the contact portions 7A and 8A of the drain electrode 7 and the source electrode 8 are formed is recess-etched into a slit shape, and as shown in FIG. A part will be formed. In this case, the concave portion is a recess etching portion and the convex portion is a recess etching portion.

In this way, a plurality of concave portions and a plurality of convex portions extending in parallel to the width direction of the gate electrode 6 are formed on the surface of the AlGaN electron supply layer 4 in the region where the contact portions 7A and 8A of the drain electrode 7 and the source electrode 8 are formed. Form.
Next, after removing the resist mask 17, an insulating film 10 is formed on the entire surface as shown in FIG. That is, the insulating film 10 is formed on the AlGaN electron supply layer 4 so as to cover the entire surface. Here, the insulating film 10 is, for example, a SiO film, a SiN film, or the like, for example, a TEOS film (tetraethyl orthosilicate film).

Next, after performing a planarization step by polishing by CMP (Chemical Mechanical Polishing) or SOG (Spin On Glass), for example, an opening is formed above the drain electrode formation region and the source electrode formation region by using, for example, a photolithography technique. A resist mask 18 is formed.
In particular, the opening located above the drain electrode formation region of the resist mask 18 has a wall surface on the gate electrode 6 side formed on the surface of the AlGaN electron supply layer 4 in the region where the contact portion 7A of the drain electrode 7 is formed. Further, the patterning is performed so as to be positioned closer to the gate electrode 6 than the recess closest to the gate electrode 6 among the plurality of recesses. This is to make the recess 7X closest to the gate electrode 6 side of the contact portion 7A of the drain electrode 7, as will be described later.

  In this case, the gate electrode 6 side wall surface of the opening located above the drain electrode formation region of the resist mask 18 and the surface of the AlGaN electron supply layer 4 in the region where the contact portion 7A of the drain electrode 7 is formed are the most. The distance from the recess on the gate electrode 6 side (the direction in which the recess extends, that is, the length in the direction perpendicular to the width direction of the gate electrode 6) is preferably about 15 nm or more and about 80 nm or less. The distance is more preferably about 25 nm or more and about 80 nm or less. Furthermore, this distance is most preferably not less than about 50 nm and not more than about 80 nm.

Then, the insulating film 10 is etched using the resist mask 18 to remove the insulating film 10 formed in the drain electrode formation region and the source electrode formation region. In this manner, openings for forming the drain electrode 7 and the source electrode 8 are formed in the insulating film 10.
Next, as shown in FIG. 11, a metal used as a material for the drain electrode 7 and the source electrode 8 is buried in the drain electrode formation region and the source electrode formation region, that is, the opening formed in the insulating film 10. Here, the metal used as the material of the drain electrode 7 and the source electrode 8 is, for example, a metal such as Al, TiN, Ti, TaN, and W, and may be laminated. For example, Ti and Al are laminated.

In this way, the drain electrode 7 and the source electrode 8 are formed on the AlGaN electron supply layer 4. That is, the drain electrode 7 and the source electrode 8 are formed on both sides of the gate electrode 6, and the lower ends of the drain electrode 7 and the source electrode 8 are in contact with the surface of the AlGaN electron supply layer 4.
In particular, as described above, the surface of the AlGaN electron supply layer 4 in the region where the contact portions 7A and 8A of the drain electrode 7 and the source electrode 8 are formed has a plurality of recesses and a plurality of recesses extending in parallel to the width direction of the gate electrode 6. The convex part is formed. For this reason, lower end portions of the drain electrode 7 and the source electrode 8 (contact portions 7A and 8A) formed by embedding metal used as a material for the drain electrode 7 and the source electrode 8 in the drain electrode formation region and the source electrode formation region. ) Are also formed with a plurality of recesses 7X, 8X and a plurality of projections 7Y, 8Y extending parallel to the width direction of the gate electrode 6. That is, the drain electrode 7 and the source electrode 8 have a plurality of concave portions 7X, 8X and a plurality of convex portions 7Y, 8Y extending in parallel with the width direction of the gate electrode 6 at the contact portions 7A, 8A in contact with the AlGaN electron supply layer 4. It will be a thing. Thereby, the contact surface of the drain electrode 7 and the source electrode 8 and the AlGaN electron supply layer 4 becomes an uneven surface, and its surface area increases, so that the contact resistance can be reduced.

Further, since the plurality of concave portions 7X and the plurality of convex portions 7Y are provided so as to extend in parallel with the width direction of the gate electrode 6, an electric field applied to the edge of the drain electrode 7 on the gate electrode 6 side is applied in the width direction of the gate electrode 6. It can be made uniform in the direction extending in parallel, and the breakdown voltage can be improved.
As described above, the opening located above the drain electrode formation region of the resist mask 18 has a wall surface on the gate electrode 6 side of the AlGaN electron supply layer 4 in the region where the contact portion 7A of the drain electrode 7 is formed. Patterning is performed so as to be positioned closer to the gate electrode 6 than the recess closest to the gate electrode 6 among the plurality of recesses formed on the surface. Therefore, the drain electrode 7 having a plurality of concave portions 7X and a plurality of convex portions 7Y extending in parallel with the width direction of the gate electrode 6 in the contact portion 7A in contact with the AlGaN electron supply layer 4 has the concave portion 7X closest to the gate electrode 6 side. ing. Thereby, the electric field applied to the edge of the drain electrode 7 on the gate electrode 6 side can be relaxed, and the breakdown voltage can be improved.

  In particular, as described above, on the wall surface on the gate electrode 6 side of the opening located above the drain electrode formation region of the resist mask 18 and the surface of the AlGaN electron supply layer 4 in the region where the contact portion 7A of the drain electrode 7 is formed. When the distance between the formed concave portion closest to the gate electrode 6 is about 15 nm or more and about 80 nm or less, the width of the concave portion 7X closest to the gate electrode 6 of the contact portion 7A of the drain electrode 7, that is, The length in the direction orthogonal to the direction in which the recess 7X extends (the width direction of the gate electrode 6) is about 15 nm or more and about 80 nm or less. Further, when the above-mentioned distance is about 25 nm or more and about 80 nm or less, the width (length) is about 25 nm or more and about 80 nm or less. Further, when the above-mentioned distance is set to about 50 nm or more and about 80 nm or less, the width (length) is about 50 nm or more and about 80 nm or less.

  Thus, in the step of forming the drain electrode 7 and the source electrode 8, the contact portion 7A in contact with the AlGaN electron supply layer 4 has a plurality of concave portions 7X and a plurality of convex portions 7Y extending in parallel to the width direction of the gate electrode 6. As a result, the drain electrode 7 having the recess 7X on the most side of the gate electrode 6 is formed. In this case, the length of the recess 7X closest to the gate electrode 6 in the direction perpendicular to the direction in which the recess 7X extends (the width direction of the gate electrode 6) is preferably about 15 nm or more and about 80 nm or less. The length is more preferably about 25 nm or more and about 80 nm or less. Further, this length is most preferably not less than about 50 nm and not more than about 80 nm. Further, in the step of forming the drain electrode 7 and the source electrode 8, a source having a plurality of concave portions 8X and a plurality of convex portions 8Y extending in parallel to the width direction of the gate electrode 6 in the contact portion 8A in contact with the AlGaN electron supply layer 4 The electrode 8 is formed.

Thereafter, although not shown, a semiconductor device (enhancement mode AlGaN / GaN-HEMT) is completed through each step of forming wirings and the like.
Therefore, the semiconductor device and the manufacturing method thereof according to the present embodiment have the advantage that the breakdown voltage can be improved while reducing the contact resistance.
In the above-described embodiment, the semiconductor device is described by taking an AlGaN / GaN-HEMT using GaN as an electron transit layer and AlGaN as an electron supply layer as an example. However, the present invention is not limited to this. Absent. For example, InAlN / GaN-HEMT using GaN as an electron transit layer and InAlN as an electron supply layer, or InAlGaN / GaN-HEMT using GaN as an electron transit layer and InAlGaN as an electron supply layer The invention can also be applied. Further, the present invention can be applied to those having other nitride semiconductor multilayer structures. For example, the nitride semiconductor multilayer structure only needs to include at least an electron supply layer and an electron transit layer, and may include a cap layer, for example.

In the above-described embodiment, the enhancement mode AlGaN / GaN-HEMT including the p-GaN layer immediately below the gate electrode is described as an example. However, the present invention is not limited to this. The present invention can also be applied to a depletion mode (D-mode) AlGaN / GaN-HEMT that does not include a p-GaN layer immediately below.
In the above-described embodiment, the HEMT having no gate recess is described as an example of the semiconductor device, but the present invention is not limited to this. For example, the present invention can be applied to a HEMT having a gate recess.

In the above-described embodiment, the HEMT that does not include a gate insulating film is described as an example of the semiconductor device. However, the present invention is not limited to this. For example, the present invention can be applied to a HEMT having a gate insulating film.
Note that the present invention is not limited to the configurations described in the above-described embodiments and modifications, and various modifications can be made without departing from the spirit of the present invention.

Hereinafter, additional notes will be disclosed regarding the above-described embodiment and modifications.
(Appendix 1)
A nitride semiconductor multilayer structure including an electron transit layer and an electron supply layer;
A drain electrode and a source electrode provided on the electron supply layer;
A gate electrode provided above the nitride semiconductor multilayer structure,
The drain electrode has a plurality of recesses and a plurality of projections extending in parallel to the width direction of the gate electrode at a contact portion in contact with the electron supply layer, and the recess is located closest to the gate electrode. A semiconductor device.

(Appendix 2)
The semiconductor device according to appendix 1, wherein a length of the concave portion closest to the gate electrode in a direction orthogonal to the width direction of the gate electrode is 15 nm or more and 80 nm or less.
(Appendix 3)
2. The semiconductor device according to appendix 1, wherein a length of the concave portion closest to the gate electrode in a direction orthogonal to the width direction of the gate electrode is 25 nm or more and 80 nm or less.
(Appendix 4)
The semiconductor device according to appendix 1, wherein a length of the concave portion closest to the gate electrode in a direction orthogonal to the width direction of the gate electrode is 50 nm or more and 80 nm or less.
(Appendix 5)
The source electrode has a plurality of concave portions and a plurality of convex portions extending in parallel with the width direction of the gate electrode in a contact portion in contact with the electron supply layer. The semiconductor device described.

(Appendix 6)
Forming a nitride semiconductor multilayer structure including an electron transit layer and an electron supply layer;
Forming a gate electrode above the nitride semiconductor multilayer structure;
Forming a drain electrode and a source electrode on the electron supply layer,
In the step of forming the drain electrode and the source electrode, the contact portion in contact with the electron supply layer has a plurality of concave portions and a plurality of convex portions extending in parallel with the width direction of the gate electrode, and the gate electrode side is the most A method of manufacturing a semiconductor device, comprising forming a drain electrode having a recess.

(Appendix 7)
The method of manufacturing a semiconductor device according to appendix 6, wherein a length of the concave portion closest to the gate electrode in a direction orthogonal to a width direction of the gate electrode is 15 nm or more and 80 nm or less.
(Appendix 8)
In the step of forming the drain electrode and the source electrode, a source electrode having a plurality of concave portions and a plurality of convex portions extending in parallel to the width direction of the gate electrode is formed in a contact portion in contact with the electron supply layer. The method for manufacturing a semiconductor device according to appendix 6 or 7.

1 Substrate (semiconductor substrate)
2 Buffer layer 3 GaN electron transit layer 4 AlGaN electron supply layer 5 Nitride semiconductor multilayer structure 6 Gate electrode 6X Gate metal layer 7 Drain electrode 7A Contact portion 7X Concavity 7Y Convex portion 8 Source electrode 8A Contact portion 8X Concavity 8Y Convex portion 9, 9X p-GaN layer 10 Insulating film 11, 12 Recess 13 Sacrificial layer 14 Resist mask 15 Element isolation region 16-18 Resist mask

Claims (4)

A nitride semiconductor multilayer structure including an electron transit layer and an electron supply layer;
A drain electrode and a source electrode provided on the electron supply layer;
A gate electrode provided above the nitride semiconductor multilayer structure,
The drain electrode has a plurality of recesses and a plurality of projections extending in parallel to the width direction of the gate electrode at a contact portion in contact with the electron supply layer, and the recess is located closest to the gate electrode. A semiconductor device.   2. The semiconductor device according to claim 1, wherein the length of the concave portion closest to the gate electrode in a direction orthogonal to the width direction of the gate electrode is 15 nm or more and 80 nm or less.   3. The semiconductor device according to claim 1, wherein the source electrode has a plurality of concave portions and a plurality of convex portions that extend in parallel with a width direction of the gate electrode in a contact portion that is in contact with the electron supply layer. . Forming a nitride semiconductor multilayer structure including an electron transit layer and an electron supply layer;
Forming a gate electrode above the nitride semiconductor multilayer structure;
Forming a drain electrode and a source electrode on the electron supply layer,
In the step of forming the drain electrode and the source electrode, the contact portion in contact with the electron supply layer has a plurality of concave portions and a plurality of convex portions extending in parallel with the width direction of the gate electrode, and the gate electrode side is the most A method of manufacturing a semiconductor device, comprising forming a drain electrode having a recess.