JP2015079906A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve a semiconductor device excellent in heat dissipation performance by forming a conductive paste between a semiconductor chip and a metal substrate to be uniformly thin.SOLUTION: A semiconductor device 100 of the present embodiment comprises: a metal base material 2; an insulation layer 3 formed on the metal base material 2; a metal layer 4 formed on the insulation layer 3; and a recess 12 formed in the metal layer 4, in which a semiconductor chip 10 is mounted inside by a conductive paste 16. An opening of the recess 12 has a shape capable of including a lower surface of the semiconductor chip 10 and the lower surface of the semiconductor chip 10 has a shape capable of including a bottom face of the recess 12.

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device that efficiently dissipates heat generated by a semiconductor chip.

  A semiconductor device generally generates heat during its operation. In particular, a power semiconductor chip used in a power semiconductor device generates a large amount of heat because it uses a high voltage and a large current. Therefore, for mounting power semiconductor chips, an insulating layer is formed on a metal base material such as aluminum or copper, and a metal layer (circuit pattern) made of copper foil or the like is further formed on the insulating layer. Use a metal substrate with a high height.

  In the case of mounting a semiconductor chip on this metal substrate, solder is conventionally used, but mounting using a conductive paste that is easy to handle is increasing. However, in the mounting using the conductive paste, the heat dissipation is insufficient as compared with the mounting by solder. Therefore, it is necessary to reduce the conductive paste between the metal substrate and the semiconductor chip to improve heat dissipation. However, if the conductive paste is thinned, the thickness is likely to vary, and the line between the substrate material and the semiconductor chip is likely to be generated. There is a problem in that stress accompanying the difference in thermal expansion coefficient concentrates on a thin portion of the conductive paste, which reduces the reliability of a temperature cycle test or the like.

  To solve this problem, the conductive paste applied by printing on a flexible support and temporarily cured is transferred to the metal layer surface of the metal substrate, and then the semiconductor chip is thermocompression-bonded and heat-cured to make it uniform. A method of forming a thin adhesive layer has been proposed. By using this method and examining transfer conditions in advance, an adhesive layer having a required thickness and without unevenness in thickness can be formed (for example, Patent Document 1).

JP 2006-222400 A

  However, the method for forming a uniform and thin conductive paste shown in Patent Document 1 requires a process of applying heat in advance to transfer the conductive paste and thermocompression bonding the semiconductor chip, and the bonding process is complicated. . In addition, it is necessary to heat the adhesive layer after temporary curing to reduce the viscosity of the conductive paste and to spread it uniformly on the semiconductor chip. However, if the semiconductor chip has warpage in the initial state, it may be uniformly pressurized. There is also a problem that the thickness of the adhesive layer becomes non-uniform due to pressure variation.

  The present invention has been made to solve such problems, and when a semiconductor chip is mounted on a metal layer (circuit pattern) surface of a metal substrate, the conductive paste can be formed thinly and uniformly. An object is to provide a semiconductor device.

  A semiconductor device according to the present invention includes a metal base material, an insulating layer formed on the metal base material, a metal layer formed on the insulating layer, and a semiconductor chip formed in the metal layer and formed therein by a conductive paste. In which the opening of the recess has a shape capable of including the lower surface of the semiconductor chip, and the lower surface of the semiconductor chip has a shape capable of including the bottom surface of the recess.

  The semiconductor device of the present invention has a shape in which a recess for mounting a semiconductor chip is formed in the metal layer on the surface of the metal substrate, and the opening of the recess in the surface portion of the metal layer can include the lower surface of the semiconductor chip. The lower surface of this is a shape that can include the bottom surface of the recess. Therefore, the semiconductor chip is fixed at a position not reaching the bottom surface in the recess, and a thin and uniform conductive paste can be formed under the lower surface of the semiconductor chip, so that a semiconductor device having excellent heat dissipation can be obtained. it can.

1 is an outline view of a semiconductor device according to a first embodiment of the present invention. It is a cross-sectional schematic diagram of the AA part of the semiconductor device which concerns on Embodiment 1 of this invention. It is a cross-sectional schematic diagram of the portion B of the semiconductor device according to the first embodiment of the present invention. It is a cross-sectional schematic diagram of the part B of the semiconductor device which concerns on Embodiment 2 of this invention. It is a cross-sectional schematic diagram of the part B of the semiconductor device which concerns on Embodiment 3 of this invention. It is a cross-sectional schematic diagram of the part B of the semiconductor device concerning Embodiment 4 of this invention. FIG. 10 is a schematic top view of a part B of a semiconductor device according to a fifth embodiment of the present invention. It is a cross-sectional schematic diagram of the CC part of the semiconductor device which concerns on Embodiment 5 of this invention. FIG. 10 is a schematic top view of a part B of a semiconductor device according to a fifth embodiment of the present invention.

  In the description of the embodiments and the respective drawings, the portions denoted by the same reference numerals indicate the same or corresponding portions.

Embodiment 1 FIG.
FIG. 1 is an external view of a semiconductor device 100 according to the first embodiment of the present invention. FIG. 2 schematically shows the internal structure of the semiconductor device 100 according to the present embodiment in a cross-sectional view, and shows the cross-sectional structure of the AA portion of the semiconductor device 100 shown in FIG. 3 is an enlarged schematic cross-sectional view of a portion B surrounded by a broken line in the schematic cross-sectional view of the semiconductor device 100 according to the first embodiment shown in FIG. Part B is a semiconductor chip and its peripheral part, and schematically shows an enlarged cross section of a part where the semiconductor chip is mounted on a metal substrate. First, an outline of the semiconductor device 100 will be described with reference to FIGS.

<Overview of semiconductor devices>
The semiconductor device 100 is externally covered with a resin case 5. As an example of the case 5, a composite material in which a thermoplastic resin, for example, PPS (polyphenylene sulfide) is filled with glass fibers to improve the strength is used. The case 5 is formed with external terminals 6 for input / output to / from the outside, control circuit terminals 7 and the like, and a case lid 8 is formed in the central portion after the case is filled with an insulating gel 14 and then sealed. Has been.

  The case 5 is disposed so as to cover the metal substrate 1, and the metal substrate 1 includes a metal base material 2, an insulating layer 3 on the metal base material 2, and a metal layer 4 formed thereon. .

  Although not shown in detail in FIGS. 1 and 2, the metal layer 4 is formed with lands for mounting semiconductor chips, wiring, lands for electronic parts, and the like. A recess 12 for mounting a semiconductor chip 10 such as an IGBT (Insulated Gate Bipolar Transistor) is formed on the land for mounting the semiconductor chip, and a conductive paste 16 made of a conductive filler 15a and a resin binder 15b (see FIG. 2) (not shown). The recess 12 for mounting the semiconductor chip 10 formed on the metal layer 4 is the most important point of the present invention, and will be described in detail in the description of the mounting structure using FIG.

  A semiconductor chip 10, a diode 11, and the like are mounted on the metal layer 4 of the metal substrate 1, and these surface electrodes are connected to the main terminal 9 and the control circuit terminal 7 through an aluminum wire 13. The main terminal 9 passes through the inside of the case 5 and is connected to an external terminal 6 installed on the top of the case 5. Finally, in order to ensure insulation and protect the internal terminals, the inside of the case 5 is filled with an insulating gel 14, and the case lid 8 is installed from above to obtain the semiconductor device 100.

  The semiconductor chip 10 used in the present embodiment can use a power semiconductor chip that applies a large current and a high voltage and generates a large amount of heat. When the power semiconductor chip is used, the effect of improving the heat dissipation of the present invention can be achieved. In particular, it can be exhibited remarkably. The metal substrate 1 used in this embodiment uses a 2 mm thick aluminum plate as the metal base material 2, an epoxy resin with a thickness of 100 μm as the insulating layer 3, and a copper foil with a thickness of about 100 μm as the metal layer 4. However, the present invention is not limited to this. For example, the metal base material 2 can be a copper plate or the like in addition to an aluminum plate, and a metal plate generally having a thickness of about 0.5 mm to 3 mm is used. it can.

  Epoxy resin was used as the resin material constituting the insulating layer 3, but materials such as photosensitive polyimide, acrylic resin, and silicon resin can also be used, and silica is added as an inorganic filler having thermal conductivity, Increasing the thermal conductivity is also effective for enhancing the heat dissipation effect. Here, silica is used as the thermally conductive inorganic filler, but it is also possible to add a higher heat dissipation inorganic filler such as alumina or aluminum nitride. Since the heat generated by the semiconductor chip 10 mounted on the metal substrate 1 is radiated to the metal base plate 2 through the insulating layer 3, if the insulating layer 3 is too thick, the heat dissipation is reduced and the semiconductor characteristics are fully exhibited. I can't.

  The insulating layer 3 also has a function of maintaining the electrode on the back surface of the semiconductor chip 10 and the metal base material 2 so as not to be in electrical contact. Therefore, if the insulating layer 3 becomes too thin, the electrical characteristics deteriorate, and the semiconductor chip 10 and the metal base Insulation with the material 2 cannot be maintained and the semiconductor device may not operate. Therefore, the thickness of the insulating layer 3 is important and can be set individually according to the intended electrical resistance and the like. In many cases, about 50 to 100 μm is preferable, but the thickness is particularly limited to this range. is not.

  The metal layer 4 formed on the insulating layer 3 uses a copper foil having a thickness of about 100 μm in the present embodiment, but the thickness is not particularly limited and can be various thicknesses. Moreover, aluminum foil etc. can be used besides copper foil.

  In the present embodiment, the aluminum wire 13 is a 300 μm diameter pure wire so that it can withstand a relatively large current in consideration of the use of a power semiconductor chip that generates a large amount of heat and applies a high voltage. An aluminum material was used. The material and thickness of the wire bonding are not particularly limited, and a metal wire having an appropriate material and thickness can be selected depending on the voltage, current, etc. used in the semiconductor device. For example, the material can be gold, copper, an aluminum alloy, pure aluminum, or the like. Moreover, the connection to the surface electrode of the aluminum wire 13 was performed using the ultrasonic bonding method.

<About the shape of the recess>
FIG. 3 schematically shows an enlarged portion B surrounded by a broken line in FIG. 2. The feature of the present invention described in the first embodiment, particularly the recess 12 for bonding and mounting the semiconductor chip 10 is shown. The shape will be described with reference to FIG. As described above, the metal substrate 1 is composed of the metal base material 2, the insulating layer 3, and the metal layer 4, and the metal layer 4 corresponds to the size of the semiconductor chip 10. A recess 12 is formed for adhering and fixing. In this embodiment, the recess 12 is formed by a wet etching method. However, an ashing method or the like may be used as long as the metal layer 4 formed of copper foil or the like can be partially thinned. it can.

  Of this metal layer 4, the recessed portion 12 is formed and the portion where the thickness of the metal layer 4 is reduced is the thin portion 4 a, the recessed portion 12 is not formed, and the portion where the thickness of the metal layer 4 is the same is the thick portion 4 b, A portion where the thickness between the thin portion 4a and the thick portion 4b is changed is referred to as a tapered portion 4c.

  In the present invention, when the semiconductor chip 10 is bonded and mounted on the metal substrate 1, the relationship between the size of the lower surface of the semiconductor chip 10 facing the metal substrate 1 and the size of the recess 12 formed in the metal layer 4. is important. Specifically, the opening of the recess 12 in the surface portion of the metal layer 4 has a shape capable of including the lower surface of the semiconductor chip 10 facing the metal substrate 1, and the lower surface of the semiconductor chip 10 is the recess 12. The concave portion 12 is formed so as to have a shape that can include the bottom portion.

  That is, the recess 12 is formed so as to increase from the bottom surface toward the opening of the surface portion of the metal layer 4, and the lower surface of the semiconductor chip 10 is smaller than the opening of the recess 12, and the opening of the recess 12. Therefore, it can be inserted through the opening of the recess 12. However, since the bottom surface of the semiconductor chip 10 is larger than the bottom surface portion of the recess 12 and can include the bottom surface portion, it cannot enter the bottom surface portion of the recess 12 and stops halfway in the depth direction of the recess 12. become.

<About semiconductor chip mounting process>
Hereinafter, the process of mounting the semiconductor chip 10 will be described in detail. For the bonding of the semiconductor chip 10, a conductive paste 16 in which a conductive filler 15a is added to the resin binder 15b is used. As described above, the recess 12 formed in the metal layer 4 of the present invention has a shape in which the opening of the recess 12 can enclose the lower surface of the semiconductor chip 10, and the bottom surface of the recess 12 is the lower surface of the semiconductor chip 10. It is a shape that can be encapsulated. Using simple expressions, it can be said that the opening of the recess 12 is larger than the lower surface of the semiconductor chip 10, and the bottom surface of the recess 12 is smaller than the lower surface of the semiconductor chip 10.

  A tapered portion 4 c is formed around the recess 12. Therefore, when the conductive paste 16 is applied to the recess 12 and the semiconductor chip 10 is mounted and pressed, the conductive paste 16 is gradually pushed out from the periphery of the semiconductor chip 10 to form the fillet portion 17 around the semiconductor chip 10. Then, the semiconductor chip 10 enters the recess 12.

  However, since the bottom surface of the recess 12 is smaller than the bottom surface of the semiconductor chip 10, the semiconductor chip 10 cannot reach the bottom surface of the recess 12, and the tapered portion 4 c that is the peripheral portion of the bottom surface of the semiconductor chip 10 and the side surface of the recess 12. In other words, the size of the recess 12 becomes smaller as it gets deeper from the surface portion of the metal layer 4 and is almost the same size as the lower surface of the semiconductor chip 10. The lower surface cannot penetrate deeply into the recess 12, and the lower surface of the semiconductor chip 10 and the bottom surface of the recess 12 are fixed at a slightly separated position.

  As described above, the semiconductor chip 10 cannot enter any deeper in a state in which the size of the lower surface of the semiconductor chip 10 and the inside of the recess 12 are substantially matched, and the semiconductor chip 10 stops at that position. Therefore, a thin and uniform conductive paste 16 is formed between the thin portion 4 a of the metal layer 4 that is the bottom surface portion of the recess 12 and the lower surface of the semiconductor chip 10.

  Since the formation of the concave portion 12 of the metal layer 4 is performed by a wet etching method or the like, the size of the concave portion 12 can be controlled with very high accuracy by adjusting the etching time, the etching temperature, the etching solution, and the like. The angle of the tapered portion 4c around the recess 12 can also be controlled with very high accuracy. Therefore, since the semiconductor chip 10 can be fixed in the same state with high reproducibility, the thickness of the conductive paste 16 immediately below the semiconductor chip 10 can be controlled to be thin and uniform every time.

  The thickness of the conductive paste 16 can be adjusted by changing the angle of the tapered portion 4 c and the size of the concave portion 12 of the metal layer 4. When the thickness of the conductive paste 16 is increased, the heat dissipation is reduced, but the reliability of a temperature cycle test or the like is improved. Conversely, when the thickness is reduced, the heat dissipation is improved, but the reliability of the temperature cycle test and the like is lowered. Accordingly, the recess 12 corresponding to the lower surface of the semiconductor chip 10 can be formed according to the characteristics required for the semiconductor device 100, and the thickness of the conductive paste 16 can be adjusted stably.

  By adjusting the manufacturing method and manufacturing conditions, the angle (taper angle) of the tapered portion 4c of the metal layer 4 can be set to an arbitrary angle in the range of 15 ° to 80 °. However, when the angle is small, the taper angle becomes too gentle, and the semiconductor chip 10 cannot be moved along the inclination of the taper portion 4c by pressurization at the time of chip mounting, and positioning cannot be performed with good reproducibility. . If the taper angle is too large, the position of the semiconductor chip 10 is greatly changed by a slight change in the size of the recess 12. Therefore, in order to make the thickness of the conductive paste 16 uniform, the taper angle of the recess 12, It is necessary to achieve a very high accuracy for the size of the recess 12. As a result of studying these, the taper angle is preferably in the range of 30 to 45 °.

  For example, assuming that the thickness of the metal layer 4 is about 100 μm and the recess 12 is formed to a depth of 40 to 60 μm, the peripheral portion of the opening of the recess 12 has an outer periphery of 40 to 120 μm from that of the bottom portion. It is formed in the direction. If the depth of the concave portion 12 also changes, the peripheral portion of the opening portion of the concave portion 12 is formed in the outer circumferential direction by about 20 to 200 μm from that of the bottom surface portion.

  The contact portion between the peripheral portion of the lower surface of the semiconductor chip 10 and the tapered portion 4c, which is the side surface of the recess 12 of the metal layer 4, is not the direct contact between the semiconductor chip 10 and the metal layer 4, but the reaction force when the semiconductor chip is mounted. Due to the influence of the viscosity of the conductive paste 16, the interval is about several μm. For this reason, by making the diameter of the conductive filler 15a contained in the conductive paste 16 larger than this interval, the conductive filler 15a is spaced from this interval when the resin binder 15b of the conductive paste 16 is pushed out. Can be dammed up. Therefore, the ratio of the resin binder 15b is increased in the conductive paste 16 extruded from the lower surface of the semiconductor chip 10 to the side surface portion.

  As a result, in the side surface portion of the semiconductor chip 10, the ratio of the resin binder 15b capable of maintaining a high adhesive force is increased, the adhesive force between the side surface portion of the semiconductor chip 10 and the metal layer 4 is improved, and a temperature cycle test or the like. It is possible to improve the reliability. In addition, since the conductive paste 16 having a high resin binder 15b ratio is extruded to the side surface portion of the semiconductor chip 10, the conductive paste 16 immediately below the lower surface of the semiconductor chip 10 has a high content of the conductive filler 15a. , Heat dissipation can be improved.

  When the chip is mounted, a non-wetting portion may occur in the conductive paste 16 under the semiconductor chip 10 due to bubbles or the like. In this case, the conductive paste 16 spreads first on the non-wetting portion below the lower surface of the semiconductor chip 10, not in the lateral direction of the dammed side. Therefore, in the case of bonding the semiconductor chip 10 using the conductive paste 16, no non-wetting part such as bubbles is formed in the conductive paste, and the heat dissipation characteristics are not deteriorated by the bubbles.

  Finally, the surface electrode of the semiconductor chip 10, the main terminal 9, and the control circuit terminal 7 are electrically connected by the aluminum wire 13, and the case 5 is bonded onto the outer periphery of the metal substrate 1 using a sealing material. Thereafter, an insulating gel 14 is injected to protect the circuit, and then the case lid 8 is attached to the case 5 to obtain the semiconductor device 100.

  In the present embodiment, the IGBT is used as the semiconductor chip 10, but the same effect can be obtained for the MOSFET, the diode 11, and other electronic components having heat generation. In addition, although the insulating gel 14 is used to protect the circuit, a rubber material or an epoxy resin material can also be used.

  For bonding the semiconductor chip 10, the conductive paste 16 is applied to the recess 12 of the metal layer 4, and the semiconductor chip 10 or the like is mounted by a chip mounter. As a method for applying the conductive paste 16 at this time, one point or multi-point supply by dispensing, printing, transfer, or the like can be applied. However, the metal layer 4 that is the supply location of the conductive paste 16 has a concave shape. In view of this, dispensing is easier and more desirable than printing. Thereafter, the conductive paste 16 is cured by heating in an oven.

  The conductive filler 15a and the resin binder 15b constituting the conductive paste 16 are not particularly limited, and it is important that the desired conductivity can be obtained by adhesion. For example, as the resin binder 15b of the conductive paste 16, a thermosetting resin such as an epoxy resin or an acrylic urethane resin can be used, and a resin that cures by mixing, such as a two-component mixed adhesive, can also be used. . As the material of the conductive filler 15a used for the conductive paste 16, silver particles, carbon, a mixture of silver and carbon, or the like can be used.

  The semiconductor device 100 of the present invention has a recess 12 for mounting the semiconductor chip 10 on the metal layer 4 of the metal substrate 1, and the opening of the recess 12 in the surface portion of the metal layer 4 can enclose the lower surface of the semiconductor chip 10. The recess 12 is formed so that the bottom surface of the recess 12 has a shape that can be included in the lower surface of the semiconductor chip 10. In this state, the position of the semiconductor chip 10 in the surface direction of the metal substrate 1 can be determined with good reproducibility by the tapered portion 4c on the side surface of the recess 12. Further, the position of the semiconductor chip 10 in the depth direction of the recess 12 can be made constant, and the conductive paste 16 can be formed thinly and uniformly under the lower surface of the semiconductor chip 10. Therefore, excellent heat dissipation characteristics can be obtained, and stress concentration due to variations in the thickness of the conductive paste 16 can be avoided, so that a semiconductor device with excellent reliability can be obtained.

  Further, at the stage of mounting the semiconductor chip 10, the conductive filler 15 a of the conductive paste 16 is dammed between the tapered portion 4 c of the recess 12 and the lower surface peripheral portion of the semiconductor chip 10, so that the extruded conductive In the fillet portion 17 formed with the paste 16, the ratio of the resin binder 15b is increased, and the adhesive force is improved, so that the reliability of a temperature cycle test or the like can be improved. Further, under the lower surface of the semiconductor chip 10, the ratio of the conductive filler 15a in the conductive paste 16 is increased, and the heat dissipation is improved.

Embodiment 2. FIG.
A semiconductor device 100 of the present embodiment will be described with reference to FIG. FIG. 4 is a schematic cross-sectional view showing, in an enlarged manner, a portion B surrounded by a broken line which is a part of the cross section of the AA portion of the semiconductor device, similarly to FIG. 3 of the first embodiment.

  In the first embodiment, as shown in FIG. 3, the thin portion 4 a of the metal layer 4 is formed on the bottom surface of the recess 12 formed in the metal layer 4. However, in the present embodiment, the concave portion 12 penetrates the metal layer 4, and the thin-walled portion 4 a is not formed on the bottom surface portion, and the insulating layer 3 of the metal substrate 1 is exposed. Is different.

  Since the thin portion 4a of the metal layer 4 is not provided on the bottom surface of the recess 12 as in the present embodiment, the interface between the semiconductor chip 10 and the metal base material 2 is reduced (interface resistance is reduced), and heat is dissipated. Characteristics can be improved. Moreover, when the same material as the insulating layer 3 of the metal substrate 1 is used for the conductive paste 16, the adhesive force can be greatly improved.

  In the present embodiment, since there is no thin portion 4 a of the bottom surface portion of the metal layer 4, a heat flow that diffuses in the surface direction from the thin portion 4 a to the periphery of the metal layer 4 cannot be expected. If there is no tapered portion 4 c around the recess 12 and the recess 12 is formed so that the peripheral side surface is cut off vertically, the recess 12 is pressed between the side surface of the recess 12 and the peripheral portion of the lower surface of the semiconductor chip 10. Since force does not work, contact resistance is large and heat dissipation is poor. However, since the tapered portion 4c is formed on the side surface of the recess 12, and the peripheral portion on the lower surface of the semiconductor chip 10 and the tapered portion 4c of the metal layer 4 are in strong contact, high heat dissipation can be maintained.

  Moreover, the linear thermal expansion coefficient of the conductive paste 16 using the silver filler is 20 ppm / K to 80 ppm / K, whereas the linear thermal expansion coefficient of copper used as the metal layer 4 is 16 ppm / K. Furthermore, although the linear thermal expansion coefficient of the insulating layer 3 can be adjusted by the distribution amount of the inorganic filler added in the insulating layer 3, it is generally about 10 ppm / K to 60 ppm / K.

  That is, in the present embodiment, since the thin portion 4a of the metal layer 4 is not provided, the conductive paste 16 and the insulating layer 3 of the metal substrate 1 are in direct contact with each other, and a metal having a low linear thermal expansion coefficient is interposed therebetween. Since the layer 4 is not provided, the thermal stress can be reduced and the reliability of a temperature cycle test or the like can be improved.

Embodiment 3 FIG.
A semiconductor device 100 of the present embodiment will be described with reference to FIG. FIG. 5 is a schematic cross-sectional view showing, on an enlarged scale, a portion B surrounded by a broken line, which is a part of the cross section of the AA portion of the semiconductor device 100, similarly to FIG. 3 of the first embodiment.

  In the first embodiment, the recess 12 is formed in the metal layer 4 as shown in FIG. 3, and the tapered portion 4c is formed in the peripheral portion of the recess 12, but in the present embodiment, FIG. As shown in FIG. 4, the taper portion 4c is not linear but is a curved surface that protrudes toward the outer periphery of the recess 12.

  As in the present embodiment, the recess 12 is formed larger than the lower surface of the semiconductor chip 10 at the opening of the recess 12 in the surface portion of the metal layer 4 and smaller than the lower surface of the semiconductor chip 10 at the bottom surface of the recess 12. In addition, the tapered portion 4c in the peripheral portion of the concave portion 12 has a curved surface that is convex in the outer peripheral direction. In this case, when the semiconductor chip 10 is mounted and started to be pressurized, the taper angle is large, so the semiconductor chip 10 descends at a high speed, and the conductive paste 16 is pushed out from the periphery quickly. As the semiconductor chip 10 descends, the taper angle gradually decreases, the descending speed of the semiconductor chip 10 also slows down, and the desired height (thickness of the desired conductive paste 16 is stable and reproducible). ) Can be obtained.

Embodiment 4 FIG.
A semiconductor device 100 of the present embodiment will be described with reference to FIG. FIG. 6 is a schematic cross-sectional view of the cross section of the AA portion of the semiconductor device 100 that is further enlarged and shows a portion B surrounded by a broken line, as in FIG. 3 of the first embodiment.

  In the first embodiment, the recess 12 is formed in the metal layer 4 as shown in FIG. 3, and the tapered portion 4c is formed in the peripheral portion of the recess 12, but in the present embodiment, FIG. As shown in FIG. 6, the difference is that a step is formed in the peripheral portion of the recess 12 instead of a taper.

  In the present embodiment, one step is formed in the peripheral portion of the recess 12. In the upper portion of the upward surface of the staircase, the opening of the recess 12 is formed to be larger than the lower surface of the semiconductor chip 10, and in the lower portion of the upward surface, the opening is smaller than the lower surface of the semiconductor chip 10.

  By forming such a staircase, when the semiconductor chip 10 is mounted, the upward surface of the staircase and the periphery of the lower surface of the semiconductor chip 10 can be brought into close contact with each other over a wide area, and high heat dissipation and stable electrical contact can be achieved. Can keep. In addition, the conductive paste 16 having a uniform thickness can be formed under the lower surface of the semiconductor chip 10, and stable high heat dissipation can be obtained.

Embodiment 5 FIG.
The configuration of the semiconductor device 100 according to the present embodiment will be described with reference to FIGS. 7 and FIG. 9 are views in which the periphery of the semiconductor chip 10 of the semiconductor device 100 is projected from above except for the aluminum wire 13 wiring, and FIG. 8 is a schematic cross-sectional view of the portion indicated by CC in FIG. . The semiconductor device 100 of the present embodiment is different from the first embodiment only in the shape of the recess 12 formed in the metal layer 4.

  In the first embodiment, in the surface portion of the metal layer 4, the opening of the recess 12 is larger than the lower surface of the semiconductor chip 10, and the opening of the recess 12 has a shape that can include the lower surface of the semiconductor chip 10. The opening part of the recessed part 12 was formed in the outer peripheral part of the lower surface. On the other hand, the bottom surface portion of the recess 12 is smaller than the bottom surface of the semiconductor chip 10, and the bottom surface of the semiconductor chip 10 has a shape that can include the bottom surface portion of the recess 12, and the bottom surface of the semiconductor chip 10 extends to the outer peripheral portion of the bottom surface portion of the recess 12. Was formed.

  The present embodiment is different from the first embodiment and the like in that it has a protrusion that extends from the bottom surface of the semiconductor chip 10 toward the outer periphery of the recess 12 around the bottom surface of the recess 12. As can be seen from the cross-sectional view of the CC portion of FIG. 7 shown in FIG. 8, the protruding portion (the right side portion of the semiconductor chip 10) that extends from the lower surface of the semiconductor chip 10 toward the outer periphery of the recess 12 A large gap is formed between the chips 10 (the shape shown by a broken line in FIG. 8 shows the shape of the recess 12 having no protrusion described in the first embodiment for comparison). As shown in the present embodiment, by forming a protrusion that extends from the lower surface of the semiconductor chip 10 toward the outer periphery of the recess 12, a large gap is formed as shown in FIG. 8, and the semiconductor chip 10 is mounted. Sometimes, the conductive paste 16 can be easily pushed out from the lower part of the semiconductor chip 10, and the fillet portion 17 can be widely formed around the semiconductor chip 10.

  Accordingly, the stress associated with the curing of the conductive paste 16 can be relaxed in a wide range, and highly reliable adhesion is possible. At the same time, the adhesive force around the semiconductor chip 10 is improved, and reliability such as a temperature cycle test is also achieved. Can be increased. Further, even when there is a variation in the amount of the conductive paste 16 applied, the amount of the conductive paste 16 can be adjusted by being easily extruded, so that a semiconductor device with good heat dissipation characteristics can be obtained.

  In this embodiment, although there is a projecting portion that is in contact with the bottom surface of the recess 12 and extends from the lower surface of the semiconductor chip toward the outer periphery of the recess 12, the most part of the recess 12 is the same as in the first embodiment. Similarly, the opening of the recess 12 has a shape capable of including the lower surface of the semiconductor chip 10, and the lower surface of the semiconductor chip 10 has a shape capable of including the bottom surface of the recess 12. To express simply, in almost all the portions of the recess 12, the opening of the recess 12 is larger than the lower surface of the semiconductor chip 10, and the bottom surface portion is smaller than the lower surface of the semiconductor chip 10. Therefore, the point that the uniform conductive paste 16 can be formed under the lower surface of the semiconductor chip 10 has the same effect as the first embodiment.

  In the present embodiment, a configuration is shown in which a protrusion that extends from the lower surface of the semiconductor chip 10 toward the outer periphery of the recess 12 is provided around the bottom surface of the recess 12. Referring to FIG. 8, the projecting portion protrudes greatly from the lower surface of the semiconductor chip 10 in the outer peripheral direction at both the opening portion and the bottom surface portion of the recess 12. On the other hand, in order to obtain the effect of the present embodiment, it is necessary to have a path for easily extruding the conductive paste 16 to the outside in a part of the peripheral portion of the lower surface of the semiconductor chip 10. In order to secure a simple path, it is necessary to have a protrusion that extends from the lower surface of the semiconductor chip 10 toward the outer periphery of the recess 12 around the bottom surface of the recess 12.

  In other words, in the present invention, the opening of the recess 12 has a shape capable of including the lower surface of the semiconductor chip 10, and therefore always extends outward from the lower surface of the semiconductor chip 10. This portion is electrically conductive when the semiconductor chip 10 is mounted. It does not hinder extruding the adhesive paste 16 to the outside. However, since the bottom surface portion of the recess 12 is smaller than the lower surface of the semiconductor chip 10, the peripheral portion of the lower surface of the semiconductor chip 10 and the tapered portion 4 c that is the side surface of the recess 12 are close to each other, thereby inhibiting the extrusion of the conductive paste 16. . Therefore, it is necessary to have a protrusion around the bottom surface of the recess 12 in order to easily extrude the conductive paste 16 to the outside, and is important for reducing the influence of stress during curing.

  The same effect can be obtained by forming a plurality of protruding portions corresponding to the lower surface of the semiconductor chip 10 at a single location on the entire periphery or a plurality of protruding portions corresponding to each side or each corner. FIG. 7 shows an example in which the lower surface of the semiconductor chip 10 is rectangular and one protrusion is formed corresponding to each side, and FIG. 9 is an example in which the lower surface of the semiconductor chip 10 is rectangular. This is an example in which one place is formed corresponding to each. In these configurations, the protrusions are formed in a well-balanced manner around the entire periphery, and a thin, uniform conductive paste 16 can be obtained stably under the semiconductor chip 10.

  Further, since the stress accompanying the curing of the conductive paste 16 is concentrated on the corner portion of the semiconductor chip 10, a protrusion is formed around the bottom surface portion of the recess 12 corresponding to the corner portion of the lower surface of the semiconductor chip 10. The reliability can be further improved.

1 Metal substrate, 2 Metal base material, 3 Insulating layer, 4 Metal layer, 4a Thin part, 4b Thick part, 4c Tapered part, 5 Case, 6 External terminal, 7 Control circuit terminal, 8 Case lid, 9 Main terminal DESCRIPTION OF SYMBOLS 10 Semiconductor chip, 11 Diode, 12 Recessed part, 13 Aluminum wire, 14 Gel, 15a Conductive filler, 15b Resin binder, 16 Conductive paste, 17 Fillet part, 100 Semiconductor device.

Claims (8)

A metal base material;
An insulating layer formed on the metal base material;
A metal layer formed on the insulating layer;
A recess formed in the metal layer and having a semiconductor chip mounted therein by a conductive paste;
The semiconductor device, wherein the opening of the recess has a shape capable of including the lower surface of the semiconductor chip, and the lower surface of the semiconductor chip has a shape capable of including the bottom surface of the recess.   The semiconductor device according to claim 1, wherein the recess penetrates the metal layer, and the insulating layer is exposed on a bottom surface portion.   3. The semiconductor device according to claim 1, wherein a side surface of the recess has a tapered surface continuous from the opening to the bottom surface.   The semiconductor device according to claim 3, wherein the tapered surface is a curved surface that protrudes toward the outer periphery of the recess.   3. The semiconductor device according to claim 1, wherein a side surface of the concave portion is a step type having at least one step between the opening and the bottom surface portion.   6. The semiconductor device according to claim 1, further comprising a protruding portion that is in contact with a periphery of a bottom surface portion of the concave portion and extends in an outer peripheral direction of the concave portion from a lower surface of the semiconductor chip. .   The semiconductor device according to claim 6, wherein a lower surface of the semiconductor chip is rectangular, and the protruding portion is provided corresponding to each side of the lower surface of the semiconductor chip.   The semiconductor device according to claim 6, wherein the lower surface of the semiconductor chip is rectangular, and the protrusions are provided corresponding to the respective corners of the lower surface of the semiconductor chip.

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