CN216698339U - Chip packaging assembly - Google Patents
Chip packaging assembly Download PDFInfo
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- CN216698339U CN216698339U CN202123339021.0U CN202123339021U CN216698339U CN 216698339 U CN216698339 U CN 216698339U CN 202123339021 U CN202123339021 U CN 202123339021U CN 216698339 U CN216698339 U CN 216698339U
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- chip
- copper
- substrate
- heat dissipation
- package assembly
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Abstract
The application discloses chip encapsulation subassembly includes: the substrate comprises a copper base material, wherein a plurality of substrates are arranged above the surface of one side of the copper base material; the chip is arranged on the surface of one side of the copper substrate, which is provided with the substrate; the chip is electrically connected with the substrate through a lead; the first heat dissipation part is arranged on the surface of one side, far away from the copper substrate, of the chip. This application is through setting up the chip on a side surface of copper substrate to keep away from a side of copper substrate at the chip and set up first radiating piece on the surface, can dispel the heat to the both sides surface of chip simultaneously, thereby strengthen the radiating effect of chip packaging subassembly, prolong the life of chip packaging subassembly then, promote the performance of chip packaging subassembly.
Description
Technical Field
The present application relates to the field of semiconductor packaging, and more particularly to a chip package assembly.
Background
With the development of 5G technology and microelectronic technology, the PCB panel is gradually miniaturized and has high density, the size of the chip is smaller and smaller, but the operation speed is faster and faster, and correspondingly, the heat productivity of the chip is larger and larger. The normal operation of any chip needs to satisfy a working range, if the normal working range of the chip is to be maintained, the heat generated by the chip needs to be rapidly conducted, otherwise the performance of the chip is restricted.
In the prior art, the chip package assembly is mainly of a single-side heat dissipation structure, i.e., the heat is dissipated from the top of the chip or from the bottom of the chip. However, the single-sided heat dissipation structure has a weak heat dissipation result, and cannot achieve good heat dissipation, which may affect the function and the service life of the chip package assembly.
SUMMERY OF THE UTILITY MODEL
The technical problem that this application mainly solved provides a chip encapsulation subassembly, all sets up the radiating piece through the both sides surface at the chip, can solve the relatively poor problem of heat dispersion that chip encapsulation subassembly exists among the prior art.
In order to solve the above technical problem, a first technical solution adopted by the present application is to provide a chip package assembly, including: the substrate comprises a copper base material, wherein a plurality of substrates are arranged above the surface of one side of the copper base material; the chip is arranged on the surface of one side of the copper substrate, which is provided with the substrate; the chip is electrically connected with the substrate through a lead; the first heat dissipation part is arranged on the surface of one side, far away from the copper substrate, of the chip.
The chip is electrically connected with the first bonding pad through a wire.
Wherein, the second pad is welded with a copper column; and the copper column is bonded with the second bonding pad through solder paste.
And a tin coating is arranged on the surface of one side of the copper column, which is far away from the second bonding pad.
The chip is bonded with the first heat dissipation part and the copper substrate through the heat conduction adhesive.
The chip packaging assembly further comprises a first plastic packaging body, wherein the first plastic packaging body is located around the first heat dissipation part and the copper column and covers the chip, the substrate and one side surface of the copper substrate, which is provided with the chip.
Wherein, be provided with external pin on the second pad to realize electric intercommunication with external components and parts.
And a second heat dissipation part is arranged on the surface of one side, away from the chip, of the first heat dissipation part.
The area of the first heat dissipation part is smaller than that of the chip, and the area of the second heat dissipation part is larger than that of the chip.
The chip packaging assembly further comprises a second plastic packaging body, and the second plastic packaging body fills the copper base material and the residual space of the second heat dissipation member.
The beneficial effect of this application is: be different from prior art, this application provides a chip packaging subassembly, through setting up the chip on a side surface of copper substrate to keep away from a side surface of copper substrate at the chip and set up first heat dissipation piece, can dispel the heat to the both sides surface of chip simultaneously, thereby strengthen the radiating effect of chip packaging subassembly, prolong the life of chip packaging subassembly then, promote the performance of chip packaging subassembly.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic cross-sectional view of a first embodiment of a chip package assembly of the present application;
fig. 2 is a schematic cross-sectional view of a second embodiment of the semiconductor package assembly of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plural" includes at least two in general, but does not exclude the presence of at least one.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that the terms "comprises," "comprising," or any other variation thereof, as used herein, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
With the development of 5G technology and microelectronic technology, the PCB panel is gradually miniaturized and has high density, the size of the chip is smaller and smaller, but the operation speed is faster and faster, and accordingly, the heat generation of the chip is larger and larger. The normal operation of any chip needs to satisfy a working range, if the normal working range of the chip is to be maintained, the heat generated by the chip needs to be rapidly conducted, otherwise the performance of the chip is restricted. In the prior art, the chip package assembly is mainly of a single-side heat dissipation structure, i.e., the heat is dissipated from the top of the chip or from the bottom of the chip. However, the single-sided heat dissipation structure has a weak heat dissipation result, and cannot achieve good heat dissipation, which may affect the function and the service life of the chip package assembly.
Based on the circumstances, the application provides a chip encapsulation subassembly, all sets up the radiating piece through the both sides surface at the chip, can solve the relatively poor problem of heat dispersion that chip encapsulation subassembly exists among the prior art.
Referring to fig. 1, fig. 1 is a schematic cross-sectional view of a first embodiment of a semiconductor package assembly according to the present application. As shown in fig. 1, in the present embodiment, the semiconductor package assembly 100 includes a copper substrate 110, and a plurality of substrates 111 are disposed on one surface of the copper substrate 110. And a chip 120, wherein the chip 120 is disposed on a surface of the copper base material 110 on the side where the substrate 111 is disposed. The chip 120 and the substrate 111 are electrically connected by a wire 1201. The first heat dissipation element 130 is disposed on a surface of the chip 120 away from the copper substrate 110.
Wherein the thickness of the copper substrate 110 is 0.5 to 1.0 mm.
At least one first bonding pad 141 and at least one second bonding pad 142 are disposed on the substrate 111, and the chip 120 is electrically connected to the first bonding pad 141 through a wire 1201.
Specifically, the chip 120 includes a semiconductor bonding chip, and is bonded to the first pad 141 by wire bonding (wire bonding). The conductive wires 1201 are thin metal wires, including gold wires, copper wires, or aluminum wires, which are not limited in this application.
The first pads 141 are also called gold fingers (bonding fingers), because the surface of such pads is plated with ni — au, which has higher surface wear resistance and electrical conductivity.
In the present embodiment, the first heat sink 130 is made of a material with high thermal conductivity, such as copper, silicon, and ceramic, but the present invention is not limited thereto.
In this embodiment, the chip 120 is bonded to the copper substrate 110 through the first heat conductive adhesive 1101, and is bonded to the first heat sink 130 through the second heat conductive adhesive 131.
The first thermally conductive adhesive 1101 includes an epoxy adhesive to which metal powder is added.
As can be appreciated, since the first thermally conductive adhesive paste 1101 includes a metal, it is possible to more quickly transfer heat emitted from the chip 120 to the copper substrate 110 and then to be emitted to the air through the copper substrate 110.
When the first heat dissipation member 130 is made of copper, in order to avoid the chip 120 being electrically connected to the first heat dissipation member 130, the second heat conductive adhesive 131 is an epoxy adhesive without adding metal powder, and only achieves a heat conductive function. When the first heat dissipation element 130 is made of silicon or ceramic, the second thermally conductive adhesive 131 may also be an epoxy adhesive with metal powder added.
As can be understood, since the first heat dissipation member 130 is disposed on the side of the chip 120 away from the copper substrate 110, the heat dissipated by the chip 120 can also be transferred to the outside through the first heat dissipation member 130, so as to enhance the heat dissipation effect of the chip package assembly 100 through double-sided heat dissipation, thereby prolonging the service life of the chip package assembly 100 and improving the usability of the chip package assembly 100.
In the present embodiment, the substrate 111 is also fixed to the copper base 110 by the first heat conductive adhesive paste 1101.
In this embodiment, the second pad 142 is soldered with a copper pillar 150. Wherein the copper pillar 150 is bonded to the second pad 142 by solder paste.
Wherein, a tin oxide layer 151 is disposed on a surface of the copper pillar 150 away from the second pad 142. It is understood that the tin oxide layer 151 may function to prevent oxidation of the copper pillar 150 and to enhance soldering.
In this embodiment, the chip package assembly 100 further includes a first molding compound 160, wherein the first molding compound 160 is located around the first heat sink 130 and the copper pillar 150 and covers the chip 120, the substrate 111 and a side surface of the copper substrate 110 on which the chip 120 is disposed, so as to seal and protect components such as the chip 120.
The material of the first plastic package body 160 may be an insulating substance such as resin, plastic, film material, liquid epoxy, etc., which is not limited in this application.
It can be understood that a side surface of the first heat dissipation member 130 away from the chip 120 and a side surface of the copper pillar 150 away from the substrate 111 are exposed, so that the chip 120 can dissipate heat through the first heat dissipation member 130, and vertical heat conduction can be performed through the copper pillar 150, thereby enhancing the heat dissipation performance of the entire device.
Referring to fig. 2, fig. 2 is a schematic cross-sectional view of a second embodiment of a semiconductor package assembly according to the present application. As shown in fig. 2, in the present embodiment, the semiconductor package 200 includes a copper substrate 210, and a plurality of substrates 211 are disposed on one surface of the copper substrate 210. And the chip 220, wherein the chip 220 is arranged on one side surface of the copper base material 210 provided with the substrate 211. The chip 220 and the substrate 211 are electrically connected by a wire 2201. The first heat dissipation member 230, the first heat dissipation member 230 is disposed on a surface of the chip 220 away from the copper substrate 210.
Wherein the thickness of the copper substrate 210 is 0.5 to 1.0 mm.
At least one first bonding pad 241 and at least one second bonding pad 242 are disposed on the substrate 211, and the chip 220 is electrically connected to the first bonding pad 241 through a wire 2201.
Specifically, the chip 220 includes a semiconductor bonding chip, and is bonded to the first pad 241 by wire bonding (wire bonding). The conductive wire 2201 is a thin metal wire, including a gold wire, a copper wire, or an aluminum wire, which is not limited in this application.
The first pad 241 is also called a gold finger (bonding finger), because the surface of such a pad is plated with ni — au, which has higher surface wear resistance and electrical conductivity.
In the present embodiment, the first heat dissipation element 230 is made of a material with high thermal conductivity, such as copper, silicon, or ceramic, but the present invention is not limited thereto.
In this embodiment, the chip 220 is bonded to the copper substrate 210 by the first thermally conductive adhesive 2101, and is bonded to the first heat sink 230 by the second thermally conductive adhesive 231.
The first thermally conductive adhesive 2101 includes an epoxy adhesive to which metal powder is added.
As will be appreciated, since the first thermally conductive adhesive 2101 includes a metal, heat emitted from the chip 220 can be more rapidly transferred to the copper substrate 210 and then emitted to the air through the copper substrate 210.
When the first heat dissipation member 230 is made of copper, in order to avoid the chip 220 from being electrically connected to the first heat dissipation member 230, the second heat conductive adhesive 231 is an epoxy adhesive without adding metal powder, and only achieves a heat conductive function. When the first heat dissipation member 230 is made of silicon or ceramic, the second heat conductive adhesive 231 may also be an epoxy adhesive with metal powder added.
As can be understood, since the first heat dissipation member 230 is disposed on the side of the chip 220 away from the copper substrate 210, the heat dissipated by the chip 220 can also be transferred to the outside through the first heat dissipation member 230, so as to enhance the heat dissipation effect of the chip package assembly 200 through double-sided heat dissipation, thereby prolonging the service life of the chip package assembly 200 and improving the usability of the chip package assembly 200.
In this embodiment, the substrate 211 is also fixed to the copper base 210 by the first thermally conductive adhesive 2101.
In this embodiment, the second pad 242 is provided with an external pin 280 to electrically communicate with an external device.
Further, a side surface of the first heat dissipation member 230 away from the chip 220 is provided with a second heat dissipation member 270.
Wherein, second heat dissipation piece 270 is the copper metal block, and second heat dissipation piece 270 bonds with first heat dissipation piece 230 through third heat conduction bonding glue 232, and third heat conduction bonding glue 232 is the epoxy glue, can add metal powder or not add, and this application does not limit to this. In a preferred embodiment, after metal powder is added to the third thermally conductive adhesive 232, the heat dissipation rate between the first heat dissipation member 230 and the second heat dissipation member 270 can be further increased.
In this embodiment, the area of the first heat dissipation member 230 is smaller than that of the chip 220, and the area of the second heat dissipation member 270 is larger than that of the chip 220.
It is understood that the first heat dissipation element 230 needs to avoid the substrate 211, the first pad 241, the second pad 242, and the external lead 280, so the area is small, and the second heat dissipation element 270 is substantially free and may be larger than the area of the chip 220.
It is understood that the second heat dissipation member 270 is a copper metal block, which can further increase the heat dissipation area, and directly conduct the heat conducted by the first heat dissipation member 230 to the external environment of the chip package assembly 200, thereby rapidly dissipating the heat of the chip 220.
In this embodiment, the chip package assembly 200 further includes a second molding compound 260, and the second molding compound 260 fills the remaining space between the copper substrate 210 and the second heat sink 270 for sealing and protecting components such as the chip 220.
The material of the second plastic package body 260 may be an insulating substance such as resin, plastic, film material, liquid epoxy, etc., which is not limited in this application.
Be different from prior art, this application is through setting up the chip on a side surface of copper substrate to keep away from a side of copper substrate at the chip and set up first radiating piece on the surface, can dispel the heat to the both sides surface of chip simultaneously, thereby strengthen the radiating effect of chip encapsulation subassembly, then prolong the life of chip encapsulation subassembly, promote the performance of chip encapsulation subassembly.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (10)
1. A chip package assembly, comprising:
the substrate comprises a copper base material, wherein a plurality of substrates are arranged above the surface of one side of the copper base material;
the chip is arranged on the surface of one side of the copper substrate, on which the substrate is arranged; the chip is electrically connected with the substrate through a lead;
the first heat dissipation piece is arranged on the surface of one side, far away from the copper substrate, of the chip.
2. The semiconductor package assembly of claim 1, wherein at least one first pad and at least one second pad are disposed on the substrate, and the chip is electrically connected to the first pad through the conductive line.
3. The chip package assembly of claim 2, wherein the second pads have copper pillars soldered thereon; and the copper column is bonded with the second bonding pad through solder paste.
4. The semiconductor package assembly of claim 3, wherein a surface of the copper pillar away from the second pad has a tin oxide layer disposed thereon.
5. The chip package assembly of claim 4, wherein the chip is bonded to the first heat spreader and the copper substrate by a thermally conductive adhesive.
6. The package of claim 5 further comprising a first molding body surrounding the first heat spreader and the copper pillar and covering the chip, the substrate and a side surface of the copper substrate on which the chip is disposed.
7. The package of claim 2, wherein the second pad has an external pin disposed thereon for electrically communicating with an external device.
8. The chip package assembly of claim 7, wherein a side surface of the first heat dissipation member away from the chip is provided with a second heat dissipation member.
9. The chip package assembly of claim 8, wherein the area of the first heat dissipation element is smaller than the area of the chip, and the area of the second heat dissipation element is larger than the area of the chip.
10. The chip package assembly of claim 9, further comprising a second molding body filling the remaining space of the copper substrate and the second heat sink.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123339021.0U CN216698339U (en) | 2021-12-27 | 2021-12-27 | Chip packaging assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123339021.0U CN216698339U (en) | 2021-12-27 | 2021-12-27 | Chip packaging assembly |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216698339U true CN216698339U (en) | 2022-06-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123339021.0U Active CN216698339U (en) | 2021-12-27 | 2021-12-27 | Chip packaging assembly |
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| Country | Link |
|---|---|
| CN (1) | CN216698339U (en) |
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2021
- 2021-12-27 CN CN202123339021.0U patent/CN216698339U/en active Active
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