JP2015070079A - Semiconductor light-emitting element and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element capable of suppressing height difference between an n bump top position and a p bump top position.SOLUTION: A semiconductor element includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, which are laminated upwardly, a first opening for exposing the first conductive type semiconductor layer, a first electrode which is provided inside the first opening and contains a first pad, a second electrode which contains an ohmic metal layer which is provided on an upper surface of the second conductive type semiconductor layer for ohmic contacting to the second conductive type semiconductor layer, a protection metal layer which at least covers an outside edge part of the ohmic metal layer and contains a second opening, and a second pad covering an exposed surface of the ohmic metal layer that is exposed from the second opening. There are provided a first bump in which a thickness of the second pad is thinner than the protection metal layer, with an upper surface of the second pad positioned below an upper surface of the protection metal layer, being provided on the first pad, and a second bump having a thickness almost identical with the first bump, being provided on the second pad.

Description

  The present invention relates to a semiconductor light emitting device and a manufacturing method thereof, and more particularly to a semiconductor light emitting device suitable for mounting by flip chip and a manufacturing method thereof.

  As one form of flip-chip mounting of a semiconductor light emitting device, a mounting mode in which the substrate side of the semiconductor light emitting device is a light emitting surface is known. In such a mounted semiconductor light emitting element, it is known that a reflective film is provided on the semiconductor laminate side to reflect the light emitted toward the mounting substrate in order to increase the light extraction efficiency (for example, Patent Documents). 1).

In the semiconductor light emitting device disclosed in Patent Document 1, a first film (Ag film) is provided on a p-type semiconductor layer, and a second film (Al film) is provided on the periphery of the first film. The first film functions as a reflective film and also functions as an ohmic metal layer of the p electrode. The second film functions as a reflection film and also functions as a current confinement layer for the p-electrode. Thereby, the current injection region can be limited only to the region where the first film is formed, while the reflection region is widened over the entire region where the first film and the second film are formed.
Further, since the second film is formed immediately adjacent to the first film made of Ag or the like, the first film does not come into contact with the dielectric film and is not easily exposed to ionic impurities or moisture contained in the dielectric film. It is said that silver migration can be suppressed.

  In addition, a third film (Pt / Au film) covering the region of the first film not covered with the second film can be provided. The third film can prevent the first film from being exposed to the atmosphere and can prevent the first film from deteriorating. The third film is formed thicker than the first film and the second film, and the upper surface of the third film is located above the upper surface of the second film.

  Further, the p-type semiconductor layer and the active layer are partially removed in order to energize the n-type semiconductor layer formed on the lower side (substrate side) of the p-type semiconductor layer from the p-type semiconductor layer side. An opening exposing the n-type semiconductor layer is provided. An n-electrode is formed on the n-type semiconductor layer exposed from the bottom surface of the opening.

JP 2010-56324 A

  Since Ag used for the first film is likely to cause migration, the second film alone cannot sufficiently suppress migration. In order to suppress the occurrence of defects in the semiconductor light emitting device due to migration, it is desirable to provide the third film and completely cover the first film.

When the semiconductor light emitting element is flip-chip mounted, the electrode of the semiconductor light emitting element and the external electrode are connected by a metal bump. When metal bumps are formed in advance on the electrodes of the semiconductor light emitting element, for example, by plating, the p bumps are on the third film, and the n bumps are on the n electrode provided on the bottom of the opening at the same height. It is formed.
Since the third film is thicker than the first film and the second film, the apex position of the p-bump formed on the third film also increases accordingly. On the other hand, the apex position of the n bump is lowered by the depth of the opening. Therefore, the difference in height between the apex position of the p bump and the apex position of the n bump (the difference in position in the direction perpendicular to the lower surface of the substrate) becomes large, and when flip chip mounting is performed on the mounting surface of the mounting substrate. The semiconductor light emitting element may not be parallel to the mounting surface (more precisely, the substrate lower surface side of the semiconductor light emitting element is parallel to the mounting surface of the mounting substrate), and may be mounted in an inclined state.

  In order to eliminate the inclination of the semiconductor light emitting device, it is possible to perform a process (for example, cutting the p bump by a surface planar) to reduce the thickness of the p bump before flip chip mounting. However, when such processing is performed, the manufacturing cost is greatly increased.

  As another method for eliminating the inclination of the semiconductor light emitting element, the semiconductor light emitting element can be pressed so that the semiconductor light emitting element is parallel to the mounting surface of the mounting substrate after the bumps are melted by reflow. By pressing in parallel with the mounting surface, the n bump is deformed to a small extent and the p bump is deformed to a large extent. Since the p-bump protrudes in the lateral direction (direction parallel to the mounting surface) when greatly deformed, it may cause a short circuit due to contact with the n-bump or n-electrode.

  Therefore, the present invention provides a semiconductor element that needs to suppress migration of electrode material, even if n bumps and p bumps having the same thickness are used, the height of the apex position of the n bump and the apex position of the p bump. It is an object of the present invention to provide a semiconductor light emitting device capable of suppressing the difference and a manufacturing method thereof.

The semiconductor light emitting device according to the present invention is
A first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer stacked in order from the bottom;
A first opening for exposing the first conductive semiconductor layer through the first conductive semiconductor layer and the active layer;
A first electrode provided in the first opening, electrically connected to the first conductive semiconductor layer exposed from the first opening, and including a first pad;
An ohmic metal layer provided on an upper surface of the second conductive semiconductor layer and in ohmic contact with the second conductive semiconductor layer; a protective metal layer covering at least an outer edge of the ohmic metal layer and having a second opening; And a second pad covering the exposed surface of the ohmic metal layer exposed from the second opening, and a second electrode electrically connected to the second conductivity type semiconductor layer Because
The thickness of the second pad is less than the thickness of the protective metal layer, and the upper surface of the second pad is below the upper surface of the protective metal layer;
A first bump provided on the first pad, and a second bump provided on the second pad having substantially the same thickness as the first bump;
It is characterized by having.

In addition, a method for manufacturing a semiconductor light emitting device according to the present invention includes:
Laminating the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer in order from the bottom;
Partially removing the second conductive semiconductor layer and the active layer of the semiconductor stacked body to form a first opening exposing the first conductive semiconductor layer;
Forming a first electrode in the first opening that is electrically connected to the first conductive semiconductor layer exposed from the first opening and includes a first pad;
Forming a second electrode electrically connected to the second conductive semiconductor layer,
Forming an ohmic metal layer on the upper surface of the second conductive semiconductor layer;
Forming a protective metal layer covering the ohmic metal layer;
Forming a second opening in the protective metal layer;
Forming a second pad covering an exposed surface of the ohmic metal layer exposed from the second opening so that an upper surface of the second pad is lower than an upper surface of the protective metal layer. An electrode forming step;
And a bump forming step of forming a first bump on the first pad and a second bump on the second pad.

According to the present invention, by making the upper surface of the second pad below the upper surface of the protective metal layer, it is possible to suppress the apex position of the p bump formed on the upper surface of the second pad from becoming too high. . Thereby, the difference in height between the apex position of the second bump formed on the upper surface of the second pad and the apex position of the first bump formed on the upper surface of the first pad can be suppressed.

FIG. 1 is a top view of the semiconductor light emitting element according to the first embodiment. FIG. 2 is a cross-sectional view of the semiconductor light emitting device taken along line A-A ′ of FIG. 1. FIG. 3 is a schematic cross-sectional view enlarging a part of the cross section of the semiconductor light emitting device according to the first embodiment. 4A to 4I are schematic cross-sectional views for explaining the method for manufacturing the semiconductor light emitting element according to the first embodiment. FIG. 5 is a schematic cross-sectional view of a semiconductor light emitting device according to a comparative example.

In the semiconductor light emitting device, migration of the electrode material can cause a short circuit in the semiconductor light emitting device. Therefore, prevention of migration is an important issue in order to avoid failure of the semiconductor light emitting device. Until now, attempts have been made to suppress migration with a protective metal layer made of a metal material such as Al. For example, in order to sufficiently exhibit the migration suppression effect, migration is caused by a protective metal film having a sufficient thickness. It has been necessary to coat the entire facile electrode material.
In the present invention, the end portion (outer edge portion) of the ohmic metal layer tends to migrate most easily, and the risk of migration is relatively small in other regions. Therefore, the outer edge portion of the ohmic metal layer is formed as a thick protective metal film. Thus, the present inventors have found that the migration can be sufficiently suppressed only by covering the other region with a relatively thin metal film.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions and positions (for example, “up”, “down”, “right”, “left” and other terms including those terms) are used as necessary. . The use of these terms is to facilitate understanding of the invention with reference to the drawings, and the technical scope of the present invention is not limited by the meaning of these terms. Moreover, the part of the same code | symbol which appears in several drawing shows the same part or member.

<Embodiment 1>
As shown in FIGS. 1 to 2, the semiconductor light emitting device 10 according to the present embodiment includes a translucent substrate 11, a semiconductor stacked body 12 provided on an upper surface 11 a of the substrate 11, and a semiconductor stacked body 12. Electrodes 20 and 30 for energizing and bumps 40 and 50 provided on the electrodes are included.

  The semiconductor stacked body 12 is composed of a plurality of semiconductor layers. From the substrate 11 side, a first conductivity type semiconductor layer (n-type semiconductor layer) 13, an active layer 14, and a second conductivity type semiconductor layer (p-type semiconductor layer). 15 in this order. The semiconductor stacked body 12 is provided with a first opening 16 that reaches the n-type semiconductor layer 13 through the p-type semiconductor layer 15 and the active layer 14. From the first opening 16, a part of the n-type semiconductor layer 13 (exposed surface 13e of the n-type semiconductor layer 13) is exposed.

A first electrode (n electrode) 20 is provided inside the opening 16 and is electrically connected to the n-type semiconductor layer 13 exposed from the first opening 16. The n electrode 20 includes a first pad (n pad) 23. In the present embodiment, the n-electrode 20 is formed only from the n-pad 23, but the present invention is not limited to this. For example, another conductive material layer is provided between the n-type semiconductor layer 13 and the n-pad 23. It is also possible to provide another conductive material layer on the n-pad 23.
A first bump (n bump) 40 that is electrically connected to the n electrode 20 is provided on the n pad 23.

A second electrode (p electrode) 30 that is electrically connected to the p-type semiconductor layer 15 is provided on the upper surface 15 a of the p-type semiconductor layer 15. As shown in detail in FIG. 3, the p-electrode 30 includes at least an ohmic metal layer 31, a protective metal layer 32, and a second pad (p-pad) 33.
The ohmic metal layer 31 is provided directly on the upper surface 15 a of the p-type semiconductor layer 15 and is in ohmic contact with the p-type semiconductor layer 15. The ohmic metal layer 31 is made of a metal material that is in ohmic contact with the p-type semiconductor layer 15, and can be made of, for example, Ag.

  The protective metal layer 32 has a function of protecting the ohmic metal layer 31 from the external environment by covering the ohmic metal layer 31 and suppressing migration of the ohmic metal layer 31. Therefore, the protective metal layer 32 is formed of a metal material that is less likely to cause migration than the metal material used for the ohmic metal layer 31. For example, when the ohmic metal layer 31 is formed from Ag, the protective metal layer 32 can be formed from Al.

  In the present invention, a second opening 321 is formed in the protective metal layer 32. Since the second opening 321 completely penetrates the protective metal layer 32, the ohmic metal layer 31 is exposed from the opening 321. Therefore, the migration of the ohmic metal layer 31 cannot be sufficiently suppressed only by the protective metal layer 32. Therefore, the migration of the ohmic metal layer 31 is effectively suppressed by covering the exposed surface 31 e of the ohmic metal layer 31 exposed from the opening 321 with the p pad 33. In consideration of the effect of preventing migration from the ohmic metal layer 31, it is preferable that the ratio of the exposed surface 31e covered with the p pad 33 is higher. For example, it is preferable that 50% or more of the exposed surface 31e is covered with the p pad 33, more preferably 70% or more, particularly preferably 90% or more, and most preferably 100% of the exposed surface 31e. Covered with.

The second opening 321 is formed at a position where the outer edge portion 31 a of the ohmic metal layer 31 is not exposed from the second opening 321. That is, the entire outer edge portion 31 a of the ohmic metal layer 31 is covered with the protective metal layer 32.
The p pad 33 is formed of a metal material that is less likely to cause migration than the metal material used for the ohmic metal layer 31.

Here, considering the migration of the ohmic metal layer 31, migration from the outer edge portion 31a is most likely to occur. Therefore, it is desirable that at least the outer edge portion 31a of the ohmic metal layer 31 is covered with a sufficiently thick protective metal layer 32 to suppress migration.
On the other hand, the exposed surface 31e of the ohmic metal layer 31 is provided except for the outer edge portion 31a (that is, the second opening 321 of the protective metal layer 32 is positioned so that the outer edge portion 31a is not exposed). Therefore, it can be said that the migration from the exposed surface 31e is less likely to occur than the outer edge portion 31a. However, if it remains exposed, migration occurs to such an extent that a problem such as a short circuit can be caused. Therefore, it is necessary to cover the exposed surface 31e and suppress migration.

Therefore, in the present invention, the migration from the exposed surface 31e is suppressed by covering the exposed surface 31e with the p pad 33. As described above, migration from the exposed surface 31e is relatively unlikely to occur, so it is not necessary to cover it with a thick metal film such as the protective metal layer 32. By covering with the thin p-pad 33, migration is sufficiently suppressed. can do.
Thus, the thickness 30 t of the p pad 33 can be made thinner than the thickness 32 t of the protective metal layer 32 without impairing the migration suppressing effect. Therefore, the upper surface 33 a of the p pad 33 is located below the upper surface 32 a of the protective metal layer 32.

As shown in detail in FIG. 3, assuming that the direction orthogonal to the lower surface of the substrate 11 is the “z direction”, the dimension (thickness 33 t) of the p pad 33 on the upper side of the exposed surface 31 e of the ohmic metal layer 31 (thickness 33 t). thin only [Delta] T ₁ than the z-direction dimension of the protective metal layer 32 (thickness 32t). Thus, the upper surface 33a of the p-pad 33 can be located down by [Delta] T ₁ than the top surface 32a of the protective metal layer 32.

A second bump (p bump) 50 that is electrically connected to the p electrode 30 is provided on the upper surface 33 a of the p pad 33. since the upper surface 33a of the p-pad 33 is located down by [Delta] T ₁ than the top surface 32a of the protective metal layer 32, the distance from the top surface 32a of the protective metal layer 32 to the top of the p bump 50 (thickness of the p bump 50 50t −ΔH ₁ ).

If the opening 321 of the protective metal layer 32 is not formed as in the present invention, the entire upper surface 150a of the ohmic metal layer 310 is covered with the protective metal layer 320 as in the semiconductor light emitting device 100 shown in FIG. It will be. Since the p pad 330 is formed on the upper surface 32 a of the protective metal layer 32, the upper surface 330 a of the p pad 330 is positioned above the upper surface 320 a of the protective metal layer 320 by the thickness ΔH ₂ of the p pad 330. become. Therefore, the height from the upper surface 320a of the protective metal layer 320 to the apex of the p bump 500 is (thickness of the p bump 500 500t + ΔH ₂ ).

When the distance from the upper surface of the protective metal layer to the apex of the p bump is compared between the semiconductor light emitting device 10 of the present embodiment and the semiconductor light emitting device 100 of the comparative example, {(p bump 500 thickness 500 t + ΔH ₂ ) − ( The distance of the semiconductor light emitting device 10 of this embodiment is shorter by the thickness of the p bump 50 (50t−ΔH ₁ ). Here, if the thicknesses of the p bumps 50 and 500 are equal, the distance from the top surface of the protective metal layer to the apex of the p bump is shorter by (ΔH ₁ + ΔH ₂ ) in the semiconductor light emitting device 10 of the present embodiment.

  That is, since the semiconductor light emitting element 10 of the present embodiment can keep the apex position of the p bump 50 low, the difference in height between the apex position of the p bump 50 and the apex position of the n bump 40 (z (Positional difference in direction) can be reduced. Therefore, when the semiconductor light emitting device 10 is flip-chip mounted, the semiconductor light emitting device 10 can be mounted so that the lower surface of the substrate 11 of the semiconductor light emitting device 10 is as parallel as possible to the mounting surface.

  In the case of the semiconductor light emitting device 100 as shown in FIG. 5, after the bumps 40 and 50 are melted by reflow, the semiconductor light emitting device 100 is mounted until the semiconductor light emitting device 100 is parallel to the mounting surface of the mounting substrate. In order to hold down, it is necessary to greatly deform the p-bump 500 by applying a large load. If the p-bump 500 is greatly deformed, the p-bump 500 protrudes in the y-direction, and may contact the n-bump 400 or the n-side external electrode (not shown) of the mounting substrate to cause a short circuit.

  In contrast, in the semiconductor light emitting device 10 according to the present embodiment as shown in FIG. 3, the height difference between the apex position of the p bump 50 and the apex position of the n bump 40 (the position in the z direction). Since the difference is relatively small, even when the semiconductor light emitting element 10 is held down until the semiconductor light emitting element 10 is parallel to the mounting surface of the mounting substrate, only a small load needs to be applied and the deformation amount of the p bump 50 Can be small. Therefore, a short circuit due to the deformation of the p bump 50 can be made difficult to occur.

  As described above, according to the present invention, a difference in height between the apex position of the n bump 40 and the apex position of the p bump 50 can be suppressed, and therefore, the n bump 40 and the p bump 50 having the same thickness. Can be provided. Therefore, the n bump 40 and the p bump 50 can be formed at the same time, and it is not necessary to process only the p bump 50 thereafter. Thereby, the cost concerning bump formation can be suppressed.

  As shown in FIG. 3, the p-electrode 30 can further include an inner surface covering layer 34 that covers the inner surface 321 c of the opening 321 provided in the protective metal layer 32 and is in contact with the p pad 33. For example, it is desirable that the metal material used for the protective metal layer 32 has a high light reflectivity in addition to the physical property of being less likely to migrate than the ohmic metal layer 31. A metal material (for example, Al) that satisfies such physical properties is less likely to cause migration than Ag suitable for the ohmic metal layer 31, but may slightly cause migration.

Therefore, the inner side surface 321c of the opening 321 from which the protective metal layer 32 is exposed is covered with the inner side surface coating layer 34 made of a metal material that is less likely to cause migration than the material used for the protective metal layer 32 (for example, Al). Is preferred. By bringing the inner side surface coating layer 34 into contact with the p-pad 33, the inner side surface 321 c of the opening 321 can be completely covered.
The p pad 33 and the inner side surface coating layer 34 have the same function of suppressing migration of other metal layers, and therefore the p pad 33 and the inner side surface coating layer 34 may be formed from the same material. . In that case, there exists an advantage which can form the p pad 33 and the inner surface coating layer 34 simultaneously.
The p pad 33 and the inner side surface coating layer 34 may be formed of different materials. In this case, first, the p pad 33 that covers the exposed portion 31e of the ohmic metal layer 31 is formed, and then the opening 321 is formed. An inner surface covering layer 34 is formed to cover the protective metal layer 32 exposed from the inner surface 321c.

By the way, in the form in which the light emitted from the active layer 14 is extracted from the substrate 11 side through the n-type semiconductor layer 13, the light emitted in the direction of the p-type semiconductor layer 15 is reflected to the substrate 11 side, thereby producing semiconductor light emission. The light extraction efficiency of the element 10 can be improved. Therefore, the ohmic metal layer 31 is preferably formed of a metal material having a high light reflectance so that the light emitted in the direction of the p-type semiconductor layer 15 can be efficiently reflected. For example, Ag is suitable as a material for forming the ohmic metal layer 31 because it has a high reflectance for light emission.
Further, Ag suitable for the ohmic metal layer 31 may have a reduced reflectance due to discoloration due to oxidation or the like. In the present invention, the ohmic metal layer 31 is removed from the outside air by the protective metal layer 32 and the p pad 33. Since it can block, even the ohmic metal layer 31 made of Ag can effectively suppress discoloration due to oxidation or the like.

  As can be seen from FIG. 3, the portion of the protective metal layer 32 formed around the ohmic metal layer 31 is in contact with the p-type semiconductor layer 15. Therefore, it is preferable to form from a metal material having a high light reflectivity so that light emitted in the direction of the p-type semiconductor layer 15 and reaching the protective metal layer 32 can be efficiently reflected. For example, Al is preferable because it has a sufficiently high reflectance as compared with other metal materials (for example, Au, Cu, etc.), although the reflectance of light is inferior to that of Ag.

  Since the p pad 33 is formed so as to cover a part of the upper surface of the ohmic metal layer 31, light emission does not reach the p pad 33. Therefore, even if a material with low light reflectance is used for the p-pad 33, there is no possibility of reducing the light extraction efficiency.

In the semiconductor light emitting device 10 described in detail in the present embodiment, the second opening 321 formed in the protective metal layer 32 completely penetrates the protective metal layer 32. However, instead of the second opening 321 penetrating completely, the protective metal layer 32 can be provided with a recess having a sufficient depth. From the viewpoint of reducing the height difference between the apex position of the p bump 50 and the apex position of the n bump 40, the depth of the recess needs to be larger than the thickness 33 t of the p pad 33.
By sufficiently reducing the thickness of the protective metal layer 32 on the bottom surface of the dent, the difference in height between the apex position of the p bump 50 and the apex position of the n bump 40 can be sufficiently suppressed. The protective metal layer 32 left on the bottom surface of the dent has an effect of suppressing the migration of the ohmic metal layer 31, and in particular, the thickness of 2 μm or more is preferable because the migration suppression effect is enhanced.

In order to form the semiconductor light emitting device 10 of the present embodiment, the following steps (i) to (v) are essentially included.
Step (i) Step of forming the semiconductor stacked body 12 by stacking the n-type semiconductor layer 13, the active layer 14, and the p-type semiconductor layer 15 in order from the bottom Step (ii) The p-type semiconductor layer 15 of the semiconductor stacked body 12 And a step of partially removing the active layer 14 to form an opening 16 for exposing the n-type semiconductor layer 13 Step (iii) In the opening 16, the n-type semiconductor layer 13 exposed from the opening 16 is electrically connected Step (iv) Step of forming p electrode 30 electrically connected to p-type semiconductor layer 15 Step (v) Forming n electrode 20 on n pad 23 Bump forming process for forming the bump 40 on the p pad 33 included in the p electrode 30.

The above-described step (iv) “step of forming the p electrode 30” includes the following steps (vi) -1 to (vi) -4.
Process (vi) -1 Process for forming the ohmic metal layer 31 on the upper surface 15a of the p-type semiconductor layer 15 Process (vi) -2 Process for forming the protective metal layer 32 covering the ohmic metal layer 31 Process (vi) -3 Protection Process of forming opening 321 in metal layer 32 Process (vi) -4 The p pad 33 covering the entire exposed surface 31e of the ohmic metal layer 31 exposed from the opening 321 is formed, and the upper surface 33a of the p pad 33 is formed of the protective metal layer 32. The process of forming so that it may become lower than the upper surface 32a.

Further, the step (iv) “step of forming the p-electrode 30” includes:
Step (vi) -5 The method may further include the step of forming the inner side surface covering layer 34 that covers the inner side surface 321c of the opening 321 and is in contact with the p pad 33. In addition, process (vi) -5 can perform process (vi) -4 simultaneously.

Each of the steps and processes described above can be performed separately in sequence, but several steps and / or processes can be performed simultaneously. In an actual production line, in order to reduce the actual number of processes, a procedure in which some of the processes described above are performed simultaneously may be employed. For example, the formation of “n pad 23” in step (iii) and the formation of “p pad 33” in step (vi) -4 of step (vi) could be performed simultaneously.
Below, the specific procedure in manufacture of the semiconductor light-emitting device 10 is demonstrated, referring FIG. 4A-FIG. 4I.

<1. Formation of semiconductor laminate 12: Step (i)>
An n-type semiconductor layer 13 is formed on the entire top surface 11a of the substrate 11 (FIG. 4A). Then, an active layer 14 made of a semiconductor material is formed on the entire upper surface of the n-type semiconductor layer 13, and a p-type semiconductor layer 15 is stacked on the entire upper surface of the active layer 14. In this way, the semiconductor material layers are stacked to form the semiconductor stacked body 12.

<2. Formation of first opening 16: step (ii)>
One or more openings 16 are formed by removing a part of the semiconductor stacked body 12 from the upper surface of the semiconductor stacked body 12 (that is, the upper surface 15a of the p-type semiconductor layer 15) (FIGS. 2 and 4A). In the cross-sectional view of FIG. 2, three openings 16 are shown.
The opening 16 is formed by partially removing the p-type semiconductor layer 15 and the active layer 14. In other words, the opening 16 is formed so as to penetrate the p-type semiconductor layer 15 and the active layer 14 from the upper surface of the semiconductor stacked body 12 (that is, the upper surface 15a of the p-type semiconductor layer 15). As a result, the semiconductor layer (p-type semiconductor layer 15 and active layer 14) formed above the n-type semiconductor layer 13 is removed in the range where the opening 16 is formed. The exposed surface 13e is exposed.
In the present embodiment, the opening 16 penetrates the p-type semiconductor layer 15 and the active layer 14 and is formed by removing a part of the thickness of the n-type semiconductor layer 13. The bottomed hole reaches the middle of the thickness of the mold semiconductor layer 13.

<3. Formation of ohmic metal layer 31 and protective metal layer 32: Process (vi) -1, Process (vi) -3>
An ohmic metal layer 31 made of a metal material is formed on a part of the upper surface 15a of the p-type semiconductor layer 15, and a protective metal layer 32 made of a metal material is formed so as to cover the entire ohmic metal layer 31 (FIG. 4A).

<4. Formation of insulating film 17>
In order to insulate the semiconductor stacked body 12 and the protective metal layer 32 from the outside, the entire surface of the semiconductor stacked body 12 (including the inner surface of the opening 16 and the exposed surface 13e of the n-type semiconductor layer 13 exposed from the opening 16). The entire surface of the protective metal layer 32 is covered with an insulating film 17 made of an insulating material (FIG. 4B).

<5. Formation of opening 321 in protective metal layer 32 and removal of insulating film 17: Process (vi) -3>
An opening 321 for exposing the ohmic metal layer 31 is formed in the protective metal layer 32 covering the entire ohmic metal layer 31. At the same time, an opening 17x is formed in the insulating film 17 covering the exposed surface 13e of the n-type semiconductor layer 13 exposed from the opening 16, and an opening 17y is formed in the insulating film 17 covering the protective metal layer 32 (FIG. 4D). These openings can be formed simultaneously by etching or the like (dry etching, wet etching). The opening 321 of the protective metal layer 32 and the opening 17y of the insulating film 17 on the protective metal layer 32 have the same size and shape when viewed from above.

  First, an etching mask 91 is formed on the insulating film 17 (FIG. 4C). The mask 91 includes an opening 91 y corresponding to the opening 321 of the protective metal layer 32 and the opening 17 y of the insulating film 17 (on the protective metal layer 32), and the exposed surface of the n-type semiconductor layer 13 exposed from the opening 16. And an opening 91x corresponding to the opening 17x of the insulating film 17 (on 13e). Note that the opening 91y is formed so that the outer edge 31a of the ohmic metal layer 31 is not located immediately below the opening 91y.

Next, by performing etching or the like, the insulating film 17 and the protective metal layer 32 can be partially removed in accordance with the openings 91x and 91y of the mask 91 (FIG. 4D). Thus, by forming the opening 17x in the insulating film 17, the exposed surface 13e of the n-type semiconductor layer 13 exposed from the opening 16 can be partially or entirely exposed. The ohmic metal layer 31 can be partially exposed by forming the opening 17 y in the insulating film 17 and forming the opening 321 in the protective metal layer 32.
In addition, since the mask 91 is provided so that the outer edge portion 31a of the ohmic metal layer 31 is not located immediately below the opening 91y of the mask 91, the outer edge portion 31a of the ohmic metal layer 31 in the protective metal layer 32 is covered. The remaining part remains without being etched.

<6. Formation of metal layer 63: step (iii), step (vi) -4, step (vi) -5>
Next, a metal layer 63 (pad metal layer 63) for the n pad 23 and the p pad 33 is formed. A pad metal layer 63 that covers the surface of the mask 91 and the surface exposed from the openings 91x and 91y of the mask 91 is formed by sputtering (FIG. 4E).
Here, the “surface exposed from the opening 91x of the mask 91” is the exposed surface 13e of the n-type semiconductor layer 13 exposed from the opening 16 (FIG. 4D). The “surface exposed from the opening 91 y of the mask 91” includes at least the exposed surface 31 e of the ohmic metal layer 31, the inner surface of the opening 17 y of the insulating film 17, and the opening of the protective metal layer 32. The inner surface 321c of 321 can also be included.

  The pad metal layer 63 formed in this way is electrically connected to the n-type semiconductor layer exposed from the opening 16. Therefore, by separating a part of the pad metal layer 63, the “n pad 23 electrically connected to the n-type semiconductor layer 13 exposed from the opening 16” can be formed. The pad metal layer 63 covers the entire exposed surface 31 e of the ohmic metal layer 31 exposed from the opening 321 of the protective metal layer 32. Therefore, by separating a part of the pad metal layer 63, it is possible to form the “p pad 33 covering the entire exposed surface 31e of the ohmic metal layer 31 exposed from the opening 321”.

Further, (corresponding to the thickness 33t of the p-pad 33) the thickness 63t of the pad metal layer 63 is thin as [Delta] H ₁ than the thickness 32t of the protective metal layer 32. This makes it possible to the upper surface 63a of the pad metal layer 63 directly above the ohmic metal layer 31 (corresponding to the upper surface 33a of the p-pad 33) is positioned in [Delta] H ₁ only below the upper surface 32a of the protective metal layer 32.

The pad metal layer 63 can further cover the inner side surface 321 c of the opening 321 of the protective metal layer 32. Thereby, after the pad metal layer 63 is separated, the inner side surface covering layer 34 that covers the inner side surface 321 c of the opening 321 and is in contact with the p pad 33 can be formed.
Depending on the sputtering conditions when forming the pad metal layer 63, it is difficult to form a film on a surface perpendicular to the sputtering direction. That is, when sputtering is performed from the upper surface 15a side of the p-type semiconductor layer 15, it is difficult to form a film on the inner side surface 321c of the opening 321 of the protective metal layer 32 perpendicular to the upper surface 15a. Therefore, when forming the semiconductor light emitting device 10 having the inner surface covering layer 34, sputtering is performed so that the pad metal layer 63 is sufficiently formed on the inner surface 321 c of the opening 321 of the protective metal layer 32. It is preferable to control the conditions.

<7. Formation of n bump 40 and p bump 50: Step (v)>
The n bump 40 and the p bump 50 are formed simultaneously by the procedure shown in FIGS. 4F to 4H.
First, a resist layer 92 for photolithography is formed on the entire surface of the pad metal layer 63. Thereafter, openings 92x and 92y are formed in the resist layer 92 by photolithography (FIG. 4F). The opening 92x is provided so that the portion of the pad metal layer 63 (which will later become the n pad 23) covering the exposed surface 13e of the n-type semiconductor layer 13 exposed from the opening 16 is exposed from the resist layer 92. It has been. The opening 92 y is provided such that a portion of the pad metal layer 63 (which will later become the p pad 33) covering the exposed surface 31 e of the ohmic metal layer 31 is exposed from the resist layer 92.

Next, metal bumps 40 and 50 are formed inside the openings 92x and 92y of the resist layer 92 by plating (electrolytic plating or electroless plating) (FIG. 4G). An n bump 40 is formed in the opening 92x and is provided on a portion of the pad metal layer 63 that will later become the n pad 23. A p-bump 50 is formed in the opening 92 y and is provided on a portion of the pad metal layer 63 that will later become the p-pad 33.
Since the n bump 40 and the p bump 50 are formed in the same process by plating, the thickness 40t of the n bump 40 and the thickness 50t of the p bump 50 are substantially equal.
Thereafter, the resist layer 92 is removed (FIG. 4H).

<8. Separation of pad metal layer 63>
By removing the etching mask 91 together with the pad metal layer 63 covering the surface thereof, the pad metal layer 63 is separated into the n pad 23 and the p pad 33 (and the inner surface covering layer 34) ( 4H-4I). Specifically, the pad metal layer 63 (the range sandwiched between broken lines xx) that has been in contact with the n-type semiconductor layer 13 exposed from the opening 16 remains without being removed and becomes the n-pad 23. Further, the pad metal layer 63 (the range sandwiched between the broken lines yy) that has been in contact with the exposed surface 31e of the ohmic metal layer 31 and the inner surface 321c of the opening 321 of the protective metal layer 32 remains without being removed. Thus, the p pad 33 and the inner side surface coating layer 34 are formed.

The method for manufacturing the semiconductor light emitting device 10 described with reference to FIGS. 4A to 4I is an example, and the present invention is not limited to this.
For example, in forming the pads 23 and 33, a continuous pad metal layer 63 is first formed (FIG. 4E), and later separated into an n pad 23, a p pad 33, and an inner side surface covering layer 34 (FIG. 4). 4I) The pad metal layer 63 can be separated from the beginning.

  Below, the material suitable for each structural member of embodiment is demonstrated.

(Ohmic metal layer 31)
The ohmic metal layer 31 is formed from a metal material that is in ohmic contact with the p-type semiconductor 15. Suitable materials include, for example, Ag and Ag alloys. Examples of the alloy of Ag include Ag, Pt, Co, Au, Pd, Ti, Mn, V, Cr, Zr, Rh, Cu, Al, Mg, Bi, Sn, Ir, Ga, Nd, and Re. Examples thereof include alloys with one or more metals selected from the group consisting of: It should be noted that an alloy such as Ni that is difficult to alloy with Ag (that is, an element in which the reaction with silver is easily suppressed) and Ag has a state in which Ni atoms are contained in the Ag layer. May be. Moreover, the ohmic metal layer 31 can also be made into a laminated structure, and can be formed from the metal layer which has a laminated structure of Ag / Ni / Ti / Ru from the p-type semiconductor 15 side.

(Protective metal layer 32)
Since the protective metal layer 32 suppresses migration of the ohmic metal layer 31, the protective metal layer 32 is formed of a metal material that is less likely to cause migration than the metal material used for the ohmic metal layer 31. Moreover, since the light emitted from the active layer 14 of the semiconductor stacked body 12 can reach the protective metal layer 32, a material having a high reflectance with respect to light emission is particularly preferable. Suitable materials include, for example, Al, Al alloy, Au, Ti, Rh, SiN, stacked structure including SiO _2, or these materials and the like.

(N pad 23, p pad 33, inner side surface coating layer 34)
Since the n pad 23 is electrically connected to the n-type semiconductor layer 13, the n pad 23 is formed of a metal material that is in ohmic contact with the n-type semiconductor layer 13.
Since the p-pad 33 suppresses migration of the ohmic metal layer 31 exposed from the opening 321 of the protective metal layer 32, the p-pad 33 is formed of a metal material that is less likely to cause migration than the metal material used for the ohmic metal layer 31. The
The inner side surface coating layer 34 suppresses migration of the protective metal layer 32 exposed from the inner side surface 321 c of the opening 321, and thus is formed from a metal material that is less likely to cause migration than the metal material used for the protective metal layer 32. Is done.
The n pad 23, the p pad 33, and the inner surface covering layer 34 are preferably formed of the same material so that they can be formed simultaneously. The n pad 23, the p pad 33, and the inner side surface covering layer 34 can be formed from a metal layer having a laminated structure of AlCuSi / Ti / Pt / Au from the semiconductor laminated body 12 side, for example.

(N bump 40, p bump 50)
The n bump 40 and the p bump 50 are made of a metal material that can be melted by reflow and can mount the semiconductor light emitting element 10 on the mounting substrate. Suitable materials include, for example, Au, Au—Sn alloy, Au—Ag alloy, Sn—Cu (Sn—Cu, Sn—Cu—Ni—Ge), Sn—Ag (Sn—Ag, Sn—Ag). -Cu, Sn-Ag-Bi-In), Sn-Bi system (Sn-Bi, Sn-Bi-Ag, Sn-Bi-Cu), Sn-Pb, etc. can be used.

(Substrate 11)
As the substrate 11, a material transparent to the light emitted from the active layer 14 is used. For example, an insulating substrate such as sapphire or spinel, or a conductive substrate such as GaN can be used.

(Semiconductor laminate 12)
The semiconductor stacked body 12 includes an n-type semiconductor layer 13, an active layer 14, and a p-type semiconductor layer 15. These semiconductor _{layers, In X Al Y Ga 1-} X-Y N (0 ≦ X, 0 ≦ Y, X + Y ≦ 1) gallium nitride-based compound such as a semiconductor is preferably used. The n-type semiconductor layer 13, the active layer 14, and the p-type semiconductor layer 15 may each have a single-layer structure, but may have a stacked structure of layers having different compositions and film thicknesses, a superlattice structure, or the like. In particular, the active layer 14 preferably has a single quantum well or multiple quantum well structure in which thin films that produce quantum effects are stacked.

(Insulating film 17)
The insulating film 17 is made of an insulating film, and is particularly preferably made of an oxide film. Examples of suitable materials include silicon dioxide (SiO ₂ ) and Zr oxide film (ZrO ₂ ).

The difference Hd _{1 in} height between the n bump 40 and the p bump 50 in the semiconductor light emitting device 10 according to the present invention as shown in FIG. 3, and the n bump 400 and p in the semiconductor light emitting device 100 in the comparative example as shown in FIG. comparing the difference Hd ₂ of the height of the bump 500.
Table 1 shows the thickness of each component, and Table 2 shows the difference in height.

As can be seen from this result, in the semiconductor light emitting device 10 of Example 1, the height difference Hd ₁ between the n bump 40 and the p bump 50 was 1.6 μm. On the other hand, in the semiconductor light emitting device 100 of Comparative Example 1, the height difference Hd ₂ between the n bump 400 and the p bump 500 was 3.6 μm, which was twice as high as that of Example 1.

DESCRIPTION OF SYMBOLS 10 Semiconductor light emitting element 11 Substrate 12 Semiconductor laminated body 13 N-type semiconductor layer (1st conductivity type semiconductor layer)
14 active layer 15 p-type semiconductor layer (second conductivity type semiconductor layer)
20 1st electrode (n electrode)
23 First pad (n-pad)
30 Second electrode (p-electrode)
31 ohmic metal layer 31a outer edge 32 protective metal layer 321 second opening 33 second pad (p pad)
40 1st bump (n bump)
50 Second bump (p bump)

Claims (4)

A first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer stacked in order from the bottom;
A first opening for exposing the first conductive semiconductor layer through the second conductive semiconductor layer and the active layer;
A first electrode provided in the first opening, electrically connected to the first conductive semiconductor layer exposed from the first opening, and including a first pad;
An ohmic metal layer provided on an upper surface of the second conductive semiconductor layer and in ohmic contact with the second conductive semiconductor layer; a protective metal layer covering at least an outer edge of the ohmic metal layer and having a second opening; A second pad covering the exposed surface of the ohmic metal layer exposed from the second opening, and a second electrode electrically connected to the second conductivity type semiconductor layer,
A semiconductor device comprising:
The thickness of the second pad is less than the thickness of the protective metal layer, and the upper surface of the second pad is below the upper surface of the protective metal layer;
A semiconductor light emitting device, further comprising: a first bump provided on the first pad; and a second bump provided on the second pad having substantially the same thickness as the first bump. element.   2. The semiconductor light emitting device according to claim 1, wherein the second electrode further includes an inner surface covering layer that covers an inner surface of the opening and is in contact with the second pad. Laminating the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer in order from the bottom;
Partially removing the second conductive semiconductor layer and the active layer of the semiconductor stacked body to form a first opening exposing the first conductive semiconductor layer;
Forming a first electrode in the first opening that is electrically connected to the first conductive semiconductor layer exposed from the first opening and includes a first pad;
Forming a second electrode electrically connected to the second conductive semiconductor layer,
Forming an ohmic metal layer on the upper surface of the second conductive semiconductor layer;
Forming a protective metal layer covering the ohmic metal layer;
Forming a second opening in the protective metal layer;
Forming a second pad covering an exposed surface of the ohmic metal layer exposed from the second opening so that an upper surface of the second pad is lower than an upper surface of the protective metal layer. An electrode forming step;
A method of manufacturing a semiconductor light emitting device, comprising: a bump forming step of forming a first bump on the first pad and a second bump on the second pad. The second electrode forming step further includes a step of forming an inner surface covering layer that covers an inner surface of the second opening and is in contact with the second pad;
4. The method of manufacturing a semiconductor light emitting device according to claim 3, wherein the second pad forming step and the inner side surface coating layer forming step are simultaneously performed.

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