JP2015022437A5 - - Google Patents

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Publication number
JP2015022437A5
JP2015022437A5 JP2013148828A JP2013148828A JP2015022437A5 JP 2015022437 A5 JP2015022437 A5 JP 2015022437A5 JP 2013148828 A JP2013148828 A JP 2013148828A JP 2013148828 A JP2013148828 A JP 2013148828A JP 2015022437 A5 JP2015022437 A5 JP 2015022437A5
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JP
Japan
Prior art keywords
address
access
page
control
memory
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JP2013148828A
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English (en)
Japanese (ja)
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JP6170363B2 (ja
JP2015022437A (ja
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Priority to JP2013148828A priority Critical patent/JP6170363B2/ja
Priority claimed from JP2013148828A external-priority patent/JP6170363B2/ja
Priority to US14/324,933 priority patent/US9760508B2/en
Publication of JP2015022437A publication Critical patent/JP2015022437A/ja
Publication of JP2015022437A5 publication Critical patent/JP2015022437A5/ja
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JP2013148828A 2013-07-17 2013-07-17 制御装置、コンピュータシステム、制御方法、及びプログラム Active JP6170363B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013148828A JP6170363B2 (ja) 2013-07-17 2013-07-17 制御装置、コンピュータシステム、制御方法、及びプログラム
US14/324,933 US9760508B2 (en) 2013-07-17 2014-07-07 Control apparatus, computer system, control method and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013148828A JP6170363B2 (ja) 2013-07-17 2013-07-17 制御装置、コンピュータシステム、制御方法、及びプログラム

Publications (3)

Publication Number Publication Date
JP2015022437A JP2015022437A (ja) 2015-02-02
JP2015022437A5 true JP2015022437A5 (https=) 2016-08-18
JP6170363B2 JP6170363B2 (ja) 2017-07-26

Family

ID=52344550

Family Applications (1)

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JP2013148828A Active JP6170363B2 (ja) 2013-07-17 2013-07-17 制御装置、コンピュータシステム、制御方法、及びプログラム

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US (1) US9760508B2 (https=)
JP (1) JP6170363B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018205859A (ja) * 2017-05-31 2018-12-27 キヤノン株式会社 メモリコントローラとその制御方法
US12112786B2 (en) * 2021-09-01 2024-10-08 Micron Technology, Inc. Command scheduling component for memory

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6128716A (en) * 1998-01-23 2000-10-03 Motorola Inc. Memory controller with continuous page mode and method therefor
JP2000331476A (ja) 1999-05-20 2000-11-30 Nec Ibaraki Ltd ページ一致制御回路およびページ一致制御方法
US6381672B1 (en) * 2000-05-11 2002-04-30 Advanced Micro Devices, Inc. Speculative opening of a new page when approaching page boundary during read/write of isochronous streams
JP4370063B2 (ja) * 2001-06-27 2009-11-25 富士通マイクロエレクトロニクス株式会社 半導体記憶装置の制御装置および半導体記憶装置の制御方法
JP2004013618A (ja) * 2002-06-07 2004-01-15 Renesas Technology Corp 同期型半導体記憶装置のアクセス制御装置
US7386658B2 (en) * 2004-03-15 2008-06-10 Intel Corporation Memory post-write page closing apparatus and method
JP2006127110A (ja) * 2004-10-28 2006-05-18 Canon Inc Ｄｒａｍメモリアクセス制御手法、および手段
US20110055495A1 (en) * 2009-08-28 2011-03-03 Qualcomm Incorporated Memory Controller Page Management Devices, Systems, and Methods
JP5759276B2 (ja) 2011-06-09 2015-08-05 キヤノン株式会社 処理装置及び情報処理方法
US9336164B2 (en) * 2012-10-04 2016-05-10 Applied Micro Circuits Corporation Scheduling memory banks based on memory access patterns
US9251048B2 (en) * 2012-10-19 2016-02-02 International Business Machines Corporation Memory page management
JP2014115851A (ja) 2012-12-10 2014-06-26 Canon Inc データ処理装置及びその制御方法

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