JP2015007677A - Liquid crystal display device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device and a manufacturing method thereof capable of reducing alignment defects in a rubbing step while increasing the opening ratio of pixels.SOLUTION: The liquid crystal display device includes: a gate wiring 12 extending in a first direction on a substrate 11; a drain wiring 13 extending in a second direction on the substrate 11; and a common wiring 20 extending in the second direction which is electrically connected to a common electrode 19. The common wiring 20 is overlapped with the drain wiring 13 being interposed by an insulation film 18 as viewed from the top. A part of the drain wiring 13 disposed between the neighboring gate wirings 12 formed on a layer identical to the gate wiring 12.

Description

  The present invention relates to a liquid crystal display device and a manufacturing method thereof.

  Since the liquid crystal display device is configured to display an image by controlling the transmission / non-transmission of the backlight light in each pixel, in order to improve the display quality, an area where light is transmitted in each pixel (effective It is important to increase the display area), in other words, to increase the aperture ratio of the pixels. Conventionally, various techniques for improving the aperture ratio of a pixel in a liquid crystal display device have been proposed (see, for example, Patent Document 1).

  Patent Document 1 describes a configuration in which a counter voltage signal line (also referred to as a common wiring) that supplies a reference signal to a counter electrode is formed along the traveling direction of the gate signal line and superimposed on the gate signal line. Has been.

JP 2009-122299 A

  However, since a thin film transistor (TFT), a pedestal for a spacer, and the like are provided on the gate signal line, in order to overlap the common wiring along the running direction of the gate signal line, avoid the thin film transistor and the like. It is necessary to form the common wiring in the space formed by expanding the width of the gate signal line. In the former case, there is a problem that the formation of the common wiring becomes complicated and the possibility of disconnection increases, and in the latter case, there is a problem that the aperture ratio of the pixel decreases.

  As a configuration for solving these problems, for example, a configuration in which the common wiring is formed so as to overlap along the traveling direction of the data signal line (drain wiring) is conceivable. However, in this configuration, the overlapping portion of the common wiring and the drain wiring appears as a step on the surface of the TFT substrate, causing a problem that alignment failure occurs in the rubbing process.

  The present invention has been made in view of the various problems described above, and an object of the present invention is to provide a liquid crystal display device capable of improving the aperture ratio of pixels and reducing alignment defects in the rubbing process, and a method for manufacturing the same. It is to be.

  In order to solve the above problems, a liquid crystal display device according to the present invention has a plurality of gate wirings extending in a first direction on a substrate, and a second direction different from the first direction on the substrate. A plurality of drain wirings extending in the second direction and a plurality of common wirings electrically connected to the common electrode, each of the plurality of common wirings in plan view, Adjacent gate wirings in a drain wiring that at least partially overlaps at least one drain wiring of the plurality of drain wirings through the first insulating film and overlaps the common wiring among the plurality of drain wirings A portion disposed between the gate wirings is formed in the same layer as the gate wiring.

  The liquid crystal display device according to the present invention further includes a gate insulating film formed so as to cover the plurality of second insulating films, and the first insulating film covers the plurality of drain wirings and the second insulating film. It is preferable to be formed as described above.

  In the liquid crystal display device according to the present invention, it is preferable that a hollow portion larger than a width of the drain wiring is formed in the second insulating film.

  In the liquid crystal display device according to the present invention, it is preferable that a drain wiring overlapping the common wiring among the plurality of drain wirings is formed on the substrate exposed in the hollowed-out portion.

  In the liquid crystal display device according to the present invention, it is preferable that the common electrode is formed on the first insulating film, and the plurality of common wirings are formed on the common electrode.

  In the liquid crystal display device according to the present invention, it is preferable that the plurality of common lines are formed on a flat portion that covers a region where the drain line is formed in the common electrode.

  In the liquid crystal display device according to the present invention, it is preferable that a portion of the drain wiring that intersects with the gate wiring in plan view overlaps with the gate wiring through the second insulating film.

  In the liquid crystal display device according to the present invention, it is preferable that a width of the common line is equal to or less than a width of the drain line.

  In the liquid crystal display device according to the present invention, the plurality of drain wirings are classified into a first drain wiring that overlaps with the common wiring in a plan view and a second drain wiring that does not overlap with the common wiring in a plan view, Preferably, the first drain wiring is formed in the same layer as the gate wiring, and the second drain wiring is formed on the second insulating film.

  In the liquid crystal display device according to the present invention, the two drain wirings are provided between two adjacent pixel columns, and the two drain wirings disposed between the two pixel columns in a plan view. In addition, one common wiring may be superimposed.

  In order to solve the above problems, a method of manufacturing a liquid crystal display device according to the present invention includes a gate wiring forming step of forming a plurality of gate wirings on a substrate so as to extend in a first direction, and the plurality of gates. A second insulating film forming step of forming a second insulating film so as to cover the wiring, and an etching step of forming a placement region for cutting out a part of the second insulating film and placing the drain wiring on the substrate A drain wiring forming step of forming a plurality of drain wirings in the arrangement region on the substrate so as to extend in a second direction different from the first direction, and extending in the second direction A common wiring forming step of forming a plurality of common wirings so as to be electrically connected to the common electrode. In the common wiring forming step, each of the plurality of common wirings is at least in plan view Part is characterized in that it formed to overlap with at least one drain wire of the plurality of drain lines via the first insulating film.

  In the method for manufacturing a liquid crystal display device according to the present invention, in the drain wiring formation step, a portion of the plurality of drain wirings that is disposed between adjacent gate wirings in the drain wiring that overlaps with the common wiring, The gate wiring is preferably formed in the same layer.

  In the method for manufacturing a liquid crystal display device according to the present invention, it is preferable that the plurality of gate lines and the plurality of drain lines are formed on the substrate in different steps.

  According to the liquid crystal display device and the method for manufacturing the same according to the present invention, the step on the surface of the TFT substrate on the common wiring can be kept low while the common wiring is superimposed on the drain wiring. For this reason, while improving the aperture ratio of a pixel, the orientation defect in a rubbing process can be reduced.

It is a perspective view which shows an example of the liquid crystal display device which concerns on one Embodiment of this invention. It is a top view which shows the one part schematic structure of the display panel provided in the liquid crystal display device which concerns on this embodiment. It is sectional drawing which shows the structure of the cross section along line AB in the display panel of FIG. It is sectional drawing which shows the structure of the cross section of a TFT substrate. It is sectional drawing which shows the structure of the cross section of a TFT substrate. It is a figure which shows the manufacturing process of the TFT substrate which concerns on this embodiment. It is a figure which shows the manufacturing process of the TFT substrate which concerns on this embodiment. It is a figure which shows the manufacturing process of the TFT substrate which concerns on this embodiment. It is sectional drawing which shows the structure of the cross section in the display panel of a double source line structure.

  FIG. 1 is a perspective view showing an example of a liquid crystal display device 1 according to an embodiment of the present invention. The liquid crystal display device 1 includes a vertically long display panel 2 (see FIG. 2) that displays an image, a backlight (not shown) that is provided on the back side of the display panel 2 and irradiates the display panel 2 with light. Various drive circuits (not shown) for controlling image display on the display panel 2 are provided.

  FIG. 2 is a plan view showing a schematic configuration of a part of the display panel 2 provided in the liquid crystal display device 1 according to the present embodiment, and FIG. 3 is taken along line AB in the display panel 2 of FIG. It is sectional drawing which shows the structure of a cross section.

  As shown in FIG. 3, the display panel 2 includes a thin film transistor substrate (hereinafter referred to as TFT substrate) 10 provided on the back side, a color filter substrate (hereinafter referred to as CF substrate) 30 provided on the front side, and a TFT. The liquid crystal layer 40 is sandwiched between the substrate 10 and the CF substrate 30. In FIG. 2, for convenience, only the TFT substrate 10 is shown, and the CF substrate 30 and the liquid crystal layer 40 are omitted.

  As shown in FIG. 3, in the TFT substrate 10, a plurality of gate wirings 12 (scanning signal lines) made of a metal such as Cu are provided on a substrate (transparent substrate) 11 made of alkali-free glass or the like so that the display panel 2 is planarized. When viewed from the side, it is formed to extend in the lateral (left and right, row) direction (first direction; see FIG. 2). In addition, a plurality of drain wirings 13 (data signal lines) made of a metal such as Cu are formed on the substrate 11 in the vertical (up and down, column) direction (second direction; see FIG. 2) when the display panel 2 is viewed in plan view. It is formed so as to extend. An insulating film (gate insulating film) 14 (second insulating film) made of a transparent insulating material such as SiN is formed on the substrate 11 so as to cover the gate wiring 12. In the gate insulating film 14, a region (arrangement region 14b) where the drain wiring 13 is disposed on the substrate 11 is cut out.

  A semiconductor layer 15 made of amorphous silicon (aSi) is formed on the gate insulating film 14. A drain electrode 16 and a source electrode 17 are formed on the semiconductor layer 15. An insulating film (passivation film) 18 (first insulating film) made of a transparent insulating material such as SiN is formed so as to cover these electrodes 16 and 17 and the drain wiring 13. The drain electrode 16 is electrically connected to the drain wiring 13.

  A common electrode 19 made of a transparent conductive film such as tin-added indium oxide (ITO) is formed on the insulating film 18. On the common electrode 19, a plurality of common wires 20 made of a metal such as Cu are formed so as to extend in the same direction as the drain wire 13. In addition, the formation position (lamination position) of the common electrode 19 and the common wiring 20 is not particularly limited, and the common electrode 19 and the common wiring 20 may be electrically connected to each other. For example, the common electrode 19 may be formed so as to cover the common wiring 20, or the common electrode 19 and the common wiring 20 are stacked via an insulating layer and are electrically connected to each other via a contact hole. Also good. Here, the common wiring 20 is formed so as to overlap at least a part of the drain wiring 13 when the display panel 2 is viewed in plan (in plan view). 2 and 3, as an example, the entire common wiring 20 is formed so as to overlap the single drain wiring 13 in plan view.

  An insulating film (passivation film) 21 is formed so as to cover the common electrode 19 and the common wiring 20. A pixel electrode 22 made of a transparent conductive film such as tin-added indium oxide (ITO) is formed on the insulating film 21. The pixel electrode 22 is electrically connected to the source electrode 17 through the contact hole 23. In FIG. 2, one pixel electrode is provided in one pixel region surrounded by the adjacent gate line 12 and the adjacent drain line 13. However, the present invention is not limited to this, and a plurality of pixel electrodes are provided in one pixel region. The pixel electrode may be provided.

  A black matrix 31 is formed on the CF substrate 30 so as to overlap the gate wiring 12, the drain wiring 13, and the common wiring 20 in a plan view. An alignment film (not shown) is formed on the surface of the TFT substrate 10 and the CF substrate 30 on the liquid crystal layer 40 side.

  As described above, the drain wiring 13 is formed on the substrate 11 and is disposed in the same layer as the gate wiring 12. Specifically, the gate insulating film 14 has a hollow portion 14a larger than the width of the drain wiring 13, and the surface of the substrate 11 is exposed in the hollow portion 14a. A region where the substrate 11 is exposed in the cut-out portion 14 a becomes an arrangement region 14 b of the drain wiring 13. The drain wiring 13 is formed in the arrangement region 14b in the cut-out portion 14a, so that the drain wiring 13 is arranged in the same layer as the gate wiring 12 on the substrate 11. A common wiring 20 is formed on the drain wiring 13 via an insulating film 18. Thereby, the level | step difference of the TFT substrate 10 surface on the drain wiring 13 and the common wiring 20 can be suppressed low. Note that, at the portion where the drain wiring 13 and the gate wiring 12 intersect, the drain wiring 13 is formed so as to overlap the gate wiring 12 with the gate insulating film 14 interposed therebetween.

  Here, for comparison with the present embodiment, one configuration example of the TFT substrate 100 when the drain wiring 130 is formed on the gate insulating film 140 is shown in FIG. FIG. 4B shows a part of the TFT substrate 10 of this embodiment. In the TFT substrate 100 shown in FIG. 4A, a gate insulating film 140 is formed on the entire surface of the substrate 110, a drain wiring 130 is formed on the gate insulating film 140, and an insulating film 180 is interposed on the drain wiring 130. A common wiring 200 is formed. In this case, the step on the surface of the TFT substrate 100 is Ha. On the other hand, in the TFT substrate 10 of this embodiment, as shown in FIG. 4B, the step on the surface of the TFT substrate 10 is Hb. Comparing the steps Ha and Hb, the step Hb in this embodiment has a gate insulating film 14 formed with a hollow portion 14a. Therefore, the gate insulating film film is higher than the step Ha in the configuration of FIG. Lower by thickness. Thereby, the alignment defect resulting from the said level | step difference can be reduced in the rubbing process of the alignment film.

  Here, the positional relationship between the drain wiring 13 and the common wiring 20 in the present embodiment will be described. As described above, the common wiring 20 is formed so as to at least partially overlap the drain wiring 13 in plan view. The position where the common wiring 20 overlaps the drain wiring 13 is not particularly limited, but in order to maximize the aperture ratio of the pixel, the common wiring 20 is connected to the drain wiring 13 as shown in FIG. It is preferably formed on the flat portion 14c that is a region parallel to the surface of the substrate 11 on the common electrode 19 covering the formation region. That is, it is preferable that the common wiring 20 has a projection region of the common wiring 20 onto the common electrode 19 (a portion in contact with the common electrode 19) formed in the region of the flat portion 14c. The width of the common wiring 20 is preferably equal to or smaller than the width of the drain wiring 13.

  According to the present embodiment, the common wiring 20 is formed to extend in the same direction as the drain wiring 13 that extends in the vertical direction (second direction in FIG. 2) of the liquid crystal display device 1. For this reason, in the TFT substrate 10, potential fluctuations significantly generated in the vertical direction due to the low conductivity of ITO, which is the material of the common electrode 19, are reduced, and better display characteristics can be obtained. Further, since the common wiring 20 is formed in the vertical direction, a drive circuit for the common wiring 20 can be provided in an upper or lower region of the display panel 2. Therefore, the liquid crystal display device 1 according to the present embodiment is particularly suitable for a liquid crystal display device having a shape that is long in the vertical direction.

[Production method]
Next, a manufacturing method of the TFT substrate 10 in the liquid crystal display device 1 according to the present embodiment will be described. 6 to 8 are views showing a manufacturing process of the TFT substrate 10 according to this embodiment. 6 to 8 show a cross-sectional structure taken along line AB in FIG.

  First, as shown in FIG. 6A, the gate wiring 12 is formed on the substrate 11 so as to extend in the lateral direction (first direction; see FIG. 2) (gate wiring forming step). Specifically, after a Cu film is formed on the substrate 11 by sputtering, unnecessary portions of Cu are formed by photolithography process (photoresist application, selective exposure using a photomask, and development) and etching. By removing, the gate wiring 12 is formed.

  Next, as shown in FIG. 6B, a gate insulating film 14 is formed on the substrate 11 so as to cover the gate wiring 12 by, eg, CVD (gate insulating film forming step). Next, as shown in FIG. 6C, the gate insulating film 14 is etched to form an arrangement region 14b for arranging the drain wiring 13 (etching process). In the etching process, a process for exposing a terminal portion region (not shown) to be a terminal portion of the gate wiring 12 is also performed.

  Next, as shown in FIG. 6D, the drain wiring 13 is formed in the arrangement region 14b by the photolithography process and etching, and the semiconductor layer 15, the drain electrode 16 and the source electrode 17 are formed above the gate wiring 12. To do. Next, as shown in FIG. 7A, an insulating film 18 made of a transparent insulating material such as SiN is formed so as to cover the entire substrate by, eg, CVD.

  Next, as shown in FIG. 7B, a transparent conductive film such as ITO and a metal thin film such as Cu are formed on the insulating film 18 by sputtering, and a common electrode 19 is formed by photolithography and etching (common). Electrode forming step). Next, the common wiring 20 is formed on the common electrode 19 by using a part of the metal thin film so as to extend in the same direction as the drain wiring 13 by a photolithography process and etching (common wiring forming process). The common wiring 20 is formed so that at least a part thereof overlaps with the drain wiring 13 in plan view.

  Next, as shown in FIG. 7C, an insulating film 21 made of a transparent insulating material such as SiN is formed so as to cover the entire substrate by, eg, CVD, and then the source electrode 17 is exposed. The insulating film 18 and the insulating film 21 are removed, and a contact hole 23 is formed. Next, as shown in FIG. 8, a metal film made of a transparent conductive film such as ITO is formed in the contact hole 23 and on the insulating film 21 by a photolithography process and etching to form the pixel electrode 22.

  Through the above steps, the TFT substrate 10 according to the present embodiment is manufactured. Note that the CF substrate 30 according to the present embodiment can be manufactured by a known method.

  In addition, this invention is not limited to the said embodiment. In the above embodiment, one common wiring 20 is provided for one drain wiring 13, but the present invention is not limited to this. For n drain wirings 13 (n is an integer of 2 or more). One common wiring 20 may be provided. For example, one common wiring 20 may be provided for two drain wirings 13. Specifically, the common wiring 20 can be provided so as to overlap the drain wirings 13 arranged in the odd-numbered columns (or even-numbered columns) among all the drain wirings 13.

  As another configuration, in a so-called double source line structure in which two drain wirings are provided between two adjacent pixel columns, two drain wirings 13 arranged between two adjacent pixel columns are arranged. One common wiring 20 can be shared and overlapped. In this case, for example, in the two left and right drain wirings 13 arranged between the two pixel columns as shown in FIG. 9, one common wiring 20 overlaps the right region of the left drain wiring 13. In addition, it may be formed so as to overlap the left region of the right drain wiring 13, and one common wiring 20 is formed so as to completely cover the left and right drain wirings 13. Also good. Note that FIG. 9 illustrates a cross-sectional structure corresponding to FIG. 3 in a display panel having a double source line structure.

  Further, in the above configuration in which one common wiring 20 is provided for n (n is an integer of 2 or more) drain wirings 13, all the drain wirings 13 overlap the common wiring 20 (first wiring 13). Drain wiring) and drain wiring 13 (second drain wiring) that does not overlap the common wiring 20. In this case, it is preferable that the first drain wiring is formed in the same layer as the gate wiring 12 and the second drain wiring is formed on the gate insulating film 14. Thereby, the step on the surface of the TFT substrate above the first drain wiring and the step on the surface of the TFT substrate above the second drain wiring can be equalized.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, The form suitably changed by those skilled in the art from the said embodiment within the range which does not deviate from the meaning of this invention is also this invention. Needless to say, it is included in the technical scope.

  DESCRIPTION OF SYMBOLS 1 Liquid crystal display device, 2 Display panel, 10 Thin-film transistor substrate, 11 Substrate, 12 Gate wiring (scanning signal line), 13 Drain wiring (data signal line), 14 Gate insulating film, 14a Clearance part, 14b Arrangement area, 14c Flat Part, 15 semiconductor layer, 16 drain electrode, 17 source electrode, 18 insulating film (passivation film), 19 common electrode, 20 common wiring, 21 insulating film (passivation film), 22 pixel electrode, 23 contact hole, 30 color filter substrate , 31 Black matrix, 40 liquid crystal layer.

Claims (13)

A plurality of gate wirings extending in a first direction on the substrate;
A plurality of drain wirings extending in a second direction different from the first direction on the substrate;
A plurality of common wires extending in the second direction and electrically connected to the common electrode,
Each of the plurality of common wirings overlaps with at least one drain wiring among the plurality of drain wirings via the first insulating film in plan view,
Of the plurality of drain wirings, a portion of the drain wiring that overlaps with the common wiring and disposed between the adjacent gate wirings is formed in the same layer as the gate wiring. . A second insulating film formed to cover the plurality of gate lines;
The liquid crystal display device according to claim 1, wherein the first insulating film is formed so as to cover the plurality of drain wirings and the second insulating film.   3. The liquid crystal display device according to claim 2, wherein a hollow portion larger than a width of the drain wiring is formed in the second insulating film.   4. The liquid crystal display device according to claim 3, wherein a drain wiring overlapping with the common wiring among the plurality of drain wirings is formed on the substrate exposed in the hollowed portion. The common electrode is formed on the first insulating film,
5. The liquid crystal display device according to claim 1, wherein the plurality of common wirings are formed on the common electrode.   The liquid crystal display device according to claim 5, wherein the plurality of common lines are formed on a flat portion that covers a region where the drain line is formed in the common electrode.   3. The liquid crystal display device according to claim 2, wherein a portion of the drain wiring that intersects the gate wiring in a plan view overlaps with the gate wiring through the second insulating film.   The liquid crystal display device according to claim 1, wherein a width of the common line is equal to or less than a width of the drain line. The plurality of drain wirings are classified into a first drain wiring that overlaps with the common wiring in a plan view and a second drain wiring that does not overlap with the common wiring in a plan view,
5. The device according to claim 2, wherein the first drain wiring is formed in the same layer as the gate wiring, and the second drain wiring is formed on the second insulating film. A liquid crystal display device according to 1. Two drain wirings are provided between two adjacent pixel columns,
2. The liquid crystal display device according to claim 1, wherein one common wiring overlaps two drain wirings arranged between the two pixel columns in a plan view. A gate wiring forming step of forming a plurality of gate wirings on the substrate so as to extend in the first direction;
A second insulating film forming step of forming a second insulating film so as to cover the plurality of gate wirings;
Etching a part of the second insulating film to form a placement region for placing a drain wiring on the substrate;
Forming a plurality of drain wirings in the arrangement region on the substrate so as to extend in a second direction different from the first direction;
A common wiring forming step extending in the second direction and forming a plurality of common wirings so as to be electrically connected to the common electrode,
In the common wiring forming step, each of the plurality of common wirings is formed so as to overlap at least one drain wiring among the plurality of drain wirings through a first insulating film in plan view. A method for manufacturing a liquid crystal display device.   In the drain wiring forming step, a portion of the plurality of drain wirings that is disposed between adjacent gate wirings in a drain wiring overlapping with the common wiring is formed in the same layer as the gate wiring. A method for manufacturing a liquid crystal display device according to claim 11.   The method of manufacturing a liquid crystal display device according to claim 11, wherein the plurality of gate lines and the plurality of drain lines are formed on the substrate in different steps.

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