JP2014191174A - Matrix optical device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in which conventionally, a phase difference or a time lag occurs between data lines due to a difference in a wiring length of a data line from a connection terminal to a data drive circuit, and display quality is reduced.SOLUTION: A matrix optical device performing a matrix drive is configured to: dispose a connection terminal group that supplies pixel data from an outside to a data drive circuit; provide a plurality of pieces of wiring that transmits the pixel data to the data drive circuit from the connection terminal group; and arrange a laying part that sequentially lays wiring to be connected to terminals on both ends in the connection terminal group in the vicinity of a center position of the connection terminal group, and a terminal part that is in the vicinity of the center position of the connection terminal group.

Description

  The present invention relates to an optical apparatus such as a matrix drive type display device including gate lines and data lines, and a projection or reflection type image drawing system using the same type display device.

  2. Description of the Related Art Conventionally, as a representative example of a display device, a so-called active matrix liquid crystal optical device is known in which pixels arranged in a matrix by gate lines and data lines are driven by switching elements.

  For active matrix drive type liquid crystal optical devices, especially when displaying high-definition images, the display quality deteriorates due to the shift in the display data writing timing to each pixel. Proposed. (For example, Patent Document 1 and Patent Document 2)

(Prior art 1)
The technique disclosed in Patent Document 1 will be described with reference to FIG. FIG. 7 is a plan view showing a configuration example of the dot matrix display device disclosed in Patent Document 1, and is simplified within a range not losing the gist of the invention described in Patent Document 1.

  FIG. 7 shows a diagram in which the display area of the dot matrix drive type display device 10 is divided into, for example, a display area 1A and a display area 1B, and display data is transmitted from the connection terminal group PD to each area. A part of the wiring led out from the connection terminal group PD is input to the gate line driving circuit GD and scans the gate line in the display area. The data wiring drawn from the connection terminal group PD is supplied to the data line driving circuit DD and outputs display data to the pixels. In FIG. 7, by arranging the wiring layout of the data wiring group 8A and the data wiring group 8B on the object with the divided boundary line 1C of the display area 1A and the display area 1B as the center, at least the divided boundary line 1C is displayed. The display data is written to adjacent pixels GP with the same timing.

(Prior art 2)
Next, the technique disclosed in Patent Document 2 will be described with reference to FIG. FIG. 9 is a plan view schematically showing wiring for data lines around the pixel array GA of the liquid crystal optical device disclosed in Patent Document 2. The clock signals SCK1 and SCK2 are connected to the data lines by the wirings 1 and 2, respectively. Input to the drive circuits SD1 and SD2. However, since the wiring load is different between the wiring 2 connected to the data line driving circuit SD1 close to the input side and the wiring 1 connected to the far data line driving circuit SD2, there is a difference in the signal delay amount between the clock signals SCK1 and SCK2. This causes a problem that display quality deteriorates.

  Therefore, the dummy wiring 3 is provided in the wiring 2 for the second clock signal SCK2 input to the data line driving circuit SD1 alone, and the first input to both the data line driving circuit SD1 and the data line driving circuit SD2. The wiring load of the wiring 1 for the clock signal SCK1 and the wiring 2 for the second clock signal SCK2 input independently to the data line driving circuit SD1 are aligned to reduce the influence of the difference in routing.

Japanese Patent Laying-Open No. 2005-189758 (claims, FIG. 1) Japanese Patent No. 3666662 (claims, FIG. 1)

  However, in the technique disclosed in Patent Document 1 shown in FIG. 7, in the path from the connection terminal group PD to the display region 1A or the display region 1B, between the wirings of the data wiring group 8A and the data wiring group 8B, There is a difference in wiring length.

  Further details will be described with reference to FIG. FIG. 8 is an enlarged view showing the routing of data wiring from the connection terminal group PD to the display area 1B in the display area 1B of FIG. The data wirings ds to de constituting the data wiring group 8B are shown in detail. A position in the middle of the data wiring group 8B reaching the display area 1B is defined as a relay point C.

  Depending on the position drawn from the connection terminal group PD, the wiring lengths of the data wirings ds to de differ. That is, in the data wiring ds and the data wiring de, a wiring length difference of 2L (see FIG. 3B to be described later) is generated up to the relay point C. A phase difference or a time difference occurs between the wirings for use, which causes a deterioration in display quality. In particular, in the case of a high-definition optical device with a large number of pixels, the number of connection terminals and data wiring increase, and the horizontal length of the connection terminal group increases. Appears prominently.

  Further, the technique disclosed in Patent Document 2 shown in FIG. 9 must accurately compensate for the unbalanced load capacitance and wiring resistance between the wirings 1 and 2 with the dummy pattern. The characteristics of the dielectric layer between the reference potential pattern and the reference potential pattern must be comprehensively taken into consideration, and must be designed, prototyped, verified, and trimmed, and accurate compensation was difficult.

The matrix optical device of the present invention has the following configuration in order to solve the above problems.
That is, the substrate in which the gate lines in the row direction and the data lines in the column direction are arranged in a matrix and the pixels are arranged at the intersections of the gate lines and the data lines, and the gate drive circuit and the data lines for driving the gate lines are arranged. In a matrix optical device that performs matrix driving with a data driving circuit to be driven, a connection terminal group that supplies pixel data from the outside is provided in the data driving circuit, and a plurality of wirings that transmit pixel data from the connection terminal group to the data driving circuit are provided. A plurality of wirings connected to the terminals of the connection terminal group from the both ends of the connection terminal group in the vicinity of the central position of the connection terminal group and a terminal part of the connection terminal group near the central position. It is characterized in that a wiring group consisting of these wirings is arranged.

  Thereby, the difference in length of each data line is reduced, and the phase difference or time difference between the pixel data can be kept within an allowable range. As a result, the writing operation of the pixel data to each pixel is performed accurately, and the display quality can be kept good.

  The connection terminal group for supplying pixel data from the outside to the data driving circuit is divided into a first terminal group and a second terminal group, and the first terminal group is provided on the side of the substrate where the data driving circuit is arranged. Arranging a second terminal group on a side orthogonal to the side on which the data driving circuit is arranged, and a wiring group passing through the first terminal unit corresponding to the terminal unit in the vicinity of the center position of the first terminal group; Arrange the wiring group so that it is connected to the data drive circuit via the third terminal part, together with the wiring group via the second terminal part corresponding to the terminal part near the center position of the second terminal group. May be.

  As a result, the path of each data line to the gate drive circuit is made uniform, the difference in length between the data lines is reduced, the pixel data is accurately written to each pixel, and the display quality is improved. It becomes possible to keep.

  The third terminal portion is preferably provided in the vicinity of the intermediate position between the first terminal portion and the second terminal portion.

  As a result, the difference in length of each wiring group from the first terminal and the second terminal is reduced, the writing operation of the pixel data to each pixel is accurately performed, and the display quality can be kept good. .

  The matrix optical device is preferably a liquid crystal optical device using a silicon substrate. As a result, a high-quality optical device can be realized using a liquid crystal matrix formed on a silicon transistor substrate.

  According to the present invention, the problem of deterioration in display quality caused by the difference in the length of each data line in a matrix drive type display device is also overcome, and even a high-definition optical apparatus having a large number of pixels has high quality. An optical device can be realized.

It is a top view which shows the structure of 1st Embodiment of the matrix optical apparatus of this invention. It is a top view which shows the partial structure of FIG. It is a top view which shows the effect of 1st Embodiment of the matrix optical apparatus of this invention. It is a top view which shows the structure of 2nd Embodiment of the matrix optical apparatus of this invention. It is a top view which shows the single manufacturing method of the matrix optical apparatus shown in FIG. It is a top view which shows the manufacturing method by many pieces of the matrix optical apparatus shown in FIG. It is a top view which shows the structural example of the dot matrix display apparatus of a prior art example. It is a top view which shows the partial structure of FIG. It is a top view which shows roughly the wiring of the data line of the liquid crystal optical device of a prior art example. It is an equivalent circuit diagram which shows the basic structure of a general liquid crystal optical device.

  Hereinafter, the structure of the matrix optical device according to the best embodiment of the present invention will be described in detail with reference to the drawings.

[Description of First Embodiment: FIGS. 1 to 3 and FIG. 10]
The structure and configuration of the matrix optical device 50 according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 3 and FIG. 1 is a plan view showing the structure and configuration, FIG. 2 is a plan view showing a partial configuration of FIG. 1, FIG. 3 is a plan view showing the effect, and FIG. 10 is a basic view of a liquid crystal optical device. It is an equivalent circuit diagram which shows a structure. In the present embodiment, an active matrix type liquid crystal optical device is exemplified as the matrix optical device, but it can be realized by using an EL (Electro-Luminescence) display device, a plasma light emitter display device, or the like in addition to the liquid crystal optical device. It is.

(General description of liquid crystal optical device)
First, the basic structure of an active matrix type liquid crystal optical device will be described with reference to FIG. In FIG. 10, the display panel unit 201 of the liquid crystal optical device has a two-dimensional arrangement (for example, n rows × m columns) of pixels GS that display images and data using the alignment characteristics of the liquid crystal on the lower substrate 100. )

  In order to drive these n × m pixels GS, a gate driving circuit 300 and a data driving circuit 400 for controlling pixel data to be written in the pixel GS are provided. Further, a connection terminal group PD is provided for supplying a control signal sb from an external circuit (not shown) to the gate driving circuit 300 and the data driving circuit 400.

  Further, in order to control pixel data written to the pixel GS, a plurality of gate lines g and a plurality of data lines d are provided so as to be orthogonal to each other in the row direction and the column direction.

  Each pixel GS includes a transistor TFT that switches display data from the data line d by a gate signal from the gate line g, and a common electrode (not shown) provided in common to the pixel GS and the pixel electrode. An equivalent capacitance Ce of stored liquid crystal molecules and a storage capacitance Cm configured in parallel to the equivalent capacitance Ce and for holding a signal voltage applied to the equivalent capacitance Ce are provided.

  In the display panel unit 201 having such a configuration, display data corresponding to one row of pixels supplied from an external circuit (not shown) is sequentially stored in the data driving circuit 400. On the other hand, a control signal sb supplied from an external circuit (not shown) sequentially drives the gate line g through the gate driving circuit 300, and the selection state in which display data can be taken in by turning on the transistor TFT of the pixel GS in each row. Set to.

  In synchronization with the selection timing of the pixel GS group in each row, the display data is supplied to each pixel GS all at once by each data line d, and the liquid crystal molecules change the alignment state according to the pixel data voltage. Image information is displayed on the display panel unit 201 by performing a predetermined gradation display operation.

  At this time, since the length of the wiring for supplying the control signal sb differs depending on the position drawn from the connection terminal group PD, there is a phase difference or a time difference, and the display quality deteriorates when the timing applied to the pixels is shifted. The present invention solves this problem.

(Description of the structure of the matrix optical device of the present invention)
The configuration of the first embodiment of the matrix type optical device of the present invention will be described with reference to FIGS. FIG. 1 is a plan view showing a configuration of a liquid crystal optical device which is a matrix type optical device of the present invention. FIG. 2 is a plan view showing a partial configuration of FIG.

  In FIG. 1, a liquid crystal optical device 50 includes an optical unit 200 configured by a dot matrix liquid crystal display element, a lower substrate 100, a gate driving circuit 300 configured on the lower substrate 100, a data driving circuit 400, wirings, and the like. It consists of group HB. The wiring group HB3 is shown by a bold line, but simply shows a plurality of data wirings.

  The optical unit 200 forms a matrix pixel by arranging a glass substrate on the lower substrate 100 and injecting liquid crystal between the substrate 100 and the glass substrate. The lower substrate 100 uses silicon in this embodiment, and is generally called LCOS as an optical device.

  As shown in FIG. 1, in the embodiment, each row and column is composed of 1050 sections, and the number of pixels is 1050 × 1050 pixels (Pixels).

  The connection terminal group PD is a connection terminal group for supplying pixel data and control signals from the outside. In this embodiment, pixel data and control signals from an external device (not shown) are 210 data wires d1 to d210 (hereinafter abbreviated as data wires dn), data control lines dc, gates Input to line gc.

  The respective data wirings dn are gathered to the terminal part T provided in the vicinity of the central part PDC of the connection terminal group PD through the routing part hm, and are further collected as a wiring group HB from the terminal part T to drive data. Input to the circuit 400.

  As shown in FIG. 1, the terminal portion T is a collection of all wirings routed through the routing portion hm near the center position of the connection terminal group PD. In the routing portion hm, all the wirings of the connection terminal group PD are routed in order from the end of the connection terminal group PD to the substantially central portion PDC of the connection terminal group PD, and all the wirings in the routing portion hm. Are formed symmetrically with respect to the central portion PDC of the connection terminal group PD.

  The data control line dc is input to a control circuit SG of the data driving circuit 400 described later, and the gate line gc is input to the gate driving circuit 300 to control the writing timing of pixel data to the optical unit 200.

  The data driving circuit 400 includes five transmission gates TG1 to TG5 for supplying the data wiring dn to the optical unit 200 at a predetermined timing, and each of the transmission gates has a data wiring dn. Five control circuits SG for controlling the timing of writing 210 data signals at once are provided.

  The gate driving circuit 300 controls writing of pixel data of 210 (number of data wiring lines) × 5 (number of transmission gates) = 1050 points supplied from the data driving circuit 400 to the 1050 rows of the optical unit 200. And 1050 points of pixel data are collectively written in a predetermined row of the optical unit 200 by the gate line gc.

  In the matrix optical device 50 according to the present embodiment, all 210 data wirings of the routing portion hm drawn from the connection terminal group PD are concentrated in the terminal portion T near the center position of the connection terminal group PD. The difference in the length of the data wiring does not exceed the length of the data wiring region Pd1 indicated as “L” in FIG.

  Further details will be described with reference to FIG. FIG. 2 is a partially enlarged plan view of the connection terminal group PD, the routing portion hm, the terminal portion T, and the wiring group HB shown in FIG.

  As shown in FIG. 2, the connection terminal group PD includes a data wiring region Pd1 and a data wiring region Pd2 on both sides of the central portion PDC, and the data wiring region Pd1 and the data wiring region Pd2 are used for data respectively. The wirings d1 to d105 and the data wirings d106 to d210 are led out and gathered at the terminal portion T provided in the vicinity of the central portion PDC, and the 210 data wirings dn are collected from the terminal portion T into the wiring group HB. Input to the data driving circuit 400. Further, the routing portion hm is formed symmetrically with the central portion PDC of the connection terminal group PD.

As shown in FIG. 2, the difference between the wiring lengths of the data wirings d1 to d105 is the dimension of the maximum Pd1, that is, does not exceed L. Similarly, the difference between the wiring lengths of the data wirings d106 to d210 is the dimension of the maximum Pd2, and does not exceed L similarly. Even when the data wiring dn is concentrated in the entire range of the data wiring area Pd1 or the data wiring area Pd2 as in the ultra-fine display device, the difference in wiring length between the data wirings dn exceeds L. Absent.

  Further, the effects of the liquid crystal optical device 50, which is the matrix optical device of the present invention, will be described with reference to FIGS. 3 (a) and 3 (b). FIG. 3A is a plan view schematically showing a state in which the data wiring dn in the liquid crystal optical device 50 which is the matrix optical device of the present invention is laid out in a concentrated manner in the wiring group HB using the terminal portion T. FIG. 3B is a plan view schematically showing a state in which all the data wirings are routed from the connection terminal group PD to one side via the relay point C without providing the terminal portion T.

  Comparing FIG. 3A and FIG. 3B showing the configuration of the present invention, the difference in the length of each data wiring dn from the connection terminal group PD to the data driving circuit 400 is shown in FIG. In (b), it is about 2L.

  On the other hand, in the liquid crystal optical device 50 of the present invention shown in FIG. 3A, the difference in the length of each data wiring dn from the connection terminal group PD to the data driving circuit 400 is about L, It is 50% better than the configuration of FIG. That is, the effect of the present invention is that the difference in length between the data wirings dn is greatly reduced, so that the phase difference or time difference of the pixel data written to each pixel is reduced and the display image quality is improved.

  The second embodiment of the matrix optical device according to the present invention corresponds to a large number of data wirings in a high-definition optical device or the like. Therefore, a connection terminal group for supplying pixel data from the outside is divided into a first terminal group and a second terminal group. It is divided into terminal groups.

  Further, a first terminal portion for collecting data wiring from the first terminal group is provided in the vicinity of the center position of the first terminal group, and data wiring from the second terminal group is integrated in the vicinity of the center position of the second terminal group. A second terminal portion is provided, and a third terminal portion is newly provided to combine the first terminal portion and the wiring group via the second terminal portion.

  Through this third terminal section, all the data lines are concentrated and connected to the data drive circuit, thereby reducing the phase difference or time difference between the data lines, that is, between the pixel data. The image quality is improved.

  Further, the third terminal part is characterized in that it is provided in the vicinity of an intermediate position between the first terminal part and the second terminal part.

  Further details will be described with reference to FIG. FIG. 4 is a plan view showing the configuration of a second embodiment of a liquid crystal optical device 60 which is a matrix optical device of the present invention. As shown in FIG. 4, when a large amount of data wiring d1 to d420 is provided in a high-definition optical device or the like, two connection terminal groups PD, such as connection terminal groups PD1d1 to d210 and connection terminal groups PD2d211 to d420, are provided. And arranged on two adjacent sides of the lower substrate 100.

  Further, each of the data lines d1 to d210 and the data lines d211 to d420 from the connection terminal group PD1 and the connection terminal group PD2 is collectively concentrated at a substantially central portion of each connection terminal group. The concentrated arrangement portion of the wiring group HB1 is defined as a first terminal portion T1, and the concentrated arrangement portion of the wiring group HB2 is defined as a second terminal portion T2.

  Further, a third terminal portion T3 is provided at substantially the center of the connection terminal group PD1 and the connection terminal group PD2, and the wiring group HB1 and the wiring group HB2 are further concentrated as the wiring group HB3 by the terminal portion T3, and are arranged in the gate drive circuit. Route all the way up. Here, the wiring group HB1, the wiring group HB2, and the wiring group HB3 are shown by bold lines, but a plurality of data wirings are simply shown in the same manner as the wiring group HB shown in FIG. In this embodiment, each of the wiring group HB1 and the wiring group HB2 is composed of 210 data wirings, and the wiring group HB3 is composed of 420 data wirings.

  In this way, the terminal T3 is arranged at substantially the center of the first terminal portion T1 and the second terminal portion T2, and the wiring distance between the wiring group HB1 and the wiring group HB2 is made equal to be input to the data driving circuit 400 as the wiring group HB3. The image quality is improved by reducing the phase difference or time difference between the pixel data.

(Description of manufacturing method)
Next, the configuration of the matrix optical device 60 according to the second embodiment of the present invention and the manufacturing method using the assembly method will be described with reference to FIGS.

  FIG. 5 is a plan view showing a single configuration of a liquid crystal optical device 60 which is a completed matrix display device. FIG. 6 is a plan view showing a manufacturing process by an assembly method using a large-sized silicon substrate and a large-sized glass substrate.

  In FIG. 5, a liquid crystal optical device 60 includes an optical unit 200, a pad unit (connection terminal group) 700, an optical unit on a lower substrate 100 which is a silicon substrate provided with each semiconductor circuit and each wiring (not shown). After sealing part 500 is formed and liquid crystal is injected into seal part 500, glass substrate 600 having the same size as lower substrate 100 is overlaid, and seal part 500 is cured by UV irradiation or the like. The liquid crystal optical device 60 is configured by bonding the substrate 100 and the glass substrate 600.

  Further, the liquid crystal optical device 60 adheres the lower substrate 100 and the glass substrate 600 while being slightly shifted in the diagonal direction to expose two orthogonal sides of the lower substrate 100, and two exposed pad portions ( A connection terminal group) is provided.

  Next, a manufacturing method of the liquid crystal optical device by the collective method will be described with reference to FIGS. FIG. 6A is a plan view of the large-sized silicon substrate 101 and a plan view of the large-sized glass substrate 601 showing a state in which the liquid crystal optical device 60 is manufactured by the assembly method.

  FIG. 6A shows a large-sized silicon substrate 101 on which a plurality of lower substrates 100 provided with each element in the liquid crystal optical device 60 shown in FIG. 5 are formed, and a large-sized glass substrate 601 having the same size as the large-sized silicon substrate. In this state, the large-sized silicon substrate and the large-sized glass substrate are bonded in the diagonal direction by the same amount as the shift amount between the silicon substrate 100 and the glass substrate 600 shown in FIG.

  Then, the large-sized silicon substrate 101 is cut along the cutting line A (shown by a solid line) and the large-sized glass substrate 601 is cut along the cutting line B (shown by a dotted line). By cutting 601, the liquid crystal optical device 60 shown in FIG. 6B is mass-produced.

As described above, in the assembly method of the liquid crystal optical device 60 according to the present invention, the large-sized silicon substrate 101 and the large-sized glass substrate 601 having the same size are used, and both the large-sized silicon substrate 101 and the large-sized glass substrate 601 are cut wastefully. Since no part is produced, the liquid crystal optical device 6
0 can be mass-produced efficiently.

  In addition, exposed portions for providing pad portions (connection terminal groups) can be formed on the two sides of the liquid crystal optical device 60. That is, the present invention devise wirings from two pad portions 700 provided on two orthogonal sides in the liquid crystal optical device 60 manufactured efficiently as described above.

  As described above, in the liquid crystal optical device 60 of the present invention, each half of the plurality of data wirings is collectively collected as a wiring group by the first terminal unit T1 and the second terminal unit T2, and two more data wirings are combined. Since the wiring group is centrally arranged and routed as a single wiring group by the newly provided third terminal portion T3, the phase difference or time difference between the pixel data signals is reduced and the display quality of the liquid crystal optical device is improved. To do.

  Note that providing an output buffer circuit at the positions of the first to third terminal portions T1 to T3 to enhance the signal is also an effective method for further improving the display quality.

  As described above, according to the matrix optical device of the present invention, the phase difference or time difference between data signals, that is, each pixel data is decreased without increasing the cost by a simple method, and the image quality of the liquid crystal optical device is reduced. It is extremely useful as a display device for liquid crystal optical devices and reflective or transmissive projectors.

1A, 1B Display area 1C Dividing boundary line 3 Dummy wiring 5 Signal input unit 7 Additional capacitance unit 8A, 8B Data wiring group 10 Display device 50, 60 Liquid crystal optical device (matrix optical device)
100 Lower substrate 101 Large format silicon substrate 200 Optical unit 300 Gate drive circuit 400 Data drive circuit 500 Seal unit 600 Glass substrate 601 Large format glass substrate 700 Pad unit C Relay point GA Pixel array T Terminal unit T1, T2, T3 First, second , Third terminal part PD connection terminal group PD1, PD2 first and second terminal group PDC central part Pds control line area Pd1, Pd2 data wiring area
d, d1, d2,... dn data wiring dc data control line g, gc gate line KS switching signal control circuit HB, HB1, HB2, HB3 wiring group hm routing unit SG control circuit TG1, TG2,. TGn Transmission gate circuits S1, S2,... Sn Control circuit elements SCK1, SCK2 Clock signal SD1, SD2 Data line drive circuit GP, GS Pixel Cm Storage capacity Ce Liquid crystal molecule equivalent capacity sb Control signal ds, de Data wiring

Claims (5)

A substrate in which gate lines in the row direction and data lines in the column direction are arranged in a matrix and pixels are arranged at intersections of the gate lines and the data lines, a gate driving circuit for driving the gate lines, and the data In a matrix optical device that performs matrix driving with a data driving circuit that drives lines,
A connection terminal group for supplying pixel data from the outside to the data driving circuit is provided, and a plurality of wirings for transmitting pixel data from the connection terminal group to the data driving circuit are provided.
A routing portion for routing the wiring connected to the terminal of the connection terminal group in the vicinity of the center position of the connection terminal group in order from both ends of the connection terminal group;
A terminal portion near the center position of the connection terminal group;
A matrix optical device, wherein a wiring group composed of the plurality of wirings is arranged via a line. The connection terminal group is divided into a first terminal group and a second terminal group, the first terminal group is disposed on the side of the substrate on which the data driving circuit is disposed, and the data driving circuit is disposed. Arranging the second terminal group on a side orthogonal to the side,
A group of wires via a first terminal portion corresponding to the terminal portion in the vicinity of the center position of the first terminal group;
The wiring group is connected to the data driving circuit via the third terminal portion, with the wiring group passing through the second terminal portion corresponding to the terminal portion in the vicinity of the center position of the second terminal group. 2. The matrix optical device according to claim 1, wherein the matrix optical device is arranged.   3. The matrix optical device according to claim 2, wherein the third terminal portion is provided near an intermediate position between the first terminal portion and the second terminal portion.   The matrix optical device according to claim 1, wherein the matrix optical device is a liquid crystal optical device using a silicon substrate.   The matrix optical device according to claim 1, wherein the terminal unit is provided with a buffer circuit.

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