JP2014175634A - Method for manufacturing laminate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a laminate composed of a metallic base material and a dielectric layer formed on a surface thereof and capable of reducing warpage occurrence.SOLUTION: A method for manufacturing a laminate in which a dielectric layer 2 is formed on one surface of a metallic substrate 1 comprises a layer forming step, an annealing step, and a press step. The layer forming step forms the dielectric layer 2 on one surface of the base material 1 by a powder spray coating method. The annealing step anneals the dielectric layer 2 after the layer forming step. The press step presses a laminated material B of the base material 1 and the dielectric layer 2 in a lamination direction thereof after the annealing step.

Description

  The present invention relates to a method of manufacturing a laminated body such as a circuit board having a capacitor circuit and a thin film capacitor.

  Conventionally, this type of laminate has been formed having a metal foil, a dielectric layer, and an electrode layer. The dielectric layer is formed by laminating on one side of the metal foil. The electrode layer is formed by laminating on one surface of the dielectric layer (surface opposite to the metal foil) (see Patent Document 1).

  Thus, in a laminated body in which a plurality of layers having different thermal expansion coefficients are laminated, warpage may occur due to a difference in expansion and contraction behavior due to heat of each layer. Therefore, attempts have been made to reduce such warpage.

  For example, Patent Document 2 suppresses the warpage of the wiring substrate that occurs when several types of insulating layers having different shrinkage behaviors are mixed, by adjusting the amount of glass contained in the restraint sheet laminated on the front and back surfaces of the laminate. It is described to do. In this case, when a ceramic metal wiring board made of low-temperature sintered ceramic and metal wiring (metal powder or metal foil) as a wiring material is fired, warping occurs due to a difference in thermal expansion coefficient. Therefore, as a countermeasure, the occurrence of warpage is suppressed by adjusting the glass amount of the constraining sheets laminated on the front and back surfaces.

  Patent Document 3 describes that a capacitor structure is manufactured by forming a dielectric pattern on a metal foil, forming an electrode on the dielectric, and firing the dielectric and the electrode simultaneously. Has been. Co-firing of the dielectric and the electrode improves the cracking caused by the difference in coefficient of thermal expansion (TCE) between the electrode and the dielectric. In this case, when an electrode is formed on the dielectric on the metal foil and co-firing is performed, there is a difference in the coefficient of thermal expansion between the dielectric and the electrode, so stress is applied to the electrode, and the electrode is cracked. It will occur. Therefore, a dielectric is formed on the metal foil, and an electrode is formed on the metal foil with ink or paste, and simultaneous firing is performed so that stress generated in the electrode can be relieved.

JP 2012-204801 A JP 2004-327735 A JP 2004-134806 A

  However, in the invention described in Patent Document 2, since the restraint sheet is provided to suppress the warpage itself, the stress generated by the restraint sheet affects the performance (dielectric constant, capacitance, etc.) of the laminated body such as a thin film capacitor. May have an impact.

  In addition, in the invention described in Patent Document 3, although it is described that the stress generated by the difference in coefficient of thermal expansion between the dielectric and the electrode is reduced, the metal foil and the dielectric are laminated and fired. There is no mention of warping that occurs.

  The present invention has been made in view of the above points, and in producing a laminate comprising a metal substrate and a dielectric layer formed on the surface thereof, a laminate capable of reducing the occurrence of warpage. It aims at providing the manufacturing method of a body.

  A method for manufacturing a laminate according to the present invention is a method for manufacturing a laminate in which a dielectric layer is formed on one surface of a metal substrate, and includes a layer forming step, an annealing step, and a pressing step. In the layer forming step, the dielectric layer is formed on one surface of the base material by a powder spray coating method, and in the annealing step, the dielectric layer is annealed after the layer forming step. The pressing step is characterized by pressing the laminate of the base material and the dielectric layer in the stacking direction after the annealing step.

  In the present invention, in the layer forming step, the dielectric layer is preferably formed at a position away from the outer edge of the substrate.

  In the present invention, in the pressing step, pressing is preferably performed at a temperature equal to or higher than the softening point of the base material.

  In the present invention, in the layer forming step, it is preferable that a plurality of thick portions are formed in the dielectric layer so as to be separated from each other.

  In the present invention, the thick part is preferably formed as a capacitor part.

  In the present invention, it is possible to correct the warpage of the laminate produced in the annealing step by pressing in the press step, and to obtain a laminate with less warpage.

An example of embodiment of this invention is shown, (a)-(c) is sectional drawing. It is a top view which shows the laminated body B same as the above. An example of other embodiment of this invention is shown, (a)-(c) is sectional drawing.

  Hereinafter, modes for carrying out the present invention will be described.

  The present embodiment relates to a method of manufacturing a laminated body A in which a metal base 1 and a dielectric layer 2 containing a dielectric material are laminated.

  The substrate 1 is preferably formed of a conductive metal material such as copper (Cu), nickel (Ni), cobalt (Co), aluminum (Al), or platinum (Pt). The planar view shape of the base material 1 can be arbitrarily formed. For example, it can be formed in a rectangular shape in the planar view. As the substrate 1, a metal foil can be used. The thickness of the substrate 1 can be 10 to 100 μm, preferably 15 to 35 μm.

As dielectric materials contained in the dielectric layer 2, barium titanate (BaTiO ₃ ), lithium niobate (LiNbO ₃ ), lithium borate (Li ₂ B ₄ O ₇ ), lead zirconate titanate (PbZrTiO ₃₎ ), Strontium titanate (SrTiO ₃ ), lead lanthanum zirconate titanate (PbLaZrTiO ₃ ), lithium tantalate (LiTaO ₃ ), zinc oxide (ZnO), tantalum oxide (Ta ₂ O ₅ ), etc. The dielectric material can be used. The dielectric material may contain various additives in order to improve physical properties such as dielectric properties, insulating properties, and strength of the dielectric layer 2. The dielectric layer 2 may contain two or more of the above dielectric materials.

  In the present embodiment, a layer forming process, an annealing process, and a pressing process are provided.

  The layer forming step is a step of forming a dielectric layer 2 on one surface (one main surface) of the substrate 1 as shown in FIG. In this step, the dielectric layer 2 can be formed by a powder spray coating method. Examples of the powder injection coating method include a PJD (Powder Jet Deposition) method and an AD (Aerosol Deposition) method. By using the powder spray coating method, the dielectric constant can be improved even if the firing temperature is lowered. The conditions of the powder spray coating method are not particularly limited, and known conditions can be used for the average particle diameter, spray pressure, and the like of the dielectric material of the powder. The thickness of the dielectric layer 2 formed in this step can be 1 to 5 μm, preferably 2 to 3 μm.

  As shown in FIG. 2, the dielectric layer 2 can be formed in the same shape (similar shape) as the substrate 1 in plan view. The dielectric layer 2 is preferably formed at a position away from the outer edge of the substrate 1. That is, it is preferable that the outer edge 20 of the dielectric layer 2 is formed on the inner side with respect to the outer edge 10 of the substrate 1. Thus, by forming the dielectric layer 2 smaller than the base material 1 and not forming it on the entire surface of the base material 1, the influence of the shrinkage force of the dielectric layer 2 on the base material 1 can be reduced. Generation | occurrence | production of the curvature in an aryl process can be reduced. In order to obtain such an effect, when the substrate 1 has a rectangular shape in plan view, the dimension L between the outer edge 10 of the substrate 1 and the outer edge 20 of the dielectric layer 2 parallel thereto is 5 to 50 mm. , Preferably 10 to 20 mm.

An annealing process is a process of heat-processing (baking process) the laminated body B of the base material 1 and the dielectric material layer 2 after a layer formation process. The dielectric layer 2 is crystallized and sintered by an annealing process. The annealing process can be performed at a temperature of 850 to 1000 ° C. for 5 to 12 hours, and preferably at a temperature of 850 to 900 ° C. for 10 to 11 hours. At this time, since the metallic substrate 1 and the dielectric layer 2 are fired at the same time, the laminate B is warped due to the difference in thermal expansion coefficient as shown in FIG. There is. For example, copper (Cu) has a linear expansion coefficient of 17 × 10 ⁻⁶ / ° C., and barium titanate (BTO) has a linear expansion coefficient of 15.7 × 10 ⁻⁶ / ° C. When the dielectric layer 2 is formed, the laminate B may be warped so that the dielectric layer 2 side is bent. If the laminate B in such a warped state is incorporated in the wiring board as a capacitor, for example, there is a problem in conformity with the electrode pattern of the wiring board and there is a risk of poor connection. Therefore, in this embodiment, the pressing process is performed after the annealing process.

  The pressing step is a step of pressing (pressing) the laminate B that has been warped by the annealing step. The direction in which the laminate B is pressed is the lamination direction (thickness direction) of the base material 1 and the dielectric layer 2. For example, as shown in FIG. 1C, the laminate B can be sandwiched and pressed by a pair of press machines P. The flat laminate A having almost no warpage can be obtained by correcting the warpage of the laminate B by a pressing process. In the pressing step, a vacuum hot press that pressurizes the laminate B while heating it under vacuum can be employed. This makes it easy to flatten the laminate B by heating while preventing the base material 1 from being oxidized. The conditions for the pressing step are preferably a pressure of 1 to 3 MPa, a temperature of 200 to 240 ° C., and a time of 20 to 50 minutes. More preferable conditions for the pressing step can be a pressure of 1 to 1.5 MPa, a temperature of 200 to 220 ° C., and a time of 25 to 35 minutes. The heating rate during heating is 10 to 25 ° C./min, preferably 10 to 15 ° C./min. When the rate of temperature rise is within the predetermined range, the warp of the laminate B can be more easily corrected.

  The pressing step is preferably performed at a temperature equal to or higher than the softening point of the substrate 1. Thereby, it can pressurize in the state which softened substrate 1, and it becomes easy to correct curvature of layered product B more. When pressurization is performed at a temperature lower than the softening point of the base material 1, the base material 1 is not sufficiently stretched and wrinkles are likely to be generated, and wrinkles may remain in the laminate. Such a wrinkle may cause a dimensional deviation from a predetermined position when the laminated body is built in a wiring board as a capacitor, for example. In addition, when the base material 1 is copper (Cu), since a softening point is about 200 degreeC, a press process can be performed at the temperature beyond this.

  And the laminated body A obtained through each said process correct | amends the curvature which arose in the annealing process by the press in a press process, and can reduce generation | occurrence | production of a curvature. Therefore, the process for incorporating the laminate A into a wiring board or the like is simplified, and dimensional deviation from a predetermined position due to warpage or wrinkles is less likely to occur.

  FIG. 3 shows another embodiment. In this laminate A, a plurality of thick portions 21 and a plurality of thin portions 22 are formed in the dielectric layer 2. The thick part 21 is formed thicker than the thin part 22. The thickness of the thick part 21 can be set to 1 to 5 μm, preferably 2 to 3 μm. The thickness of the thin portion 22 can be 60 to 80% of the thickness of the thick portion 21. The thin portion 22 is formed between the adjacent thick portions 21 and 21. Therefore, the adjacent thick portions 21 and 21 are formed to be separated from each other via the thin portion 22. As the metal material of the substrate 1 and the dielectric material of the dielectric layer 2, the same materials as described above can be used.

  In manufacturing the laminated body A having a plurality of thick portions 21 and thin portions 22 in the dielectric layer 2, the layer forming step, the annealing step, and the pressing step can be performed.

  The layer formation step can be performed in the same manner as described above, but when forming the dielectric layer 2 by the powder spray coating method, for example, by increasing or decreasing the amount of the dielectric material attached to the base material 1, 21 and the thin portion 22 can be formed separately.

  The annealing step can be performed in the same manner as described above. At this time, even if the thick portion 21 and the thin portion 22 are formed in the dielectric layer 2, the same warp as described above occurs in the laminate B.

  The pressing step can be performed in the same manner as described above. At this time, even if the thick portion 21 and the thin portion 22 are formed in the dielectric layer 2, they are hardly affected by these, and the warp is corrected and the laminate B is flattened in the same manner as described above. Can do.

  And the laminated body A obtained through each said process correct | amends the curvature which arose in the annealing process by the press in a press process, and can reduce generation | occurrence | production of a curvature.

  The multilayer body A having a plurality of thick portions 21 and thin portions 22 in the dielectric layer 2 can be divided into individual pieces to form a plurality of thin film capacitors C. In this case, first, the conductor layer 3 is formed on the surface of the laminate A on the dielectric layer 2 side. The conductor layer 3 can be formed by sputtering, plating, conductive paste, or the like. As the metal material used in the conductor layer 3, the same metal material as the base material 1 can be used. The conductor layer 3 can be formed so as to cover the entire dielectric layer 2. The surface (outer surface) of the conductor layer 3 can be formed flat. The thickness of the conductor layer 3 can be formed to be equal to the thickness range of the substrate 1 described above.

  Next, patterning is performed on the base material 1 and the conductor layer 3 of the laminate A. This patterning processes the base material 1 and the conductor layer 3 into a desired shape. Patterning can be performed by, for example, laser processing or etching. The first electrode 4 is formed from the substrate 1 and the second electrode 5 is formed from the conductor layer 3 by patterning. The first electrode 4 and the second electrode 5 are disposed to face each other with the thick portion 21 interposed therebetween. Moreover, the part which covers the thin part 22 is removed from the base material 1 and the conductor layer 3 by patterning, and the thin part 22 is exposed. Moreover, the planar view WHEREIN: The 1st electrode 4 and the 2nd electrode 5 are formed smaller than the thick part 21, and the peripheral edge part of the thick part 21 is exposed.

  Next, a boundary portion (shown by a broken line in FIG. 3C) between the thick portion 21 and the thin portion 22 is cut. Thereby, the thin film capacitor C which consists of the 1st electrode 4, the 2nd electrode 5, and the thick part 21 can be formed. In the thin film capacitor C, the thick part 21 is formed as a capacitor part (a part in which a conductor layer is formed in a dielectric part and the dielectric part is sandwiched between conductor layers (electrodes)).

  And the thin film capacitor C obtained through each said process uses the laminated body A by which the curvature produced in the annealing process was corrected by the press in a press process. Therefore, the occurrence of warpage of the thin film capacitor C can be reduced, and flatness can be ensured. Therefore, the process when the thin film capacitor C is built in the wiring board or the like is simplified, and dimensional deviation from a predetermined position due to warpage or wrinkles is less likely to occur.

  Hereinafter, the present invention will be specifically described by way of examples.

Example 1
As the base material 1, a copper foil having a size of 120 mm × 120 mm and a thickness of 35 μm is used. The dielectric layer 2 is formed on one side (one surface) of the substrate 1 in the layer forming step. At this time, barium titanate is used as the dielectric material. The dielectric layer 2 has a size of 100 mm × 100 mm and a thickness of 3 μm. Accordingly, the outer edge 10 of the substrate 1 and the outer edge 20 of the dielectric layer 2 parallel to the outer edge 10 are separated by 10 mm. The PJD method is used as the powder spray coating method.

  In the annealing step, heat treatment is performed on the laminate B obtained in the layer forming step. The condition at this time is 10 hours at a temperature of 850 ° C.

  In the pressing step, pressing (vacuum hot pressing) is performed on the laminate B heat-treated in the annealing step. The conditions at this time are a pressure of 1 MPa, a temperature of 200 ° C. (a temperature equal to or higher than the softening point of the substrate 1), a time of 30 minutes, and a temperature rising rate of 10 ° C./min.

  In this way, the laminate A is produced.

(Example 2)
In the layer forming step, the base material 1 and the dielectric layer 2 are made the same size, and the outer edge 10 of the base material 1 and the outer edge 20 of the dielectric layer 2 are matched to form the dielectric layer 2. Except for this configuration, the laminate A is manufactured in the same manner as in Example 1.

(Example 3)
In the pressing step, pressing is performed at a temperature of 150 ° C. (temperature lower than the softening point of the substrate 1). Except for this configuration, the laminate A is manufactured in the same manner as in Example 1.

Example 4
In the layer forming step, the dielectric layer 2 having the thick portion 21 and the thin portion 22 is formed. The thick portion 21 has a size of 25 mm × 100 mm and a thickness of 3 μm. The thin portion 22 has a size of 5 mm × 100 mm and a thickness of 2 μm. Except for this configuration, the laminate A is manufactured in the same manner as in Example 1.

(Comparative example)
A laminate A is produced in the same manner as in Example 1 except that the pressing step is not performed.

  About the laminated board A of the Example and comparative example obtained above, the curvature after a press process and generation | occurrence | production of the wrinkle of the base material 1 after a press process are evaluated. The amount of warpage was measured by placing the laminate A on a flat table and measuring the height of the highest point of warpage. . When the amount of warpage is less than 0.5 mm, it is evaluated as “good”, when the amount of warpage is 0.5-3 mm, it is evaluated as “no problem in practice”, and when the amount of warpage exceeds 3 mm, “bad” ". For the generation of wrinkles, the surface of the base material 1 is visually confirmed, and those having almost no wrinkles are evaluated as “good”, and those having wrinkles to the extent that there is no practical problem are “no problem in practice”. If a flaw with a problem in practical use occurs, it is evaluated as “bad”. The results are shown in Table 1.

A laminate B laminate 1 substrate 10 outer edge of substrate 2 dielectric layer 20 outer edge of dielectric layer 21 thick part

Claims (5)

  A method of manufacturing a laminate in which a dielectric layer is formed on one surface of a metal substrate, comprising: a layer forming step, an annealing step, and a pressing step, wherein the layer forming step The dielectric layer is formed on the surface by a powder spray coating method, the annealing step is to subject the dielectric layer to an annealing treatment after the layer forming step, and the pressing step is the annealing step. After that, the laminate of the base material and the dielectric layer is pressed in the laminating direction.   The method for manufacturing a laminate according to claim 1, wherein, in the layer forming step, the dielectric layer is formed at a position away from an outer edge of the base material.   In the said press process, it presses at the temperature more than the softening point of the said base material, The manufacturing method of the laminated body of Claim 1 or 2 characterized by the above-mentioned.   4. The method for manufacturing a laminate according to claim 1, wherein in the layer formation step, a plurality of thick portions are formed in the dielectric layer so as to be separated from each other. The method for manufacturing a laminate according to any one of claims 1 to 4, wherein the thick portion is formed as a capacitor portion.

Images