JP2014175512A - Semiconductor light-emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device which suppresses deterioration in luminous efficiency due to a droop phenomenon.SOLUTION: The semiconductor light-emitting device includes: a support substrate; a first electrode disposed on the support substrate; a first semiconductor layer disposed on the first electrode and formed of a p-type semiconductor; a light-emitting layer disposed on the first semiconductor layer; a current diffusion layer disposed on the light-emitting layer and having a structure in which an undoped layer formed of an i-type semiconductor and a doped layer formed of an n-type semiconductor are alternately laminated; a second semiconductor layer disposed on the current diffusion layer and formed of an n-type semiconductor; and a second electrode partially disposed on the second semiconductor layer.

Description

  The present invention relates to a semiconductor light emitting device, and more particularly to a high brightness type semiconductor light emitting device.

  A semiconductor light emitting device (LED) using a nitride semiconductor such as GaN can emit ultraviolet light or blue light, and can emit white light by using a phosphor. Such LEDs are classified into, for example, a low luminance type or a small current type (for example, Patent Document 1) and a high luminance type or a large current type (for example, Patent Document 2).

  A small current type nitride-based LED, for example, grows an n-type GaN layer, an active layer (light emitting layer) containing GaN, and a p-type GaN layer in this order on a growth substrate made of sapphire. A part of the layer is etched to expose the n-type GaN layer, and electrodes are formed on the exposed n-type GaN layer and on the surface of the p-type GaN layer. The manufacturing method of the low current type LED is very simple. However, the sapphire substrate generally used for the growth substrate is inferior in heat dissipation because of its relatively low thermal conductivity. For this reason, it is not suitable as a support substrate for a large current type LED that can generate a high current and generate heat at a high temperature.

  For example, a high-current type nitride-based LED is formed by sequentially growing an n-type GaN layer, an active layer containing GaN, and a p-type GaN layer on a growth substrate made of sapphire, and forming a p-side electrode on the p-type GaN layer surface. The p-side electrode is bonded to a support substrate made of Cu, Si or the like having excellent heat dissipation, and the growth substrate is peeled off from the n-type GaN layer. An electrode is formed and manufactured. By using Cu, Si, or the like that is excellent in heat dissipation for the support substrate, a decrease in reliability due to heat generation of the large current type LED is suppressed.

JP 2000-286509 A JP 2012-074501 A

  A semiconductor light emitting device has a problem that light emission efficiency is reduced when a large current is supplied (a so-called Drop phenomenon). An object of the present invention is to provide a semiconductor light emitting device that suppresses a decrease in light emission efficiency due to a Drop phenomenon.

  According to a main aspect of the present invention, a support substrate, a first electrode disposed on the support substrate, a first semiconductor layer disposed on the first electrode and made of a p-type semiconductor, and the first A light-emitting layer disposed on the semiconductor layer; a current diffusion layer disposed on the light-emitting layer and having a structure in which an undoped layer made of an i-type semiconductor and a doped layer made of an n-type semiconductor are alternately stacked; and the current diffusion A second semiconductor layer made of an n-type semiconductor and a second electrode partially placed on the second semiconductor layer, wherein the current diffusion layer is formed from the second semiconductor layer. To the light emitting layer, a first undoped layer made of an i-type semiconductor, a first doped layer made of an n-type semiconductor, a second undoped layer made of an i-type semiconductor, a second doped layer made of an n-type semiconductor, and i Third undoped layer made of type semiconductor The semiconductor light-emitting device having a five-layer structure, is provided.

  By having the current diffusion layer, a decrease in light emission efficiency due to the Drop phenomenon is suppressed.

1A to 1C are a cross-sectional view and a plan view showing a semiconductor light emitting device according to an embodiment. , ,and 2A to 2L are cross-sectional views illustrating how the semiconductor light emitting device according to the embodiment is manufactured. FIG. 3A and FIG. 3B are graphs showing the Drop characteristics of the produced sample and reference. 4A and 4B are enlarged cross-sectional views showing the vicinity of a part of the n-side electrode in the semiconductor light emitting devices according to the reference examples and the examples.

  Hereinafter, a configuration of a semiconductor light emitting device (LED) according to an embodiment of the present invention will be described.

  1A to 1C are a cross-sectional view and a plan view showing an LED 100 according to an embodiment. FIG. 1A shows an IA-IA cross section in FIG. 1B. The relative sizes of the components shown in the figure are different from the actual ones.

  The LED 100 according to the embodiment mainly includes a p-side electrode 30 formed on the support substrate 12, an optical semiconductor stack 20 formed on the p-side electrode, and an n partially formed on the optical semiconductor stack 20. The side electrode 60 is included.

  As shown in FIG. 1A, the optical semiconductor stack 20 mainly includes a p-type semiconductor layer 28, an active layer (light emitting layer) 26, a current diffusion layer 24, and an n-type semiconductor layer 23. The p-type semiconductor layer 28 is made of, for example, GaN doped with p-type impurities (p-type GaN) and has a layer thickness of about 0.1 μm. The active layer 26 has a multiple quantum well structure including, for example, a barrier layer made of GaN and a well layer made of InGaN, and the thicknesses of the barrier layer and the well layer are each about 3 nm. The n-type semiconductor layer 23 is made of, for example, GaN doped with n-type impurities (n-type GaN) and has a layer thickness of about 3 μm.

  The current diffusion layer 24 has a semiconductor multi-layer structure in which undoped layers made of GaN (i-type GaN) to which impurities are not added and doped layers made of n-type GaN are alternately stacked. For example, it has a five-layer structure including a first undoped layer 24ia, a first doped layer 24na, a second undoped layer 24ib, a second doped layer 24nb, and a third undoped layer 24ic. The thicknesses of the first and second undoped layers 24ia and 24ib are about 10 nm to 500 nm, respectively. The thicknesses of the first and second doped layers 24na and 24nb are about 10 nm to 200 nm, respectively. The layer thickness of the third undoped layer 24ic is about 1 nm to 300 nm.

  A clad layer 27 may be provided between the p-type semiconductor layer 28 and the active layer 26. The clad layer 27 is made of p-type AlGaN, for example. Further, a strain relaxation layer 25 may be provided between the active layer 26 and the current diffusion layer 24. The strain relaxation layer 25 has, for example, a superlattice structure in which GaN layers and InGaN layers are alternately stacked. Further, a fine uneven structure layer, so-called micro cone structure layer (MC layer) 23mc may be formed on the surface of the n-type semiconductor layer 23 where the n-side electrode 60 is formed. By forming the microcone structure layer 23mc on the surface of the n-type semiconductor layer 23, light extraction efficiency (= light intensity emitted from the LED / light intensity emitted from the active layer) is improved.

  The p-side electrode 30 is formed between the support substrate 12 and the optical semiconductor stack 20 as shown in FIG. 1A. Further, it is in close contact with the optical semiconductor stack 20 (p-type semiconductor layer 28) and is supported on the support substrate 12 via the fusion layer 40. The p-side electrode 30 includes a member having a high light reflectance, and includes, for example, Ag.

  As shown in FIG. 1A, the n-side electrode 60 is partially formed on the surface of the optical semiconductor stack 20 (n-type semiconductor layer 23 to MC layer 23mc). For example, as illustrated in FIG. 1B, the planar shape of the n-side electrode 60 is a ladder shape including the pad portion 60a. The n-side electrode 60 has a metal multilayer structure in which, for example, a Ti layer or a Pt layer is laminated. The planar shape of the n-side electrode 60 may be a comb-like shape as shown in FIG. 1C, or a lattice shape. It would be preferable to have at least a portion that is shaped like a stripe.

  The support substrate 12 is a member (that is, a member excellent in heat dissipation) having a higher thermal conductivity than a sapphire substrate (thermal conductivity: about 42 W / m · K) generally used as a growth substrate for nitride-based semiconductors. (Thermal conductivity: about 149 W / m · K). The support substrate 12 is preferably composed of a member having a high thermal conductivity, for example, preferably composed of a member having a thermal conductivity of 100 W / m · K or more. Note that the contact electrode 70 may be provided on the surface of the support substrate 12.

  A power source 80 is connected to the pad portion 60 a of the n-side electrode 60 and the contact electrode 70 (or the p-side electrode 30), and supplies current to the optical semiconductor stack 20. The holes supplied from the p-side electrode 30 and the electrons supplied from the n-side electrode 60 recombine in the active layer 26, and the energy for the recombination is released as light (and heat). A part of the light emitted from the active layer 26 is directly emitted from a region on the surface of the n-type semiconductor layer 23 where the n-side electrode 60 is not disposed. The other part is reflected by the p-side electrode 30 having a high light reflectance, and is emitted from a region where the n-side electrode 60 on the surface of the n-type semiconductor layer 23 is not disposed.

  Hereinafter, with reference to FIG. 2A-FIG. 2L, the manufacturing method of LED100 by an Example is demonstrated. First, a semiconductor wafer on which the optical semiconductor stack 20 is grown on the growth substrate 11 is manufactured.

  A growth substrate 11 made of a C-plane sapphire substrate is prepared, and the growth substrate 11 is thermally cleaned. In addition to the sapphire, spinel, ZnO, or the like can be used for the growth substrate 11.

  Thereafter, as shown in FIG. 2A, an optical semiconductor stack 20 made of a nitride semiconductor is grown on the growth substrate 11 by metal organic chemical vapor deposition (MOCVD).

First, the low-temperature buffer layer 21 and the base layer 22 are grown on the growth substrate 11. Specifically, the temperature of the growth substrate 11 is set to 550 ° C., TMG (trimethylgallium) gas (flow rate: 20 μmol / min) and ammonia (NH ₃ ) gas (flow rate: 2 L / min) are supplied, and GaN is supplied. A buffer layer 21 (layer thickness: 20 nm) made of is grown. Subsequently, the temperature of the growth substrate 11 is set to 1050 ° C., TMG gas (flow rate: 40 μmol / min) and NH ₃ gas (flow rate: 4 L / min) are supplied, and the underlying layer 22 (layer thickness: 1 μm).

Thereafter, the n-type semiconductor layer 23 is grown. Specifically, while maintaining the temperature of the growth substrate 11 at 1050 ° C., TMG gas (flow rate: 40 μmol / min), NH ₃ gas (flow rate: 4 L / min), and silane (SiH ₄ ) gas are supplied. Te, n-type semiconductor layer 23 with Si of doped n-type GaN (impurity concentration ^{1 × 10 18 ~1 × 10 21} atoms / cm 3) ( thickness: 3 [mu] m) is grown.

Thereafter, a current diffusion layer 24 having a five-layer structure is grown. Specifically, TMG gas (flow rate: 40 μmol / min) and NH ₃ gas (flow rate: 4 L / min) are supplied while the temperature of the growth substrate 11 is maintained at 1050 ° C., and the growth substrate 11 is made of i-type GaN. A first undoped layer 24ia is grown. Subsequently, TMG gas (flow rate: 40 μmol / min), NH ₃ gas (flow rate: 4 L / min), and SiH ₄ gas are supplied, and Si-doped n-type GaN (impurity concentration of about 2 × 10 ^18). The first doped layer 24na made of atoms / cm ³ ) is grown. The same process is repeated alternately to sequentially grow the second undoped layer 24ib, the second doped layer 24nb, and the third undoped layer 24ic.

Thereafter, a strain relaxation layer 25 having a superlattice structure is grown. Specifically, the temperature of the growth substrate 11 is set to 850 ° C., and TEG (triethylgallium) gas (flow rate: 5.5 μmol / min) and NH ₃ gas (flow rate: 4 L / min) are supplied to form a GaN layer. (Layer thickness: 3 nm) is grown. Subsequently, a TEG gas (flow rate: 5.5 μmol / min), TMI (trimethylindium) gas (flow rate: 4 μmol / min), and NH ₃ gas (flow rate: 4 L / min) are supplied, and an InGaN layer (layer) (Thickness: 3 nm). Similar steps are repeated alternately to grow, for example, a strain relaxation layer 25 having a 20-layer structure.

Thereafter, an active layer (light emitting layer) 26 having a multiple quantum well structure is grown. Specifically, the temperature of the growth substrate 11 is set to 800 ° C., TEG gas (flow rate: 5.5 μmol / min) and NH ₃ gas (flow rate: 4 L / min) are supplied, and a GaN layer (barrier layer, (Layer thickness: 6 nm). Subsequently, a TEG gas (flow rate: 5.5 μmol / min), a TMI gas (flow rate: 6.5 μmol / min), and NH ₃ gas (flow rate: 4 L / min) were supplied, and an InGaN layer (well layer, Layer thickness: 3 nm). Similar processes are repeated alternately to grow, for example, an active layer 26 having a six-layer structure.

Thereafter, the cladding layer 27 is grown. Specifically, the temperature of the growth substrate 11 is set to 950 ° C., TMG gas (flow rate: 3.5 μmol / min), TMA (trimethylaluminum) gas (flow rate: 0.4 μmol / min), NH ₃ gas (flow rate: 4 L). / Min) and CP2Mg (biscyclopentadienylmagnesium) gas to supply a clad layer 27 (layer thickness: p-type AlGaN doped with Mg (impurity concentration: 1 × 10 ²⁰ atoms / cm ³ )) 20 nm).

Finally, a p-type semiconductor layer 28 having a two-layer structure with different impurity concentrations is grown. Specifically, while maintaining the temperature of the growth substrate 11 at 950 ° C., TMG gas (flow rate: 12 μmol / min), NH ₃ gas (flow rate: 4 L / min), and CP2Mg gas are supplied, and Mg A doped first p-type GaN layer (layer thickness: 0.1 μm, impurity concentration 5 × 10 ¹⁹ atoms / cm ³ ), and Mg-doped second p-type GaN layer (layer thickness: 5 nm, impurity concentration 2 × 10 ²⁰ atoms / cm ³ ).

  As described above, the optical semiconductor stack 20 made of a nitride-based semiconductor is grown on the growth substrate 11. Note that the composition ratio, impurity concentration, layer thickness, and the like of each layer of the optical semiconductor stack 20 can be controlled by adjusting the flow rates and supply times of various source gases.

  Next, as shown in FIG. 2B, an Ni layer and an Ag layer are stacked on the surface of the optical semiconductor stack 20 (the surface of the p-type semiconductor layer 28) by electron beam evaporation, and patterned by a lift-off method or the like to obtain a desired plane. A p-side electrode 30 having a shape is formed. The p-side electrode 30 includes a member having a high light reflectance, and preferably includes Ni, Ag, Pt, Al, Pd, and alloys thereof. An ohmic junction layer such as indium tin oxide (ITO) may be formed between the p-side electrode 30 and the surface of the optical semiconductor stack 20.

  Next, as shown in FIG. 2C, an Au layer that covers the p-side electrode 30 is formed by sputtering, and patterned by a lift-off method or the like to form a first adhesive layer 41. The first adhesive layer 41 may be formed after the p-side electrode 30 is covered and a diffusion prevention layer or the like is formed. The diffusion preventing layer prevents diffusion of members used for the p-side electrode 30. When the p-side electrode 30 contains Ag, Ti, W, Pt, Pd, Mo, Ru, Ir, Au, and alloys thereof can be used.

  Next, as shown in FIG. 2D, a photoresist pattern 51 is formed to cover the first adhesive layer 41, and the optical semiconductor stack 20 is formed into a plurality of elements (light emitting stack 29) by dry etching using chlorine gas. To divide. The planar shape of the light emitting laminate 29 is, for example, a square shape with one side of 1 mm. The photoresist pattern 51 is removed after dividing the optical semiconductor stack 20. Thus, the semiconductor wafer is completed.

Next, as shown in FIG. 2E, a support substrate 12 having a second adhesive layer 42 having a desired planar shape formed on the surface thereof is prepared. For the support substrate 12, a member having a thermal expansion coefficient close to that of sapphire (7.5 × 10 ⁻⁶ / K) or GaN (5.6 × 10 ⁻⁶ / K) is preferably used. For example, Si, Cu, Mo, W, CuW, AlN, or the like can be used. The second adhesive layer 42 includes a metal laminate made of, for example, Ti / Ni / Au / Pt / AuSn (Sn: 20 wt%). The members used for the first adhesive layer 41 (see FIG. 2C) and the second adhesive layer 42 (the uppermost layer of the metal stack) are Au-Sn, Au-In, Pd-In, which can be fusion bonded. A metal containing Cu—In, Cu—Sn, Ag—Sn, Ag—In, Ni—Sn, or the like, or a metal containing Au capable of diffusion bonding can be used.

  Next, as shown in FIG. 2F, the previously manufactured semiconductor wafer and the support substrate 12 are arranged to face each other so that the first adhesive layer 41 and the second adhesive layer 42 are in contact with each other, and the pressure is increased at 3 MPa. Hold for 10 minutes while heated to ° C. Then, it cools to room temperature and the 1st, 2nd contact bonding layers 41 and 42 are fusion-bonded.

  A layer in which the first and second adhesive layers 41 and 42 are fused is referred to as a fused layer 40. A structure in which the growth substrate 11 and the support substrate 12 hold the optical semiconductor stack 20 is referred to as a sandwich structure.

Next, as shown in FIG. 2G, the growth substrate 11 is removed from the sandwich structure by a laser lift-off method. Specifically, the optical semiconductor stack 20 is irradiated with KrF excimer laser light (wavelength: 248 nm, irradiation energy density: 800 to 900 mJ / cm ² ) from the growth substrate 11 side, and the optical semiconductor stack 20 in contact with the growth substrate 11 is irradiated. The interface (a part of the buffer layer 21 and the base layer 22, see FIG. 2A) is pyrolyzed. As a result, the growth substrate 11 and the optical semiconductor stack 20 are separated.

  Next, as shown in FIG. 2H, Ga generated by thermal decomposition of the optical semiconductor stack 20 (buffer layer 21 and base layer 22 made of GaN, see FIG. 2A) by the laser lift-off method is removed with hot water, and then Etch the surface with hydrochloric acid or sodium hydroxide. As a result, the n-type semiconductor layer 23 (see FIG. 2A) of the optical semiconductor stack 20 is exposed. Note that the n-type semiconductor layer 23 of the optical semiconductor stack 20 may be exposed by dry etching or polishing using Ar plasma or chlorine plasma.

  Next, as shown in FIG. 2I, an MC layer 23mc is formed on the exposed n-type semiconductor layer surface. Specifically, the n-type semiconductor layer surface is wet-etched with a TMAH (phenyltrimethylammonium hydroxide) aqueous solution (temperature of about 70 ° C., concentration of about 25%). Thereby, a plurality of hexagonal pyramid-shaped micro cones are formed on the surface of the n-type semiconductor layer. The MC layer 23mc can also be formed by dry etching using Ar plasma, chlorine plasma, or the like.

  Next, as shown in FIG. 2J, an n-side electrode 60 is formed on the surface of the optical semiconductor laminate 20 (the surface of the MC layer 23mc). Specifically, a metal laminate made of Ti / Al / Ti / Pt / Au is formed by using an electron beam evaporation method, and patterned by a lift-off method or the like to form an n-side electrode 60 having a desired planar shape. . The planar shape of the n-side electrode 60 is, for example, the shape shown in FIGS. 1B to 1C.

  Next, as shown in FIG. 2K, the support substrate 12 is thinned by grinding and polishing. Thereafter, the contact electrode 70 is formed on the thinned support substrate 12. The contact electrode 70 can be formed by sequentially depositing Ti / Pt / Au using, for example, an electron beam vacuum deposition method.

  Next, as shown in FIG. 2L, the support substrate 12 (and the contact electrode 70) is divided by laser scribing or dicing. Thus, the LED 100 according to the embodiment is completed. In addition, when whitening a blue LED containing GaN, a yellow phosphor may be added to a resin for sealing and filling the LED.

  The inventor produced a plurality of samples S1 to S4 and references R1 and R2 having different current diffusion layer configurations based on the above-described LED manufacturing method. Then, the Drop characteristics of the samples S1 to S4 and the references R1 and R2 were measured. Here, the Drop characteristic refers to a reduction characteristic of the external quantum efficiency (light emission efficiency) of the LED with respect to the current density of the current flowing through the LED (particularly, its active layer). The external quantum efficiency refers to the ratio of the number of photons emitted outside the LED to the number of electrons injected into the active layer of the LED.

  The first reference R1 is an LED in which a current diffusion layer is not formed. The second reference R2 is an LED in which a single undoped layer having a layer thickness of 260 nm is inserted in place of the current diffusion layer.

  The first sample S1 is an LED in which the current spreading layer has a three-layer structure including a first undoped layer, a first doped layer, and a second undoped layer. The layer thickness of the first undoped layer is 130 nm, the layer thickness of the first doped layer is 25 nm, and the layer thickness of the second undoped layer is 130 nm.

  The second sample S2 is an LED in which the current spreading layer has a five-layer structure. The layer thickness of the first undoped layer is 130 nm, the layer thickness of the first doped layer is 25 nm, the layer thickness of the second undoped layer is 130 nm, the layer thickness of the second doped layer is 50 nm, and the third undoped layer The layer thickness is 2 nm.

  The third sample S3 is an LED in which the current diffusion layer has a five-layer structure, and the third undoped layer is the thickest among the current diffusion layers. The layer thickness of the first undoped layer is 130 nm, the layer thickness of the first doped layer is 25 nm, the layer thickness of the second undoped layer is 130 nm, the layer thickness of the second doped layer is 50 nm, and the third undoped layer The layer thickness is 140 nm.

  The fourth sample S4 is an LED in which the current diffusion layer has a five-layer structure, and the first undoped layer has the largest thickness among the current diffusion layers. The layer thickness of the first undoped layer is 300 nm, the layer thickness of the first doped layer is 20 nm, the layer thickness of the second undoped layer is 100 nm, the layer thickness of the second doped layer is 40 nm, and the third undoped layer The layer thickness is 2 nm.

3A and 3B are graphs showing the Drop characteristics of samples S1 to S4 and references R1 and R2. 3A and 3B, the horizontal axis indicates the current density (A / cm ² ) of the current supplied to the samples S1 to S4 and the references R1 and R2, and the vertical axis indicates the samples S1 to S4 and the reference R1, R2. The external quantum efficiency (arbitrary unit) of R2 is shown. The Drop characteristics of the samples S1 to S4 and the references R1 and R2 are standardized in the external quantum efficiency value (the maximum value of the external quantum efficiency) when the current density is 20 A / cm ² . Here, the reduction rate of the external quantum efficiency value at a current density of 35 A / cm ² with respect to the external quantum efficiency value at a current density of 20 A / cm ² is referred to as a “Drop rate”.

From the graphs shown in FIGS. 3A and 3B, in the samples S1 to S4 and the references R1 and R2, when the current density of the current flowing through the LED is small (specifically, when the current density is smaller than 20 A / cm ² ), It can be seen that the external quantum efficiency (luminous efficiency) increases almost linearly. On the other hand, when the current density of the current flowing through the LED is large (specifically, when the current density is 20 A / cm ² or more), it can be seen that the external quantum efficiency of the LED gradually decreases.

The drop rate of the reference R1 (LED not provided with the current diffusion layer) is about 5%. In addition, it was found that the drop rate of the reference R2 (the LED in which the current spreading layer is replaced with a single undoped layer) is about 2.5%, which is significantly better than the drop rate of the reference R1. However, it has been found that the external quantum efficiency of the reference R2 is extremely deteriorated when the current density is higher than 50 A / cm ^2, for example. Further, it was confirmed that the forward voltage (drive voltage) of the reference R2 is about twice as large as the forward voltage of the reference R1. An increase in the forward voltage is not very preferable from the viewpoint of an increase in power consumption.

  The drop rate of sample S1 (LED with a current diffusion layer having a three-layer structure) was about 3.7%, which was found to be better than the drop rate of reference R1. Moreover, it turned out that the drop rate of sample S2 (LED with a current diffusion layer having a five-layer structure) is about 3%, which is better than the drop rate of sample S1.

  Furthermore, the drop rate of sample S3 (the LED in which the current spreading layer is a five-layer structure and the third undoped layer is the thickest film) is about 2.5%, which is better than the drop rate of sample S2. I understood it. However, it was confirmed that the forward voltage of sample S3 was slightly larger than the forward voltage of sample S2. However, the increase in the forward voltage in the sample S3 was within an allowable range.

  In addition, the drop rate of sample S4 (the LED in which the current diffusion layer has a five-layer structure and the first undoped layer is the thickest) is about 2.5%, which is better than the drop rate of sample S2. I understood it. In addition, it was found that the forward voltage of sample S3 was almost equal to the forward voltage of sample S2.

  From the above measurement results of the Drop characteristics, it was confirmed that the Drop characteristics were improved by inserting a current diffusion layer in the optical semiconductor stack of the LED. In addition, it was confirmed that the LED having a five-layer structure current spreading layer has improved Drop characteristics than the LED having a three-layer structure current spreading layer. Further, in the LED having a five-layer structure current spreading layer, it was confirmed that the Drop characteristics were further improved by increasing the thickness of the outermost layer (first undoped layer to third undoped layer).

  Hereinafter, the function performed by the current diffusion layer will be considered based on the measurement result of the Drop characteristic.

  FIG. 4A is an enlarged cross-sectional view showing the vicinity of a part of the n-side electrode in an LED (reference R1) according to a reference example in which a current diffusion layer is not formed. FIG. 4B is an enlarged cross-sectional view showing the vicinity of a part of the n-side electrode in the LEDs (samples S1 to S4) according to the example.

  In the case of an LED in which the current diffusion layer is not formed (the LED according to the reference example), as shown in FIG. 4A, the diffusion distance Le in which electrons diffuse in the plane direction while reaching the active layer 26 from the n-side electrode 60 is It is thought to be relatively short. When the electron diffusion distance Le is short, electrons are concentrated (current flows intensively) in the vicinity of the region corresponding to the n-side electrode in the active layer 26. When the amount of electrons per unit area supplied to a specific region of the active layer 26 is extremely large (the current density of the current flowing in the specific region of the active layer 26 is very large), electrons and holes in the active layer 26 Are not efficiently recombined, and the light emission efficiency is considered to be saturated or reduced.

  On the other hand, in the case of the LED in which the current diffusion layer 24 is formed (the LED according to the embodiment), as shown in FIG. 4B, the diffusion distance in which electrons diffuse in the plane direction while reaching the active layer 26 from the n-side electrode 60. Le is considered to be relatively long. This is because the resistance component of the first to third undoped layers in the current diffusion layer 24 is high, so that the current is less likely to flow in the thickness direction and is more likely to flow (easy to diffuse) in the plane direction. Conceivable.

  When the electron diffusion distance Le is long, electrons are dispersed (current flows dispersively) in a wide area of the active layer 26. Therefore, the amount of electrons per unit area supplied to a specific region of the active layer 26 is relatively small (the current density of the current flowing in the specific region of the active layer 26 is relatively small), and the active layer It is considered that the recombination of electrons and holes at 26 is performed more efficiently than the LED according to the reference example. Therefore, it is thought that luminous efficiency improves rather than LED by a reference example.

  As mentioned above, although this invention was demonstrated along the Example, this invention is not limited to these. For example, the current spreading layer is not limited to a five-layer structure, and may be a multilayer structure having five or more layers. It will be apparent to those skilled in the art that other various modifications, improvements, combinations, and the like are possible.

DESCRIPTION OF SYMBOLS 11 ... Growth substrate, 12 ... Support substrate, 20 ... Optical semiconductor lamination | stacking, 21 ... Low temperature buffer layer, 22 ... Underlayer, 23 ... N-type semiconductor layer, 24 ... Current diffusion layer, 25 ... Strain relaxation layer, 26 ... Active layer (Light emitting layer), 27 ... clad layer, 28 ... p-type semiconductor layer, 29 ... light emitting laminate, 30 ... p-side electrode, 40 ... fusion layer, 41 ... first adhesive layer, 42 ... second adhesive layer, 51 ... Photoresist pattern, 60 ... n-side electrode, 70 ... contact electrode, 80 ... power source, 100 ... LED (Example).

Claims (3)

A support substrate;
A first electrode disposed on the support substrate;
A first semiconductor layer disposed on the first electrode and made of a p-type semiconductor;
A light emitting layer disposed on the first semiconductor layer;
A current spreading layer disposed on the light emitting layer and having a structure in which an undoped layer made of an i-type semiconductor and a doped layer made of an n-type semiconductor are alternately stacked;
A second semiconductor layer disposed on the current spreading layer and made of an n-type semiconductor;
A second electrode partially disposed on the second semiconductor layer;
Including
The current spreading layer includes a first undoped layer made of an i-type semiconductor, a first doped layer made of an n-type semiconductor, a second undoped layer made of an i-type semiconductor from the second semiconductor layer toward the light emitting layer, n Light emitting device having a five-layer structure in which a second doped layer made of a p-type semiconductor and a third undoped layer made of an i-type semiconductor are stacked.   The semiconductor light emitting device according to claim 1, wherein the first undoped layer has the largest thickness in the current diffusion layer.   The semiconductor light-emitting device according to claim 1, wherein the third undoped layer has the largest thickness in the current diffusion layer.