JP2014161099A - Digital pwm control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a PWM control device that outputs a high frequency PWM signal by bringing infinitely close to zero an overhead time caused by the replacement of a function of an analog comparator with a duty ratio operation section of a digital circuit.SOLUTION: The digital PWM control device includes a fundamental clock generation section, the duty ratio operation section and a pulse output section. The duty ratio operation section determines a duty ratio on the basis of a difference between a signal acquired from an actuator and a command signal. The pulse output section outputs a pulse of the duty ratio determined by the duty ratio operation section. In the digital PWM control device, a total time of a time Ts1 required for the duty ratio operation section to make an operation and a time Ts2 equivalent to a pulse length of a maximum duty ratio that the pulse output section can output is longer than a period of a fundamental clock.

Description

  The present invention relates to a digital PWM control apparatus capable of outputting a high-cycle PWM signal.

  An analog PWM (Pulse Width Modulation) control device compares an analog carrier signal and an analog signal obtained from an actuator with a comparator, and outputs a pulse only while the comparison result is positive (or negative). The ratio between the basic period of PWM and the time during which pulses are output is called the duty ratio.

  In recent years, a digital PWM control device has been introduced in which a signal acquired from an actuator is converted into a digital signal, and a function performed by an analog comparator is replaced with a digital circuit. For example, Patent Document 1 discloses an example of a digital PWM control device.

JP 2008-86071 A

  When an analog comparator is used, the comparison result of the comparator determines the duty ratio as it is, and a pulse with the duty ratio is output. Therefore, the basic frequency of the PWM signal output by the PWM control device depends on the response frequency of the analog circuit. .

  On the other hand, when the function of the comparator is replaced with a digital circuit, a duty ratio calculation unit that determines the duty ratio based on the difference between the digitized signal acquired from the actuator and the command signal, and the determined duty ratio A digital pulse output unit that outputs pulses is required. An object of the present invention is to provide a technique for speeding up a digital PWM control device that requires a duty ratio calculation unit and a digital pulse output unit.

  The technology disclosed in this specification can be embodied in a digital PWM control device including a basic clock generation unit, a duty ratio calculation unit, and a pulse output unit. The duty ratio calculator determines the duty ratio based on the difference between the signal acquired from the actuator and the command signal for each period of the basic clock generated by the basic clock generator. The duty ratio calculation unit receives a signal obtained by digitizing an analog signal acquired from the actuator. The pulse output unit outputs a pulse having a duty ratio determined by the duty ratio calculation unit. The pulse output unit is configured to be operable in parallel with the duty ratio calculation unit. In this digital PWM control device, the total time of the time required for calculation by the duty ratio calculation unit and the time corresponding to the pulse length of the maximum duty ratio that can be output by the pulse output unit is longer than the period of the basic clock. It is characterized by. The “signal acquired from the actuator” is a signal indicating the state of the actuator. For example, when the actuator is an electric motor, the “signal acquired from the actuator” corresponds to a signal indicating the magnitude of the current applied to the motor. When the actuator is a servo valve, the “signal acquired from the actuator” corresponds to a signal indicating the valve opening. The “signal acquired from the actuator” may be rephrased as “control amount”. The “command signal” is a signal indicating the target state of the actuator. When the actuator is an electric motor, the “command signal” corresponds to the target current value, and when the actuator is a servo valve, the “command signal” corresponds to the target valve opening.

  The operation of the novel digital PWM controller disclosed in this specification will be outlined with reference to FIG. FIG. 1 shows a timing chart of the PWM control device disclosed in this specification. The basic clock cycle Ts0 (frequency is 1 / Ts0) generated by the basic clock generator determines the basic cycle (basic frequency) of the PWM controller. That is, the basic period (basic frequency) of the basic clock corresponds to the period (frequency) of the output pulse. In FIG. 1, timings t1 and t3 indicate the rising timing of the basic clock. The duty ratio calculator is activated at each rising edge of the basic clock and determines the duty ratio. Although not shown in FIG. 1, an analog signal indicating the current state of the actuator is AD-converted and taken into the duty ratio calculation unit at each basic clock timing. A symbol Ts1 indicates a time required for the duty ratio calculation unit to calculate the duty ratio. The duty ratio calculation unit started at the timing t1 ends the calculation of the duty ratio at the timing t2. The duty ratio determined at the timing t2 is Dmax [%]. Here, the duty ratio Dmax corresponds to the maximum duty ratio that the PWM control apparatus can output. In general, in the PWM control device, the maximum duty ratio Dmax that can be output is set to be less than 100% in order to ensure the rising of the output pulse. In FIG. 1, the symbol Ts2 indicates the time corresponding to the pulse length of the maximum duty ratio Dmax. That is, [time Ts2 corresponding to the pulse length of the maximum duty ratio Dmax] / [period T0 of the basic clock] corresponds to the maximum duty ratio Dmax. In FIG. 1, symbol t4 indicates the timing when the pulse with the maximum duty ratio Dmax falls. A time Ts3 from timing t4 to t5 means the minimum time of the output pulse interval.

  The duty ratio calculation unit can start calculating the duty ratio in the next cycle at timing t3 earlier than timing t4. That is, the duty ratio calculation unit starts the duty ratio calculation for the next cycle while the output of the pulse having the maximum duty ratio Dmax is continued. In other words, between the timings t3 and t4, the duty ratio calculation unit and the pulse output unit operate in parallel.

  As is apparent from FIG. 1, this digital PWM control device includes a time Ts1 required for the duty ratio calculation unit to calculate the duty ratio and a time Ts2 corresponding to the pulse length of the maximum duty ratio that can be output by the pulse output unit. The sum is longer than the period T0 of the basic clock. This relationship is achieved by the fact that the duty ratio calculation unit can operate in parallel with the pulse output unit.

  With the above configuration, the digital PWM control device disclosed in the present specification can bring the minimum time Ts3 of the output pulse interval as close to zero as possible. This means that the overhead time generated by replacing the function of the analog comparator with the duty ratio calculation unit can be made as close to zero as possible. The overhead time means a time during which the PWM pulse cannot be output (dead time). This digital PWM control device can output a PWM signal at a high frequency without causing the time required for determining the duty ratio by the digital circuit to be a waste time.

  The digital PWM control device of the present invention is not limited to a motor or a servo valve, and can be applied to any actuator that supports PWM control.

  According to the digital PWM control device of the present invention, the overhead time that can be generated by replacing the function of the analog comparator with the duty ratio calculation unit of the digital circuit can be made as close to zero as possible, and the PWM pulse signal can be generated at a high frequency. Can be output.

The timing chart of the digital PWM control apparatus of this invention is shown. The block diagram of a digital PWM control apparatus is shown. The flowchart of the process which a digital PWM control apparatus performs is shown.

  FIG. 2 shows a block diagram of the digital PWM control device 10. Hereinafter, the digital PWM control device 10 is simply referred to as a controller 10. The controller 10 of this embodiment drives a hydraulic actuator 40 that moves the control surface of the aircraft. More specifically, the controller 10 drives a direct drive valve (Direct Drive Valve) 42 included in the hydraulic actuator 40. That is, the direct drive valve 42 is PWM controlled. More specifically, the DD bridge 42 is driven by supplying a current having a magnitude corresponding to the duty ratio of the PWM pulse to the DDV 42 by the H bridge driver and the H bridge circuit. That is, the PWM control is control for adjusting the drive amount (control amount) of the actuator by changing the duty ratio.

  Hereinafter, the hydraulic actuator 40 is referred to as ACT 40 and the direct drive valve 42 is referred to as DDV 42. In FIG. 2, “LVDT” means a differential transformer. “LVDT” is an abbreviation for “Linear Variable Differential Transformer”.

  First, the ACT 40 that is the control target of the controller 10 will be described. In ACT 40, the hydraulic piston expands and contracts according to the valve opening of the DDV 42 to move the control surface. That is, the DDV 42 adjusts the hydraulic pressure of the ACT 40. The valve opening that determines the hydraulic pressure is referred to as a valve position in this specification. The LVDT (differential transformer) 44 detects the valve position. The LVDT 46 detects the piston position of the ACT 40. The LVDTs 44 and 46 output a voltage, and the magnitude of the voltage indicates a valve position or a piston position. In this embodiment, the valve position is directly controlled by the PWM pulse. In other words, the valve position corresponds to a control amount in the narrow sense of the controller 10.

  The controller 10 will be described. The controller 10 mainly includes a communication unit 12, a failure diagnosis unit 14, an ACT position control unit 16, a DDV position control unit 18, a duty ratio calculation unit 20, a pulse output unit 22, a clock generation unit 24, a memory 26, an H bridge driver 28, An H bridge circuit 30 and an AD converter 32 are included. Among these main modules, the communication unit 12, the failure diagnosis unit 14, the ACT position control unit 16, the DDV position control unit 18, the duty ratio calculation unit 20, the pulse output unit 22, and the memory 26 are realized by the gate array 34. Yes. That is, the communication unit 12, the failure diagnosis unit 14, the ACT position control unit 16, the DDV position control unit 18, the duty ratio calculation unit 20, the pulse output unit 22, and the memory 26 are digital circuits. The basic clock generated by the clock generator 24 defines the operation timing of each digital circuit in the gate array 34 and the AD converter 32.

  The AD converter 32 will be described. The AD converter 32 digitizes the current flowing through the H bridge circuit 30 and the current output from the LVDTs 44 and 46. The current flowing through the H bridge circuit 30 corresponds to the current supplied to the DDV 42. As described above, the voltage output from the LVDT 44 indicates the valve position of the DDV 40. The voltage output from the LVDT 46 indicates the piston position of the ACT 40. Hereinafter, the current flowing through the H bridge circuit 30 (that is, the current supplied to the DDV 42) is referred to as a current measurement value. The output of the LVDT 44 is referred to as “DDV position measurement value”, and the output of the LVDT 46 is referred to as “ACT position measurement value”. The current signal output from the H bridge circuit 30 and the voltage signal output from the LVDTs 44 and 46 are analog signals. The AD converter 32 digitizes these analog signals.

  The ACT position measurement value, DDV position measurement value, and current measurement value digitized by the AD converter 32 are input to the ACT position control unit 16, the DDV position control unit 18, and the duty ratio calculation unit 20, respectively. Strictly speaking, the AD converter 32 only digitizes the analog current value, and the ACT position control unit 16 and the DDV position control unit 18 described later convert the digitized current values into the piston position of the ACT and the DDV, respectively. Convert to the valve position. More precisely, the output of the LVDT 44 is an AC signal corresponding to the valve position. The DDV position control unit 18 demodulates the AC signal to obtain the valve position. The output of the LVDT 46 is an AC signal corresponding to the piston position. The ACT position control unit 16 demodulates the AC signal output from the LVDT 46 to obtain the piston position of the ACT 40.

  The controller 10 drives the ACT 40 so as to follow the target position of the piston position of the ACT 40 instructed by the host controller 50. Hereinafter, “the piston position of ACT 40” is simply referred to as “the position of ACT 40”. A control flow executed by each unit of the controller 10 will be described. The communication unit 12 performs communication with the host controller 50. The controller 10 acquires the target position of the ACT 40 from the host controller 50 via the communication unit 12.

  The ACT position control unit 16 calculates the difference between the target position of the ACT 40 and the measured ACT position value, and outputs the target position of the DDV 42 according to the difference. The DDV position control unit 18 calculates a difference between the target position of the DDV 42 and the DDV position measurement value, and outputs a target current value for driving the DDV 42. The duty ratio calculation unit 20 determines a duty ratio according to the difference between the target current value of the DDV 42 and the current measurement value. Hereinafter, the difference between the target current value of the DDV 42 and the current measurement value is referred to as a current difference. The larger the current difference, the larger the duty ratio is determined. Here, the memory 26 stores duty ratios corresponding to the subdivided current differences. The duty ratio calculation unit 20 can determine the duty ratio at high speed without arithmetic operation by designating a current difference and referring to the memory. The pulse output unit 22 outputs a PWM pulse according to the determined duty ratio. The H bridge driver 28 and the H bridge circuit 30 supply a current having a magnitude corresponding to the duty ratio of the PWM pulse to the DDV 42. The DDV 42 is driven by the supplied current. Since the H bridge driver 28 and the H bridge circuit 30 are well known, the description thereof will be omitted.

  With reference to the timing chart of FIG. 1, the operation timings of the duty ratio calculation unit 20 and the pulse output unit 22 will be described. Since the explanation of the timing chart has already been completed, the outline will be briefly described here. The clock generator 24 generates the basic clock in FIG. The AD converter 32 AD converts the analog current signal using the rising edge of the basic clock signal as a trigger. At the same time, the duty ratio calculation unit 20 captures the digitized current measurement value and starts calculating the duty ratio.

  The duty ratio calculation unit 20 is constructed so that the calculation of the duty ratio is completed within the required time Ts1. The duty ratio calculation unit 20 includes (1) a process of acquiring a target current value from the DDV position control unit 18, (2) a process of acquiring a current measurement value from the AD converter 32, and (3) a process of calculating a current difference. (4) The duty ratio can be determined by the process of reading the duty ratio from the memory by referring to the memory 26 by designating the current difference. Since any process can be completed without fail at a predetermined time, the required time Ts1 does not change.

  The pulse output unit 22 is configured to start after the elapse of Ts1 time from the rising edge of the basic clock. The pulse output unit 22 receives the duty ratio determined by the duty ratio calculation unit 20, and outputs a high level signal for a time corresponding to the duty ratio. There is no interaction (interaction) between the duty ratio calculation unit 20 and the pulse output unit 22 other than the transfer of the duty ratio. That is, while the pulse output unit 22 is operating, the duty ratio calculating unit 20 can operate again. In other words, the pulse output unit 22 and the duty ratio calculation unit 20 are constructed so that they can operate in parallel. The start timing of the duty ratio calculation unit 20 and the pulse output unit 22 and the transfer timing of the duty ratio are incorporated in the gate array 34 in advance. In other words, the gate array 34 is designed so that the duty ratio calculation unit 20 and the pulse output unit 22 operate in parallel and operate in parallel.

  The period Ts0 (frequency is 1 / Ts0) of the basic clock corresponds to the period (frequency) of PWM control. As described above, in FIG. 1, the time Ts2 corresponds to the time of the pulse length of the maximum duty ratio Damx [%] that the controller 10 can output. The controller 10 can start the process of determining the duty ratio of the next PWM signal while outputting the PWM signal having the maximum duty ratio Dmax. Therefore, in the controller 10, the sum of the time Ts1 required for the calculation by the duty ratio calculation unit 20 and the time Ts2 corresponding to the pulse length of the maximum duty ratio that can be output by the pulse output unit 22 is greater than the period T0 of the basic clock. Satisfies the long relationship. This means that the controller 10 can reduce the minimum time Ts3 of the PWM pulse interval, and it can output a PWM pulse with a high frequency and a high duty ratio.

  The minimum PWM pulse interval time Ts3 means a time during which no pulse is output. Therefore, if the maximum value of the duty ratio is limited to ensure a large Ts3, the duty ratio determination process can be completed during the minimum time Ts3. That is, even if the duty ratio calculation unit and the pulse output unit are sequentially executed instead of in parallel, it is possible to increase the period of PWM control by limiting the maximum value of the duty ratio. On the other hand, the controller 10 can speed up the PWM control cycle without limiting the maximum value of the duty ratio. That is, the controller 10 can output a PWM pulse having a high frequency and a high duty ratio.

  The failure diagnosis unit 14 determines a target position output from the ACT position control unit 16, a target current value output from the DDV position control unit 18, and a current difference calculated inside the duty ratio calculation unit 20. It is monitored whether the allowable range is exceeded. If any of these values exceeds the allowable range, the failure diagnosis unit 14 cuts off the current to the DDV 42 and further notifies the host controller 50 of the occurrence of the failure via the communication unit 12.

  FIG. 3 shows a flowchart of processing executed by the controller 10. FIG. 3 shows DDV position control and pulse output processing, and ACT position control is omitted. First, the DDV position control unit 18 demodulates the current frequency signal digitized by the AD converter 32 to obtain a DDV position measurement value (S2). Next, the DDV position control unit 18 calculates a difference between the target position of the DDV 42 output from the ACT position control unit 16 and the DDV position measurement value, that is, a position error. Then, the DDV position control unit 18 calculates a target current value corresponding to the position error (S4). Here, the target current value indicates the target value of the current supplied to the DDV 42 in order to move the valve position of the DDV 42 in a direction to eliminate the position error.

  When the calculation of the target current value is completed, the failure diagnosis unit 14 next checks whether or not the position error is within an allowable range (S6). Although not shown, when the position error exceeds the allowable range, the failure diagnosis unit 14 cuts off the current to the DDV 42 and further notifies the host controller 50 of the occurrence of the failure in the DDV position control.

  Next, the duty ratio calculation unit 20 calculates the difference (current difference) between the current measurement value digitized by the AD converter 32 and the target current value, and determines the duty ratio corresponding to the current difference (S8). Next, the failure diagnosis unit 14 checks whether or not the current difference is within an allowable range (S10). Although illustration is omitted, when the current difference exceeds the allowable range, the failure diagnosis unit 14 cuts off the current to the DDV 42 and further notifies the host controller 50 of the occurrence of the failure in the current control.

  Next, the pulse output unit 22 outputs a pulse having a time length corresponding to the determined duty ratio (S12). When the pulse output unit 22 starts outputting the PWM pulse, the process proceeds to step S14. The controller 10 repeats the processing from step S8 to S12 N times (S14: NO). Here, as described above, the process of step S8 may be executed while the pulse output unit 22 continues the pulse output.

  The controller 10 repeats the DDV position control at a low cycle while repeating the PWM control at a high cycle. For example, when N = 10, the cycle of DDV position control is 10 times the cycle of PWM control. Although not shown, the controller 10 executes the ACT position control once when the DDV position control is repeated a predetermined number of times.

The technical features of the controller 10 (digital PWM control device) described above are listed below.
(1) The controller 10 can execute in parallel a process for determining a duty ratio from a difference between a current value (control amount) of the actuator (DDV42) state and a target value of the actuator state, and a PWM pulse output process. . By parallelization, the controller 10 can reduce the overhead time resulting from the duty ratio determination process. As a result, the controller 10 can output a PWM signal having a high cycle and a high duty ratio. In particular, in the controller 10, the sum of the time Ts1 required for calculation by the duty ratio calculation unit and the time Ts2 corresponding to the pulse length of the maximum duty ratio that can be output by the pulse output unit is longer than the period T0 of the basic clock. Designed to be
(2) The controller 10 stores a duty ratio corresponding to each subdivided current difference in advance in the memory, and determines the duty ratio by designating the calculated current difference and referring to the memory. Since the duty ratio is determined without arithmetic operation, the duty ratio determination process can be speeded up.
(3) Since the current flowing through the H-bridge circuit 30 and the voltage output by the LVDT 44 and 46 are digitized to reduce analog signal processing, the controller 10 is robust against changes in ambient temperature.
(4) By storing the communication unit 12, the failure diagnosis unit 14, the ACT position control unit 16, the DDV position control unit 18, the memory 26, the duty ratio calculation unit 20, and the pulse output unit 22 in one gate array, We succeeded in reducing costs and downsizing.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

10: Controller 12: Communication unit 14: Fault diagnosis unit 16: ACT position control unit 18: DDV position control unit 20: Duty ratio calculation unit 22: Pulse output unit 24: Clock generation unit 26: Memory 28: H bridge driver 30: H bridge circuit 32: AD converter 34: Gate array 40: Hydraulic actuator (ACT)
42: Direct drive valve (DDV)
44: LVDT (differential transformer)
46: LVDT (differential transformer)
50: Host controller

As is apparent from FIG. 1, this digital PWM control device includes a time Ts1 required for the duty ratio calculation unit to calculate the duty ratio and a time Ts2 corresponding to the pulse length of the maximum duty ratio that can be output by the pulse output unit. The sum is longer than the period T0 of the basic clock. This relationship is achieved by the fact that the duty ratio calculation unit can operate in parallel with the pulse output unit. As is clear from FIG. 1, both the duty ratio calculation period and the pulse output period are equal to the basic clock period Ts0, and the pulse output is after a certain time Ts1 required for the duty ratio calculation. The phase shifts from the duty ratio calculation period by the time required for the duty ratio calculation.

Claims (1)

A basic clock generator,
A duty ratio calculation unit that determines a duty ratio based on a difference between a signal acquired from the actuator and a command signal for each period of the basic clock generated by the basic clock generation unit;
A pulse output unit operable in parallel with the duty ratio calculation unit and outputting a pulse of the duty ratio determined by the duty ratio calculation unit,
A digital PWM control device characterized in that the sum of the time required for calculation by the duty ratio calculation unit and the time corresponding to the pulse length of the maximum duty ratio that can be output by the pulse output unit is longer than the period of the basic clock .

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