JP2014146407A5 - - Google Patents

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Publication number
JP2014146407A5
JP2014146407A5 JP2014011512A JP2014011512A JP2014146407A5 JP 2014146407 A5 JP2014146407 A5 JP 2014146407A5 JP 2014011512 A JP2014011512 A JP 2014011512A JP 2014011512 A JP2014011512 A JP 2014011512A JP 2014146407 A5 JP2014146407 A5 JP 2014146407A5
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JP
Japan
Prior art keywords
voltage
coupling
memory cell
coupled
split gate
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Application number
JP2014011512A
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English (en)
Japanese (ja)
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JP6233971B2 (ja
JP2014146407A (ja
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Priority claimed from US13/751,548 external-priority patent/US8885403B2/en
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Publication of JP2014146407A publication Critical patent/JP2014146407A/ja
Publication of JP2014146407A5 publication Critical patent/JP2014146407A5/ja
Application granted granted Critical
Publication of JP6233971B2 publication Critical patent/JP6233971B2/ja
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JP2014011512A 2013-01-28 2014-01-24 スプリット・ゲート・ビット・セルのプログラミング Active JP6233971B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/751,548 2013-01-28
US13/751,548 US8885403B2 (en) 2013-01-28 2013-01-28 Programming a split gate bit cell

Publications (3)

Publication Number Publication Date
JP2014146407A JP2014146407A (ja) 2014-08-14
JP2014146407A5 true JP2014146407A5 (https=) 2017-02-23
JP6233971B2 JP6233971B2 (ja) 2017-11-22

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ID=51222804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014011512A Active JP6233971B2 (ja) 2013-01-28 2014-01-24 スプリット・ゲート・ビット・セルのプログラミング

Country Status (3)

Country Link
US (1) US8885403B2 (https=)
JP (1) JP6233971B2 (https=)
CN (1) CN103971736B (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018049674A (ja) * 2016-09-21 2018-03-29 ルネサスエレクトロニクス株式会社 半導体装置
US10147734B1 (en) * 2017-08-30 2018-12-04 Cypress Semiconductor Corporation Memory gate driver technology for flash memory cells

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6091634A (en) * 1997-04-11 2000-07-18 Programmable Silicon Solutions Compact nonvolatile memory using substrate hot carrier injection
JP2003046002A (ja) * 2001-07-26 2003-02-14 Sony Corp 不揮発性半導体メモリ装置およびその動作方法
JP4647175B2 (ja) * 2002-04-18 2011-03-09 ルネサスエレクトロニクス株式会社 半導体集積回路装置
JP2004319034A (ja) * 2003-04-18 2004-11-11 Renesas Technology Corp データプロセッサ
US7236398B1 (en) * 2005-08-31 2007-06-26 Altera Corporation Structure of a split-gate memory cell
JP5300773B2 (ja) * 2010-03-29 2013-09-25 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
US8643123B2 (en) 2011-04-13 2014-02-04 Freescale Semiconductor, Inc. Method of making a semiconductor structure useful in making a split gate non-volatile memory cell

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