JP2014116417A - Semiconductor wafer, semiconductor light-emitting device, optical transmission device, information processing device, and method for manufacturing semiconductor light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer capable of improving a manufacturing yield of a surface-emitting semiconductor laser.SOLUTION: A plurality of element formation regions 10 are formed in a wafer 100 in which a plurality of surface-emitting semiconductor laser elements are formed. A VCSEL20 and an electrode pad 50 for driving this VCSEL20 are formed in the element formation regions 10. An annular hydrophobization region 30 in which a surface of an interlayer insulating film is hydrophobized is formed around the VSCEL20, and an annular groove 40 is formed outside the VCSEL20. A resin 70 is potted in the element formation regions 10 so as to cover the VCSEL20.

Description

  The present invention relates to a semiconductor wafer, a semiconductor light emitting device, an optical transmission device, an information processing device, and a method for manufacturing a semiconductor light emitting element.

  When a surface emitting semiconductor laser element is used as a communication light source, it is usually aligned through a lens between the surface emitting semiconductor laser element and the optical fiber so that the laser light is efficiently incident on the optical fiber. At the wafer level, the exit surface of the surface emitting semiconductor laser element is made concave, or a convex wall is formed on the outer periphery of the surface emitting semiconductor laser element to create an air gap, and a ball lens is mounted on it. (Patent Documents 1 and 2). In addition, a structure is disclosed in which a microlens is formed by filling a resin material or the like into the recess on the exit surface, and the inside of the recess is made hydrophilic so that the resin material can easily flow (Patent Document). 3).

Japanese Patent Laid-Open No. 04-147691 JP 2005-252257 A U.S. Pat. No. 7,688,876

  The present invention provides a semiconductor wafer, a method for manufacturing a semiconductor light-emitting element, and a semiconductor light-emitting device, an optical transmission device, and an information processing apparatus including such a semiconductor light-emitting element that can improve the manufacturing yield of the semiconductor light-emitting element. For the purpose.

A first aspect of the present invention provides a semiconductor wafer including a plurality of element formation regions, each of which includes one or a plurality of surface-emitting type semiconductor light emitting elements, and one of the element formation regions. Alternatively, one or a plurality of light-transmitting resins covering the light emitting portions of the plurality of semiconductor light emitting elements are formed in the element forming region, and the resin hydrophobicizes the surface of the insulating film formed in the element forming region. A semiconductor wafer, which is formed in a region surrounded by a hydrophobized region and a groove is formed outside the hydrophobized region.
2. The semiconductor wafer according to claim 1, wherein the light emitting section has a columnar structure, and the hydrophobic region is formed concentrically with the columnar structure.
The semiconductor wafer according to claim 1, wherein the groove is formed concentrically with the hydrophobic region.
The semiconductor wafer according to any one of claims 1 to 3, wherein the hydrophobic region is extended into the groove.
5. The semiconductor according to claim 1, wherein when a plurality of semiconductor light emitting elements are formed in the element forming region, the hydrophobic region is formed so as to surround the plurality of semiconductor light emitting elements. Wafer.
According to a sixth aspect of the present invention, when a plurality of semiconductor light emitting elements are formed in the element forming region, the hydrophobized region is formed so as to surround each light emitting portion of the plurality of semiconductor light emitting elements. 2. The semiconductor wafer according to 1.
7. The semiconductor wafer according to claim 1, wherein the hydrophobic region is formed by subjecting the insulating film to fluorine treatment.
The present invention provides a semiconductor wafer including a plurality of element formation regions, each of which includes one or a plurality of surface-emitting type semiconductor light emitting elements, and one of the element formation regions. Alternatively, one or a plurality of light-transmitting resins that cover the light emitting portions of the plurality of semiconductor light emitting elements are formed in the element forming region, and the resin is a region surrounded by a groove formed in the element forming region. A semiconductor wafer formed inside.
9. The semiconductor wafer according to claim 8, wherein a hydrophobic region obtained by hydrophobizing the surface of the insulating film is formed outside the groove.
In a tenth aspect of the present invention, when a plurality of semiconductor light emitting elements are formed in the element formation region, the hydrophobic region is formed so as to surround the plurality of semiconductor light emitting elements. Semiconductor wafer.
The semiconductor wafer according to any one of claims 1 to 10, wherein the resin is formed by potting.
12. The semiconductor wafer according to claim 1, wherein each of the element formation regions is separated by a region for cutting the semiconductor wafer.
A semiconductor light emitting device comprising: a semiconductor chip including an element forming region cut from the semiconductor wafer according to claim 1; and an external lead electrically connected to the semiconductor chip. .
Claim 14 is an optical transmission comprising a semiconductor chip including an element formation region cut from the semiconductor wafer according to any one of claims 1 to 11, and an optical member optically coupled to the semiconductor chip. apparatus.
According to a fifteenth aspect of the present invention, the semiconductor chip includes a plurality of surface-emitting type semiconductor laser elements, and the optical member is a multi-core fiber in which a plurality of cores are formed in one optical fiber, The optical transmission device according to claim 14, wherein the laser light emitted from the type semiconductor laser element is incident on each of the plurality of cores of the multi-core fiber.
16. The optical transmission device according to claim 15, further comprising a lens between the semiconductor chip and the multi-core fiber.
According to a seventeenth aspect of the present invention, there is provided a surface emitting semiconductor laser device including a semiconductor chip including an element forming region cut from the semiconductor wafer according to any one of the first to eleventh aspects, and the surface emitting semiconductor laser device. An information processing apparatus comprising: a condensing unit that condenses laser light on a recording medium; and a mechanism that scans the laser light condensed by the condensing unit on the recording medium.
According to another aspect of the present invention, one or a plurality of surface-emitting type semiconductor light emitting elements are formed in each element forming region on the semiconductor wafer, and a groove is formed in each element forming region so as to surround the one or more semiconductor light emitting elements. Forming an insulating film on the element formation region including the groove, hydrophobizing the surface of the insulating film inside the groove, and covering the light emitting portion of the semiconductor light emitting element in the hydrophobic region A method of manufacturing a semiconductor light emitting device including a step of dropping a light transmissive resin and cutting a semiconductor wafer along a region that isolates the device formation region.
19. The method of manufacturing a semiconductor light emitting element according to claim 18, wherein the hydrophobic region is formed by subjecting the insulating film to fluorine treatment.
According to another aspect of the present invention, one or a plurality of surface-emitting type semiconductor light emitting elements are formed in each element forming region on the semiconductor wafer, and a groove is formed in each element forming region so as to surround the one or more semiconductor light emitting elements. And a step of dropping a light-transmitting resin so as to cover one or more semiconductor light emitting elements in the groove, and cutting the semiconductor wafer along a region that isolates the element forming region. A method for manufacturing a semiconductor light emitting device.

According to claims 1, 8, 18, and 20, the light emitting portion of the semiconductor light emitting element on the semiconductor wafer can be protected from the outside.
According to the second and third aspects, the center of the resin can be aligned with the optical axis of the light emitting portion.
According to the fourth and ninth aspects, the resin can be prevented from leaking from the element formation region.
According to the fifth and tenth aspects, a plurality of semiconductor light emitting elements can be collectively protected from the outside.
According to the sixth aspect, a resin lens function can be given to each semiconductor light emitting element.
According to the seventh, eleventh and nineteenth aspects, existing semiconductor manufacturing technology can be used.

1 is a perspective view of a part of a semiconductor wafer on which a surface-emitting type semiconductor laser device having a single bit configuration according to a first embodiment of the present invention is formed, and FIG. FIG. 1B shows a state before the resin is coated. FIG. 2 is a cross-sectional view taken along line XX and a line Y-Y in FIG. FIG. 3A is a perspective view of a part of a semiconductor wafer on which a surface emitting semiconductor laser device having another single bit configuration according to the first embodiment of the present invention is formed, and FIG. The state before coating, FIG. 3B, shows a state where the resin is coated. FIG. 4 is a cross-sectional view taken along the line XX and the line Y-Y in FIG. FIG. 5A is a cross-sectional view showing an example of the surface shape of the resin when the resin is potted in the non-hydrophobized region, and FIG. 5B is a diagram showing the resin in the region hydrophobized by this embodiment. Sectional drawing showing an example of the surface shape of resin when is potted, FIG.5 (C) is a figure explaining the contact angle of resin. FIG. 6A is a diagram for explaining the hydrophobic treatment on the surface of the insulating film according to this embodiment, and FIG. 6B is a diagram for explaining another configuration example of the hydrophobic treatment according to this embodiment. FIG. 7A is a perspective view of a part of a semiconductor wafer on which a surface emitting semiconductor laser device having a multi-bit configuration according to the first embodiment of the present invention is formed, and FIG. FIG. 7 (B) is a state before coating, FIG. 7 (C) is a schematic transparent side view of FIG. 7 (B). FIG. 8A is a perspective view of a part of a semiconductor wafer on which a surface emitting semiconductor laser device having another multi-bit configuration according to the first embodiment of the present invention is formed, and FIG. FIG. 8B is a state before coating, FIG. 8B is a schematic transparent side view of FIG. 8B. FIG. 5 is a perspective view of another multi-bit surface-emitting type semiconductor laser device according to the first embodiment of the present invention. FIG. 10A is a perspective view of a part of a semiconductor wafer on which a surface-emitting type semiconductor laser device having another multi-bit configuration according to the first embodiment of the present invention is formed, and FIG. 10B is a schematic cross-sectional view of FIG. 10A, FIG. 10C is a state where resin is coated, and FIG. 10D is a state before being coated. FIG. It is a perspective view which shows the example of the semiconductor wafer in which the surface emitting semiconductor laser of the other multibit structure based on 1st Example of this invention was formed, and FIG. 11 (A) is the state before coat | covering resin FIG. 11B shows a state where the resin is coated. It is sectional drawing of the surface emitting semiconductor laser formed on the semiconductor wafer based on the 2nd Example of this invention. It is sectional drawing of the surface emitting semiconductor laser formed on the semiconductor wafer which concerns on the 3rd Example of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor wafer which concerns on the 1st Example of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor wafer which concerns on the 1st Example of this invention. It is a figure explaining the optical transmission apparatus using the surface emitting semiconductor laser element cut | disconnected from the semiconductor wafer based on the Example of this invention, FIG. 16 (A) is sectional drawing of a Marcothia fiber, FIG. ) Is a schematic cross-sectional view of an optical transmission device, and FIG. 16C is a schematic cross-sectional view of another optical transmission device. It is a figure which shows the structural example of the information processing apparatus using the surface emitting semiconductor laser element cut | disconnected from the semiconductor wafer based on the Example of this invention.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. Here, a semiconductor wafer on which a surface emitting semiconductor laser element having an oxide confinement structure is formed is illustrated, and the surface emitting semiconductor laser or the surface emitting semiconductor laser element is referred to as a VCSEL (Vertical Cavity Surface Emitting Laser). It should be noted that the scale of the drawings is emphasized for easy understanding of the features of the invention and is not necessarily the same as the scale of an actual device.

  FIG. 1 is a perspective view of a part of a semiconductor wafer on which a surface emitting semiconductor laser device having a single bit configuration according to a first embodiment of the present invention is formed, and FIG. A state before the resin is coated, FIG. 1B shows a state where the resin is coated. 2 is a cross-sectional view taken along the line XX and the line Y-Y of FIG.

  A plurality of rectangular element formation regions 10 are formed in an array in the matrix direction on the semiconductor wafer 100. 1A and 1B illustrate four element formation regions 10. In one element formation region 10, a VCSEL 20 having a light emitting part with a cylindrical mesa structure and an electrode pad 50 for supplying power to the VCSEL 20 are formed. The electrode pad 50 is formed on a pad forming region separated from the VCSEL 20, and the electrode pad 50 is connected to the upper electrode 28 (see FIG. 2) at the top of the mesa of the VCSEL via a lead wiring 52. Most of the surface of the element formation region 10 is covered with an insulating protective film such as SiN except for the metal layer (electrode pad 50, lead wiring 52, mesa upper electrode, etc.). A substantially circular hydrophobized region (hereinafter referred to as a hydrophobized region) 30 is formed on the surface of the insulating protective film so as to surround the mesa of the VCSEL 20, and a certain depth is formed outside the hydrophobized region 30. An annular groove 40 is formed.

  The element formation region 10 shown in FIG. 1 includes a single VCSEL 20 and thus has a single bit structure. Such element formation regions 10 are separated from each other by isolation regions 60 extending in a lattice pattern as scribe lines. The semiconductor wafer 100 is diced (cut) along the isolation region 60, and the VCSEL elements are individualized.

  In this embodiment, before the wafer 100 is singulated (single), the resin 70 covering the mesa of the VCSEL 20 in the element formation region 10 is potted as shown in FIG. The resin 70 is made of a light-transmitting material that can transmit the oscillation wavelength of the VCSEL 20, and for example, LED silicone member, silicone, resin, or the like can be used. By coating the VCSEL 20 with the resin 70 before dicing, the surface of the VCSEL 20 is prevented from being damaged or dust or dust is attached in the dicing process or subsequent processes. In a preferred embodiment, the resin 70 not only protects the VCSEL 20 from the outside, but also has a function of condensing light emitted from the VCSEL 20 and increases the coupling efficiency with an optical fiber or the like.

Next, a specific configuration of the VCSEL formed on the semiconductor wafer will be described with reference to FIG. In a typical VCSEL 20, AlGaAs layers having different Al compositions having thicknesses of λ / 4n _r (where λ is an oscillation wavelength and n _r is a refractive index of a medium) are alternately stacked on an n-type GaAs wafer substrate 21. N-type lower distributed black reflector (hereinafter referred to as DBR) 22, active region 23 formed on lower DBR 22 and including a quantum well layer sandwiched between upper and lower spacer layers, active region configured to include a p-type upper DBR25 overlaid alternating thicknesses of the Al composition of the formed lambda / 4n _r on 23 different AlGaAs layers. Preferably, a p-type GaAs contact layer is formed in the uppermost layer of the upper DBR 25, and a current confinement layer 24 in which p-type AlAs is selectively oxidized is formed in the upper DBR 25.

  A semiconductor layer extending from the upper DBR 25 to a part of the lower DBR 22 is etched to form a cylindrical mesa (columnar structure) on the substrate 22, and a part of the current confinement layer 24 is selectively oxidized from the side of the mesa. Is done.

  An annular p-side electrode 26 made of a metal such as Au is formed on the top of the mesa, and the p-side electrode 26 is electrically connected to the upper DBR 25. An interlayer insulating film 27 such as SiN is formed so as to cover the top, side and bottom of the mesa. At the top of the mesa, a contact hole for exposing the p-side electrode 26 is formed in the interlayer insulating film 27. In the illustrated example, the interlayer insulating film 27 covers the emission window of the p-side electrode 26, but may be covered with another protective film. An annular upper electrode 28 is formed on the top of the mesa, and the upper electrode 28 is connected to the p-side electrode 26 through a contact hole. Further, the upper electrode 28 is connected to the electrode pad 50 through the lead wiring 52 as shown in FIG. An n-side electrode 29 is formed on the back surface of the substrate 21. Thus, for example, 850 n-band laser light is emitted from the central emission window of the p-side electrode 26.

  On the surface of the interlayer insulating film 27 covering the bottom of the mesa, an annular hydrophobized region 30 surrounding the mesa is formed except for the lead wiring 52. Preferably, the hydrophobic region 30 is formed by subjecting the interlayer insulating film 27 to fluorine treatment. For example, the region to be hydrophobized is covered with a mask pattern so as to be exposed, and the exposed interlayer insulating film 27 is exposed to a buffered hydrofluoric acid solution (BHF) or is plasma-treated with a fluorine-based gas. At that time, the hydrophobicity can be further increased by leaving a part of the fluorine in the interlayer insulating film 27. Such a hydrophobized region 30 is formed with a certain width W (see FIG. 1A), preferably concentric with the mesa of the VCSEL 20 and along the contour or outer periphery of the region where the resin 70 is potted. Is done. However, the shape of the hydrophobized region 30 is not necessarily limited to an annular shape and may be other shapes. The width W of the hydrophobic region 30 is selected according to the size of the element forming region 10, the amount of resin to be potted, the viscosity, and the like.

  An annular groove 40 is formed on the outer periphery of the hydrophobized region 30. The groove 40 is formed to have a certain depth or a depth reaching the substrate 21 by etching the lower DBR 22 from the bottom surface of the mesa, for example. The trench 40 is formed before the formation of the interlayer insulating film 27, and thus the trench 40 is covered with the interlayer insulating film 27. When the resin 70 is potted to cover the VCSEL 20, the progress of the resin 70 is suppressed by the hydrophobic region 30. However, if the width W of the hydrophobic region 30 is limited, the amount of resin to be potted is large, or the viscosity thereof is small, the resin 70 may exceed the hydrophobic region 30. Furthermore, since the surface of the lead wiring 52 is not hydrophobized, a part of the resin 70 may travel on the lead wiring 52. In such a case, the groove 40 accommodates the resin 70 beyond the hydrophobized region 30 so that the resin 70 does not exceed the element forming region 10 and the spherical shape of the resin 70 is maintained. Thereafter, the wafer 100 on which the resin 70 is potted is diced along the isolation region 60, and a chip including a single-bit VCSEL is generated.

  FIG. 5A shows an example of the surface shape of the resin when the resin is potted on the non-hydrophobized insulating film, and FIG. 5B shows that the hydrophobic region is formed as in this embodiment. An example of the surface shape of the resin when the resin is potted on the insulating film is shown. If the base is not hydrophobized, in other words, is hydrophilic, the resin 72 has a gentle surface shape with a small contact angle. On the other hand, when the hydrophobic region 30 is formed along the contour or outer periphery of the region where the resin 70 is potted as in this embodiment, the peripheral portion where the resin contacts is hydrophobic, As shown in FIG. 5B, the contact angle between the resin 70 and the interlayer insulating film 27 is increased, and the resin material is also formed in a spherical shape due to the influence of surface tension. The contact angle of the resin 70 is desirably 80 degrees or more. Even if a large amount of resin is potted to obtain a large contact angle, and as a result, even if a part of the resin 70 exceeds the hydrophobized region 30, the resin 70 is absorbed by the groove 40. It does not spread in the lateral direction without limitation, and a large contact angle can be maintained. As shown in FIG. 5C, the contact angle θ is calculated by doubling the angle θ1 measured from the height h and the radius r of the resin 70.

  As described above, in this embodiment, the VCSEL 20 is covered with the resin 70 before the VCSEL elements 20 in the respective element formation regions formed on the wafer are separated into pieces by using dicing or the like. Can be protected from the outside. Furthermore, by forming the resin 70 into a spherical shape with a large contact angle, the light condensing property can be enhanced. Further, when the resin 70 is potted from above the VCSEL, the groove 40 can prevent the resin 70 from leaching into the isolation region 60 beyond the element formation region 10. Further, by forming the hydrophobized region 30 and the groove 40 concentrically around the mesa, the optical center of the VCSEL can coincide with the circle center of the resin 70. That is, since the groove 40 is formed so that the light emitting portion is at the center, even when the resin 70 is sealed in the potting process due to the surface tension of the resin 70, the center of the round portion of the resin 70 is always raised. Is approximately coincident with the center of the light source. Note that the groove 40 may be formed in a fan shape without being formed all around the circle.

  According to the present embodiment, the surface of the VCSEL can be protected by covering the light emitting part of the VCSEL with the resin 70, and the damage to the light emitting part can be removed in the dicing process and the subsequent process. There is an advantage that the configuration of the resin lens can be easily made. In addition, even if the collet for die bonding contacts, there is no risk of scratching the light-emitting surface, so it is possible to use a collet that adsorbs on the surface, and there is no damage to the side surface due to the angled collet, improving mounting accuracy. There are advantages.

  Next, a modification of the present embodiment will be described. In the embodiment described above, as shown in FIG. 6A, the hydrophobized region 30 (indicated by xx in the figure) is formed with a width W on the surface of the interlayer insulating film 27, and a groove 40 is formed adjacent thereto. Although formed, the hydrophobic region 30A is formed in the interlayer insulating film 27 in the groove 40 so that the hydrophobic region 30 is extended when the width W of the hydrophobic region 30 cannot be sufficiently secured. It may be. Thereby, the width W1 of the whole hydrophobic region 30 and 30A can be enlarged, and it can suppress effectively that resin protrudes from the groove | channel 40 to an outer periphery. If necessary, the surface of the interlayer insulating film 27 outside the trench 40 may be hydrophobized so that the hydrophobized region 30A is further extended.

  FIG. 3 shows a part of a wafer on which another single-bit VCSEL is formed. In this example, the mesa-shaped VCSEL 20 and the pad formation region where the electrode pad 50 is formed are separated by an annular trench 80. Other configurations are the same as those of the VCSEL shown in FIGS.

  4 is a cross-sectional view taken along line XX and a line Y-Y in FIG. As shown in these drawings, the interlayer insulating film 27 covers the top and side surfaces of the mesa and covers the entire surface of the trench 80, the groove 40, and the pad formation region. The hydrophobic region 30 is formed on the entire surface of the interlayer insulating film 27 between the trench 80 and the groove 40 or on a part thereof. In this example, the potted resin 70 fills the groove in the trench 80, and can have a spherical shape that stands up along the hydrophobic region 30.

  Next, as a modification of the first embodiment, a semiconductor wafer on which a multi-bit VCSEL is formed is illustrated in FIGS. 7A, a plurality of VCSELs 20 and electrode pads 50 respectively connected to the plurality of VCSELs 20 are formed in one element formation region 10 on the wafer. In the example shown in the figure, eight VCSELs 20 are arranged in the circumferential direction at equal intervals of approximately 45 degrees in one element formation region 10. Each VCSEL has the same configuration as that of the single-bit VCSEL shown in FIGS. A hydrophobized region 30 having a constant width is formed so as to be concentric with a circle connecting these VCSELs 20, and a concentric groove 40 is further formed on the outside thereof.

  From the state shown in FIG. 7A, the resin 70 is potted in the element formation region 10 as shown in FIGS. The resin 70 collectively covers the mesas or light emitting portions of the plurality of VCSELs 20 in the element forming region 10. Also in this case, since the hydrophobic region 30 is formed along the periphery of the resin 70, the resin 70 is formed in a spherical shape with a large contact angle.

  FIG. 8 shows a multi-bit VCSEL having the single bit configuration shown in FIGS. In the element formation region 10, a plurality of VCSELs 20 that are isolated from the pad formation region through the trench 80 are formed. Here, as in the case shown in FIG. 7, the hydrophobic region 30 is formed so as to surround each VCSEL 20, and the groove 40 is formed outside thereof. From the state shown in FIG. 8A, as shown in FIGS. 8B and 8C, the resin 70 is potted in each element formation region 10, and the mesas or light emitting portions of the plurality of VCSELs 20 are collectively formed by the resin 70. Covered with.

  FIG. 9A shows an example in which the groove 40 is fan-shaped or discontinuously formed on the wafer on which the multi-bit VCSEL shown in FIG. 8 is formed. As shown in the figure, the groove 40A is divided at the portion of the lead wiring 52 of the electrode pad 50. Thereby, since the lead-out wiring 52 is extended flat without passing through the step of the groove 40A, disconnection of the lead-out wiring 52 can be prevented.

  In the configuration shown in FIG. 9A, the portion of the lead wiring 52 is not hydrophobized, and the lead wiring 52 does not pass through the groove 40A. For this reason, the resin 70 is likely to leak from the lead-out wiring 52 to the outside. Therefore, as shown in FIG. 9B, a further insulating film may be laminated so as to cover at least the lead wiring 52, and the annular hydrophobic region 30 may be formed on the surface of the insulating film. If the hydrophobic region 30 continuously surrounds the periphery of the VCSEL as shown in FIG. 9B, the contact angle of the resin 70 can be made larger.

  FIG. 10 shows a portion of a wafer on which still another multi-bit configuration VCSEL is formed. In one element formation region 10, VCSELs 20 arranged in an 8 × 4 manner and corresponding electrode pads 50 are formed. Each VCSEL 20 is the same as that of the single-bit VCSEL shown in FIGS. An elliptical hydrophobic region 30 is formed so as to surround the entire 8 × 4 VCSEL, and an elliptical groove 40 is formed on the outside thereof. FIG. 10B shows a schematic cross section in the X-ray direction of FIG. From the state of FIG. 10A, as shown in FIGS. 10C and 10D, the light emitting portion of the 8 × 4 VCSEL is collectively covered with the potted resin 70.

  FIG. 11 shows another example of the VCSEL having the multi-bit configuration shown in FIG. In the element formation region 10, a plurality of VCSELs 20 having the same configuration as that shown in FIGS. 1 and 2 are formed. In the example shown in FIG. 7, the hydrophobic region 30 and the groove 40 are formed so as to surround the whole of the plurality of VCSELs. However, in FIG. 11, the plurality of hydrophobic regions 30 (in the drawing, Grooves 40 are formed on the outer side thereof. Then, as shown in FIG. 11B from the state shown in FIG. 11A, the resin 70 is potted with respect to each VCSEL in the element formation region 10. Therefore, in FIG. 11B, eight resins 70 are formed so as to correspond to eight VCSELs. By making the hydrophobized region 30 and the groove 40 substantially concentric with the mesa of the VCSEL 20, the center of the spherical surface of the resin 70 is approximately approximate to the optical axis of the VCSEL 20, and an optimum lens function can be given to each VCSEL. it can. As for the VCSEL having the multi-bit structure shown in FIGS. 8 to 10, each VCSEL may be covered with a resin as described above.

  Next, a second embodiment of the present invention will be described. In the first embodiment described above, the pair of the hydrophobic region 30 and the groove 40 is formed in the region where the resin is potted. In the second embodiment, the groove 40 is formed. For example, in a single bit configuration as shown in FIGS. 1 and 2, that is, in a wafer in which one VCSEL is formed in the element formation region 10, the groove 40 is formed without forming the hydrophobic region 30 on the surface of the interlayer insulating film 27. To do. Thereafter, the resin 70 is potted so as to cover the light emitting portion of the VCSEL 20 in the element formation region 10. This is shown in FIG. As shown in the figure, a groove 40 is formed around the VCSEL mesa, and the periphery of the resin 70 potted to cover the mesa enters the groove 40, and the groove 40 is used to stop the resin 70. Functions as a dam. As a result, a spherical resin 70 having a large contact angle can be formed. In the example shown in the figure, the groove 40 reaches the substrate 21 and the width of the groove 40 is increased so that the volume for housing the resin is relatively large. In the second embodiment, a hydrophobic region as in the first embodiment may be formed on the outer periphery of the groove 40 so that the resin does not protrude from the groove 40. The second embodiment can be similarly applied to other single-bit VCSELs shown in FIGS. 3 and 4 and multi-bit VCSELs shown in FIGS.

  Next, a third embodiment of the present invention will be described. In the first embodiment described above, the pair of the hydrophobic region 30 and the groove 40 is formed in the region where the resin is potted. In the third embodiment, the hydrophobic region 30 is formed. For example, in a wafer having a single bit structure as shown in FIGS. 1 and 2, the hydrophobic region 30 is formed on the surface of the interlayer insulating film 27 and the groove 40 is not formed. Thereafter, the resin 70 is potted so as to cover the light emitting part of the VCSEL 20 in the element formation region 10. This is shown in FIG. As shown in the figure, since the hydrophobic region 30 is formed on the periphery of the resin 70, the resin 70 is stopped at the hydrophobic region 30 as in the first embodiment, and the contact angle is reduced. A large spherical resin 70 can be formed. The width of the hydrophobized region 30 is appropriately selected so that the resin does not protrude. The third embodiment can be similarly applied to other single-bit VCSELs shown in FIGS. 3 and 4 and multi-bit VCSELs shown in FIGS.

  Next, a wafer manufacturing method according to the first embodiment of the present invention will be described with reference to FIGS. 14 and 15 correspond to the YY line cross section of FIG.

  FIG. 14A shows a state in which a VCSEL having an oxide confinement structure is formed on a wafer or substrate 21. Here, one VCSEL is exemplified, but a single-bit or multi-bit VCSEL is formed in a large number of element formation regions on a wafer. As shown in the figure, a cylindrical mesa M is formed on the lower DBR 22, and an active region 23, a current confinement layer 24, an upper DBR 25, an annular p-side electrode 26, and a p-side electrode are formed in the mesa M. A circular protective film 110 that covers the central exit window is formed. Unlike the example shown in FIGS. 2 and 4, the protective film 110 is formed before the interlayer insulating film 27 is formed. The protective film 110 is a material that can transmit an oscillation wavelength, and is, for example, SiN.

  Next, as shown in FIG. 14B, a mask pattern 120 is formed on the wafer. The mask pattern 120 has an annular opening 122 for forming the groove 40 in the lower DBR 22 at the bottom of the mesa. Using the mask pattern 120, the entire wafer surface is subjected to anisotropic etching such as RIE to form a groove 40 having a predetermined depth. FIG. 14C shows a state where the mask pattern 120 is removed.

  Next, an interlayer insulating film 27 such as SiN or SiON is formed on the entire surface of the wafer by CVD or the like, and the interlayer insulating film 27 has a circular shape for exposing the p-side electrode 26 as shown in FIG. A contact hole 124 is formed. Next, as shown in FIG. 15E, an upper electrode 28 connected to the p-side electrode 26 is formed on the top of the mesa M. Simultaneously with the upper electrode 28, the lead wiring 52 and the electrode pad 50 are also patterned. An n-side electrode 29 is formed on the back surface of the substrate 21.

  Next, as shown in FIG. 15F, a mask pattern 130 is formed on the entire surface of the wafer. The mask pattern 130 is formed with an annular opening 132 for forming the hydrophobic region 30 adjacent to the groove 40. The width W of the opening 132 is appropriately selected according to the distance between the mesa M and the groove 40. Next, using the mask pattern 130, the surface of the interlayer insulating film 27 exposed by the opening 132 is subjected to fluorine treatment. As described above, the fluorine treatment may be either a wet treatment using a diluted fluorine solution (BHF) or a dry treatment using plasma of a fluorine-based gas. When the fluorine treatment is completed, the mask pattern 130 is removed, and a resin such as silicone at a constant temperature is potted so as to cover the VCSEL in the element formation region. Thereby, a wafer in which the light emitting portion of the VCSEL in the element formation region as shown in FIGS. 1 and 2 is coated with a resin is produced. Thereafter, the wafer is diced along scribe lines to obtain individual chips. The cut chip is transported to the next mounting process by a pick-up tool such as a collet, packaged, and becomes a surface emitting semiconductor laser device.

  Next, an optical transmission apparatus using a VCSEL chip cut out from the wafer of this embodiment will be described with reference to FIG. Here, as a preferable example, a multi-core fiber is used for a VCSEL having a multi-bit configuration. FIG. 16A is a cross-sectional view of the multi-core fiber 200. The multi-core fiber 200 includes a plurality of cores 202 in one fiber. Use of such a multi-core fiber 200 enables large-capacity data transmission by spatial multiplexing. A plurality of VCSELs are arranged on the VCSEL chip so as to correspond to each core 202 of the multi-core fiber 200, and a plurality of laser beams emitted from the surface of the VCSEL chip are respectively incident on the corresponding core 202 and transmitted. The

  FIG. 16B illustrates an example of an optical transmission device. In the optical transmission device 300, a chip 310 is mounted on a metal stem 302 via a conductive adhesive. A plurality of external leads 304 are attached to the metal stem 302 through insulated through holes, and the external leads 304 are electrically connected to the VCSEL of the chip 310. A hollow cap 320 is fixed on the stem 302, and a ball lens 330 as an optical member is fixed in an opening at the center of the cap 320. The optical axis of the ball lens 330 substantially coincides with the centers of the plurality of VCSELs formed on the VCSEL chip 310. Further, a cylindrical housing 340 is fixed on the stem 302, and a ferrule 350 is held in a sleeve 342 formed integrally with an end surface of the housing 340, and the multicore fiber 200 is held by the ferrule 350. The multi-core fiber 200 is accurately aligned with the ball lens 330, whereby the plurality of laser beams from the chip 310 are collected on the respective cores 202. As described above, since the resin 70 serving as a lens function is formed on the surface of the chip 310, the light emitted from each VCSEL is collected by the resin 70, and the collected light is converted into a ball. The light is condensed onto the multi-core fiber 200 by the lens 330. For this reason, the optical coupling efficiency of the VCSEL chip 310 and the multi-core fiber can be increased.

  FIG. 16C illustrates a configuration example of another optical transmission device 300A. In this example, the VCSEL chip 310 and the multi-core fiber 200 are directly optically coupled without using the ball lens 330. As described above, by increasing the contact angle of the resin covering each VCSEL and making the resin spherical, the resin can function as a lens with higher accuracy. In this case, by adjusting the distance between the chip 310 and the multi-core fiber 200 without using a ball lens, a plurality of laser beams from the chip 310 can be incident on the corresponding core 202. According to this example, since the number of parts is reduced, it is possible to obtain an optical transmission device 300A that is low in cost and can be downsized.

  FIG. 17 is a diagram showing an example in which the VCSEL chip cut out from the wafer of this embodiment is applied to the light source of the optical information processing apparatus. The optical information processing device 400 rotates at a constant speed with a collimator lens 420 that receives laser light from a surface emitting semiconductor laser device 410 on which a VCSEL chip is mounted, and the light flux from the collimator lens 420 is spread at a constant spread angle. A photosensitive drum that forms a latent image based on the reflected polygon mirror 430, the fθ lens 440 that receives the laser beam from the polygon mirror 430 and irradiates the reflection mirror 450, the line-shaped reflection mirror 450, and the reflection light from the reflection mirror 450. (Recording medium) 460 is provided. As described above, optical information processing such as a copying machine or a printer provided with an optical system for condensing the laser light from the VCSEL on the photosensitive drum and a mechanism for scanning the condensed laser light on the optical drum. It can be used as a light source for the apparatus. Note that the VCSEL chip may have a single bit configuration or a multi-bit configuration. Further, the surface emitting semiconductor laser device 410 can be obtained, for example, by removing the housing 340 and the multi-core fiber 200 from the configuration of FIG.

  In the above embodiment, a GaAs-based VCSEL using a semiconductor material of GaAs, AlAs, or AlGaAs has been exemplified. However, the present invention can also be applied to a VCSEL using another III-V group compound semiconductor. In the above embodiment, the VCSEL having the oxidized constriction structure is illustrated. However, the current confinement layer is not limited to the oxidized constriction, and may be formed by proton ion implantation or the like.

  The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the specific embodiment, and various modifications can be made within the scope of the present invention described in the claims. Deformation / change is possible.

10: Element formation region 20: VCSEL
21: Substrate 22: Lower DBR
23: Active region 24: Current confinement layer 25: Upper DBR
26: p-side electrode 27: interlayer insulating film 28: upper electrode 29: n-side electrode 30: hydrophobic region 40, 40A: groove 50: electrode pad 52: lead wire 60: isolation region (scribe line)
70, 72: Resin 80: Trench 100: Semiconductor wafer 200: Multi-core fiber

Claims (20)

A semiconductor wafer including a plurality of element formation regions, each of the element formation regions being formed with one or a plurality of surface-emitting type semiconductor light emitting elements,
One or more light-transmitting resins that cover the light emitting portions of one or more semiconductor light emitting elements in the element forming region are formed in the element forming region,
The resin is formed in a region surrounded by a hydrophobized region obtained by hydrophobizing the surface of the insulating film formed in the element forming region,
A semiconductor wafer, wherein a groove is formed outside the hydrophobic region. The semiconductor wafer according to claim 1, wherein the light emitting portion has a columnar structure, and the hydrophobic region is formed concentrically with the columnar structure. The semiconductor wafer according to claim 1, wherein the groove is formed concentrically with the hydrophobic region. The semiconductor wafer according to claim 1, wherein the hydrophobic region is extended into the groove. The semiconductor wafer according to claim 1, wherein when a plurality of semiconductor light emitting elements are formed in the element forming region, the hydrophobic region is formed so as to surround the plurality of semiconductor light emitting elements. 2. The semiconductor according to claim 1, wherein when a plurality of semiconductor light emitting elements are formed in the element forming region, the hydrophobic region is formed so as to surround each light emitting portion of the plurality of semiconductor light emitting elements. Wafer. The semiconductor wafer according to claim 1, wherein the hydrophobic region is formed by subjecting the insulating film to a fluorine treatment. A semiconductor wafer including a plurality of element formation regions, each of the element formation regions being formed with one or a plurality of surface-emitting type semiconductor light emitting elements,
One or more light-transmitting resins that cover the light emitting portions of one or more semiconductor light emitting elements in the element forming region are formed in the element forming region,
The semiconductor is a semiconductor wafer formed in a region surrounded by a groove formed in the element formation region. The semiconductor wafer according to claim 8, wherein a hydrophobized region in which the surface of the insulating film is hydrophobized is formed outside the groove. 10. The semiconductor wafer according to claim 8, wherein when a plurality of semiconductor light emitting elements are formed in the element forming region, the hydrophobic region is formed so as to surround the plurality of semiconductor light emitting elements. The semiconductor wafer according to claim 1, wherein the resin is formed by potting. 12. The semiconductor wafer according to claim 1, wherein each of the element formation regions is separated by a region for cutting the semiconductor wafer. 13. A semiconductor light emitting device, comprising: a semiconductor chip including an element formation region cut from the semiconductor wafer according to claim 1; and an external lead electrically connected to the semiconductor chip. An optical transmission device comprising: a semiconductor chip including an element formation region cut from the semiconductor wafer according to claim 1; and an optical member optically coupled to the semiconductor chip. The semiconductor chip includes a plurality of surface emitting semiconductor laser elements,
The optical member is a multi-core fiber in which a plurality of cores are formed in one optical fiber,
The optical transmission device according to claim 14, wherein laser light emitted from the plurality of surface-emitting type semiconductor laser elements is incident on each of the plurality of cores of the multi-core fiber. The optical transmission device according to claim 15, further comprising a lens between the semiconductor chip and the multi-core fiber. A surface-emitting type semiconductor laser device including a semiconductor chip including an element formation region cut from the semiconductor wafer according to any one of claims 1 to 11,
Condensing means for condensing the laser light emitted from the surface-emitting type semiconductor laser device on a recording medium;
A mechanism for scanning the recording medium with the laser beam condensed by the condensing means;
An information processing apparatus. Forming one or a plurality of surface-emitting type semiconductor light emitting elements in each element forming region on the semiconductor wafer;
Forming a groove in each element forming region so as to surround one or more semiconductor light emitting elements;
Forming an insulating film on the element formation region including the trench;
Hydrophobizing the surface of the insulating film inside the groove,
A light-transmitting resin is dropped so as to cover the light-emitting portion of the semiconductor light-emitting element in the hydrophobic region,
A method of manufacturing a semiconductor light emitting device, comprising: cutting a semiconductor wafer along a region that isolates the device formation region. The method for manufacturing a semiconductor light emitting element according to claim 18, wherein the hydrophobized region is formed by subjecting the insulating film to fluorine treatment. Forming one or a plurality of surface-emitting type semiconductor light emitting elements in each element forming region on the semiconductor wafer;
Forming a groove in each element forming region so as to surround one or more semiconductor light emitting elements;
Dropping a light transmissive resin so as to cover one or more semiconductor light emitting elements in the groove;
A method of manufacturing a semiconductor light emitting device, comprising: cutting a semiconductor wafer along a region that isolates the device formation region.

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