JP2014053545A - SINGLE CRYSTAL SiGe LAYER MANUFACTURING METHOD AND SOLAR CELL USING THE SAME - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of manufacturing a single crystal SiGe layer on an Si substrate, which is excellent in surface flatness and eliminates the need for complicated and precise control and a solar cell using the same.SOLUTION: A single SiGe layer 100 has a structure in which an SiGebuffer layer 102, an SiGestrain inversion layer 103, an SiGelight absorption layer 104 are stacked on an Si substrate 101. The Si substrate 101 is P-type or N-type and included as an electrode. The SiGebuffer layer 102 has a structure in which a plurality of SiGesemiconductor layers are stacked and is used for matching grating constants of the base Si substrate and the plurality of SiGesemiconductor layers in a step-by-step manner while minimizing a dislocation density. The SiGestrain inversion layer 103 generates a compressive strain stress against a tensile stress generated in the SiGelight absorption layer 104. The SiGelight absorption layer 104 absorbs external light and is used for generating carriers.

Description

  The present invention relates to a method for manufacturing a single crystal SiGe layer and a solar cell using the same, and more particularly, to a method for manufacturing a single crystal SiGe layer in which a single crystal silicon-germanium (SiGe) layer is formed on a silicon substrate and a solar cell using the same. It relates to batteries.

  The current mainstream solar cell has a structure in which a silicon (Si) substrate is used, a pn junction is formed on the Si substrate, and a Si semiconductor is used for the light absorption layer. However, the Si semiconductor is an indirect transition semiconductor and has a low light absorption coefficient, and the light absorption layer of the mainstream solar cell is as thick as several hundred μm in order to obtain sufficient photoelectric conversion efficiency.

  On the other hand, a thin film solar cell using a semiconductor material having a thickness of several μm to several tens of μm has been developed for the purpose of reducing the price and saving resources. Examples of the material of the thin film solar cell include a compound semiconductor (eg, GaAs, CuInGaSSe) having a high light absorption coefficient. However, when the thickness of the light absorption layer of the single crystal Si solar cell is set to several μm, sufficient light is obtained. Since absorption cannot be obtained, it is difficult to obtain high photoelectric conversion efficiency.

  As an application example of a thin film solar cell, there is a multi-junction solar cell in which solar cells using III-V group compound semiconductors having different forbidden band widths are stacked. For example, in the case of a three-junction solar cell, when a solar cell having a forbidden band width of 1.8 to 2.0 eV / 1.2 to 1.6 eV / 0.7 to 0.9 eV is stacked from the incident light side, Although high photoelectric conversion efficiency can be obtained as compared with a solar cell, it is expensive and development of a multijunction solar cell using a group IV semiconductor is desired.

By the way, the single crystal Si _1-x Ge _x semiconductor can be single crystal epitaxially grown at an arbitrary value of Ge composition ratio x of 0 to 1.0, and the forbidden band width is arbitrarily set to about 0.7 eV to 1.1 eV. Can be designed with forbidden bandwidth. The single crystal Si _1-x Ge _x semiconductor has a higher light absorption coefficient than the single crystal Si semiconductor, and is a semiconductor material suitable for reducing the thickness of the light absorption layer. Therefore, a solar cell in which a Si _1-x Ge _x semiconductor is formed on a Si substrate can be considered.

However, with respect to the Si substrate (lattice constant 5.430 angstrom (Å)), the lattice constant of Si _1-x Ge _x semiconductor is 5.658Å (Ge composition x = max) depending on the composition ratio of Si and Ge. For example, when a single-crystal SiGe layer is epitaxially grown using a Si substrate, compressive strain stress corresponding to the difference in lattice constant is generated in the epitaxial layer, and high-density dislocations accompany stress relaxation. Therefore, it is difficult to improve the crystallinity, and as it is, it is difficult to produce a Si _1-x Ge _x single crystal having excellent characteristics on a Si substrate. Therefore, a method for producing a Si _1-x Ge _x single crystal having excellent characteristics on a Si substrate has been proposed in the past (for example, see Non-Patent Document 1 and Patent Document 1).

That is, in Non-Patent Document 1, a Si _0.925 Ge _0.075 layer _{having a} thickness of 300 nm is formed on a Si substrate, a Si _0.85 Ge _0.15 layer having a thickness of 300 nm is formed thereon, and a Si _0.775 Ge _0.225 layer having a thickness of 300 nm is formed thereon. A method in which a Si _0.7 Ge _0.3 single crystal having a low dislocation density is obtained by forming a layer, forming a Si _0.7 Ge _0.3 layer having a thickness of 300 nm thereon, and subjecting each layer to heat treatment at about 900 ° C. for 5 minutes Is disclosed.

  Further, in Patent Document 1, for example, a SiGe buffer layer having a composition gradient is formed on a Si substrate, a Si strained layer is formed thereon, and a SiGe buffer layer is further formed. A method of forming a semiconductor layer having different lattice constants and excellent surface flatness is shown.

P.I.Gaiduket.al, “Strain-relaxed SiGe / Si heteroepitaxialstructures of low threading-dislocation density”, Thin Solid Films 367 (2000) 120-125

JP 2008-153671 A

  However, although the structure shown in Non-Patent Document 1 shows a reduction in dislocation density, a characteristic oblique parallel line (cross hatch) structure resulting from dislocations generated in the buffer layer remains. Since this cross-hatch structure is a dislocation concentration part, it is indispensable to form a surface with excellent flatness from the viewpoint of solar cell application, but it is difficult to obtain a surface with excellent flatness.

Patent Document 1 discloses an example with a Ge composition ratio of up to 20%. However, the structure disclosed in Patent Document 1 has a Si _1-x Ge _x buffer layer and a Si strained layer on a Si substrate. It is a structure in which multiple layers are stacked alternately, and complicated and precise control is required.

  The present invention has been made in view of the above points, and provides a manufacturing method for manufacturing a single-crystal SiGe layer having excellent surface flatness on a Si substrate and requiring no complicated and precise control, and a solar cell using the same. With the goal.

In order to achieve the above object, a method for producing a single crystal SiGe layer according to the present invention includes a plurality of Si _1-x Ge _x semiconductor layers (provided that the lattice constants are different in stages on a P-type or N-type Si substrate). , 0 ≦ x ≦ 0.95; the same shall apply hereinafter), and a Si _1-x Ge _x buffer for adapting the lattice constant of the Si substrate and the plurality of Si _1-x Ge _x semiconductor layers in stages. A buffer layer forming step of forming a layer, a strain inversion layer forming step of forming a Si _1-x Ge _x strain inversion layer that generates compressive strain stress on the Si _1-x Ge _x buffer layer, and the Si ₁ a light-absorbing layer forming step of forming a Si _1-x Ge _x light-absorbing layer that absorbs external light and generates carriers on the _-x Ge _x semiconductor layer, and on the Si substrate, Single-crystal SiGe layer in which the buffer layer, the strain inversion layer, and the light absorption layer of the same conductivity type are stacked Characterized in that it produced.

In order to achieve the above object, according to the method for producing a single crystal SiGe layer of the present invention, in the buffer layer forming step, the lattice constant of the plurality of Si _1-x Ge _x semiconductor layers is determined from the Si substrate side. The Si _1-x Ge _x semiconductor layer having the largest lattice constant is formed in the uppermost layer in order, and the strain inversion layer forming step includes the step of forming the uppermost layer having the largest lattice constant formed in the buffer layer forming step. On the Si _1-x Ge _x semiconductor layer, an Si _1-x Ge _x semiconductor layer having a lattice constant 0.017Å to 0.019Å larger than that of the uppermost Si _1-x Ge _x semiconductor layer is formed. It is formed as a strain inversion layer.

Here, in the light absorption layer forming step, Si _1-x having a lattice constant equal to the lattice constant of the uppermost Si _1-x Ge _x semiconductor layer having the largest lattice constant formed in the buffer layer forming step. A Ge _x semiconductor layer may be formed as the Si _1-x Ge _x light absorption layer. In the buffer layer forming step, a rapid heat treatment at 900 ° C. for 3 minutes may be performed in an ultrahigh vacuum every time the semiconductor layers of the plurality of Si _1-x Ge _x semiconductor layers are formed.

In order to achieve the above object, the solar cell of the present invention is formed on a P-type or N-type Si substrate, and the lattice constant increases in order from the Si substrate side, and is the same as the Si substrate. A Si _1-x Ge _x buffer layer in which a plurality of conductivity type Si _1-x Ge _x semiconductor layers (where 0 ≦ x ≦ 0.95; the same shall apply hereinafter) are stacked; and the Si _1-x Ge _x buffer layer An Si _1-x Ge _x strain inversion layer of the same conductivity type as the Si substrate that generates compressive strain stress, and an external light formed on the Si _1-x Ge _x semiconductor layer. A Si _1-x Ge _x light absorption layer of the same conductivity type as the Si substrate for absorbing carriers and the light absorption layer formed on the Si _1-x Ge _x light absorption layer A semiconductor junction layer for forming a pn junction for collecting the generated carriers, and a shape formed on the semiconductor junction layer; Has been characterized as having a transparent electrode layer for taking out the carrier to the outside.

Here, the semiconductor junction layer is a heterojunction layer or a homojunction layer, and the heterojunction layer includes an intrinsic amorphous silicon layer formed on the Si _1-x Ge _x light absorption layer and the intrinsic junction layer. An amorphous silicon layer composed of an amorphous silicon layer opposite to the Si _1-x Ge _x light absorption layer formed on the amorphous silicon layer, or an opposite conductivity type to the Si _1-x Ge _x light absorption layer. The homojunction layer is composed of a Si _1-x Ge _x light absorption layer and a Si _1-x Ge _x single crystal having a conductivity type opposite to that of the Si _1-x Ge _x light absorption layer. .

  According to the present invention, a high-quality single-crystal SiGe layer having an excellent surface flatness, a low dislocation density and an arbitrary composition can be manufactured, and complicated and precise control can be dispensed with during manufacturing. Moreover, according to this invention, a solar cell provided with favorable rectification | straightening property can be obtained by using the single crystal SiGe layer of this invention.

It is sectional drawing of the semiconductor element manufactured by one Embodiment of the manufacturing method of the single-crystal SiGe layer of this invention. It is a schematic block diagram of one embodiment of the solar cell of the present invention. It is sectional drawing of Example 1 of the single-crystal SiGe layer which comprises the single-crystal SiGe heterojunction type solar cell shown in FIG. It is a Ge composition ratio versus film thickness characteristic diagram of each layer in FIG. It is a reciprocal lattice mapping figure of the 224 diffraction surface in the high resolution X-ray diffraction of a single crystal SiGe layer. It is a figure which shows the voltage versus current density characteristic of the solar cell produced using each of the samples A and D. It is a diagram showing a comparison wavelength versus external quantum efficiency characteristic diagram of the single-crystal Si _0.58 Ge _0.42 heterojunction solar cell and Si heterojunction solar cell of the present invention.

Next, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a cross-sectional view of a semiconductor device manufactured according to an embodiment of a method for manufacturing a single crystal SiGe layer of the present invention. In the figure, a single crystal SiGe layer 100 according to the present embodiment includes a Si _1-x Ge _x buffer layer 102, a Si _1-x Ge _x strain inversion layer 103, and a Si _1-x Ge _x on a Si substrate 101. In this structure, the light absorption layer 104 is laminated. The Ge composition ratio x is 0 ≦ x ≦ 0.95, as will be described later. The Si substrate 101 is P-type or N-type and is provided as an electrode. Further, the Si _1-x Ge _x buffer layer 102, the Si _1-x Ge _x strain inversion layer 103, and the Si _1-x Ge _x light absorption layer 104 have the same conductivity type as the Si substrate 101, respectively.

Si _1-x Ge _x buffer layer 102 has a structure in which a plurality of Si _1-x Ge _x semiconductor layer have different lattice constants from each other are laminated, for example, the lattice constant of the plurality of Si _1-x Ge _x semiconductor layer Are sequentially increased from the substrate 101 side toward the Si _1-x Ge _x strain inversion layer 103 side at equal intervals. The Si _1-x Ge _x buffer layer 102 is used to gradually adapt the lattice constants of the underlying Si substrate and the plurality of Si _1-x Ge _x semiconductor layers while minimizing the density of dislocations. It is done.

The Si _1-x Ge _x strain inversion layer 103 generates a compressive strain stress that is a strain component opposite to the tensile stress generated in the Si _1-x Ge _x light absorption layer 104, and the propagation of the transition is further inhibited. It is provided for this purpose. The Si _1-x Ge _x light absorption layer 104 is used to absorb external light and generate electron-hole pairs (carriers).

In FIG. 1, a semiconductor junction layer 105 is formed on the Si _1-x Ge _x light absorption layer 104. The semiconductor junction layer 105 is used to form a pn junction for collecting carriers generated in the Si _1-x Ge _x light absorption layer 104. Therefore, the semiconductor bonding layer 105 is of a conductivity type opposite to that of the Si _1-x Ge _x light absorption layer 104. The semiconductor junction layer 105 is a hetero junction layer or a homo junction layer. A transparent electrode layer 106 is formed on the semiconductor bonding layer 105. Furthermore, the electrode layers 107 and 108 formed on the transparent electrode layer 106 and on the back surface of the Si substrate 101 are used for taking out the generated carriers to the outside.

Next, an embodiment of a solar cell using the single crystal SiGe layer 100 of FIG. 1 will be described.
FIG. 2 shows a schematic configuration diagram of an embodiment of the solar cell of the present invention. In FIG. 2, a single crystal SiGe heterojunction solar cell 210 includes a single crystal Si _1-x Ge _x layer 211, an amorphous silicon layer 212, and an ITO transparent electrode layer 207, which are sequentially stacked on a P-type Si substrate 201. And an Al electrode layer 208 formed on the ITO transparent electrode layer 207 and an Al electrode layer 209 formed on the back surface of the P-type Si substrate 201. The P-type Si substrate 102 is provided as a positive electrode.

The single crystal Si _1-x Ge _x layer 211 corresponds to the single crystal SiGe layer 100 of FIG. 1, and on the P-type Si substrate 201, a P-type Si _1-x Ge _x buffer layer 202, a P-type Si _1-x. In this configuration, a Ge _x strain inversion layer 203 and a P-type Si _1-x Ge _x light absorption layer 204 are stacked. P-type Si _1-x Ge x buffer layer 202, P-type Si _1-x Ge x strained inversion layer 203 and the P-type Si _1-x Ge x light absorbing layer 204, is respectively Figure ₁ Si _1-x Ge x It corresponds to the buffer layer 102, the Si _1-x Ge _x strain inversion layer 103, and the Si _1-x Ge _x light absorption layer 104.

As will be described later, the P-type Si _1-x Ge _x buffer layer 202 has a structure in which a plurality of P-type Si _1-x Ge _x semiconductor layers having different lattice constants are stacked. Here, the lattice constants of the plurality of P-type Si _1-x Ge _x semiconductor layers increase in order from the P-type Si substrate 201 side toward the P-type Si _1-x Ge _x strain inversion layer 203 side at equal intervals. The lattice constant of the Si _1-x Ge _x semiconductor layer closest to the P-type Si _1-x Ge _x strain inversion layer 203 is equal to the lattice constant of the P-type Si _1-x Ge _x light absorption layer 204. The thickness of each of the plurality of P-type Si _1-x Ge _x semiconductor layers constituting the P-type Si _1-x Ge _x buffer layer 202 is a misfit transition estimated from the difference in lattice constant between the upper and lower layers. The thickness is set to a thickness at which the three-dimensional island growth does not occur. The P-type Si _1-x Ge _x buffer layer 202 gradually increases the lattice constant of the underlying P-type Si substrate 201 and the plurality of P-type Si _1-x Ge _x semiconductor layers while minimizing the density of transition. Used to adapt to

The P _- type Si _1-x Ge _x strain inversion layer 203 formed between the P-type Si _1-x Ge _x buffer layer 202 and the P-type Si _1-x Ge _x light absorption layer 204 is composed of a P-type Si _1- It is provided in order to generate a compressive strain stress that is a strain component opposite to the tensile stress generated in the _x Ge _x light absorption layer 204 and to further inhibit the propagation of the transition. The P-type Si _1-x Ge _x light absorption layer 204 is used to absorb external light and generate electron-hole pairs (carriers).

The amorphous silicon layer 212 has a structure in which an intrinsic amorphous silicon layer 205 and an N-type amorphous silicon layer 206 are stacked, and corresponds to the semiconductor bonding layer 105 in FIG. The intrinsic amorphous silicon layer 205 is heterojunction with the P-type Si _1-x Ge _x light absorption layer 204. The N-type amorphous silicon layer 206 has an ITO transparent electrode layer 207 formed on the surface. The amorphous silicon layer 212 is used to form a pn junction for collecting carriers generated in the P-type Si _1-x Ge _x light absorption layer 204. The ITO transparent electrode layer 207 and the Al electrode layer 101 are used for taking out the generated carriers to the outside.

  Next, an embodiment of the method for manufacturing a solar cell of the present invention will be described by taking as an example the case of manufacturing the single crystal SiGe heterojunction solar cell 210 of FIG.

First, a P _- type Si _1-x Ge _x buffer layer 202, a P-type Si _1-x Ge _x strain inversion layer 203, and a P-type Si _1-x Ge _x light absorption layer 204 are sequentially formed on the P-type Si substrate 201. The stacked single crystal Si _1-x Ge _x layer 211 is formed using an ultrahigh vacuum deposition method (for example, a molecular beam epitaxy (MBE) method, a chemical vapor deposition (CVD) method, or the like). When the MBE method is adopted, for example, Si and Ge having a high melting point are heated by an electron beam, and gallium (Ga) used for P-type doping is heated by a Knudsen cell. By this heating method, the formation rate of all the layers 202 to 204 constituting the single crystal Si _1-x Ge _x layer 211 is formed at a constant rate of 2.8 Å / sec. Further, all the layers 202 to 204 constituting the single crystal Si _1-x Ge _x layer 211 are formed at 550 ° C., and no cross-hatch structure is observed on the surface.

Of all the layers 202 to 204 constituting the single crystal Si _1-x Ge _x layer 211, an ultrahigh vacuum is formed each time a plurality of semiconductor layers constituting the P-type Si _1-x Ge _x buffer layer 202 are formed. A rapid heat treatment is performed at 900 ° C. for 3 minutes. This rapid heat treatment is performed to promote complete lattice relaxation and formation of confinement structures by dislocation loops. The lattice constant of the P-type Si _1-x Ge _x strain inversion layer 203 formed between the P-type Si _1-x Ge _x buffer layer 202 and the P-type Si _1-x Ge _x light absorption layer 204 is More than the lattice constants of the P-type Si _1-x Ge _x buffer layer and the P-type Si _1-x Ge _x light absorption layer 204 formed in contact with the upper and lower surfaces of the P-type Si _1-x Ge _x strain inversion layer 203. For example, it is set larger by about 0.017 to 0.019 mm.

This is due to the following reason. A plurality of P-type Si _1-x Ge x semiconductor layers constituting the P-type Si _1-x Ge x buffer layer 202, the lattice constant on the lattice constant is small P-type Si _1-x Ge x semiconductor layer greater P repeats that the type Si _1-x Ge _x semiconductor layer is formed, compressive strain in all P-type Si _1-x Ge _x formation process of semiconductor layers constituting the P-type Si _1-x Ge _x buffer layer 202 Stress is generated. Here, when the P-type Si _1-x Ge _x strain inversion layer 203 is introduced, the lattice constant of the P _- type Si _1-x Ge _x strain inversion layer 203 is P-type Si _1-x Ge _x light absorption layer 204. Therefore, a tensile strain stress is generated in the P-type Si _1-x Ge _x light absorption layer 204. This is a strain component opposite to the compressive strain stress generated in the P-type Si _1-x Ge _x buffer layer 202 and can further inhibit dislocation propagation to the P-type Si _1-x Ge _x light absorption layer 204. .

Next, an intrinsic amorphous silicon layer 205 and an N-type amorphous silicon layer 206 are formed in this order on the single crystal Si _1-x Ge _x layer 211. The amorphous silicon layer 212 including the intrinsic amorphous silicon layer 205 and the N-type amorphous silicon layer 206 is formed by, for example, a plasma chemical vapor deposition (CVD) method.

  Subsequently, an ITO transparent electrode layer 207 is formed on the amorphous silicon layer 212. Finally, a comb-shaped Al electrode layer 208 is formed on the ITO transparent electrode layer 207, and an Al electrode layer 209 is further formed on the entire back surface of the P-type Si substrate 201. The ITO transparent electrode layer 207, the Al electrode layer 208, and the P-type Si substrate 201 are formed by a vacuum deposition method. In this way, the single crystal SiGe heterojunction solar cell 210 having the cross-sectional structure of FIG. 2 is manufactured.

  Next, examples of the single crystal SiGe layer of the present invention will be described. FIG. 3 shows a cross-sectional view of Example 1 of the single crystal SiGe layer 211 constituting the single crystal SiGe heterojunction solar cell 210 shown in FIG. In FIG. 3, the same components as those in FIG.

In FIG. 3, on a P-type Si substrate 201, a P-type Si _1-x Ge _x buffer layer 202, a P-type Si _0.51 Ge _0.49 strain inversion layer 307, and a P-type Si _0.58 Ge _0.42 light having a laminated structure of six semiconductor layers. An absorption layer 308 is stacked. The P-type Si _0.51 Ge _0.49 strain inversion layer 307 is an example of the P-type Si _1-x Ge _x strain inversion layer 203 of FIG. 2, and the P-type Si _0.58 Ge _0.42 light absorption layer 308 is the P-type Si _{1 in} FIG. _This is an example of the _-x Ge _x light absorption layer 204. The formation temperatures of the P-type Si _1-x Ge _x buffer layer 202, the P-type Si _0.51 Ge _0.49 strain inversion layer 307, and the P-type Si _0.58 Ge _0.42 light absorption layer 308 constituting the single crystal SiGe layer 111 shown in FIG. Is set in a high temperature region of 550 ° C. for the purpose of promoting two-dimensional growth and suppressing the incorporation of residual impurities in the ultra-high vacuum into the crystal.

As shown in FIG. 3, the P-type Si _1-x Ge _x buffer layer 202 includes a P-type Si _0.93 Ge _0.07 semiconductor layer 301 (thickness 400 nm) and a P-type Si _0.86 Ge _0.14 semiconductor in this order from the P-type Si substrate 201 side. Layer 302 (thickness 400 nm), P-type Si _0.79 Ge _0.21 semiconductor layer 303 (thickness 400 nm), P-type Si _0.72 Ge _0.28 semiconductor layer 304 (thickness 400 nm), P-type Si _0.65 Ge _0.35 semiconductor layer 305 (thickness) 400 nm), a P-type Si _0.58 Ge _0.42 semiconductor layer 306 (thickness 400 nm) is laminated. A P-type Si _0.51 Ge _0.49 strain inversion layer 307 (thickness 400 nm) is formed on the uppermost P-type Si _0.58 Ge _0.42 semiconductor layer 306.

As shown in the Ge composition ratio versus film thickness characteristic of FIG. 4, a P-type Si _0.93 Ge _0.07 semiconductor layer 301, a P-type Si _0.86 Ge _0.14 semiconductor layer 302, a P-type Si _0.79 Ge _0.21 semiconductor layer 303, and a P-type Si _0.72 Ge _{The 0.28} semiconductor layer 304, the P-type Si _0.65 Ge _0.35 semiconductor layer 305, the P-type Si _0.58 Ge _0.42 semiconductor layer 306, and the P-type Si _0.51 Ge _0.49 strain inversion layer 307 have the same film thickness of 400 nm and a Ge composition ratio. Changes by 0.07. Since the lattice constants of the P-type Si _0.93 Ge _0.07 semiconductor layer 301 to the P-type Si _0.58 Ge _0.42 semiconductor layer 306 and the P-type Si _0.51 Ge _0.49 strain inversion layer 307 vary depending on the composition ratio of Si and Ge, these are the steps. The lattice constant increases at regular intervals. The P-type Si _0.93 Ge _0.07 semiconductor layer 301 to the P-type Si _0.58 Ge _0.42 semiconductor layer 306 and the P-type Si _0.51 Ge _0.49 strain inversion layer 307 are subjected to a rapid heat treatment at 900 ° C. for 3 minutes every time each layer is formed.

A P-type Si _0.58 Ge _0.42 light absorption layer 308 is formed with a thickness of 2 μm on the P-type Si _0.51 Ge _0.49 strain inversion layer 307. At this time, the lattice constant of the P-type Si _0.58 Ge _0.42 light absorption layer 308 is smaller than that of the P-type Si _0.51 Ge _0.49 strain inversion layer 307, and the difference is 0.017Å.

FIG. 5 shows reciprocal lattice mapping of the 224 diffraction plane in the high-resolution X-ray diffraction of the single crystal SiGe layer 211 produced by the above method. As shown in the figure, all the layers of the single crystal SiGe layer 202 are completely strain-relaxed, and the P-type Si _0.51 Ge _0.49 strain inversion layer 307 is compressed because the mapping center is shifted to the right side from the oblique dotted line. On the other hand, the P-type Si _0.58 Ge _0.42 light absorption layer 308 shows a state where the mapping center is shifted to the left side from the oblique dotted line and a tensile strain stress is generated. By this analysis method, it can be seen that opposite strain stresses are generated between the P-type Si _0.51 Ge _0.49 strain inversion layer 307 and the P-type Si _0.58 Ge _0.42 light absorption layer 308.

Next, the results of a trial experiment regarding the conditions for forming the P-type Si _1-x Ge _x buffer layer 202 will be described with reference to Table 1. Table 1 summarizes the influence of the structure of the P _- type Si _1-x Ge _x buffer layer 202 on the dislocation density and surface roughness average (RMS) value of the P-type Si _0.58 Ge _0.42 light absorption layer 308.

Table 1 shows the increment of Ge composition in the six single crystal SiGe layers 211 of Sample A to Sample F, the thickness (nm) of each semiconductor layer constituting the P-type Si _1-x Ge _x buffer layer 202, the number of layers, Presence / absence of P-type Si _0.51 Ge _0.49 strain inversion layer 307, Ge composition ratio (%) of P-type Si _0.58 Ge _0.42 light absorption layer 308, and formation of each semiconductor layer constituting P-type Si _1-x Ge _x buffer layer 202 The subsequent rapid heat treatment temperature (° C.), average surface roughness (RMS) (nm), and dislocation density (cm ⁻² ) of the P-type Si _0.58 Ge _0.42 light absorption layer 308 are shown.

Sample A to Sample F show the values of the parameters of the single-crystal SiGe layer 211 of this example manufactured by the above-described manufacturing method, and Samples B to F of the other samples show the values of the parameters of the comparative example. Indicates. Sample A (this example) in Table 1 has an average surface roughness (RMS) of the P-type Si _0.58 Ge _0.42 light absorption layer 308 of 0.903 nm, a dislocation density of less than 10 ⁵ cm ⁻² , and sample B It turned out that the light absorption layer 308 excellent in crystallinity compared with -E was obtained. In Sample A, since the buffer layer is composed of only a multi-layer semiconductor layer, a single crystal SiGe layer can be manufactured with simple control compared to the method described in Patent Document 1.

On the other hand, the sample B in Table 1 has a configuration in which the P-type Si _0.51 Ge _0.49 strain inversion layer 307 is not formed unlike the sample A. In this configuration, the surface roughness average of the P-type Si _0.58 Ge _0.42 light absorption layer 308 is obtained. The value (RMS) is 1.219 nm, and the dislocation density is 1.1 × 10 ⁷ cm ⁻² . This indicates that the introduction of the P-type Si _0.51 Ge _0.49 strain inversion layer 307 is effective in inhibiting dislocation propagation to the P-type Si _0.58 Ge _0.42 light absorption layer 308.

Sample C in Table 1 has a configuration in which the rapid heat treatment temperature after the formation of each semiconductor layer constituting the P-type Si _1-x Ge _x buffer layer 202 is 800 ° C. and the heating time is 3 minutes. Different from sample A. In this configuration, the P-type Si _0.58 Ge _0.42 light absorption layer 308 has an average surface roughness (RMS) of 3.32 nm and a dislocation density of 3.0 × 10 ⁷ cm ⁻² . This indicates that the rapid heat treatment promotes the formation of a confinement structure due to complete lattice relaxation and dislocation loops from comparison with Samples A and B. It also shows that the rapid heat treatment temperature suitable for obtaining this effect is around 900 ° C.

Sample D in Table 1 is different from Sample A in that the thickness of each semiconductor layer constituting the P-type Si _1-x Ge _x buffer layer 202 is 150 nm. In this configuration, the P-type Si _0.58 Ge _0.42 light absorption layer 308 has an average surface roughness (RMS) of 2.659 nm and a dislocation density of 2.0 × 10 ⁸ cm ⁻² . This indicates that in order to confine dislocations in each semiconductor layer, a film thickness of a certain level or more is necessary, and the film thickness is about 400 nm as in this embodiment.

In Sample E in Table 1, the number of semiconductor layers constituting the P-type Si _1-x Ge _x buffer layer 202 is the same as that in the example, but the increment of the Ge composition ratio of each semiconductor layer is 400 nm. The interval is increased to 12.0%, and the composition of the P-type light absorption layer is different from that of the sample A in that the composition is Si _0.28 Ge _0.72 . In this configuration, the P-type Si _0.28 Ge _0.72 light absorbing layer has an average surface roughness (RMS) of 2.484 nm and a dislocation density of 4.9 × 10 ⁷ cm ⁻² . This is because the difference in lattice constant between the semiconductor layers constituting the P-type Si _1-x Ge _x buffer layer 202 is large, and a larger number of misfit dislocations are intensively generated, so that the surface flatness deteriorates. It shows that even when a sufficient film thickness is deposited, dislocations propagate to the upper layer without being confined.

Further, Sample F in Table 1 conforms to the conditions of the P-type Si _1-x Ge _x buffer layer 202 of Sample A, and the number of semiconductor layers is increased to 9 to make the P-type light absorption layer Si _0.30. This is a configuration formed of Ge _0.70 . In this configuration, the P-type Si _0.30 Ge _0.70 light absorption layer has an average surface roughness (RMS) of 1.409 nm and a dislocation density of less than 10 ⁵ cm ⁻² . This indicates that a single crystal light absorption layer having excellent crystallinity similar to Sample A can be obtained.

Based on the results of the trial experiment shown in Table 1, as a modification of the present invention, a structure in which the structure according to the conditions of the P-type Si _1-x Ge _x buffer layer 202 formed by the above-described manufacturing method is expanded, that is, P-type Si. By increasing or decreasing the number of semiconductor layers constituting the _1-x Ge _x buffer layer 202, the Ge composition ratio x is P-type Si having excellent crystallinity at an arbitrary composition ratio in the range of 0 to 0.95. _{The 1-x} Ge _x light absorption layer 203 can be formed. As a further modification of the present invention, it is possible to form a high-quality P-type Si _1-x Ge _x light absorption layer 104 having an arbitrary thickness of 2 μm or more.

  Next, an example of the semiconductor junction layer 105 constituting the single crystal SiGe layer of the present invention will be described. The amorphous silicon layer 212 shown in FIG. 2 corresponding to the semiconductor bonding layer 105 is laminated on the single crystal SiGe layer 211 in this order: an intrinsic amorphous silicon layer 205 having a thickness of 10 nm and an N-type amorphous silicon layer 206 having a thickness of 50 nm. The structure of the heterojunction layer. The intrinsic amorphous silicon layer 205 and the N-type amorphous silicon layer 206 are formed by, for example, a plasma chemical vapor deposition (CVD) method.

Next, the characteristics of the solar cell of this example will be described. In FIG. 6, curve I represents the voltage versus current density characteristics of a single crystal Si _0.58 Ge _0.42 heterojunction solar cell 210 fabricated using sample A in Table 1, and curve II represents sample D in Table 1 as a comparative example. The voltage versus current density characteristics of the solar cell fabricated in this way are shown. As shown in FIG. 6, according to the single-crystal Si _0.58 Ge _0.42 heterojunction solar cell 210 fabricated using the sample A, good rectification is shown, and the solar cell under AM1.5 white bias irradiation As output characteristics, a photoelectric conversion efficiency of 0.98%, an open circuit voltage of 233 mV, a short circuit current density of 8.251 mA / cm ² , and a characteristic factor of 0.5509 were obtained. On the other hand, it can be seen that the solar cell manufactured using the sample D having a high dislocation density has a large leakage current and poor rectification as shown by a curve II in FIG.

Next, the external quantum efficiency of the solar cell of this example will be described. FIG. 7 shows a comparison of wavelength vs. external quantum efficiency characteristics of the single crystal Si _0.58 Ge _0.42 heterojunction solar cell and the Si heterojunction solar cell of the present invention. In FIG. 7, curve III shows the wavelength vs. external quantum efficiency characteristics of the single crystal Si _0.58 Ge _0.42 heterojunction solar cell of the present invention, and curve IV shows the wavelength vs. external quantum efficiency characteristics of the Si heterojunction solar cell. The single crystal Si _0.58 Ge _0.42 heterojunction solar cell of the present invention is a conventional solar cell in which the light absorption layer is made of Si, whereas the light absorption edge is 1200 nm as shown by curve III in FIG. A certain Si heterojunction solar cell has a light absorption edge of 1100 nm as shown by a curve IV in FIG. 7, and the change in the forbidden bandwidth is theoretically consistent.

According to the modification of the present invention, the absorption edges of the external quantum efficiency measurements of the single crystal Si _0.4 Ge _0.6 heterojunction solar cell and the Si _0.3 Ge _0.7 heterojunction solar cell are 1250 nm and 1300 nm, respectively. By using the method of the first embodiment, a high-quality Si _0.4 Ge _0.6 single crystal heterojunction solar cell designed to have an arbitrary forbidden bandwidth between 0.7 eV and 1.1 eV can be obtained.

In the above embodiment and examples, the present invention has been described on the assumption that the Si substrate 101 is P-type. However, when the Si substrate 101 is N-type, the Si _1-x Ge _x buffer layer 102, Si _{Both the 1-x} Ge _x strain inversion layer 103 and the Si _1-x Ge _x light absorption layer 104 need to be N-type, and the semiconductor junction layer 105 needs to be P-type. Further, all of the plurality of Si _1-x Ge _x semiconductor layers constituting the N-type Si _1-x Ge _x buffer layer 102 must be N-type, but the Ge composition ratio x is shown in FIG. Same as example. In the case where the P-type semiconductor bonding layer 105 is composed of an amorphous silicon layer, a P-type amorphous silicon layer is formed on the light absorption layer via an intrinsic amorphous silicon layer.

The semiconductor bonding layer 105 is not limited to an amorphous silicon layer. For example, a III-V group compound semiconductor such as N-type or P-type Si _1-x Ge _x single crystal, N-type or P-type InGaP is used. It is also possible to use it. That is, the semiconductor junction layer 105 is a heterojunction layer or a homojunction layer. In the case of a heterojunction layer, the intrinsic amorphous silicon layer formed on the Si _1-x Ge _x light absorption layer and the intrinsic amorphous silicon An amorphous silicon layer formed on the Si _1-x Ge _x light absorption layer and an amorphous silicon layer of the opposite conductivity type, or III-V of the opposite conductivity type to the Si _1-x Ge _x light absorption layer. In the case of a homojunction layer, it is composed of a Si _1-x Ge _x single crystal having a conductivity type opposite to that of the Si _1-x Ge _x light absorption layer. Further, the electrode layers 107 and 108 can be made of conductive electrodes other than Al.

  The single crystal SiGe layer of the present invention can be applied to a bipolar transistor, a high electron mobility transistor, a light emitting element, and a light receiving element in addition to the above-described heterojunction solar cell.

100 single-crystal SiGe layer 101 Si substrate 102 S _1-x Ge x buffer layer 103 S _1-x Ge x strained inversion layer 104 S _1-x Ge x light absorbing layer 105 semiconductor junction layer 106 transparent electrode layer 107 electrode layer 201 P-type Si substrate 202 P-type S _1-x Ge _x buffer layer 203 P-type S _1-x Ge _x strain inversion layer 204 P-type S _1-x Ge _x light absorption layer 205 Intrinsic amorphous silicon layer 206 N-type amorphous silicon Layer 207 ITO transparent electrode layer 208, 209 Al electrode layer 210 Single crystal SiGe heterojunction solar cell 211 Single crystal S _1-x Ge _x layer 212 Amorphous silicon layer

Claims (6)

A plurality of Si _1-x Ge _x semiconductor layers (where 0 ≦ x ≦ 0.95; the same shall apply hereinafter) having different lattice constants are stacked on a P-type or N-type Si substrate, and the Si substrate And a buffer layer forming step of forming a Si _1-x Ge _x buffer layer for gradually adapting a lattice constant of the plurality of Si _1-x Ge _x semiconductor layers;
A strain inversion layer forming step of forming a Si _1-x Ge _x strain inversion layer that generates compressive strain stress on the Si _1-x Ge _x buffer layer;
A light absorption layer forming step of forming a Si _1-x Ge _x light absorption layer that absorbs external light and generates carriers on the Si _1-x Ge _x semiconductor layer;
A single-crystal SiGe layer in which the buffer layer, the strain inversion layer, and the light absorption layer, each having the same conductivity type as the Si substrate, are stacked on the Si substrate. Layer manufacturing method. In the buffer layer forming step, the lattice constants of the plurality of Si _1-x Ge _x semiconductor layers increase in order from the Si substrate side, and the Si _1-x Ge _x semiconductor layer having the largest lattice constant is formed as the uppermost layer. And
The strained inversion layer forming step, on the Si _1-x Ge _x semiconductor layer of the buffer layer forming step wherein a lattice constant which is formed by the largest uppermost, the lattice constant of the uppermost Si _1-x Ge _{2. The} method for producing a single crystal SiGe layer according to claim 1, wherein a Si _1-x Ge _x semiconductor layer larger than a lattice constant of the _x semiconductor layer by 0.017 to 0.019 is formed as the strain inversion layer. The light absorbing layer forming step, equal Si _1-x Ge _x semiconductor layer lattice constant of the Si _1-x Ge _x semiconductor layer of the lattice constant lattice constant is formed in the buffer layer forming step the largest top layer The single crystal SiGe layer manufacturing method according to claim 2, wherein the Si _1-x Ge _x light absorption layer is formed. 2. The buffer layer forming step is characterized by performing a rapid heat treatment at 900 ° C. for 3 minutes in an ultrahigh vacuum for each semiconductor layer formation of the plurality of Si _1-x Ge _x semiconductor layers. Or the manufacturing method of the single-crystal SiGe layer of 2. A plurality of Si _1-x Ge _x semiconductor layers (provided that the lattice constant increases in order from the Si substrate side and has the same conductivity type as that of the Si substrate). ≦ x ≦ 0.95; the same shall apply hereinafter), and a Si _1-x Ge _x buffer layer,
A Si _1-x Ge _x strain inversion layer formed on the Si _1-x Ge _x buffer layer and having the same conductivity type as the Si substrate generating compressive strain stress;
A Si _1-x Ge _x light absorption layer formed on the Si _1-x Ge _x semiconductor layer and having the same conductivity type as the Si substrate for absorbing external light and generating carriers;
A semiconductor junction layer for forming a pn junction for collecting carriers generated in the light absorption layer, formed on the Si _1-x Ge _x light absorption layer;
A transparent electrode layer formed on the semiconductor bonding layer for extracting the carriers to the outside;
A solar cell comprising: The semiconductor junction layer is a heterojunction layer or a homojunction layer,
The heterojunction layer has a the Si _1-x Ge _x absorber layer intrinsic amorphous silicon layer formed on a said formed over the intrinsic amorphous silicon layer Si _1-x Ge _x light absorbing layer An amorphous silicon layer composed of an amorphous silicon layer of opposite conductivity type, or a III-V group compound semiconductor of the opposite conductivity type to the Si _1-x Ge _x light absorption layer,
The solar cell according to claim 5, wherein the homojunction layer is composed of a Si _1-x Ge _x single crystal having a conductivity type opposite to that of the Si _1-x Ge _x light absorption layer.

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