JP2014045433A - Frequency error detector, frequency error detection method and receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a frequency error detector which can detect a carrier frequency error with small operation amount.SOLUTION: A first frequency error detection unit 21 includes a known signal extraction unit 31 for extracting a reception known signal from a complex symbol signal, a complex operation unit 32 for performing first complex operation of a sequence of reception known signals and cancelling the phase rotation component, a reference signal supply unit 33 for supplying a sequence of reference complex signals generated by performing the same operation as the first complex operation of a sequence of known signals, a correlation operation unit 36 for calculating distribution of mutual correlation value between the output sequence from the complex operation unit and the sequence of reference complex signals, and a peak detection unit 37 for detecting a carrier frequency error by detecting a distribution having a maximum peak from these distributions.

Description

  The present invention relates to a technique for receiving a signal transmitted using a plurality of subcarriers according to a frequency division multiplexing method and detecting an error included in the received signal.

  In general, in a receiver that generates a baseband received signal of a baseband by orthogonally demodulating a received signal in a carrier band (carrier frequency band), there is an error between the carrier frequency used for orthogonal demodulation and the carrier frequency of the received signal (Hereinafter also referred to as “frequency error”) may cause transmission data to be erroneously reproduced. Therefore, this type of receiver has a function of detecting a frequency error and correcting it.

  The Orthogonal Frequency Division Multiplexing (OFDM) scheme is a scheme for generating a transmission signal by digitally modulating and multiplexing a plurality of subcarriers (subcarriers) that are orthogonal to each other. And widely used in the communication field. As digital modulation adopted in the OFDM system, for example, QPSK (Quadrature Phase Shift Keying), QAM (Quadrature Amplitude Modulation), or DQPSK (Differential Encoded Quadrature Phasing) is used.

  A technique for detecting a frequency error with respect to an OFDM received signal is disclosed in, for example, Japanese Patent No. 3556047 (Patent Document 1) and Japanese Patent No. 4563622 (Patent Document 2).

  The digital broadcast receiving apparatus disclosed in Patent Document 1 can detect a frequency error in units of carrier intervals based on DFT processing means for performing DFT (Discrete Fourier Transform) on an OFDM received signal and output of the DFT processing means. A first frequency error detector and a second frequency error detector capable of detecting a frequency error within the carrier interval based on the output of the DFT processing means are provided. Here, the first frequency error detector and the second frequency error detector perform IDFT (Inverse Discrete Fourier Transform) operation on the received known signal (phase reference symbol) extracted from the output of the DFT processing means, A frequency error is detected using the calculation result.

  On the other hand, Patent Document 2 discloses an OFDM demodulator that can detect an error when a time error (symbol timing error) occurs in symbol timing. The OFDM demodulator calculates a two-dimensional correlation function based on the currently received complex symbol signal on the frequency axis and the reference signal information corresponding to the complex symbol signal, and the complex symbol signal on the frequency axis based on the two-dimensional correlation function. Frequency error and symbol timing error are detected. Here, the reference signal information is information stored in the memory in advance assuming that a symbol timing shift occurs in a specific subcarrier.

Japanese Patent No. 3556047 (paragraphs 0037 to 0042, FIG. 2, etc.) Japanese Patent No. 4563622 (paragraphs 0025 to 0030, FIG. 2, etc.)

  Since the digital broadcast receiving apparatus disclosed in Patent Document 1 detects a frequency error using IDFT (Inverse Discrete Fourier Transform), the calculation amount of the IDFT is large and it takes time to detect the frequency error. Alternatively, when the first frequency error detector and the second frequency error detector are implemented as hardware, there is a problem that the circuit configuration is likely to increase in scale.

  On the other hand, in the OFDM demodulator disclosed in Patent Document 2, a reference signal for each specific subcarrier must be stored in a memory in advance, and if a large number of reference signals are not prepared in advance, a symbol timing error The detection range is limited. For this reason, there is a problem that the method of Patent Document 2 lacks practicality.

  In view of the above, an object of the present invention is to provide a frequency error detection device capable of detecting a carrier frequency error with a small amount of calculation, a receiving device having the same, and a frequency error detection method.

  A frequency error detection apparatus according to a first aspect of the present invention receives a transmission signal frequency-division multiplexed using a plurality of subcarriers having different subcarrier frequencies from a transmitter, and generates a reception signal in a carrier band. An output receiving unit; an orthogonal demodulating unit that orthogonally demodulates the received signal to generate a complex baseband signal; and an orthogonal converting unit that performs orthogonal transformation on the complex baseband signal to generate a frequency-domain complex symbol signal; A frequency error detecting device for detecting a carrier frequency error in a receiving device comprising: a known signal extracting unit for extracting a received known signal from the complex symbol signal; and a first complex for the received known signal sequence. A complex operation unit that cancels a phase rotation component given to the received known signal at the time of the orthogonal transform by performing an operation; and A reference signal for supplying a reference complex signal sequence generated by executing the same second complex operation as the first complex operation on the same known signal sequence as the known signal sequence used in the receiver A supply unit; a correlation calculation unit for calculating a plurality of cross-correlation value distributions between the complex signal sequence output from the complex calculation unit and the reference complex signal sequence; and a maximum peak from the plurality of distributions. And a correlation detector that calculates the plurality of distributions by shifting a relative position on the frequency axis of the complex signal sequence a plurality of times with respect to the reference complex signal sequence. The peak detection unit detects the carrier frequency error based on a shift amount of the relative position corresponding to the distribution having the maximum peak.

  A receiving apparatus according to a second aspect of the present invention receives a transmission signal subjected to frequency division multiplexing using a plurality of subcarriers having different subcarrier frequencies from a transmitter and outputs a reception signal in a carrier band. A reception unit, a local oscillator that generates an oscillation signal having a local oscillation frequency, an orthogonal demodulation unit that generates a complex baseband signal by orthogonally demodulating the reception signal using the oscillation signal, and a complex baseband signal An orthogonal transform unit that performs orthogonal transform to generate a frequency-domain complex symbol signal, a known signal extraction unit that extracts a received known signal from the complex symbol signal, and a first complex operation for the received known signal sequence Used in the transmitter, and a complex arithmetic unit that cancels a phase rotation component given to the received known signal during the orthogonal transform by executing A reference signal supply unit that supplies a sequence of reference complex signals generated by executing the same second complex operation as the first complex operation on the same known signal sequence as the known signal sequence; A correlation calculation unit for calculating a plurality of cross-correlation value distributions between the complex signal sequence output from the complex calculation unit and the reference complex signal sequence; and a distribution having a maximum peak from the plurality of distributions. A peak detection unit for detecting, wherein the correlation calculation unit calculates the plurality of distributions by shifting a relative position on the frequency axis of the complex signal sequence with respect to the reference complex signal sequence a plurality of times, and A detection unit that detects the carrier frequency error based on a shift amount of the relative position corresponding to the distribution having the maximum peak; and the local oscillator detects the local oscillation frequency so as to reduce the carrier frequency error. And controlling the.

  According to a third aspect of the present invention, there is provided a frequency error detection method that receives a transmission signal that has been subjected to frequency division multiplexing using a plurality of subcarriers having different subcarrier frequencies from a transmitter and generates a received signal in a carrier band. A frequency error detection method for detecting a carrier frequency error in a receiver that outputs and generates a complex baseband signal by orthogonally demodulating the received signal, and is generated by performing orthogonal transform on the complex baseband signal Extracting a known reception signal from a complex symbol signal, and performing a first complex operation on the sequence of the known reception signal, thereby providing a phase rotation component given to the known reception signal during the orthogonal transform And canceling the first complex operation on the same known signal sequence as the known signal sequence used in the transmitter; A step of supplying a sequence of reference complex signals generated by executing a second complex operation; and a frequency axis of the sequence of reference complex signals with respect to the sequence of complex signals that is a result of executing the first complex operation A step of calculating a plurality of cross-correlation value distributions between the complex signal sequence and the reference complex signal sequence by shifting the upper relative position a plurality of times, and detecting a maximum peak from the plurality of distributions And a step of detecting the carrier frequency error based on a shift amount of the relative position corresponding to the maximum peak.

  According to the present invention, it is not necessary to use an inverse Fourier transform in order to avoid the influence of phase rotation caused by a time error in orthogonal transform. For this reason, the amount of calculation can be significantly reduced. Therefore, when the frequency error detection device is realized by hardware, the circuit configuration can be reduced in size and power consumption can be reduced.

It is a functional block diagram which shows schematic structure of the receiver of Embodiment 1 which concerns on this invention. (A)-(C) are figures which show roughly the structure of the transmission frame of DAB standard. 3 is a functional block diagram illustrating a configuration example of a second frequency error detection unit according to the first embodiment. FIG. 3 is a functional block diagram illustrating a schematic configuration of a first frequency error detection unit according to the first embodiment. FIG. 3 is a functional block diagram illustrating a schematic configuration of a first complex operation unit according to Embodiment 1. FIG. (A)-(C) is a figure which shows roughly the signal value corresponding to a subcarrier frequency. 3 is a functional block diagram illustrating a schematic configuration of a second complex arithmetic unit according to the first embodiment. FIG. FIG. 3 is a functional block diagram illustrating a schematic configuration of a correlation calculation unit according to the first embodiment. (A) is a graph showing an example of a cross-correlation value distribution when the carrier frequency error is zero, and (B) is a cross-correlation value distribution when there are carrier frequency errors for +5 subcarriers. It is a graph which shows an example. It is a figure which shows the state which makes the synchronous symbol corresponding to every other subcarrier concerning Embodiment 2 which concerns on this invention process. It is a functional block diagram which shows schematic structure of the 1st frequency error detection part which concerns on Embodiment 3 which concerns on this invention. It is a functional block diagram which shows schematic structure of the 1st frequency error detection part which concerns on Embodiment 4 which concerns on this invention. It is a figure which shows roughly the synchronizing symbol in the range with large distortion, and the synchronizing symbol in the range with small distortion. It is a functional block diagram which shows schematic structure of the 1st frequency error detection part which concerns on Embodiment 5 which concerns on this invention. It is a functional block diagram of the arithmetic unit which shows the structure in the case of implement | achieving the function of the 1st frequency error detection part 21,21B-21D of Embodiment 1-5 with a computer program. It is a flowchart which shows an example of the process sequence of Embodiment 6 which concerns on this invention. 18 is a flowchart illustrating a part of a processing procedure according to the sixth embodiment. It is a flowchart which shows an example of the process sequence of Embodiment 7 which concerns on this invention.

  Hereinafter, various embodiments according to the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
FIG. 1 is a functional block diagram showing a schematic configuration of receiving apparatus 1 according to the first embodiment of the present invention. As shown in FIG. 1, the receiving apparatus 1 according to the present embodiment includes a receiving antenna element Rx, a tuner unit 11, an A / D converter (ADC) 12, a local oscillator 13, and a quadrature demodulating unit 14.

  The tuner unit 11 receives a radio signal via the receiving antenna element Rx. The tuner unit 11 performs analog signal processing such as tuning processing on the radio signal to generate an analog reception signal in a carrier band, and outputs the analog reception signal to the A / D converter 12. The A / D converter 12 converts the analog reception signal in the carrier band into a digital reception signal and outputs the digital reception signal to the quadrature demodulation unit 14. The digital received signal is a multicarrier signal generated by digitally modulating and multiplexing a plurality of subcarriers (subcarriers) orthogonal to each other. In the present embodiment, an Orthogonal Frequency Division Multiplexing (OFDM) signal is particularly used as the multicarrier signal.

The local oscillator 13 supplies an oscillation signal Os having a variable local oscillation frequency f _S to the quadrature demodulation unit 14. For example, the local oscillator 13 can be configured using a numerically controlled oscillator (NCO). The local oscillation frequency f _S preferably matches the carrier frequency f _C used for transmission of the radio signal by the transmitter (not shown), but does not necessarily match the carrier frequency f _C. For this reason, an error (hereinafter referred to as a carrier frequency error) may exist between the local oscillation frequency f _S and the carrier frequency f _C. The local oscillator 13 sets the local oscillation frequency f _S so as to reduce the carrier frequency error based on the frequency error signals Ds1 and Ds2 supplied from the first frequency error detector 21 and the second frequency error detector 22 described later. It has a variable control function.

  The orthogonal demodulator 14 performs orthogonal demodulation on the carrier wave band digital reception signal using the oscillation signal Os to generate a baseband baseband reception signal r (t). Here, t in r (t) represents time. The baseband received signal r (t) is a complex signal composed of an in-phase component and a quadrature component. When a complex number represented by the complex signal is represented as I + jQ (j is an imaginary unit), the in-phase component is a signal representing the real part I of the complex number, and the quadrature component is the imaginary part Q of the complex number. It is a signal to represent.

  As a transmission format of the received signal, for example, a transmission format of DAB (Digital Audio Broadcasting) standard which is a kind of terrestrial digital audio broadcasting standard can be adopted. 2A to 2C are diagrams schematically showing the configuration of a DAB standard transmission frame. As shown in FIG. 2 (A), each transmission frame is composed of a synchronization channel (Synchronization Channel) section, a FIC (Fast Information Channel) section, and an MSC (Main Series Channel) section. The period of the transmission frame is about 96 milliseconds. As shown in FIG. 2 (B), the synchronization channel section includes a null symbol (Null) and a phase reference symbol (PRS: Phase Reference Symbols).

  The phase reference symbol (PRS) includes a sequence of known symbol signals in a transmitter (not shown), and is generated using, for example, a pseudo random binary code sequence (PRBS). The FIC unit is composed of three FIBs (Fast Information Blocks). Such a transmission frame is composed of a plurality of OFDM symbols except for null symbols.

  As shown in FIG. 2 (C), one OFDM symbol is a GI portion (guard interval) composed of an effective symbol including a plurality of frequency-multiplexed data symbols and the same redundant signal as the signal at the end of the effective symbol. Part). A phase reference symbol (PRS) consists of at least one OFDM symbol. In the present embodiment, the GI unit is arranged immediately before the effective symbol, but is not limited to this. For example, the GI unit may be arranged immediately after the effective symbol.

Note that the k-th subcarrier frequency f _k used in the OFDM signal is given by the following equation, for example.
f _k = fc + k × f ₀

Here, f ₀ = 1 / Tu is established. Tu is an effective symbol period of the OFDM symbol, and fc is a reference carrier frequency. Moreover, k is a subcarrier number and is an arbitrary integer within the range of 0 to N-1 (N is a positive integer). Therefore, the subcarrier frequency interval is f ₀ and is constant.

  As illustrated in FIG. 1, the reception device 1 includes a discrete fast Fourier transform unit (DFT) 15, a differential demodulation unit 16, and a channel decoder 17. The DFT 15 samples a baseband received signal for one effective symbol at a plurality of points, performs a discrete fast Fourier transform on the sampled baseband received signal, and outputs a frequency-domain complex symbol signal. Note that the complex symbol signal may be generated by using another type of orthogonal transform other than the discrete fast Fourier transform.

  The differential demodulator 16 receives complex symbol signals corresponding to the FIC unit and the MSC unit other than the synchronization channel unit from among the outputs of the DFT 15, and differentially demodulates these complex symbol signals to generate a received data sequence. The channel decoder 17 includes a Viterbi decoding unit 18 and a Reed-Solomon decoding unit (RS decoding unit) 19. The Viterbi decoding unit 18 and the RS decoding unit 19 perform Viterbi decoding and Reed-Solomon decoding on the received data series input from the differential demodulation unit 16. The source decoder 20 can obtain the audio data by decoding the output of the channel decoder 17. The configurations of the differential demodulator 16, the channel decoder 17, and the source decoder 20 are merely examples, and the present invention is not limited to the configurations.

  As shown in FIG. 1, the receiving apparatus 1 of the present embodiment includes a first frequency error detection unit 21 and a second frequency error detection unit (narrow frequency error detection unit) 22 that detect a carrier frequency error. . The second frequency error detection unit 22 has a function of detecting a carrier frequency error within the subcarrier frequency interval, and the first frequency error detection unit 21 has a function of detecting a carrier frequency error that is an integral multiple of the subcarrier frequency interval. Have

  FIG. 3 is a functional block diagram illustrating a configuration example of the second frequency error detection unit 22. As illustrated in FIG. 3, the second frequency error detection unit 22 includes a delay unit 41, a correlation calculation unit 42, an averaging unit 43, and a calculation unit 45.

The delay unit 41 delays the baseband received signal r (t) input from the quadrature demodulating unit 14 by the effective symbol period Tu to generate a delayed baseband received signal r (t-Tu). The correlation calculation unit 42 has a function of calculating a cross-correlation between the baseband received signal r (t) and the delayed baseband received signal r (t-Tu) to generate a correlation signal Corr (t). Specifically, the product of the baseband received signal r (t) and the complex conjugate signal r ^* (t-Tu) of the delayed baseband received signal r (t-Tu) is calculated as the correlation signal Corr (t). .

Now, when there is a carrier frequency error Δf within the subcarrier frequency interval between the local oscillation frequency f _S and the carrier frequency f _C , the baseband received signal r (t) has a phase represented by the following equation (1). An error component (= 2π · Δf · t) is included.

  Here, s (t) is a baseband received signal component when there is no carrier frequency error Δf.

As shown in FIG. 2C, the redundant signal in the GI part is the same as the signal at the end of the effective symbol, and therefore the following expression (2) is established.

The correlation calculation unit 42 can calculate a correlation signal Corr (t) given by the following equation (3).

Therefore, the carrier frequency error Δf of this correlation signal Corr (t) can be obtained by the following equation (4).

Here, tan ⁻¹ (x) represents an arctangent function with respect to the variable x, Re (Corr (t)) is a real part of the correlation signal Corr (t), that is, an in-phase component, and Im (Corr (t)) ) Is an imaginary part of the correlation signal Corr (t), that is, an orthogonal component.

  The received signal may be distorted due to the influence of noise and multipath fading. In order to eliminate such influence, the second frequency error detection unit 22 includes an averaging unit 43 that averages the output of the correlation calculation unit 42 over the period of the GI unit. The computing unit 45 can calculate the carrier frequency error Δf using the above equation (4) based on the output of the averaging unit 43. In addition, the arithmetic unit 45 supplies a frequency error signal Ds2 representing the carrier frequency error Δf to the local oscillator 13. Note that the configuration of the second frequency error detection unit 22 is not limited to the configuration illustrated in FIG. 3.

  Next, the configuration of the first frequency error detection unit 21 will be described.

  FIG. 4 is a functional block diagram showing a schematic configuration of the first frequency error detection unit 21. As shown in FIG. 4, the first frequency error detection unit 21 includes a synchronization symbol extraction unit 31, a first complex calculation unit 32, a reference signal supply unit 33, a correlation calculation unit 36, and a peak detection unit 37. .

The synchronization symbol extraction unit 31 has a function of extracting a synchronization symbol corresponding to the phase reference symbol (FIG. 2B) from the complex symbol signal that is the output of the DFT 15 as a received known signal. A synchronization symbol corresponding to the subcarrier frequency f _k is represented by F (f _k ). At this time, the baseband received signal r (t) including the synchronization symbol component F (f _k ) can be expressed by the following equation (5), for example.

The DFT 15 performs N-point discrete Fourier transform on the baseband received signal r (t), thereby generating N synchronization symbols F (f _k ) (k = 0 to N−1) as shown below. Can be output.

However, there may be a time difference (hereinafter referred to as a time error) t ₀ between the processing timing by the DFT 15 and the phase reference symbol. This time error t ₀ is, for example, when the timing at which the DFT 15 samples the baseband received signal r (t) deviates from an appropriate timing, or the start position for sampling the baseband received signal r (t) deviates. Can occur in some cases. When a time error t ₀ occurs in the DFT 15, the DFT 15 synchronizes the synchronization symbol G in which the phase rotation component exp (−j2π · f _k · t ₀ ) is added to the synchronization symbol F (f _k ) as shown below. Output (f _k ).

Therefore, as shown in FIG. 6A, the DFT 15 outputs a synchronization symbol G (f _k ) corresponding to each subcarrier frequency f _k . Synchronization symbols G (f ₀ ), G (f ₁ ), G (f ₂ ), G (f ₃ ),... Are serially input to the first complex operation unit 32 in the order of subcarrier numbers. The first complex operation unit 32 performs the first complex operation on the input synchronization symbol G (f _k ) and cancels the phase rotation component exp (−j2π · f _k · t ₀ ). FIG. 5 is a functional block diagram showing a schematic configuration of the first complex arithmetic unit 32 of the present embodiment. As shown in FIG. 5, the first complex operation unit 32 includes a first signal delay unit 46, a first complex multiplication unit 47, a second signal delay unit 48, and a second complex multiplication unit 49.

The first signal delay unit 46 delays the synchronization symbol input serially to the first complex operation unit 32 by one subcarrier. When the synchronization symbols G to the first complex operation section 32 _{(f k)} is input, the first signal delay section 46, synchronization symbol G _{(f k)} delayed by one sub-carriers than the delayed sync symbols G _{(f k -1} ) is output. The first complex operation unit 32 performs complex multiplication of the delay synchronization symbol G (f _k−1 ) and the complex conjugate G ^* (f _k ) of the input synchronization symbol G (f _k ) to obtain the multiplication signal S (f _k ). Output. This multiplication signal S (f _k ) is given by the following equation (6).

Therefore, the first complex multiplier 47 outputs a multiplication signal S (f _k ) corresponding to each subcarrier frequency f _k as shown in FIG. 6B. Further, the second signal delay unit 48 delays the multiplication signal S (f _k ) input from the first complex multiplication unit 47 by one subcarrier and outputs the delayed signal. When multiplied signal S to a second signal delay section 48 _{(f k)} is input, the second signal delay unit 48, multiplied signal S _{(f k)} delayed by one sub-carriers than the delayed multiplied signal S _{(f k -1} ) is output. The second complex multiplier 49 complex-multiplies the delayed multiplied signal S (f _k−1 ) and the complex conjugate S ^* (f _k ) of the input multiplied signal S (f _k ) to obtain the multiplied signal D (f _k ). Output. This multiplication signal D (f _k ) is given by the following equation (7A).

By arranging the above equation (7A), the multiplication signal D (f _k ) is given by the following equation (7B).

The subcarrier frequency interval is constant. Therefore, when the above equation (7B) is rearranged, as shown in the following equation (7C), a multiplication signal D (f _k ) in which the phase rotation component is canceled can be obtained.

Thus, as shown in FIG. 6C, the second complex multiplier 49 outputs the multiplication signal D (f _k ) corresponding to each subcarrier frequency f _k .

On the other hand, as shown in FIG. 4, the reference signal supply unit 33 performs the same second complex operation as the first complex operation on the sequence of known synchronization symbols used in the transmitter, The resulting reference complex signal R (f _k ) is output. Specifically, the reference signal supply unit 33 includes a known signal generation unit 34 that supplies a known synchronization symbol, and a second complex operation that is the same as the first complex operation with respect to the output of the known signal generation unit 34. And a second complex operation unit 35 that executes FIG. 7 is a functional block diagram illustrating a schematic configuration of the second complex operation unit 35. As shown in FIG. 7, the second complex operation unit 35 has a first signal delay unit 61 having the same delay function as the first signal delay unit 46 and a complex multiplication function the same as the first complex multiplication unit 47. A first complex multiplication unit 62; a second signal delay unit 63 having the same delay function as the second signal delay unit 48; and a second complex multiplication unit 64 having the same complex multiplication function as the second complex multiplication unit 49. doing.

The correlation calculation unit 36 shown in FIG. 4 shifts the relative position on the frequency axis of the sequence of the multiplication signal D (f _k ) with respect to the sequence of the reference complex signal R (f _k ) multiple times, while shifting the reference complex signal R (f _A plurality of cross-correlation value distributions between the _k ) series and the multiplication signal D (f _k ) series are calculated.

FIG. 8 is a functional block diagram illustrating a schematic configuration of the correlation calculation unit 36. As shown in FIG. 8, the correlation calculation unit 36 includes a buffer 70 that temporarily stores the input multiplication signal D (f _k ) and the reference complex signal R (f _k ). The buffer 70 outputs the sequence of the reference complex signal R (f _k ), and at the same time, the subcarrier position (subcarrier number) is shifted by i (i is an integer) with respect to the sequence of the reference complex signal R (f _k ). The sequence of the multiplied signals D (f _k−i ) is output. The complex conjugate unit 71 outputs the complex conjugate R ^* (f _k ) of the reference complex signal R (f _k ) input from the buffer 70.

The complex multiplier 72 multiplies the multiplication signal D (f _k−i ) input from the buffer 70 by the complex conjugate R ^* (f _k ). Then, the complex multiplier 72 separates the real part and the imaginary part from the multiplication result, supplies the real part to the real part accumulator 73, and supplies the imaginary part to the imaginary part accumulator 74.

The real part accumulating part 73 and the imaginary part accumulating part 74 accumulate real parts and imaginary parts for all subcarriers, respectively. Then, the power calculation unit 75 reads the real part from the real part accumulating part 73 and reads the imaginary part from the imaginary part accumulating part 74 to calculate a series of power values as a distribution of cross-correlation values. When the value of the real part is RC and the value of the imaginary part is IC, the power value Pw is given by the following equation (8).
Pw = RC ² + IC ² (8)

Instead of the power value Pw, the amplitude value Am may be calculated as shown in the following equation (9).
Am = (RC ² + IC ² ) ^1/2 (9)

The first complex operation unit 32 generates a plurality of distributions by shifting the relative position (subcarrier position) on the frequency axis of the sequence of the multiplication signal D (f _k ) with respect to the sequence of the reference complex signal R (f _k ) a plurality of times. And applied to the peak detector 37 in FIG. The peak detection unit 37 detects a distribution having a maximum peak value as a power value among a plurality of distributions calculated by the correlation calculation unit 36, and detects a carrier frequency error based on a relative position shift amount corresponding to the distribution. can do.

  FIG. 9A is a graph showing an example of the cross-correlation value distribution when the carrier frequency error is zero, and FIG. 9B shows the mutual correlation when there are carrier frequency errors for +5 subcarriers. It is a graph which shows an example of correlation value distribution. In the case of FIG. 9A, the maximum peak value is formed when the relative position is zero. In the case of FIG. 9B, it can be seen that the maximum peak value is formed when the relative position is a position corresponding to +5 subcarriers.

  Thus, the first frequency error detector 21 detects a carrier frequency error that is an integral multiple of the subcarrier frequency interval, and supplies a frequency error signal Ds1 representing this carrier frequency error to the local oscillator 13.

As described above, in the present embodiment, the first complex operation unit 32 in the first frequency error detection unit 21 has the phase rotation component caused by the time error ₀ even when the time error t ₀ occurs in the DFT 15. The multiplication signal D (f _k ) in which is canceled is generated. Moreover, the correlation calculation part 36 performs a correlation calculation using the said multiplication signal D ( _fk ), and the peak detection part 37 can detect a carrier wave frequency error based on the calculation result. As described above, the first frequency error detection unit 21 according to the present embodiment can detect a carrier frequency error that is an integral multiple of the subcarrier frequency interval without performing the inverse Fourier transform.

  In the prior art disclosed in Patent Document 1, in order to eliminate the influence of time error, the received signal and the complex conjugate of the known signal are subjected to complex multiplication, and then the inverse Fourier transform is performed on the multiplication result. The influence of the phase rotation component due to the time error is eliminated. On the other hand, in the present embodiment, it is possible to eliminate the influence of the phase rotation component due to the time error without performing such inverse Fourier transform.

  Therefore, in this embodiment, the amount of calculation can be greatly reduced. Therefore, when the first frequency error detection unit 21 is realized by hardware, the circuit configuration can be easily reduced in size and power consumption.

In the conventional OFDM receiver described in Patent Document 1, correlation calculation and inverse Fourier transform are executed while shifting by one subcarrier. Here, generally, a known signal is often modulated by BPSK (Binary Phase Shift Keying) or DQPSK, and in this case, there is no need for complex multiplication in correlation calculation. When the number of subcarriers of the target symbol is N and the shift range (detection range) is D, the amount of complex multiplication required for the inverse Fourier transform is approximately as follows.
(N × log ₂ (N)) × D / 2

On the other hand, the amount of computation of complex multiplication in the present embodiment is the amount of computation of complex multiplication executed by the first complex operation unit 32 and the second complex operation unit 35, respectively, and the amount of complex multiplication executed by the correlation operation unit 36. This is the sum of the calculation amount and the number of times is as follows.
N x 4

  Therefore, when N = 1024 and D = 200, the amount of calculation in the method of Patent Document 1 is approximately 1024000, and the amount of calculation in the present embodiment is 4096. Therefore, the calculation amount of the present embodiment is about 1/250 compared with the calculation amount of the method of Patent Document 1, and a large reduction effect is obtained.

  The synchronization symbol is often a signal modulated by BPSK or DQPSK. In such a case, the complex multiplication executed by the first complex calculation unit 32, the second complex calculation unit 35, and the correlation calculation unit 36 is substantially equivalent to complex addition. For this reason, if the configuration of the first complex calculation unit 32, the second complex calculation unit 35, and the correlation calculation unit 36 is optimized according to such a case, the number of calculations becomes N × 2, so that the amount of calculation is further increased. The reduction effect can be expected.

Embodiment 2. FIG.
Next, a second embodiment according to the present invention will be described. The second embodiment is a modification of the first embodiment. In the present embodiment, synchronization symbols corresponding to all N subcarriers are processed, but only synchronization symbols in a predetermined subcarrier range can be processed. In such a case, a further calculation amount reduction effect can be realized. For example, when a synchronization symbol corresponding to half of N subcarriers is to be processed, the amount of calculation can be further reduced to half.

FIG. 10 is a diagram illustrating a state in which synchronization symbols G (f ₀ ), G (f ₂ ), G (f ₄ ), G (f ₆ ),... Corresponding to every other subcarrier are processed. is there. In this case, the first signal delay unit 46 in FIG. 5 delays the synchronization symbol serially input to the first complex operation unit 32 by two subcarriers. When the synchronization symbols G to the first complex operation section 32 _{(f k)} is input, the first signal delay section 46, synchronization symbol G _{(f k)} min 2 subcarriers delay than the delay locked symbol G _{(f k -2} ) is output. The first complex operation unit 32 complex-multiplies the delayed synchronization symbol G (f _k−2 ) and the complex conjugate G ^* (f _k ) of the input synchronization symbol G (f _k ) to obtain the multiplication signal S (f _k ). Output. This multiplication signal S (f _k ) is given by the following equation (10).

Further, the second signal delay unit 48 delays the multiplication signal S (f _k ) input from the first complex multiplication unit 47 by two subcarriers and outputs the delayed signal. When multiplied signal S to a second signal delay section 48 _{(f k)} is input, the second signal delay unit 48, multiplied signal S _{(f k)} min 2 subcarriers delay than the delay multiplied signal S _{(f k -2} ) is output. The second complex multiplier 49 complex-multiplies the delayed multiplied signal S (f _k−2 ) and the complex conjugate S ^* (f _k ) of the input multiplied signal S (f _k ) to obtain the multiplied signal D (f _k ). Output. This multiplication signal D (f _k ) is given by the following equation (11A).

By arranging the above equation (11A), the multiplication signal D (f _k ) is given by the following equation (11B).

The subcarrier frequency interval is constant. Therefore, by rearranging the above equation (11B), as shown in the following equation (11C), a multiplication signal D (f _k ) with the phase rotation component canceled can be obtained.

Therefore, as in the case of the first embodiment, the correlation calculation unit 36 uses the multiplication signal D (f _k ) from which the phase rotation component has been canceled and the corresponding reference complex signal R (f _k ). Correlation operations can be performed. The peak detector 37 can detect a carrier frequency error based on the calculation result.

  Therefore, in the present embodiment, since the synchronization symbols corresponding to all N subcarriers are not processed, the amount of calculation can be reduced. In the present embodiment, even if all the synchronization symbols are not known signals, if there are known signals at regular intervals, the carrier frequency error can be detected using the known signals. It is possible to detect a carrier frequency error even with synchronization symbols having different transmission methods.

  In the above embodiment, the synchronization symbol corresponding to every other subcarrier is the processing target, but the synchronization symbol corresponding to every M subcarriers (M is an integer of 2 or more) is the processing target. It is also possible. In this case, the first signal delay unit 46 and the second signal delay unit 48 may delay the input signal by M subcarriers.

Embodiment 3 FIG.
Next, a third embodiment according to the present invention will be described. FIG. 11 is a functional block diagram illustrating a schematic configuration of the first frequency error detection unit 21B according to the third embodiment. As shown in FIG. 11, the first frequency error detection unit 21B includes a synchronization symbol extraction unit 31, a first complex calculation unit 32, a reference signal supply unit 33B, a correlation calculation unit 36, and a peak detection unit 37. Yes. The configuration of the receiving apparatus of the present embodiment is the same as that of the receiving apparatus 1 of the first embodiment except for the first frequency error detection unit 21B.

As illustrated in FIG. 11, the reference signal supply unit 33B includes a signal storage unit 34B in which the reference complex signal R (f _k ) is stored in advance. The signal storage unit 34B can supply a sequence of the reference complex signal R (f _k ) corresponding to the multiplication signal D (f _k ) output from the first complex calculation unit 32 to the correlation calculation unit 36.

Since the sequence of the reference complex signal R (f _k ) has a property of being a fixed pattern signal sequence, the amount of calculation can be reduced by storing the reference complex signal R (f _k ) in the signal storage unit 34B in advance. Can be reduced. At this time, the number of complex multiplications required in the present embodiment is as follows.
N x 2

  For example, when N = 1024 and D = 200, the number of computations is 2048, so that a reduction effect of about 1/500 is obtained compared to the number of computations of the method of Patent Document 1.

Embodiment 4 FIG.
Next, a fourth embodiment according to the present invention will be described. FIG. 12 is a functional block diagram illustrating a schematic configuration of the first frequency error detection unit 21C according to the fourth embodiment. As shown in FIG. 12, the first frequency error detection unit 21C includes a synchronization symbol extraction unit 31, a first complex calculation unit 32C, a reference signal supply unit 33C, a correlation calculation unit 36C, a peak detection unit 37, and a range selection unit. 38. The reference signal supply unit 33C includes a known signal generation unit 34 and a second complex operation unit 35C.

  The configuration of the receiving apparatus of the present embodiment is the same as that of the receiving apparatus 1 of the first embodiment except for the first frequency error detection unit 21C. Further, the configuration of the synchronization symbol extraction unit 31, the known signal generation unit 34, and the peak detection unit 37 shown in FIG. 12 is the same as that of the synchronization symbol extraction unit 31, the known signal generation unit 34, and the peak detection unit 37 of the first embodiment. Each is the same as the configuration.

  The range selection unit 38 determines the signal quality of the output of the synchronization symbol extraction unit 31, and selects the range of signals to be calculated by the first complex calculation unit 32C and the correlation calculation unit 36C based on the determination result. It has a function. The range selection unit 38 supplies range selection information indicating the selected range to the first complex calculation unit 32C, the second complex calculation unit 35C, and the correlation calculation unit 36C. Specifically, the range selection unit 38 can calculate the power value of the synchronization symbol, compare the power value with a threshold value, and determine the quality of the signal quality of the synchronization symbol according to the comparison result.

The first complex operation unit 32C executes the first complex operation on the synchronization symbol corresponding to the subcarrier range specified by the range selection information, and obtains the multiplication signal D (f _k ) that is the operation result. Output. The second complex operation unit 35C can output the reference complex signal R (f _k ) corresponding to the multiplication signal D (f _k ) based on the range selection information. The correlation calculation unit 36C performs the above-described correlation calculation only for a signal corresponding to the subcarrier range specified by the range selection information.

  As a result, the first frequency error detection unit 21B can detect the carrier frequency error using only a synchronization symbol that has a small distortion and is reliable due to the influence of multipath or the like. FIG. 13 is a diagram schematically showing synchronization symbols in a range where distortion is large and synchronization symbols in a range where distortion is small. In such a case, synchronization symbol information transmitted using subcarriers within a large distortion range is regarded as having low reliability and is not subject to calculation, and only the synchronization symbols within a small distortion range are used for the carrier frequency. An error can be detected. The range selection unit 38 may output the range selection information when subcarrier ranges determined to have good signal quality (small distortion) are continuously present over a specified range.

  As described above, in the present embodiment, since the carrier frequency error is detected using only the synchronization symbol corresponding to the reliable subcarrier range, the signal of the synchronization symbol is distorted due to the influence of multipath or the like. Even in such a case, it is possible to improve the detection accuracy of the carrier frequency error.

Embodiment 5 FIG.
Next, a fifth embodiment according to the present invention will be described. FIG. 14 is a functional block diagram showing a schematic configuration of the first frequency error detection unit 21D according to the fifth embodiment. As shown in FIG. 14, the first frequency error detection unit 21D includes a synchronization symbol extraction unit 31, a first complex calculation unit 32D, a reference signal supply unit 33D, a correlation calculation unit 36D, a peak detection unit 37, and a range selection unit. 38D, a position information storage unit 39, and a calculation target designating unit 40. The reference signal supply unit 33D includes a known signal generation unit 34 and a second complex operation unit 35D.

  The configuration of the receiving apparatus of the present embodiment is the same as that of the receiving apparatus 1 of the first embodiment except for the first frequency error detection unit 21D. The configuration of the synchronization symbol extraction unit 31, the known signal generation unit 34, and the peak detection unit 37 shown in FIG. 14 is the same as that of the synchronization symbol extraction unit 31, the known signal generation unit 34, and the peak detection unit 37 of the first embodiment. Each is the same as the configuration.

  The position information storage unit 39 stores position information of subcarriers selected in advance from the N subcarriers. The range selection unit 38D supplies range selection information for selecting the subcarrier range specified by the position information stored in the position information storage unit 39 to the first complex calculation unit 32D and the second complex calculation unit 35D.

The first complex operation unit 32D performs the first complex operation on the synchronization symbol corresponding to the subcarrier range specified by the range selection information, and obtains a multiplication signal D (f _k ) that is the operation result. Output. The second complex operation unit 35D can output the reference complex signal R (f _k ) corresponding to the multiplication signal D (f _k ) based on the range selection information.

  On the other hand, the calculation target specifying unit 40 specifies a signal corresponding to the subcarrier range specified by the position information stored in the position information storage unit 39 to the correlation calculation unit 36D. Thereby, the correlation calculation unit 36D performs the above-described correlation calculation only for the signal corresponding to the subcarrier range specified by the position information stored in the position information storage unit 39.

  By configuring the first frequency error detection unit 21D in this way, even when there are N subcarriers for transmitting a synchronization symbol, K subcarriers (K <N) out of the N subcarriers. Complex computation and correlation computation are performed only for. Therefore, the amount of correlation calculation can be reduced to K / N.

  Note that the signal storage unit 34B of the second embodiment may be used instead of the reference signal supply unit 33D. Thereby, the amount of calculation can be reduced.

  In particular, the position information storage unit 39 stores position information for selecting subcarriers at random intervals with no regularity, thereby reducing the effect of multipath that distorts the received signal at equal subcarrier intervals. it can.

Embodiment 6 FIG.
Although all or part of the functions of the first frequency error detection units 21, 21B to 21D of the first to fifth embodiments can be realized by hardware resources, they are realized by cooperation of hardware resources and software. Also good. This function can also be realized by a computer program executed by a microprocessor including a CPU (central processing unit). When a part of the function is realized by a computer program, the microprocessor can realize a part of the function by loading and executing the computer program from a computer-readable recording medium.

  Such a computer program may be provided by being recorded on a computer-readable recording medium such as an optical disk, or may be provided via a communication line such as the Internet.

  FIG. 15 is a functional block diagram of an arithmetic unit 21E showing a configuration when the functions of the first frequency error detectors 21, 21B to 21D of the first to fifth embodiments are realized by a computer program. As shown in FIG. 15, the arithmetic device 21E includes a processor 51 including a CPU, a RAM (Random Access Memory) 52, a nonvolatile memory 53, a large-capacity recording medium 54, an input / output interface 55, and a bus 56. . As the non-volatile memory 53, for example, a flash memory can be used. Further, as the large-capacity recording medium 54, for example, a hard disk (magnetic disk) or an optical disk can be used. The input / output interface 55 has a function of transferring the digital signal transferred from the quadrature demodulator 14 to the processor 51 and a function of outputting the signal transferred from the processor 51 to the outside.

  The processor 51 can realize the functions of the first frequency error detection units 21 and 21B to 21D of the first to fifth embodiments by loading and executing a computer program from the nonvolatile memory 53 or the large-capacity recording medium 54. it can.

  FIG. 16 is a flowchart illustrating an example of a processing procedure according to the sixth embodiment in the case where the processor 51 executes a computer program that implements the function of the first frequency error detection unit 21 according to the first embodiment.

  As shown in FIG. 16, the processor 51 extracts a synchronization symbol from the output of the DFT 15 (step S11), and executes the first complex operation (step S12). FIG. 17 is a flowchart schematically showing the processing procedure of the first complex operation. As shown in FIG. 17, the processor 51 delays the synchronization symbol in the same manner as the first signal delay unit 46 (step S21), and similarly to the first complex multiplication unit 47, the complex conjugate of the delay synchronization symbol and the synchronization symbol. A complex multiplication with is performed (step S22). Further, the processor 51 delays the multiplication signal obtained in step S22 as in the second signal delay unit 48 (step S23), and the delayed multiplication signal and the multiplication signal as in the second complex multiplication unit 49. Complex multiplication with the complex conjugate of is performed (step S24).

  After that, as shown in FIG. 16, the processor 51 calculates the cross-correlation value (step S15) while shifting the relative position of the subcarrier (step S17), similarly to the correlation calculation unit 36. Steps S15 and S17 are executed until signal processing within a predetermined subcarrier range is completed (NO in step S16). When the signal processing within the predetermined subcarrier range is completed (YES in step S16), the processor 51 executes a peak detection process similar to that of the peak detection unit 37 (step S18), and indicates a carrier frequency error. The frequency error signal Ds1 is output (step S19).

  In this way, the present embodiment detects the carrier frequency error without performing the inverse Fourier transform in the same manner as in the first embodiment, so the calculation amount is small, and the calculation time and the power consumption required for the calculation are reduced. Can be reduced.

Embodiment 7 FIG.
Next, a seventh embodiment according to the present invention will be described. FIG. 18 is a flowchart illustrating an example of a processing procedure according to the seventh embodiment when the processor 51 in FIG. 15 executes the computer program that realizes the function of the first frequency error detection unit 21B according to the third embodiment. .

The flowchart in FIG. 18 is the same as the flowchart in FIG. 16 except that step S13B is provided instead of steps S13 and S14 in FIG. In step S13B, the processor 51 reads the series of the reference complex signal R (f _k ) from the non-volatile memory 53 and supplies the same as in the signal storage unit 34B. Therefore, the amount of calculation can be reduced as in the third embodiment.

  Although various embodiments according to the present invention have been described above with reference to the drawings, these are examples of the present invention, and various forms other than the above can be adopted. For example, in the first to fifth embodiments, the first complex multiplication unit 47 performs complex multiplication on the delay synchronization symbol and the complex conjugate of the input synchronization symbol, and the second complex multiplication unit 49 uses the delay multiplication signal and the first complex multiplication. Although complex multiplication is performed on the complex conjugate of the multiplication signal input from the multiplication unit 47, the present invention is not limited to this. For example, the first complex multiplier 47 complex-multiplies the input synchronization symbol and the complex conjugate of the delay synchronization symbol, and the second complex multiplier 49 receives the multiplication signal and the delayed multiplication signal input from the first complex multiplier 47. There may be a form of complex multiplication of the complex conjugate of. Even in this case, the second complex multiplier 49 can output a multiplication signal with the phase rotation component canceled.

  DESCRIPTION OF SYMBOLS 1 Receiver, 11 Tuner part, 12 A / D converter (ADC), 13 Local oscillator, 14 Quadrature demodulator, 15 Discrete fast Fourier transform part (DFT), 16 Differential demodulator, 17 Channel decoder, 18 Viterbi decoding 19, Reed-Solomon decoding unit (RS decoding unit), 20 source decoder, 21, 21B to 21D first frequency error detecting unit, 22 second frequency error detecting unit, 31 synchronization symbol extracting unit, 32, 32C, 32D first Complex operation unit, 33, 33B, 33C, 33D Reference signal supply unit, 34 Known signal generation unit, 34B Signal storage unit, 35, 35C, 35D Second complex operation unit, 36, 36C, 36D Correlation operation unit, 37 Peak detection Part, 38, 38D range selection part, 39 position information storage part, 40 calculation target designation part, 1 delay unit, 42 correlation calculation unit, 43 averaging unit, 44 peak detection unit, 45 calculation unit, 46 first signal delay unit, 47 first complex multiplication unit, 48 second signal delay unit, 49 second complex multiplication unit 51 processor, 61 first signal delay unit, 62 first complex multiplication unit, 63 second signal delay unit, 64 second complex multiplication unit, 70 buffer, 71 complex conjugate unit, 72 complex multiplication unit, 73 real part accumulating unit 74 Imaginary part accumulating part, 75 Power calculating part.

Claims (19)

A reception unit that receives a transmission signal frequency-division multiplexed using a plurality of subcarriers having different subcarrier frequencies from a transmitter and outputs a reception signal in a carrier band; and orthogonally demodulates the reception signal. A frequency error for detecting a carrier frequency error in a receiving apparatus comprising: an orthogonal demodulator that generates a complex baseband signal; and an orthogonal transformer that performs orthogonal transform on the complex baseband signal to generate a complex symbol signal in a frequency domain A detection device,
A known signal extraction unit for extracting a received known signal from the complex symbol signal;
A complex operation unit that cancels a phase rotation component given to the received known signal during the orthogonal transform by performing a first complex operation on the sequence of the received known signal;
A reference providing a reference complex signal sequence generated by performing a second complex operation that is the same as the first complex operation on the same known signal sequence as the known signal sequence used in the transmitter. A signal supply unit;
A correlation calculation unit that calculates a plurality of cross-correlation value distributions between the complex signal sequence output from the complex calculation unit and the reference complex signal sequence;
A peak detector for detecting a distribution having a maximum peak from the plurality of distributions;
The correlation calculation unit calculates the plurality of distributions by shifting a relative position on the frequency axis of the complex signal sequence with respect to the reference complex signal sequence a plurality of times,
The frequency detector according to claim 1, wherein the peak detector detects the carrier frequency error based on a shift amount of the relative position corresponding to the distribution having the maximum peak. The frequency error detection device according to claim 1,
The complex arithmetic unit is:
A first signal delay unit that delays the received known signal and outputs a delayed known signal;
A first complex multiplier for multiplying one of the received known signal and the delayed known signal by the other complex conjugate and outputting a first multiplied signal sequence;
A second signal delay unit that delays the first multiplication signal and outputs a series of delayed multiplication signals;
And a second complex multiplier for multiplying one of the first multiplied signal and the delayed multiplied signal by the other complex conjugate and outputting a second multiplied signal sequence. apparatus. The frequency error detection device according to claim 2,
The first signal delay unit delays the received known signal by M (M is an integer of 1 or more) subcarriers and outputs the delayed known signal,
The frequency error detection apparatus, wherein the second signal delay unit delays the first multiplication signal by M subcarriers and outputs the delayed multiplication signal sequence.   4. The frequency error detection device according to claim 2, wherein the plurality of subcarriers satisfy an orthogonal relationship with each other, and the interval between the subcarrier frequencies is constant. The frequency error detection device according to any one of claims 1 to 4,
Further comprising: a range selection unit that determines a signal quality of the received known signal, and selects a range of the signal to be subjected to the first complex operation based on the determination result;
The complex operation unit performs the first complex operation on a received known signal within a range selected by the range selecting unit in the received known signal sequence. .   6. The frequency error detection apparatus according to claim 5, wherein the range selection unit compares the power value of the received known signal with a threshold value and determines the signal quality of the received known signal according to the comparison result. A frequency error detection device characterized by the above. The frequency error detection device according to any one of claims 1 to 4,
A position information storage unit storing position information of subcarriers preselected from the plurality of subcarriers;
The complex operation unit performs the first complex operation on the received known signal corresponding to the subcarrier specified by the position information in the received known signal series,
The correlation calculation unit includes a cross-correlation between a plurality of reference complex signals corresponding to subcarriers specified by the position information in the reference complex signal sequence and the complex signal sequence output from the complex calculation unit. A frequency error detection apparatus that calculates a plurality of value distributions.   8. The frequency error detection apparatus according to claim 7, wherein the position information of the subcarrier is position information of a subcarrier selected at random from the plurality of subcarriers in advance. Detection device.   9. The frequency error detection apparatus according to claim 1, wherein the reference signal supply unit executes the second complex operation to generate the reference complex signal. 10. A frequency error detection apparatus comprising:   9. The frequency error detection apparatus according to claim 1, wherein the reference signal supply unit includes a signal storage unit in which the reference complex signal is stored in advance. Frequency error detection device. A receiving unit that receives a transmission signal subjected to frequency division multiplexing using a plurality of subcarriers having different subcarrier frequencies from a transmitter and outputs a reception signal in a carrier band; and
A local oscillator that generates an oscillation signal having a local oscillation frequency;
An orthogonal demodulator for generating a complex baseband signal by orthogonally demodulating the received signal using the oscillation signal;
An orthogonal transform unit that performs orthogonal transform on the complex baseband signal to generate a frequency-domain complex symbol signal;
A known signal extraction unit for extracting a received known signal from the complex symbol signal;
A complex operation unit that cancels a phase rotation component given to the received known signal during the orthogonal transform by performing a first complex operation on the sequence of the received known signal;
A reference providing a reference complex signal sequence generated by performing a second complex operation that is the same as the first complex operation on the same known signal sequence as the known signal sequence used in the transmitter. A signal supply unit;
A correlation calculation unit that calculates a plurality of cross-correlation value distributions between the complex signal sequence output from the complex calculation unit and the reference complex signal sequence;
A peak detector for detecting a distribution having a maximum peak from the plurality of distributions;
The correlation calculation unit calculates the plurality of distributions by shifting a relative position on the frequency axis of the complex signal sequence with respect to the reference complex signal sequence a plurality of times,
The peak detection unit detects the carrier frequency error based on a shift amount of the relative position corresponding to the distribution having the maximum peak,
The receiving apparatus, wherein the local oscillator controls the local oscillation frequency so as to reduce the carrier frequency error. The receiving device according to claim 11,
The complex arithmetic unit is:
A first signal delay unit that delays the received known signal and outputs a delayed known signal;
A first complex multiplier for multiplying one of the received known signal and the delayed known signal by the other complex conjugate and outputting a first multiplied signal sequence;
A second signal delay unit that delays the first multiplication signal and outputs a series of delayed multiplication signals;
A receiving apparatus comprising: a second complex multiplier that multiplies one of the first multiplied signal and the delayed multiplied signal by the other complex conjugate to output a second multiplied signal sequence. The receiving device according to claim 11 or 12,
Further comprising: a range selection unit that determines a signal quality of the received known signal, and selects a range of the signal to be subjected to the first complex operation based on the determination result;
The receiving apparatus according to claim 1, wherein the complex operation unit performs the first complex operation on a received known signal within a range selected by the range selecting unit in the received known signal series. The receiving device according to claim 11 or 12,
A position information storage unit storing position information of subcarriers preselected from the plurality of subcarriers;
The complex operation unit performs the first complex operation on the received known signal corresponding to the subcarrier specified by the position information in the received known signal series,
The correlation calculation unit includes a cross-correlation between a plurality of reference complex signals corresponding to subcarriers specified by the position information in the reference complex signal sequence and the complex signal sequence output from the complex calculation unit. A receiving apparatus that calculates a plurality of distributions of values. A receiving device according to any one of claims 11 to 14,
A narrow frequency error detector for detecting a carrier frequency error within an interval of the plurality of subcarrier frequencies based on the complex baseband received signal;
The local oscillator controls the local oscillation frequency so as to reduce a carrier frequency error detected by the narrow frequency error detection unit. Receives a transmission signal that has been subjected to frequency division multiplexing using a plurality of subcarriers having different subcarrier frequencies from a transmitter, outputs a reception signal in a carrier band, and orthogonally demodulates the received signal to perform complex baseband A frequency error detection method for detecting a carrier frequency error in a receiving device that generates a signal,
Extracting a received known signal from a complex symbol signal generated by performing orthogonal transform on the complex baseband signal;
Canceling a phase rotation component given to the received known signal during the orthogonal transformation by performing a first complex operation on the received known signal sequence;
Supplying a reference complex signal sequence generated by performing a second complex operation that is the same as the first complex operation on the same known signal sequence as the known signal sequence used in the transmitter; When,
The relative position on the frequency axis of the reference complex signal sequence with respect to the complex signal sequence that is the execution result of the first complex operation is shifted a plurality of times between the complex signal sequence and the reference complex signal sequence. Calculating a plurality of cross-correlation value distributions of
Detecting a maximum peak from the plurality of distributions;
Detecting the carrier frequency error based on a shift amount of the relative position corresponding to the maximum peak. The frequency error detection method according to claim 16, comprising:
The step of calculating a plurality of cross-correlation value distributions includes:
Delaying the received known signal and outputting a sequence of delayed known signals;
Multiplying one of the received known signal and the delayed known signal by the other complex conjugate and outputting a first series of multiplied signals;
Delaying the first multiplication signal to output a sequence of delayed multiplication signals;
And a step of multiplying one of the first multiplication signal and the delayed multiplication signal by the other complex conjugate and outputting a second series of multiplication signals. The frequency error detection method according to claim 16 or 17,
Determining the signal quality of the received known signal, further comprising the step of selecting a signal range to be subjected to the first complex operation based on the determination result;
The frequency error detection method, wherein the first complex operation is performed on a received known signal within the selected range of the series of received known signals. The frequency error detection method according to claim 16 or 17,
A step of referring to a position information storage unit in which position information of a subcarrier preselected from the plurality of subcarriers is stored;
The first complex operation is performed on a received known signal corresponding to a subcarrier specified by the position information in the received known signal series,
The cross-correlation value distribution is a cross-correlation value distribution between a plurality of reference complex signals corresponding to subcarriers specified by the position information in the reference complex signal sequence and the complex signal sequence. A frequency error detection method characterized by the above.

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