JP2014007577A - Bias protection circuit and amplification device - Google Patents

Bias protection circuit and amplification device Download PDF

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JP2014007577A
JP2014007577A JP2012142065A JP2012142065A JP2014007577A JP 2014007577 A JP2014007577 A JP 2014007577A JP 2012142065 A JP2012142065 A JP 2012142065A JP 2012142065 A JP2012142065 A JP 2012142065A JP 2014007577 A JP2014007577 A JP 2014007577A
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bias
terminal
circuit
voltage
connection terminal
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JP5894020B2 (en
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Kenichi Takada
謙一 高田
Minoru Akatsuka
稔 赤塚
Hideki Azuma
秀樹 東
Yoshikatsu Miura
由克 三浦
Masaki Tatemori
正樹 館森
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Japan Radio Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To extend the life of a bias protection circuit for protecting a bias circuit for supplying a bias voltage to an amplification device from a supply voltage from a power supply of the amplification device.SOLUTION: A bias protection circuit 4 includes: a first transistor 43 that has a source terminal connected to a bias circuit connection terminal 42 and a drain terminal connected to an amplification circuit connection terminal 41, and controls on/off of a continuity between both terminals 41, 42 on the basis of a voltage applied to a gate terminal; and a second transistor 44 that has a gate terminal fed with a voltage divided from a voltage applied to the amplification circuit connection terminal 41, and if the voltage applied to the amplification circuit connection terminal 41 is a voltage resulting from a short circuit between a power supply and a gate terminal of an amplification circuit, turns on a continuity between a source terminal and a drain terminal to regulate the voltage applied to the gate terminal of the first transistor 43 such that the continuity between both terminals 41, 42 is turned off.

Description

本発明は、増幅回路にバイアス電圧を供給する技術に関する。   The present invention relates to a technique for supplying a bias voltage to an amplifier circuit.

増幅回路が入力信号を出力信号に増幅するにあたり、バイアス回路が増幅回路にバイアス電圧を供給する。増幅回路がＭＯＳＦＥＴ（Ｍｅｔａｌ−Ｏｘｉｄｅ−Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｆｉｅｌｄ−Ｅｆｆｅｃｔ−Ｔｒａｎｓｉｓｔｏｒ）であるとき、ＭＯＳＦＥＴのドレイン端子に電源回路から電源電圧が供給されるとともに、ＭＯＳＦＥＴのゲート端子にバイアス回路からバイアス電圧が供給される。   When the amplifier circuit amplifies the input signal to the output signal, the bias circuit supplies a bias voltage to the amplifier circuit. When the amplifier circuit is a MOSFET (Metal-Oxide-Semiconductor Field-Effect-Transistor), the power supply voltage is supplied from the power supply circuit to the drain terminal of the MOSFET, and the bias voltage is supplied from the bias circuit to the gate terminal of the MOSFET. .

ＭＯＳＦＥＴのドレイン端子及びゲート端子の間のショートが発生したとき、ＭＯＳＦＥＴのドレイン端子及びゲート端子を介して電源回路からバイアス回路にリターン電流が流入するため、バイアス回路が故障することがある。   When a short circuit occurs between the drain terminal and the gate terminal of the MOSFET, a return current flows from the power supply circuit to the bias circuit through the drain terminal and the gate terminal of the MOSFET, so that the bias circuit may break down.

特許文献１では、増幅回路及びバイアス回路の間にバイアス保護回路を配置することにより、バイアス回路の故障を防止することができる。バイアス保護回路は、電圧制限用バリスタ及び過電流保護ヒューズから構成される。電圧制限用バリスタは、電源回路による過電圧をバイアス保護回路の増幅回路接続端子に印加されたとき、電源回路による過電圧分の過電流をバイアス保護回路のバイアス回路接続端子ではなく接地端子に放電する。過電流保護ヒューズは、電源回路による過電圧分の過電流を検出したとき、バイアス保護回路の増幅回路接続端子及びバイアス回路接続端子の間の導通をオフにする。   In Patent Document 1, it is possible to prevent a failure of the bias circuit by disposing a bias protection circuit between the amplifier circuit and the bias circuit. The bias protection circuit includes a voltage limiting varistor and an overcurrent protection fuse. When an overvoltage from the power supply circuit is applied to the amplifier circuit connection terminal of the bias protection circuit, the voltage limiting varistor discharges an overcurrent corresponding to the overvoltage from the power supply circuit to the ground terminal instead of the bias circuit connection terminal of the bias protection circuit. The overcurrent protection fuse turns off the conduction between the amplifier circuit connection terminal and the bias circuit connection terminal of the bias protection circuit when detecting an overcurrent corresponding to an overvoltage by the power supply circuit.

特開２０１０−２０６８４４号公報JP 2010-206844 A

特許文献１では、バイアス保護回路は、過電流保護ヒューズから構成される。しかし、過電流保護ヒューズは、電源回路による過電圧分の過電流の検出／非検出を繰り返すたび、ヒューズエレメントの膨張／収縮を繰り返すため、ヒューズエレメントの破断を起こしてしまう。つまり、バイアス保護回路は、機械的応力により故障してしまう。   In Patent Document 1, the bias protection circuit includes an overcurrent protection fuse. However, the overcurrent protection fuse repeats expansion / contraction of the fuse element whenever the overcurrent detection / non-detection of the overvoltage by the power supply circuit is repeated, and therefore the fuse element is broken. That is, the bias protection circuit fails due to mechanical stress.

ここで、バイアス保護回路が故障したとき、増幅回路がショートを発生させると、バイアス回路も故障してしまう。すると、増幅回路が新たに交換されても、増幅回路に適切なバイアス電圧が供給されないため、増幅回路が再び故障してしまう。これは、船舶において予備品の増幅回路を準備する必要がある場合には、特に問題となる。   Here, when the bias protection circuit fails and the amplifier circuit causes a short circuit, the bias circuit also fails. Then, even if the amplifier circuit is newly replaced, an appropriate bias voltage is not supplied to the amplifier circuit, so that the amplifier circuit fails again. This is a particular problem when it is necessary to prepare a spare amplifier circuit in the ship.

そこで、前記課題を解決するために、本発明は、増幅装置にバイアス電圧を供給するバイアス回路を増幅装置の電源からの電源電圧から保護するバイアス保護回路の寿命を延ばすことを目的とする。   SUMMARY OF THE INVENTION In order to solve the above problems, an object of the present invention is to extend the life of a bias protection circuit that protects a bias circuit that supplies a bias voltage to an amplifier device from a power supply voltage from the power source of the amplifier device.

上記目的を達成するために、機械的な構成ではなく電気的な構成を備えるトランジスタを用いて、増幅回路接続端子に印加される電圧に応じて、増幅回路接続端子及びバイアス回路接続端子の間の導通のオン／オフを制御することとした。   In order to achieve the above object, a transistor having an electrical configuration rather than a mechanical configuration is used, and the voltage between the amplifier circuit connection terminal and the bias circuit connection terminal is determined according to the voltage applied to the amplifier circuit connection terminal. It was decided to control on / off of conduction.

具体的には、本発明は、増幅回路のゲート端子に接続される増幅回路接続端子と、前記増幅回路のゲート端子にバイアス電圧を供給するバイアス回路の出力端子に接続されるバイアス回路接続端子と、ソース端子を前記増幅回路接続端子及び前記バイアス回路接続端子のいずれか一方に接続され、ドレイン端子を前記増幅回路接続端子及び前記バイアス回路接続端子のいずれか他方に接続され、ゲート端子に印加される電圧に基づいて、前記増幅回路接続端子及び前記バイアス回路接続端子の間の導通のオン／オフを制御する第１トランジスタと、前記増幅回路接続端子に印加される電圧が分圧された電圧をゲート端子に印加され、前記増幅回路接続端子に印加される電圧が、前記増幅回路の電源及びゲート端子の間のショートに起因する電圧であるときには、ソース端子及びドレイン端子の間の導通をオンにすることにより、前記増幅回路接続端子及び前記バイアス回路接続端子の間の導通をオフにするように、前記第１トランジスタのゲート端子に印加する電圧を調整し、前記増幅回路接続端子に印加される電圧が、前記バイアス回路からの出力に起因する電圧であるときには、ソース端子及びドレイン端子の間の導通をオフにすることにより、前記増幅回路接続端子及び前記バイアス回路接続端子の間の導通をオンにするように、前記第１トランジスタのゲート端子に印加する電圧を調整する第２トランジスタと、を備えることを特徴とするバイアス保護回路である。   Specifically, the present invention includes an amplifier circuit connection terminal connected to a gate terminal of an amplifier circuit, and a bias circuit connection terminal connected to an output terminal of a bias circuit that supplies a bias voltage to the gate terminal of the amplifier circuit. The source terminal is connected to one of the amplifier circuit connection terminal and the bias circuit connection terminal, the drain terminal is connected to one of the amplifier circuit connection terminal and the bias circuit connection terminal, and is applied to the gate terminal. A first transistor that controls on / off of conduction between the amplifier circuit connection terminal and the bias circuit connection terminal, and a voltage obtained by dividing the voltage applied to the amplifier circuit connection terminal The voltage applied to the gate terminal and applied to the amplifier circuit connection terminal is a voltage caused by a short circuit between the power supply of the amplifier circuit and the gate terminal. In this case, by turning on the conduction between the source terminal and the drain terminal, the gate terminal of the first transistor is turned off so that the conduction between the amplifier circuit connection terminal and the bias circuit connection terminal is turned off. By adjusting the voltage to be applied and when the voltage applied to the amplifier circuit connection terminal is a voltage resulting from the output from the bias circuit, by turning off the conduction between the source terminal and the drain terminal, And a second transistor for adjusting a voltage applied to the gate terminal of the first transistor so as to turn on conduction between the amplifier circuit connection terminal and the bias circuit connection terminal. It is.

この構成によれば、トランジスタは機械的な構成ではなく電気的な構成を備えるため、バイアス保護回路の寿命を延ばすことができる。   According to this configuration, since the transistor has an electrical configuration rather than a mechanical configuration, the life of the bias protection circuit can be extended.

また、本発明は、前記増幅回路接続端子に印加される電圧に対する前記第２トランジスタのゲート端子に印加される電圧の分圧比は、前記第２トランジスタが前記第１トランジスタのゲート端子に印加する電圧を調整可能であるように、前記増幅回路の電源の出力電圧に応じて可変であることを特徴とするバイアス保護回路である。   The voltage dividing ratio of the voltage applied to the gate terminal of the second transistor with respect to the voltage applied to the amplifier circuit connection terminal is the voltage applied by the second transistor to the gate terminal of the first transistor. The bias protection circuit is variable according to the output voltage of the power supply of the amplifier circuit so that the voltage can be adjusted.

この構成によれば、増幅回路の電源の出力電圧が様々な電圧に設定されても、同一のバイアス保護回路を繰り返し適用することができる。   According to this configuration, the same bias protection circuit can be repeatedly applied even when the output voltage of the power supply of the amplifier circuit is set to various voltages.

また、本発明は、バイアス保護回路と、前記バイアス保護回路の増幅回路接続端子に接続される増幅回路と、前記バイアス保護回路のバイアス回路接続端子に接続されるバイアス回路と、前記増幅回路に電源電圧を供給する電源回路と、を備えることを特徴とする増幅装置である。   The present invention also provides a bias protection circuit, an amplifier circuit connected to the amplifier circuit connection terminal of the bias protection circuit, a bias circuit connected to the bias circuit connection terminal of the bias protection circuit, and a power supply to the amplifier circuit And a power supply circuit for supplying a voltage.

この構成によれば、トランジスタは機械的な構成ではなく電気的な構成を備えるため、バイアス保護回路の寿命を延ばすことができる。   According to this configuration, since the transistor has an electrical configuration rather than a mechanical configuration, the life of the bias protection circuit can be extended.

本発明は、増幅装置にバイアス電圧を供給するバイアス回路を増幅装置の電源からの電源電圧から保護するバイアス保護回路の寿命を延ばすことができる。   The present invention can extend the life of a bias protection circuit that protects a bias circuit that supplies a bias voltage to an amplifier from a power supply voltage from the power supply of the amplifier.

本発明の増幅装置の構成を示す図である。It is a figure which shows the structure of the amplifier of this invention. 本発明のバイアス保護回路の構成を示す図である。It is a figure which shows the structure of the bias protection circuit of this invention.

添付の図面を参照して本発明の実施形態を説明する。以下に説明する実施形態は本発明の実施の例であり、本発明は以下の実施形態に制限されるものではない。   Embodiments of the present invention will be described with reference to the accompanying drawings. The embodiments described below are examples of the present invention, and the present invention is not limited to the following embodiments.

本発明の増幅装置の構成を図１に示す。本発明の増幅装置Ａは、増幅回路１、電源回路２、バイアス回路３及びバイアス保護回路４から構成される。   The configuration of the amplifying device of the present invention is shown in FIG. The amplification device A of the present invention includes an amplification circuit 1, a power supply circuit 2, a bias circuit 3, and a bias protection circuit 4.

増幅回路１は、入力信号を出力信号に増幅する。電源回路２は、増幅回路１に電源電圧を供給する。バイアス回路３は、増幅回路１にバイアス電圧を供給する。バイアス保護回路４は、増幅回路１及びバイアス回路３の間に配置され、後述のように、電源回路２からの過電圧からバイアス回路３を保護する。増幅回路１がＭＯＳＦＥＴであるとき、増幅回路１のドレイン端子に電源回路２から電源電圧が供給されるとともに、増幅回路１のゲート端子にバイアス回路３からバイアス電圧が供給される。   The amplifier circuit 1 amplifies an input signal into an output signal. The power supply circuit 2 supplies a power supply voltage to the amplifier circuit 1. The bias circuit 3 supplies a bias voltage to the amplifier circuit 1. The bias protection circuit 4 is disposed between the amplifier circuit 1 and the bias circuit 3 and protects the bias circuit 3 from an overvoltage from the power supply circuit 2 as will be described later. When the amplifier circuit 1 is a MOSFET, a power supply voltage is supplied from the power supply circuit 2 to the drain terminal of the amplifier circuit 1 and a bias voltage is supplied from the bias circuit 3 to the gate terminal of the amplifier circuit 1.

本発明のバイアス保護回路の構成を図２に示す。本発明のバイアス保護回路４は、増幅回路接続端子４１、バイアス回路接続端子４２、第１トランジスタ４３、第２トランジスタ４４、抵抗４５、抵抗４６、電源接続端子４７及び抵抗４８から構成される。   The configuration of the bias protection circuit of the present invention is shown in FIG. The bias protection circuit 4 of the present invention includes an amplifier circuit connection terminal 41, a bias circuit connection terminal 42, a first transistor 43, a second transistor 44, a resistor 45, a resistor 46, a power supply connection terminal 47, and a resistor 48.

増幅回路接続端子４１は、増幅回路１のゲート端子に接続される。バイアス回路接続端子４２は、バイアス回路３の出力端子に接続される。第１トランジスタ４３及び第２トランジスタ４４は、機械的なスイッチング素子でなく、電気的なスイッチング素子であり、例えばＭＯＳＦＥＴを利用することができる。   The amplifier circuit connection terminal 41 is connected to the gate terminal of the amplifier circuit 1. The bias circuit connection terminal 42 is connected to the output terminal of the bias circuit 3. The first transistor 43 and the second transistor 44 are not mechanical switching elements but electrical switching elements, and for example, MOSFETs can be used.

第１トランジスタ４３のソース端子は、バイアス回路接続端子４２に接続される。第１トランジスタ４３のドレイン端子は、増幅回路接続端子４１に接続される。ただし、第１トランジスタ４３のソース端子は、増幅回路接続端子４１に接続されてもよく、第１トランジスタ４３のドレイン端子は、バイアス回路接続端子４２に接続されてもよい。第１トランジスタ４３のゲート端子は、第２トランジスタ４４のドレイン端子に接続されるとともに、後述の抵抗４８を介して後述のバイアス保護回路４用の電源接続端子４７に接続される。第１トランジスタ４３は、ゲート端子に印加される電圧に基づいて、増幅回路接続端子４１及びバイアス回路接続端子４２の間の導通のオン／オフを制御する。   The source terminal of the first transistor 43 is connected to the bias circuit connection terminal 42. The drain terminal of the first transistor 43 is connected to the amplifier circuit connection terminal 41. However, the source terminal of the first transistor 43 may be connected to the amplifier circuit connection terminal 41, and the drain terminal of the first transistor 43 may be connected to the bias circuit connection terminal 42. The gate terminal of the first transistor 43 is connected to the drain terminal of the second transistor 44 and is connected to a power supply connection terminal 47 for the bias protection circuit 4 described later via a resistor 48 described later. The first transistor 43 controls on / off of conduction between the amplifier circuit connection terminal 41 and the bias circuit connection terminal 42 based on the voltage applied to the gate terminal.

第２トランジスタ４４のゲート端子は、増幅回路接続端子４１に印加される電圧が分圧された電圧を印加される。具体的には、抵抗４５が、増幅回路接続端子４１及び第２トランジスタ４４のゲート端子に接続され、抵抗４６が、接地端子及び第２トランジスタ４４のゲート端子に接続され、抵抗４５及び抵抗４６は、増幅回路接続端子４１に印加される電圧を、抵抗４５及び抵抗４６の接続点において分圧する、分圧回路として機能する。第２トランジスタ４４のソース端子は、接地端子に接続される。第２トランジスタ４４のドレイン端子は、第１トランジスタ４３のゲート端子に接続されるとともに、後述の抵抗４８を介して後述のバイアス保護回路４用の電源接続端子４７に接続される。ただし、第２トランジスタ４４のソース端子は、第１トランジスタ４３のゲート端子に接続されるとともに、後述の抵抗４８を介して後述のバイアス保護回路４用の電源接続端子４７に接続されてもよく、第２トランジスタ４４のドレイン端子は、接地端子に接続されてもよい。   A voltage obtained by dividing the voltage applied to the amplifier circuit connection terminal 41 is applied to the gate terminal of the second transistor 44. Specifically, the resistor 45 is connected to the amplifier circuit connection terminal 41 and the gate terminal of the second transistor 44, the resistor 46 is connected to the ground terminal and the gate terminal of the second transistor 44, and the resistor 45 and the resistor 46 are The voltage applied to the amplifier circuit connection terminal 41 functions as a voltage dividing circuit that divides the voltage at the connection point of the resistor 45 and the resistor 46. The source terminal of the second transistor 44 is connected to the ground terminal. The drain terminal of the second transistor 44 is connected to the gate terminal of the first transistor 43 and to a power supply connection terminal 47 for the bias protection circuit 4 described later via a resistor 48 described later. However, the source terminal of the second transistor 44 may be connected to the gate terminal of the first transistor 43 and may be connected to a power supply connection terminal 47 for a bias protection circuit 4 described later via a resistor 48 described later. The drain terminal of the second transistor 44 may be connected to a ground terminal.

まず、増幅回路１のドレイン端子及びゲート端子の間で、ショートが発生していないときについて説明する。増幅回路接続端子４１に印加される電圧は、バイアス回路３からの出力に起因する低電圧である。第２トランジスタ４４のゲート端子は、バイアス回路３からの出力に起因する低電圧が、抵抗４５及び抵抗４６により分圧された、低電圧を印加される。第２トランジスタ４４は、ソース端子及びドレイン端子の間の導通をオフにする。   First, a case where no short circuit occurs between the drain terminal and the gate terminal of the amplifier circuit 1 will be described. The voltage applied to the amplifier circuit connection terminal 41 is a low voltage resulting from the output from the bias circuit 3. The gate terminal of the second transistor 44 is applied with a low voltage obtained by dividing the low voltage resulting from the output from the bias circuit 3 by the resistor 45 and the resistor 46. The second transistor 44 turns off conduction between the source terminal and the drain terminal.

第２トランジスタ４４のソース端子及びドレイン端子の間の導通がオフにされるため、抵抗４８による電圧降下が発生せず、第１トランジスタ４３のゲート端子に印加される電圧は、電源接続端子４７における電源電圧に等しくなる。よって、増幅回路接続端子４１及びバイアス回路接続端子４２の間の導通がオンにされて、バイアス回路３からの出力電圧が増幅回路１のゲート端子に向けて出力される。   Since the conduction between the source terminal and the drain terminal of the second transistor 44 is turned off, a voltage drop due to the resistor 48 does not occur, and the voltage applied to the gate terminal of the first transistor 43 is It becomes equal to the power supply voltage. Therefore, the conduction between the amplifier circuit connection terminal 41 and the bias circuit connection terminal 42 is turned on, and the output voltage from the bias circuit 3 is output toward the gate terminal of the amplifier circuit 1.

次に、増幅回路１のドレイン端子及びゲート端子の間で、ショートが発生しているときについて説明する。増幅回路接続端子４１に印加される電圧は、増幅回路１のドレイン端子及びゲート端子の間のショートに起因する高電圧である。第２トランジスタ４４のゲート端子は、増幅回路１のドレイン端子及びゲート端子の間のショートに起因する高電圧が、抵抗４５及び抵抗４６により分圧された、高電圧を印加される。第２トランジスタ４４は、ソース端子及びドレイン端子の間の導通をオンにする。   Next, a case where a short circuit occurs between the drain terminal and the gate terminal of the amplifier circuit 1 will be described. The voltage applied to the amplifier circuit connection terminal 41 is a high voltage due to a short circuit between the drain terminal and the gate terminal of the amplifier circuit 1. The gate terminal of the second transistor 44 is applied with a high voltage obtained by dividing a high voltage resulting from a short circuit between the drain terminal and the gate terminal of the amplifier circuit 1 by the resistor 45 and the resistor 46. The second transistor 44 turns on conduction between the source terminal and the drain terminal.

第２トランジスタ４４のソース端子及びドレイン端子の間の導通がオンにされるため、抵抗４８による電圧降下が発生して、第１トランジスタ４３のゲート端子に印加される電圧は、接地端子における接地電圧に等しくなる。よって、増幅回路接続端子４１及びバイアス回路接続端子４２の間の導通がオフにされて、バイアス回路３からの出力電圧が増幅回路１のゲート端子に向けて出力されないとともに、電源回路２からの電源電圧がバイアス回路３の出力端子に向けて出力されなくて済む。   Since the conduction between the source terminal and the drain terminal of the second transistor 44 is turned on, a voltage drop due to the resistor 48 occurs, and the voltage applied to the gate terminal of the first transistor 43 is the ground voltage at the ground terminal. Is equal to Therefore, the conduction between the amplifier circuit connection terminal 41 and the bias circuit connection terminal 42 is turned off, and the output voltage from the bias circuit 3 is not output toward the gate terminal of the amplifier circuit 1, and the power supply from the power supply circuit 2 The voltage need not be output toward the output terminal of the bias circuit 3.

このように、機械的な構成ではなく電気的な構成を備える第１トランジスタ４３及び第２トランジスタ４４を用いて、増幅回路接続端子４１に印加される電圧に応じて、増幅回路接続端子４１及びバイアス回路接続端子４２の間の導通のオン／オフを制御する。よって、バイアス保護回路４の寿命を延ばすことができる。   In this way, using the first transistor 43 and the second transistor 44 having an electrical configuration rather than a mechanical configuration, the amplifier circuit connection terminal 41 and the bias are applied according to the voltage applied to the amplifier circuit connection terminal 41. The on / off of conduction between the circuit connection terminals 42 is controlled. Therefore, the life of the bias protection circuit 4 can be extended.

すると、増幅回路１がショートを発生させても、バイアス保護回路４が故障しにくいため、バイアス回路３も故障しにくい。よって、増幅回路１が新たに交換されると、増幅回路１に適切なバイアス電圧が供給されるため、増幅回路１が再び故障しにくい。これは、船舶において予備品の増幅回路を準備する必要がある場合には、特に有利である。   Then, even if the amplifier circuit 1 causes a short circuit, the bias protection circuit 4 is unlikely to fail, so the bias circuit 3 is also unlikely to fail. Therefore, when the amplifier circuit 1 is newly replaced, an appropriate bias voltage is supplied to the amplifier circuit 1, so that the amplifier circuit 1 is unlikely to fail again. This is particularly advantageous when it is necessary to prepare a spare amplifier circuit in the ship.

増幅回路１が様々な回路に交換されるにあたり、増幅回路１の電源の出力電圧が様々な電圧に設定されることがある。このとき、増幅回路接続端子４１に印加される電圧に対する第２トランジスタ４４のゲート端子に印加される電圧の分圧比を、第２トランジスタ４４が第１トランジスタ４３のゲート端子に印加する電圧を上述のように調整可能であるように、増幅回路１の電源の出力電圧に応じて可変としてもよい。具体的には、抵抗４５及び抵抗４６の間の抵抗比を可変としてもよい。よって、増幅回路１が様々な回路に交換されるにあたり、増幅回路１の電源の出力電圧が様々な電圧に設定されても、同一のバイアス保護回路４を繰り返し適用することができる。   When the amplifier circuit 1 is replaced with various circuits, the output voltage of the power source of the amplifier circuit 1 may be set to various voltages. At this time, the voltage dividing ratio of the voltage applied to the gate terminal of the second transistor 44 with respect to the voltage applied to the amplifier circuit connection terminal 41 and the voltage applied to the gate terminal of the first transistor 43 by the second transistor 44 are described above. In order to be adjustable as described above, it may be variable according to the output voltage of the power supply of the amplifier circuit 1. Specifically, the resistance ratio between the resistor 45 and the resistor 46 may be variable. Therefore, when the amplifier circuit 1 is replaced with various circuits, the same bias protection circuit 4 can be repeatedly applied even if the output voltage of the power supply of the amplifier circuit 1 is set to various voltages.

本発明に係るバイアス保護回路及び増幅装置は、船舶において予備品の増幅回路を準備する必要がある場合や、増幅回路の電源からの電源電圧がバイアス回路からの出力電圧より高い場合に、特に有利に適用することができる。   The bias protection circuit and the amplification device according to the present invention are particularly advantageous when it is necessary to prepare a spare amplification circuit in a ship or when the power supply voltage from the power supply of the amplification circuit is higher than the output voltage from the bias circuit. Can be applied to.

Ａ：増幅装置
１：増幅回路
２：電源回路
３：バイアス回路
４：バイアス保護回路
４１：増幅回路接続端子
４２：バイアス回路接続端子
４３：第１トランジスタ
４４：第２トランジスタ
４５：抵抗
４６：抵抗
４７：電源接続端子
４８：抵抗 A: amplification device 1: amplification circuit 2: power supply circuit 3: bias circuit 4: bias protection circuit 41: amplification circuit connection terminal 42: bias circuit connection terminal 43: first transistor 44: second transistor 45: resistor 46: resistor 47 : Power connection terminal 48: Resistance

Claims (3)

増幅回路のゲート端子に接続される増幅回路接続端子と、
前記増幅回路のゲート端子にバイアス電圧を供給するバイアス回路の出力端子に接続されるバイアス回路接続端子と、
ソース端子を前記増幅回路接続端子及び前記バイアス回路接続端子のいずれか一方に接続され、ドレイン端子を前記増幅回路接続端子及び前記バイアス回路接続端子のいずれか他方に接続され、ゲート端子に印加される電圧に基づいて、前記増幅回路接続端子及び前記バイアス回路接続端子の間の導通のオン／オフを制御する第１トランジスタと、
前記増幅回路接続端子に印加される電圧が分圧された電圧をゲート端子に印加され、
前記増幅回路接続端子に印加される電圧が、前記増幅回路の電源及びゲート端子の間のショートに起因する電圧であるときには、ソース端子及びドレイン端子の間の導通をオンにすることにより、前記増幅回路接続端子及び前記バイアス回路接続端子の間の導通をオフにするように、前記第１トランジスタのゲート端子に印加する電圧を調整し、
前記増幅回路接続端子に印加される電圧が、前記バイアス回路からの出力に起因する電圧であるときには、ソース端子及びドレイン端子の間の導通をオフにすることにより、前記増幅回路接続端子及び前記バイアス回路接続端子の間の導通をオンにするように、前記第１トランジスタのゲート端子に印加する電圧を調整する第２トランジスタと、
を備えることを特徴とするバイアス保護回路。 An amplifier circuit connection terminal connected to the gate terminal of the amplifier circuit;
A bias circuit connection terminal connected to an output terminal of a bias circuit for supplying a bias voltage to the gate terminal of the amplifier circuit;
A source terminal is connected to one of the amplifier circuit connection terminal and the bias circuit connection terminal, and a drain terminal is connected to the other of the amplifier circuit connection terminal and the bias circuit connection terminal and applied to the gate terminal. A first transistor that controls on / off of conduction between the amplifier circuit connection terminal and the bias circuit connection terminal based on a voltage;
A voltage obtained by dividing the voltage applied to the amplifier circuit connection terminal is applied to the gate terminal;
When the voltage applied to the amplifier circuit connection terminal is a voltage resulting from a short circuit between the power supply and gate terminal of the amplifier circuit, the amplification is performed by turning on conduction between the source terminal and the drain terminal. Adjusting the voltage applied to the gate terminal of the first transistor so as to turn off conduction between the circuit connection terminal and the bias circuit connection terminal;
When the voltage applied to the amplifier circuit connection terminal is a voltage resulting from the output from the bias circuit, the conduction between the source terminal and the drain terminal is turned off to turn off the amplifier circuit connection terminal and the bias. A second transistor that adjusts a voltage applied to the gate terminal of the first transistor so as to turn on conduction between circuit connection terminals;
A bias protection circuit comprising: 前記増幅回路接続端子に印加される電圧に対する前記第２トランジスタのゲート端子に印加される電圧の分圧比は、前記第２トランジスタが前記第１トランジスタのゲート端子に印加する電圧を調整可能であるように、前記増幅回路の電源の出力電圧に応じて可変であることを特徴とする請求項１に記載のバイアス保護回路。   The voltage dividing ratio of the voltage applied to the gate terminal of the second transistor with respect to the voltage applied to the amplifier circuit connection terminal can adjust the voltage applied to the gate terminal of the first transistor by the second transistor. The bias protection circuit according to claim 1, wherein the bias protection circuit is variable according to an output voltage of a power supply of the amplifier circuit. 請求項１又は請求項２に記載のバイアス保護回路と、
前記バイアス保護回路の増幅回路接続端子に接続される増幅回路と、
前記バイアス保護回路のバイアス回路接続端子に接続されるバイアス回路と、
前記増幅回路に電源電圧を供給する電源回路と、
を備えることを特徴とする増幅装置。 The bias protection circuit according to claim 1 or 2,
An amplifier circuit connected to the amplifier circuit connection terminal of the bias protection circuit;
A bias circuit connected to a bias circuit connection terminal of the bias protection circuit;
A power supply circuit for supplying a power supply voltage to the amplifier circuit;
An amplifying device comprising:
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160141A (en) * 1974-09-25 1976-05-25 Westinghouse Electric Corp
JPS62225014A (en) * 1986-03-27 1987-10-03 Matsushita Electric Ind Co Ltd Push-pull amplifier
US20070086530A1 (en) * 2005-06-17 2007-04-19 Infineon Technologies Ag Circuit arrangement for connecting a first circuit node to a second circuit node and for protecting the first circuit node for overvoltage
US20090309663A1 (en) * 2008-06-13 2009-12-17 Freescale Semiconductor, Inc. Power amplifiers having improved protection against avalanche current
JP2010206844A (en) * 2010-06-21 2010-09-16 Toshiba Teli Corp High frequency power amplifier circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160141A (en) * 1974-09-25 1976-05-25 Westinghouse Electric Corp
JPS62225014A (en) * 1986-03-27 1987-10-03 Matsushita Electric Ind Co Ltd Push-pull amplifier
US20070086530A1 (en) * 2005-06-17 2007-04-19 Infineon Technologies Ag Circuit arrangement for connecting a first circuit node to a second circuit node and for protecting the first circuit node for overvoltage
US20090309663A1 (en) * 2008-06-13 2009-12-17 Freescale Semiconductor, Inc. Power amplifiers having improved protection against avalanche current
JP2010206844A (en) * 2010-06-21 2010-09-16 Toshiba Teli Corp High frequency power amplifier circuit

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