JP2014003176A - Semiconductor package and manufacturing method of the same - Google Patents

Semiconductor package and manufacturing method of the same Download PDF

Info

Publication number
JP2014003176A
JP2014003176A JP2012137902A JP2012137902A JP2014003176A JP 2014003176 A JP2014003176 A JP 2014003176A JP 2012137902 A JP2012137902 A JP 2012137902A JP 2012137902 A JP2012137902 A JP 2012137902A JP 2014003176 A JP2014003176 A JP 2014003176A
Authority
JP
Japan
Prior art keywords
wiring
insulating resin
electrode
conductive
electrode part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012137902A
Other languages
Japanese (ja)
Other versions
JP6037544B2 (en
Inventor
Kenji Tsukada
謙磁 塚田
Masato Suzuki
雅登 鈴木
Kazuhiro Sugiyama
和裕 杉山
Masatoshi Fujita
政利 藤田
Akihiro Kawajiri
明宏 川尻
Yoshitaka Hashimoto
良崇 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Corp
Original Assignee
Fuji Machine Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Machine Manufacturing Co Ltd filed Critical Fuji Machine Manufacturing Co Ltd
Priority to JP2012137902A priority Critical patent/JP6037544B2/en
Publication of JP2014003176A publication Critical patent/JP2014003176A/en
Application granted granted Critical
Publication of JP6037544B2 publication Critical patent/JP6037544B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/76Apparatus for connecting with build-up interconnects
    • H01L2224/7615Means for depositing
    • H01L2224/76151Means for direct writing
    • H01L2224/76155Jetting means, e.g. ink jet
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/821Forming a build-up interconnect
    • H01L2224/82101Forming a build-up interconnect by additive methods, e.g. direct writing
    • H01L2224/82102Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Abstract

PROBLEM TO BE SOLVED: To improve connection reliability of wiring in an LED package.SOLUTION: A semiconductor package manufacturing method comprises: forming conductive projections 17 on a surface of an electrode part 15 on a top face of an LED element 14 and on a surface of an electrode part 11a on a top face of a package body 13 (or an LED element 14 in which conductive projections 17 are preliminarily formed may be used). The semiconductor package manufacturing method further comprises: subsequently filling a gap around the LED element 14 among element mounting recesses 12 of the package body 13 with the transparent insulation resin 16 to form an embedded layer of the transparent insulation resin 16. At this time, even when the liquid of the insulation resin 16 overflowed from the element mounting recess 12 wet spreads to surfaces of the electrode parts 15, 11a, the conductive projections 17 are exposed from the liquid of the insulation resin 16 because the conductive projections 17 are formed on the surfaces of the electrode parts 15, 11a. The semiconductor package manufacturing method further comprises: subsequently forming wiring 18 on a wiring path between both electrode parts 15, 11a and electrically connecting the wiring 18 to the electrode parts 15, 11a through the conductive projections 17.

Description

本発明は、搭載部材上に搭載した半導体素子側の電極部と該搭載部材側の電極部との間を接続する配線の接続信頼性を向上させた半導体パッケージ及びその製造方法に関する発明である。   The present invention relates to a semiconductor package in which the connection reliability of wiring connecting between an electrode portion on a semiconductor element mounted on a mounting member and an electrode portion on the mounting member is improved, and a manufacturing method thereof.

従来より、半導体素子の実装工程では、半導体素子を搭載部材(回路基板、リードフレーム等)にダイボンドした後に、該半導体素子側の電極部と搭載部材側の電極部との間をワイヤボンディングで配線するのが一般的である。   Conventionally, in the mounting process of a semiconductor element, after the semiconductor element is die-bonded to a mounting member (circuit board, lead frame, etc.), wiring is performed between the electrode part on the semiconductor element side and the electrode part on the mounting member side by wire bonding. It is common to do.

しかし、特許文献1(特許第3992038号公報)に記載されているように、ワイヤボンディングを行うときの機械的なストレスによって不良が発生する可能性があるため、ワイヤボンディングに代わる接続信頼性の高い実装構造を低コストで実現することを目的として、配線基板上に搭載した半導体素子の周囲に樹脂材料の液をディスペンサで吐出して硬化させて、半導体素子の上面と配線基板の表面との間を傾斜面でつなぐ樹脂スロープを形成した後、半導体素子上面の電極部と配線基板の電極部との間を接続する配線の経路に沿ってインクジェット等の液滴吐出法で導電性インクを吐出して配線を形成することが提案されている。   However, as described in Patent Document 1 (Japanese Patent No. 3992038), there is a possibility that defects may occur due to mechanical stress when wire bonding is performed. Therefore, connection reliability that replaces wire bonding is high. For the purpose of realizing the mounting structure at low cost, the resin material liquid is discharged by a dispenser around the semiconductor element mounted on the wiring board and cured, so that the space between the upper surface of the semiconductor element and the surface of the wiring board is obtained. After forming a resin slope that connects the inclined surfaces, conductive ink is ejected by a droplet ejection method such as ink jet along the wiring path connecting the electrode portion on the upper surface of the semiconductor element and the electrode portion of the wiring board. It has been proposed to form wiring.

特許第3992038号公報Japanese Patent No. 3992038

上記特許文献1の構造では、配線基板上に搭載した半導体素子の周囲に樹脂材料の液をディスペンサで吐出して樹脂スロープを形成する際に、吐出した樹脂材料の液が半導体素子上面の電極部上や配線基板の電極部上に濡れ広がって、該電極部の一部又は全部が樹脂材料で覆われてしまうことがあり、該電極部と配線との導通性を十分に確保できない場合がある。   In the structure of Patent Document 1, when a resin slope is formed by discharging a resin material liquid around a semiconductor element mounted on a wiring board with a dispenser, the discharged resin material liquid is applied to the electrode portion on the upper surface of the semiconductor element. The electrode part of the wiring board may get wet and spread over the top or on the wiring board, and part or all of the electrode part may be covered with a resin material. .

この対策として、樹脂材料の吐出量を少なめにして電極部上への樹脂材料の濡れ広がりを防止する必要があり、その結果、半導体素子の電極部と配線基板の電極部との間を接続する配線経路の段差を樹脂スロープで十分に小さくすることができず、該配線経路上に形成した配線が段差の角部で熱応力等により断線する可能性がある。   As a countermeasure, it is necessary to reduce the discharge amount of the resin material to prevent the resin material from spreading on the electrode part. As a result, the electrode part of the semiconductor element and the electrode part of the wiring board are connected. The step of the wiring path cannot be sufficiently reduced by the resin slope, and the wiring formed on the wiring path may be disconnected at the corner of the step due to thermal stress or the like.

そこで、本発明が解決しようとする課題は、搭載部材上に搭載した半導体素子側の電極部と該搭載部材側の電極部との間を接続する配線の接続信頼性を向上できる半導体パッケージ及びその製造方法を提供することである。   Therefore, the problem to be solved by the present invention is to provide a semiconductor package capable of improving the connection reliability of the wiring connecting the electrode part on the semiconductor element side mounted on the mounting member and the electrode part on the mounting member side, and the semiconductor package It is to provide a manufacturing method.

上記課題を解決するために、本発明は、搭載部材上に半導体素子を搭載し、該半導体素子側の電極部と該搭載部材側の電極部との間の配線経路の凹部及び/又は段差を絶縁性樹脂で埋めてなだらかにすると共に、該半導体素子側の電極部と該搭載部材側の電極部との間を接続する配線を該絶縁性樹脂上に形成した半導体パッケージ及びその製造方法において、前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋める前に、前記半導体素子側の電極部の表面及び/又は前記搭載部材側の電極部の表面に導電性突起部を形成し、若しくは予め電極部の表面に導電性突起部が形成された半導体素子及び/又は予め電極部の表面に導電性突起部が形成された搭載部材を使用し、前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋めた後に前記配線を該配線経路上に形成することで該配線を前記導電性突起部を介して前記電極部に導通させたことを特徴とするものである。   In order to solve the above-described problems, the present invention mounts a semiconductor element on a mounting member, and forms a recess and / or a step in a wiring path between the electrode part on the semiconductor element side and the electrode part on the mounting member side. In the semiconductor package in which the wiring connecting the electrode part on the side of the semiconductor element and the electrode part on the side of the mounting member is formed on the insulating resin, and the manufacturing method thereof, while being gently filled with the insulating resin, Before filling the recesses and / or steps of the wiring path with the insulating resin, forming conductive protrusions on the surface of the electrode part on the semiconductor element side and / or on the surface of the electrode part on the mounting member side, or Using a semiconductor element in which a conductive protrusion is previously formed on the surface of the electrode part and / or a mounting member in which a conductive protrusion is previously formed on the surface of the electrode part, the recesses and / or steps in the wiring path are After filling with insulating resin Serial is characterized in that the wiring by forming on the wiring route were passed to the electrode portion through the conductive protrusions wiring.

本発明では、配線経路の凹部及び/又は段差を絶縁性樹脂で埋める前に、電極部の表面に導電性突起部を形成するようにしているため、配線経路の凹部及び/又は段差を絶縁性樹脂で埋める際に、絶縁性樹脂の吐出量を適度に増やして、絶縁性樹脂の液が電極部の表面にまで濡れ広がっても、電極部の表面に形成した導電性突起部が絶縁性樹脂から露出した状態となり、配線を導電性突起部を介して電極部に導通させることができる。これにより、配線と電極部との間の導通性を導電性突起部により確保しながら、配線の断線の原因となる配線経路の凹部や段差を十分に絶縁性樹脂で埋めて配線経路を十分になだらかにすることが可能となり、配線経路の段差による配線の断線を防止でき、配線の接続信頼性を向上できる。   In the present invention, since the conductive protrusions are formed on the surface of the electrode portion before the recesses and / or steps of the wiring path are filled with the insulating resin, the recesses and / or steps of the wiring path are insulative. When filling with resin, the amount of insulating resin discharged is increased moderately, and even if the insulating resin liquid wets and spreads to the surface of the electrode part, the conductive protrusions formed on the surface of the electrode part are insulating resin. Thus, the wiring can be conducted to the electrode portion through the conductive protrusion. As a result, the conductive path between the wiring and the electrode part is secured by the conductive protrusion, and the wiring path is sufficiently filled with the insulating resin by sufficiently filling the concave portion or the step of the wiring path causing the disconnection of the wiring. As a result, the wiring can be prevented from being disconnected due to a step in the wiring path, and the connection reliability of the wiring can be improved.

また、本発明は、導電性突起部を、撥液性を有する導電材料により形成するようにしても良い。このようにすれば、絶縁性樹脂の液が電極部の導電性突起部上に濡れ広がることを該導電性突起部の撥液性によって防止でき、配線の接続信頼性をより一層向上できる。   In the present invention, the conductive protrusions may be formed of a conductive material having liquid repellency. By doing so, it is possible to prevent the liquid of the insulating resin from spreading on the conductive protrusions of the electrode part due to the liquid repellency of the conductive protrusions, and the connection reliability of the wiring can be further improved.

更に、配線経路の凹部及び/又は段差を絶縁性樹脂で埋めた後に、該配線経路上にプライマ樹脂層を形成して該プライマ樹脂層上に配線を形成するようにしても良い。このようにすれば、プライマ樹脂層によって配線経路をより一層なだらかにすることができるため、厚膜法(液滴吐出法や印刷法等)で配線をプライマ樹脂層上に形成しやすくなると共に、配線との密着性等を向上させることができる。   Furthermore, after filling the recess and / or step of the wiring path with an insulating resin, a primer resin layer may be formed on the wiring path to form a wiring on the primer resin layer. In this way, since the wiring path can be further smoothed by the primer resin layer, it becomes easier to form the wiring on the primer resin layer by a thick film method (droplet discharge method, printing method, etc.) Adhesion with the wiring can be improved.

図1は本発明の実施例1の素子搭載工程を示す縦断面図である。FIG. 1 is a longitudinal sectional view showing an element mounting process of Example 1 of the present invention. 図2は実施例1の撥液膜形成工程を示す縦断面図である。FIG. 2 is a longitudinal sectional view showing a liquid repellent film forming process of the first embodiment. 図3は実施例1の絶縁性樹脂埋込み工程を示す縦断面図である。FIG. 3 is a longitudinal sectional view showing the insulating resin embedding process of the first embodiment. 図4は実施例1の配線形成工程を示す縦断面図である。FIG. 4 is a longitudinal sectional view showing a wiring formation process of the first embodiment. 図5は実施例2のLEDパッケージの構造を示す縦断面図である。FIG. 5 is a longitudinal sectional view showing the structure of the LED package of the second embodiment. 図6は実施例3のLEDパッケージの構造を示す縦断面図である。FIG. 6 is a longitudinal sectional view showing the structure of the LED package of Example 3.

以下、本発明を実施するための形態をLEDパッケージに適用して具体化した3つの実施例1〜3を説明する。   Hereinafter, three Examples 1 to 3 in which the mode for carrying out the present invention is applied to an LED package will be described.

本発明の実施例1を図1乃至図4に基づいて説明する。
まず、図4を参照してLEDパッケージの構造を説明する。
A first embodiment of the present invention will be described with reference to FIGS.
First, the structure of the LED package will be described with reference to FIG.

搭載部材10は、リードフレーム11に素子搭載凹部12を有するパッケージ本体13を絶縁性樹脂で成形して構成されている。このパッケージ本体13の素子搭載凹部12の底面中央部には、半導体素子であるLED素子14(発光素子)がダイボンディング(接合)されている。素子搭載凹部12の深さ寸法(高さ寸法)は、LED素子14の高さ寸法とほぼ同一に設定され、素子搭載凹部12内に搭載したLED素子14上面の電極部15がパッケージ本体13上面のリードフレーム11の電極部11aとほぼ同じ高さとなっている。   The mounting member 10 is configured by molding a package body 13 having an element mounting recess 12 in a lead frame 11 with an insulating resin. An LED element 14 (light emitting element), which is a semiconductor element, is die-bonded (bonded) to the center of the bottom surface of the element mounting recess 12 of the package body 13. The depth dimension (height dimension) of the element mounting recess 12 is set to be approximately the same as the height dimension of the LED element 14, and the electrode portion 15 on the upper surface of the LED element 14 mounted in the element mounting recess 12 is the upper surface of the package body 13. The lead frame 11 has almost the same height as the electrode portion 11a.

LED素子14上面の電極部15とパッケージ本体13上面の電極部11aの表面には、それぞれ後述する絶縁性樹脂16の液に対して撥液性のある導電性突起部17が形成されている。この導電性突起部17の形成方法は、例えば金属ナノ粒子インクのような導電性材料をディスペンサ、インクジェット等で塗布(吐出)又はスクリーン印刷して乾燥して1層分の導電層を形成し、その上に重ねて次の導電層を形成するという処理を所定回繰り返すことで、所定高さの導電性突起部17を形成する。或は、固体状の導電部材を導電性接着剤等で電極部15,11aに接着したり、半田を電極部15,11aに塗布して導電性突起部17を形成しても良い。或は、LED素子14の製造工程で、フォトリソグラフィーやめっき等により電極部11aの表面に導電性突起部17を形成しても良い。   On the surface of the electrode portion 15 on the upper surface of the LED element 14 and the surface of the electrode portion 11a on the upper surface of the package body 13, conductive protrusions 17 having liquid repellency with respect to the liquid of the insulating resin 16 described later are formed. A method for forming the conductive protrusion 17 is, for example, by applying (discharge) or screen printing a conductive material such as metal nanoparticle ink with a dispenser, an inkjet, or the like to form a conductive layer for one layer, The process of forming the next conductive layer on top of it is repeated a predetermined number of times to form the conductive protrusions 17 having a predetermined height. Alternatively, the conductive protrusions 17 may be formed by bonding a solid conductive member to the electrode portions 15 and 11a with a conductive adhesive or the like, or applying solder to the electrode portions 15 and 11a. Alternatively, the conductive protrusion 17 may be formed on the surface of the electrode portion 11a by photolithography, plating, or the like in the manufacturing process of the LED element 14.

導電性突起部17に撥液性を付与する場合は、金属ナノ粒子インク等の導電性材料に、シラン化合物系、フッ素樹脂系等の撥液性材料を混入したり、導電性突起部17の形成後に、該導電性突起部17の表面に撥液性材料を塗布するようにしても良い。   When liquid repellency is imparted to the conductive protrusion 17, a liquid repellent material such as a silane compound or a fluororesin is mixed into a conductive material such as metal nanoparticle ink, After the formation, a liquid repellent material may be applied to the surface of the conductive protrusion 17.

パッケージ本体13の素子搭載凹部12内のうちのLED素子14の周囲の隙間(凹部)に、透明な絶縁性樹脂16が充填されて透明な埋込み樹脂層が形成されている。これにより、LED素子14上面の電極部15とパッケージ本体13上面の電極部11aとの間をつなぐ配線経路は、素子搭載凹部12内のLED素子14の周囲の隙間に充填した絶縁性樹脂16により段差(凹凸)が小さくなってなだらかになっている。   A transparent insulating resin 16 is filled in a gap (recess) around the LED element 14 in the element mounting recess 12 of the package body 13 to form a transparent embedded resin layer. As a result, the wiring path connecting the electrode portion 15 on the upper surface of the LED element 14 and the electrode portion 11a on the upper surface of the package body 13 is formed by the insulating resin 16 filled in the gap around the LED element 14 in the element mounting recess 12. The step (unevenness) becomes smaller and smoother.

LED素子14上面の電極部15上の導電性突起部17とパッケージ本体13上面の電極部11a上の導電性突起部17との間の配線経路には、配線18が形成され、該配線18が導電性突起部17を介して電極部15,11aに導通した状態となっている。この配線18の形成方法は、インクジェット、ディスペンサ等の液滴吐出法又は印刷法により導電性のインク(Ag等の導体粒子を含むインク)を吐出又は印刷して配線18のパターンを描画し、これを乾燥して焼成すれば良い。
尚、搭載部材10の上側部分は、LED素子14と配線18を封止する透明な絶縁封止材でモールドされる。
A wiring 18 is formed in a wiring path between the conductive protrusion 17 on the electrode portion 15 on the upper surface of the LED element 14 and the conductive protrusion 17 on the electrode portion 11 a on the upper surface of the package body 13. It is in a state of being electrically connected to the electrode portions 15 and 11a through the conductive protrusions 17. The wiring 18 is formed by discharging or printing conductive ink (ink containing conductive particles such as Ag) by a droplet discharge method such as ink jet or dispenser or a printing method, thereby drawing a pattern of the wiring 18. Is dried and fired.
The upper portion of the mounting member 10 is molded with a transparent insulating sealing material that seals the LED element 14 and the wiring 18.

次に、上記構成のLEDパッケージの製造方法を説明する。
搭載部材10の形成後に、素子搭載工程に進み、図1に示すように、パッケージ本体13の素子搭載凹部12の底面中央部に、LED素子14がダイボンディング(接合)する。
Next, a method for manufacturing the LED package having the above configuration will be described.
After the mounting member 10 is formed, the process proceeds to an element mounting process, and the LED element 14 is die-bonded (bonded) to the center of the bottom surface of the element mounting recess 12 of the package body 13 as shown in FIG.

この後、導電性突起部形成工程に移行し、図2に示すように、LED素子14上面の電極部15の表面とパッケージ本体13上面の電極部11aの表面に、厚膜法(インクジェット、ディスペンサ等の液滴吐出法又は印刷法)により、金属ナノ粒子インク等の導電性材料を吐出又は印刷して、各電極部15,11aの表面に導電性突起部17のパターンを描画して乾燥して1層分の導電層を形成し、その上に重ねて次の導電層を形成するという処理を所定回数繰り返して導電性突起部17を形成する。   Thereafter, the process proceeds to a conductive protrusion forming step. As shown in FIG. 2, a thick film method (inkjet, dispenser) is applied to the surface of the electrode portion 15 on the upper surface of the LED element 14 and the surface of the electrode portion 11a on the upper surface of the package body 13. The conductive material such as metal nanoparticle ink is discharged or printed by a droplet discharge method or printing method such as the above, and the pattern of the conductive protrusions 17 is drawn on the surfaces of the electrode portions 15 and 11a and dried. Then, the conductive protrusion 17 is formed by repeating a process of forming a conductive layer for one layer and forming a next conductive layer on the conductive layer a predetermined number of times.

尚、LED素子14上面の電極部15の表面に導電性突起部17を形成する工程は、LED素子14をパッケージ本体13の素子搭載凹部12にダイボンディングする前に行っても良い。   The step of forming the conductive protrusion 17 on the surface of the electrode portion 15 on the upper surface of the LED element 14 may be performed before the LED element 14 is die-bonded to the element mounting recess 12 of the package body 13.

また、LED素子14の製造工程や、搭載部材10の製造工程で、電極部15,11aの表面に導電性突起部17を形成しても良い。つまり、電極部15,11aの表面に導電性突起部17を形成する工程は、LED素子14の製造元や搭載部材10の製造元で行っても良く、これらの製造元から導電性突起部17付きのLED素子14や搭載部材10を入手して、以下の工程を実行するようにしても良い。   In addition, the conductive protrusions 17 may be formed on the surfaces of the electrode portions 15 and 11a in the manufacturing process of the LED element 14 and the manufacturing process of the mounting member 10. That is, the step of forming the conductive protrusions 17 on the surfaces of the electrode portions 15 and 11a may be performed by the manufacturer of the LED element 14 or the manufacturer of the mounting member 10, and the LED with the conductive protrusions 17 from these manufacturers. You may make it acquire the element 14 and the mounting member 10, and may perform the following processes.

この後、絶縁性樹脂埋込み工程に移行し、図3に示すように、パッケージ本体13の素子搭載凹部12内のうちのLED素子14の周囲の隙間(凹部)に、透明な絶縁性樹脂16の液をインクジェット、ディスペンサ等の液滴吐出法により充填して乾燥・硬化させて透明な絶縁性樹脂16の埋込み層を形成する。この際、素子搭載凹部12内に充填した絶縁性樹脂16の液の一部が素子搭載凹部12から溢れて各電極部15,11aの縁部にまで広がるように絶縁性樹脂16の吐出量を設定することで、LED素子14上面の電極部15とパッケージ本体13上面の電極部11aとの間の配線経路の段差をできるだけ小さくして該配線経路全体をなだらかにする。   Thereafter, the process proceeds to an insulating resin embedding process, and as shown in FIG. 3, the transparent insulating resin 16 is placed in the gap (recess) around the LED element 14 in the element mounting recess 12 of the package body 13. The liquid is filled by a droplet discharge method such as ink jet or dispenser, dried and cured to form an embedded layer of transparent insulating resin 16. At this time, the discharge amount of the insulating resin 16 is set so that a part of the liquid of the insulating resin 16 filled in the element mounting recess 12 overflows from the element mounting recess 12 and spreads to the edges of the electrode portions 15 and 11a. By setting, the step of the wiring path between the electrode part 15 on the upper surface of the LED element 14 and the electrode part 11a on the upper surface of the package body 13 is made as small as possible to make the entire wiring path gentle.

このとき、素子搭載凹部12から溢れた絶縁性樹脂16の液が各電極部15,11aの表面にまで濡れ広がっても、各電極部15,11aの表面には導電性突起部17が形成されているため、該導電性突起部17が絶縁性樹脂16の液から露出した状態となる。更に、本実施例1では、導電性突起部17に撥液性が付与されているため、絶縁性樹脂16の液が導電性突起部17上に濡れ広がることが該導電性突起部17の撥液性によって防止され、導電性突起部17が絶縁性樹脂16の液から確実に露出した状態に保たれる。   At this time, even if the liquid of the insulating resin 16 overflowing from the element mounting recess 12 wets and spreads to the surfaces of the electrode portions 15 and 11a, the conductive protrusions 17 are formed on the surfaces of the electrode portions 15 and 11a. Therefore, the conductive protrusion 17 is exposed from the liquid of the insulating resin 16. Further, in the first embodiment, since the liquid repellency is imparted to the conductive protrusions 17, the liquid of the insulating resin 16 spreads on the conductive protrusions 17 and the repellency of the conductive protrusions 17. This prevents the conductive protrusion 17 from being exposed from the liquid of the insulating resin 16.

この後、配線形成工程に移行し、図4に示すように、LED素子14上面の電極部15上の導電性突起部17とパッケージ本体13上面の電極部11a上の導電性突起部17との間の配線経路(絶縁性樹脂16の埋込み層上面)に、インクジェット、ディスペンサ等の液滴吐出法又は印刷法により導電性のインク(Ag等の導体粒子を含むインク)を吐出又は印刷して配線18のパターンを描画し、これを乾燥して焼成する。この際、配線18の焼成温度は、200℃程度(例えば180℃以上)で、焼成時間は30分〜60分程度とすれば良い。   Thereafter, the process proceeds to a wiring forming process, and as shown in FIG. 4, the conductive protrusion 17 on the electrode part 15 on the upper surface of the LED element 14 and the conductive protrusion 17 on the electrode part 11a on the upper surface of the package body 13 Conductive ink (ink containing conductive particles such as Ag) is ejected or printed on the wiring path (upper surface of the embedded layer of the insulating resin 16) by a droplet ejection method such as inkjet or dispenser or a printing method. 18 patterns are drawn, dried and fired. At this time, the firing temperature of the wiring 18 may be about 200 ° C. (for example, 180 ° C. or more), and the firing time may be about 30 minutes to 60 minutes.

この後、封止工程に移行し、搭載部材10の上側部分を透明な絶縁封止材でモールドしてLED素子14と配線18を透明な絶縁封止材で封止する。   Then, it transfers to a sealing process, the upper part of the mounting member 10 is molded with a transparent insulating sealing material, and the LED element 14 and the wiring 18 are sealed with a transparent insulating sealing material.

以上説明した本実施例1によれば、両電極部15,11a間の配線経路の凹部や段差を絶縁性樹脂16で埋める前に、LED素子14上面の電極部15の表面とパッケージ本体13上面の電極部11aの表面に導電性突起部17を形成するようにしているため、両電極部15,11a間の配線経路の凹部や段差を絶縁性樹脂16で埋める際に、絶縁性樹脂16の吐出量を適度に増やして、絶縁性樹脂16の液が電極部15,11aの表面にまで濡れ広がっても、電極部15,11aの表面に形成した導電性突起部17が絶縁性樹脂16から露出した状態となり、配線18を導電性突起部17を介して両電極部15,11aに導通させることができる。これにより、配線18と電極部15,11aとの間の導通性を導電性突起部17により確保しながら、配線18の断線の原因となる配線経路の凹部や段差を十分に絶縁性樹脂16で埋めて配線経路を十分になだらかにすることが可能となり、配線経路の段差による配線18の断線を防止でき、配線18の接続信頼性を向上できる。   According to the first embodiment described above, the surface of the electrode portion 15 on the upper surface of the LED element 14 and the upper surface of the package body 13 are filled before the recesses or steps in the wiring path between the electrode portions 15 and 11a are filled with the insulating resin 16. Since the conductive protrusion 17 is formed on the surface of the electrode portion 11a, when filling the recesses or steps in the wiring path between the electrode portions 15 and 11a with the insulating resin 16, the insulating resin 16 Even if the discharge amount is increased moderately and the liquid of the insulating resin 16 wets and spreads to the surfaces of the electrode portions 15 and 11a, the conductive protrusions 17 formed on the surfaces of the electrode portions 15 and 11a are separated from the insulating resin 16. It becomes an exposed state, and the wiring 18 can be conducted to both the electrode portions 15 and 11a through the conductive protrusions 17. As a result, while the conductivity between the wiring 18 and the electrode parts 15, 11 a is ensured by the conductive protrusions 17, the insulating resin 16 can sufficiently form the recesses and steps in the wiring path that cause the disconnection of the wiring 18. The wiring path can be sufficiently smoothed by being buried, the disconnection of the wiring 18 due to a step in the wiring path can be prevented, and the connection reliability of the wiring 18 can be improved.

しかも、本実施例1では、導電性突起部17に撥液性を付与しているため、絶縁性樹脂16の液が電極部15,11aの導電性突起部17上に濡れ広がることを該導電性突起部17の撥液性によって防止でき、配線18の接続信頼性をより一層向上できる。   Moreover, in the first embodiment, since the conductive protrusions 17 are provided with liquid repellency, it is indicated that the liquid of the insulating resin 16 wets and spreads on the conductive protrusions 17 of the electrode portions 15 and 11a. This can be prevented by the liquid repellency of the conductive protrusion 17 and the connection reliability of the wiring 18 can be further improved.

次に、図5を用いて本発明の実施例2を説明する。但し、上記実施例1と実質的に同じ部分には同じ符号を付して説明を省略又は簡略化し、主として異なる部分について説明する。   Next, Embodiment 2 of the present invention will be described with reference to FIG. However, substantially the same parts as those in the first embodiment are denoted by the same reference numerals, description thereof is omitted or simplified, and different parts are mainly described.

上記実施例1では、パッケージ本体13の素子搭載凹部12内に充填した絶縁性樹脂16の埋込み層上に配線18を直接形成するようにしたが、絶縁性樹脂16の埋込み層のみでは、LED素子14上面の電極部15とパッケージ本体13上面の電極部11aとの間の配線経路の段差を完全には埋めきれずに段差が少し残る場合がある。   In the first embodiment, the wiring 18 is directly formed on the embedded layer of the insulating resin 16 filled in the element mounting recess 12 of the package body 13, but the LED element is formed only by the embedded layer of the insulating resin 16. The step of the wiring path between the electrode portion 15 on the upper surface 14 and the electrode portion 11a on the upper surface of the package main body 13 may not be completely filled, and a step may remain slightly.

そこで、図5に示す本発明の実施例2では、絶縁性樹脂埋込み工程の終了後に、配線18を形成する前に、絶縁性樹脂16の埋込み層上にプライマ樹脂層21を形成して、LED素子14上面の電極部15とパッケージ本体13上面の電極部11aとの間の配線経路の段差をプライマ樹脂層21で更に小さくして配線経路をより一層なだらかにした後、該プライマ樹脂層21上に配線18を形成する。   Therefore, in the second embodiment of the present invention shown in FIG. 5, after the insulating resin embedding process is completed, before the wiring 18 is formed, a primer resin layer 21 is formed on the embedding layer of the insulating resin 16, and the LED The step of the wiring path between the electrode part 15 on the upper surface of the element 14 and the electrode part 11a on the upper surface of the package body 13 is further reduced by the primer resin layer 21 to further smooth the wiring path, and then on the primer resin layer 21. A wiring 18 is formed on the substrate.

この際、プライマ樹脂層21は、配線18を形成する部分のみに線状又は帯状に形成しても良いし、絶縁性樹脂16の埋込み層の上面全体に面状に形成しても良い。要は、少なくとも配線18を形成する下地部分にプライマ樹脂層21を形成すれば良い。プライマ樹脂層21を広範囲に形成する場合は、プライマ樹脂層21がLED素子14の光の放射を遮らないように、透明な材料でプライマ樹脂層21を形成することが望ましい。   At this time, the primer resin layer 21 may be formed in a linear shape or a strip shape only in a portion where the wiring 18 is formed, or may be formed in a planar shape on the entire upper surface of the embedded layer of the insulating resin 16. In short, the primer resin layer 21 may be formed at least on the base portion where the wiring 18 is formed. When forming the primer resin layer 21 in a wide range, it is desirable to form the primer resin layer 21 with a transparent material so that the primer resin layer 21 does not block the light emission of the LED element 14.

このプライマ樹脂層21の形成方法は、インクジェット、ディスペンサ等の液滴吐出法又は印刷法により、上記絶縁性材料のインクを配線経路上に吐出又は印刷して、プライマ樹脂層21のパターンを配線経路上に線状又は帯状に描画して乾燥・硬化させてプライマ樹脂層21を形成する。この際、プライマ樹脂層21の液が各電極部15,11aの表面にまで濡れ広がっても、各電極部15,11aの表面には導電性突起部17が形成されているため、該導電性突起部17がプライマ樹脂層21の液から露出した状態となる。   The primer resin layer 21 is formed by discharging or printing the ink of the insulating material on the wiring path by a droplet discharge method such as ink jet or dispenser or a printing method, and thereby forming a pattern of the primer resin layer 21 on the wiring path. The primer resin layer 21 is formed by drawing in a linear or strip shape on the top and drying and curing. At this time, even if the liquid of the primer resin layer 21 wets and spreads to the surfaces of the electrode portions 15 and 11a, the conductive protrusions 17 are formed on the surfaces of the electrode portions 15 and 11a. The protrusion 17 is exposed from the liquid of the primer resin layer 21.

ここで、プライマ樹脂層21の材料としては、例えば、エポキシ樹脂系、ポリイミド樹脂系、ガラス(SiO2 )系等の絶縁性材料があり、これらの絶縁性材料の中から、光透過性、耐湿性、絶縁性樹脂16の埋込み層及び配線18に対する密着性等を考慮して選択すれば良い。 Here, the material of the primer resin layer 21 includes, for example, an insulating material such as an epoxy resin type, a polyimide resin type, or a glass (SiO 2 ) type. The selection may be made in consideration of the property, the adhesion of the insulating resin 16 to the buried layer and the wiring 18, and the like.

そして、プライマ樹脂層21の乾燥・硬化後に、インクジェット、ディスペンサ等の液滴吐出法又は印刷法により導電性のインク(Ag等の導体粒子を含むインク)をプライマ樹脂層21上に吐出又は印刷して、配線18のパターンをLED素子14上面の電極部15上の導電性突起部17とパッケージ本体13上面の電極部11a上の導電性突起部17とに跨がってプライマ樹脂層21上に描画し、これを乾燥して焼成して、LED素子14上面の電極部15とパッケージ本体13上面の電極部11aとの間を導電性突起部17を介して配線18で接続する。   Then, after the primer resin layer 21 is dried and cured, conductive ink (ink containing conductor particles such as Ag) is discharged or printed on the primer resin layer 21 by a droplet discharge method such as inkjet or dispenser or a printing method. Then, the pattern of the wiring 18 is straddled on the primer resin layer 21 across the conductive protrusion 17 on the electrode portion 15 on the upper surface of the LED element 14 and the conductive protrusion 17 on the electrode portion 11a on the upper surface of the package body 13. Drawing, drying and firing, the electrode portion 15 on the upper surface of the LED element 14 and the electrode portion 11 a on the upper surface of the package body 13 are connected by the wiring 18 via the conductive protrusion 17.

以上説明した本実施例2では、両電極部15,11a間の配線経路の凹部や段差を絶縁性樹脂16で埋めた後に、該配線経路上にプライマ樹脂層21を形成して該プライマ樹脂層21上に配線18を形成するようにしたので、プライマ樹脂層21によって配線経路をより一層なだらかにすることができ、液滴吐出法や印刷法で配線18をプライマ樹脂層21上に形成しやすくなると共に、配線経路の段差による配線18の断線をより確実に防止できる。その他、前記実施例1と同様の効果を得ることができる。   In the second embodiment described above, after the recesses or steps of the wiring path between the electrode portions 15 and 11a are filled with the insulating resin 16, the primer resin layer 21 is formed on the wiring path to thereby form the primer resin layer. Since the wiring 18 is formed on the primer 21, the wiring route can be made smoother by the primer resin layer 21, and the wiring 18 can be easily formed on the primer resin layer 21 by a droplet discharge method or a printing method. In addition, disconnection of the wiring 18 due to a step in the wiring path can be more reliably prevented. In addition, the same effects as those of the first embodiment can be obtained.

次に、図6を用いて本発明の実施例3を説明する。但し、前記実施例1と実質的に同じ部分には同じ符号を付して説明を省略又は簡略化し、主として異なる部分について説明する。   Next, Embodiment 3 of the present invention will be described with reference to FIG. However, substantially the same parts as those in the first embodiment are denoted by the same reference numerals, description thereof is omitted or simplified, and different parts are mainly described.

本実施例3では、素子搭載工程で、搭載部材である配線基板31上にLED素子14をダイボンディングする。この後、導電性突起部形成工程に移行し、LED素子14上面の電極部15と配線基板31上面の電極部32の表面に、前記実施例1と同様の方法で、導電性突起部17を形成する。尚、LED素子14上面の電極部15の表面に導電性突起部17を形成する工程は、LED素子14をパッケージ本体13の素子搭載凹部12にダイボンディングする前に行っても良い。また、LED素子14の製造工程や、配線基板31の製造工程で、電極部15,32の表面に導電性突起部17を形成しても良い。つまり、電極部15,32の表面に導電性突起部17を形成する工程は、LED素子14の製造元や配線基板31の製造元で行っても良い。   In the third embodiment, the LED element 14 is die-bonded on the wiring board 31 which is a mounting member in the element mounting process. Thereafter, the process proceeds to a conductive protrusion forming step, and the conductive protrusion 17 is formed on the surface of the electrode portion 15 on the upper surface of the LED element 14 and the surface of the electrode portion 32 on the upper surface of the wiring substrate 31 in the same manner as in the first embodiment. Form. The step of forming the conductive protrusion 17 on the surface of the electrode portion 15 on the upper surface of the LED element 14 may be performed before the LED element 14 is die-bonded to the element mounting recess 12 of the package body 13. Further, the conductive protrusion 17 may be formed on the surface of the electrode portions 15 and 32 in the manufacturing process of the LED element 14 or the manufacturing process of the wiring substrate 31. That is, the step of forming the conductive protrusions 17 on the surfaces of the electrode portions 15 and 32 may be performed by the manufacturer of the LED element 14 or the manufacturer of the wiring board 31.

この後、絶縁性樹脂スロープ形成工程に移行し、LED素子14の周囲に、透明な絶縁性樹脂33の液をディスペンサで吐出して、LED素子14上面の電極部15と配線基板31上面の電極部32との間の配線経路の段差を絶縁性樹脂33で埋めて該配線経路を傾斜面でなだらかにつなぐ透明な絶縁性樹脂33のスロープを形成する。この際、絶縁性樹脂33の液が各電極部15,32の表面にまで濡れ広がっても、各電極部15,11aの表面には導電性突起部17が形成されているため、該導電性突起部17が絶縁性樹脂33の液から露出した状態となる。   Thereafter, the process proceeds to an insulating resin slope forming step, and a liquid of transparent insulating resin 33 is discharged around the LED element 14 with a dispenser, so that the electrode portion 15 on the upper surface of the LED element 14 and the electrode on the upper surface of the wiring board 31 are discharged. The step of the wiring path to the portion 32 is filled with the insulating resin 33 to form a slope of the transparent insulating resin 33 that gently connects the wiring path with the inclined surface. At this time, even if the liquid of the insulating resin 33 wets and spreads to the surfaces of the electrode portions 15 and 32, the conductive protrusions 17 are formed on the surfaces of the electrode portions 15 and 11a. The protrusion 17 is exposed from the liquid of the insulating resin 33.

この後、配線形成工程に移行し、両電極部15,32間の配線経路上(絶縁性樹脂33のスロープ上)に配線18を形成して該配線18を導電性突起部17を介して両電極部15,32に接続する。この後、封止工程に移行し、配線基板31の上側部分を透明な絶縁封止材でモールドしてLED素子14と配線18を透明な絶縁封止材で封止する。   Thereafter, the process proceeds to a wiring forming process, where the wiring 18 is formed on the wiring path between the electrode parts 15 and 32 (on the slope of the insulating resin 33), and the wiring 18 is connected to both through the conductive protrusions 17. Connect to electrode portions 15 and 32. Thereafter, the process proceeds to a sealing step, and the upper part of the wiring substrate 31 is molded with a transparent insulating sealing material, and the LED element 14 and the wiring 18 are sealed with a transparent insulating sealing material.

以上説明した本実施例3でも、前記実施例1と同様の効果を得ることができる。
尚、上記各実施例1〜3では、配線17を厚膜法(液滴吐出法又は印刷法等)で形成したが、本発明は、これに限定されず、薄膜法又は固体状の導電性部材の貼付により形成しても良い。薄膜法は、例えば、ITO等の透明な導電性材料を用いた物理蒸着「PVD」(スパッタリング、真空蒸着、イオンプレーティング等)、化学蒸着「CVD」(プラズマCVD、熱CVD等)、溶射(プラズマ溶射、アーク溶射等)、めっき法のいずれかを用いて配線18のパターンを形成しても良い。配線18を透明な導電性材料で形成する場合は、線状や帯状に形成しても良いし、面状に形成しても良く、要は、他の導電物に接触してショートしない範囲内で、配線18の位置ずれ等を考慮して配線18の線幅を幅広に形成すれば良い。
Also in the third embodiment described above, the same effect as in the first embodiment can be obtained.
In each of the first to third embodiments, the wiring 17 is formed by a thick film method (droplet discharge method, printing method, or the like). However, the present invention is not limited to this, and the thin film method or solid conductive property is used. You may form by sticking of a member. Thin film methods include, for example, physical vapor deposition “PVD” (sputtering, vacuum vapor deposition, ion plating, etc.) using a transparent conductive material such as ITO, chemical vapor deposition “CVD” (plasma CVD, thermal CVD, etc.), thermal spraying ( The pattern of the wiring 18 may be formed using any one of plasma spraying, arc spraying, etc.) or plating. When the wiring 18 is formed of a transparent conductive material, it may be formed in a linear shape or a strip shape, or may be formed in a planar shape. Therefore, the line width of the wiring 18 may be formed wide in consideration of the positional deviation of the wiring 18 and the like.

また、上記各実施例1〜3では、LED素子14上面の電極部15とパッケージ本体13(配線基板31)の上面の電極部11a(32)の両方に導電性突起部17を形成したが、どちらか一方の電極部のみに絶縁性樹脂16(33)の液が濡れ広がりやすい構造になっている場合は、絶縁性樹脂16(33)の液が濡れ広がりやすい方の電極部のみに導電性突起部17を形成するようにしても良い。   In each of Examples 1 to 3, the conductive protrusions 17 were formed on both the electrode portion 15 on the upper surface of the LED element 14 and the electrode portion 11a (32) on the upper surface of the package body 13 (wiring board 31). When the liquid of the insulating resin 16 (33) is easily wetted and spread only on one of the electrode parts, the conductive material is conductive only on the electrode part on which the liquid of the insulating resin 16 (33) is easily wetted and spread. The protrusion 17 may be formed.

例えば、実施例3(図6)の構造では、配線基板31上面の電極部32がLED素子14上面の電極部15よりも低い位置に存在するため、高い方のLED素子14上面の電極部15と比べて、低い方の配線基板31上面の電極部32に向かって絶縁性樹脂33の液が流れて広がりやすい。この点を考慮して、配線基板31上面の電極部32のみに導電性突起部17を形成するようにしても良い。   For example, in the structure of Example 3 (FIG. 6), since the electrode part 32 on the upper surface of the wiring board 31 exists at a position lower than the electrode part 15 on the upper surface of the LED element 14, the electrode part 15 on the upper surface of the higher LED element 14 is used. As compared with the above, the liquid of the insulating resin 33 tends to flow and spread toward the electrode part 32 on the upper surface of the lower wiring board 31. Considering this point, the conductive protrusions 17 may be formed only on the electrode portions 32 on the upper surface of the wiring board 31.

また、本発明は、導電性突起部17に撥液性を付与した構成に限定されず、撥液性を付与しない構成としても良い。撥液性を付与しなくても、導電性突起部17の高さ寸法を大きくすれば、導電性突起部17上に絶縁性樹脂16(33)の液が濡れ広がることを防止できる。   In addition, the present invention is not limited to the configuration in which the conductive protrusion 17 is provided with liquid repellency, and may be configured to not provide liquid repellency. Even if the liquid repellency is not imparted, the liquid of the insulating resin 16 (33) can be prevented from spreading on the conductive protrusions 17 by increasing the height of the conductive protrusions 17.

その他、本発明は、LEDパッケージに限定されず、LED素子以外の半導体素子を搭載部材に搭載した様々な構造の半導体パッケージに適用して実施できる等、要旨を逸脱しない範囲内で種々変更して実施できることは言うまでもない。   In addition, the present invention is not limited to the LED package, and various modifications can be made without departing from the gist, such as being applicable to semiconductor packages having various structures in which semiconductor elements other than LED elements are mounted on a mounting member. Needless to say, it can be implemented.

10…搭載部材、11…リードフレーム、11a…電極部、12…素子搭載凹部、13…パッケージ本体、14…LED素子(半導体素子)、15…電極部、16…絶縁性樹脂、17…導電性突起部、18…配線、21…プライマ樹脂層、31…配線基板(搭載部材)32…電極部、33…絶縁性樹脂   DESCRIPTION OF SYMBOLS 10 ... Mounting member, 11 ... Lead frame, 11a ... Electrode part, 12 ... Element mounting recessed part, 13 ... Package main body, 14 ... LED element (semiconductor element), 15 ... Electrode part, 16 ... Insulating resin, 17 ... Conductivity Projection part, 18 ... wiring, 21 ... primer resin layer, 31 ... wiring board (mounting member) 32 ... electrode part, 33 ... insulating resin

Claims (5)

搭載部材上に半導体素子を搭載し、該半導体素子側の電極部と該搭載部材側の電極部との間の配線経路の凹部及び/又は段差を絶縁性樹脂で埋めると共に、該半導体素子側の電極部と該搭載部材側の電極部との間を接続する配線を該絶縁性樹脂上に形成した半導体パッケージにおいて、
前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋める前に、前記半導体素子側の電極部の表面及び/又は前記搭載部材側の電極部の表面に導電性突起部を形成し、若しくは予め電極部の表面に導電性突起部が形成された半導体素子及び/又は予め電極部の表面に導電性突起部が形成された搭載部材を使用し、
前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋めて該配線経路をなだらかにした後に前記配線を該配線経路上に形成することで該配線を前記導電性突起部を介して前記電極部に導通させたことを特徴とする半導体パッケージ。
A semiconductor element is mounted on the mounting member, and a recess and / or a step in the wiring path between the electrode part on the semiconductor element side and the electrode part on the mounting member side is filled with an insulating resin, and the semiconductor element side In the semiconductor package in which the wiring connecting the electrode part and the electrode part on the mounting member side is formed on the insulating resin,
Before filling the recesses and / or steps of the wiring path with the insulating resin, forming conductive protrusions on the surface of the electrode part on the semiconductor element side and / or on the surface of the electrode part on the mounting member side, or Using a semiconductor element in which conductive protrusions are formed on the surface of the electrode part in advance and / or a mounting member in which conductive protrusions are formed on the surface of the electrode part in advance,
The wiring path is formed on the wiring path after filling the recesses and / or steps of the wiring path with the insulating resin to smooth the wiring path, and thereby the wiring is formed on the electrode via the conductive protrusion. A semiconductor package characterized by being electrically connected to a part.
前記導電性突起部は、撥液性を有する導電材料により形成されていることを特徴とする請求項1に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein the conductive protrusion is made of a conductive material having liquid repellency. 前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋めた後に、該配線経路上にプライマ樹脂層を形成して該プライマ樹脂層上に前記配線を形成したことを特徴とする請求項1又は2に記載の半導体パッケージ。   2. The recesses and / or steps of the wiring path are filled with the insulating resin, a primer resin layer is formed on the wiring path, and the wiring is formed on the primer resin layer. Or the semiconductor package of 2. 搭載部材上に半導体素子を搭載し、該半導体素子側の電極部と該搭載部材側の電極部との間の配線経路の凹部及び/又は段差を絶縁性樹脂で埋めると共に、該半導体素子側の電極部と該搭載部材側の電極部との間を接続する配線を該配線経路上に形成する半導体パッケージの製造方法において、
前記半導体素子側の電極部の表面及び/又は前記搭載部材側の電極部の表面に導電性突起部を形成する工程と、
前記導電性突起部の形成後に前記配線経路の凹部及び/又は前記段差を前記絶縁性樹脂で埋めて該配線経路をなだらかにする工程と、
前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋めた後に前記配線を該配線経路上に形成することで該配線を前記導電性突起部を介して前記電極部に導通させる工程と を含むことを特徴とする半導体パッケージの製造方法。
A semiconductor element is mounted on the mounting member, and a recess and / or a step in the wiring path between the electrode part on the semiconductor element side and the electrode part on the mounting member side is filled with an insulating resin, and the semiconductor element side In the manufacturing method of the semiconductor package, the wiring connecting the electrode portion and the electrode portion on the mounting member side is formed on the wiring path.
Forming a conductive protrusion on the surface of the electrode part on the semiconductor element side and / or on the surface of the electrode part on the mounting member side;
Filling the recesses and / or the steps of the wiring path with the insulating resin after the formation of the conductive protrusions, and smoothing the wiring path;
Forming the wiring on the wiring path after filling the recesses and / or steps of the wiring path with the insulating resin, thereby electrically connecting the wiring to the electrode section through the conductive protrusions. A method of manufacturing a semiconductor package, comprising:
搭載部材上に半導体素子を搭載し、該半導体素子側の電極部と該搭載部材側の電極部との間の配線経路の凹部及び/又は段差を絶縁性樹脂で埋めると共に、該半導体素子側の電極部と該搭載部材側の電極部との間を接続する配線を該配線経路上に形成する半導体パッケージの製造方法において、
予め電極部の表面に導電性突起部が形成された半導体素子及び/又は予め電極部の表面に導電性突起部が形成された搭載部材を使用し、
前記配線経路の凹部及び/又は前記段差を前記絶縁性樹脂で埋めて該配線経路をなだらかにする工程と、
前記配線経路の凹部及び/又は段差を前記絶縁性樹脂で埋めた後に前記配線を該配線経路上に形成することで該配線を前記導電性突起部を介して前記電極部に導通させる工程と を含むことを特徴とする半導体パッケージの製造方法。
A semiconductor element is mounted on the mounting member, and a recess and / or a step in the wiring path between the electrode part on the semiconductor element side and the electrode part on the mounting member side is filled with an insulating resin, and the semiconductor element side In the manufacturing method of the semiconductor package, the wiring connecting the electrode portion and the electrode portion on the mounting member side is formed on the wiring path.
Using a semiconductor element in which conductive protrusions are formed on the surface of the electrode part in advance and / or a mounting member in which conductive protrusions are formed on the surface of the electrode part in advance,
Filling the recesses and / or the steps of the wiring path with the insulating resin to smooth the wiring path;
Forming the wiring on the wiring path after filling the recesses and / or steps of the wiring path with the insulating resin, thereby electrically connecting the wiring to the electrode section through the conductive protrusions. A method of manufacturing a semiconductor package, comprising:
JP2012137902A 2012-06-19 2012-06-19 LED package and its manufacturing method Active JP6037544B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012137902A JP6037544B2 (en) 2012-06-19 2012-06-19 LED package and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012137902A JP6037544B2 (en) 2012-06-19 2012-06-19 LED package and its manufacturing method

Publications (2)

Publication Number Publication Date
JP2014003176A true JP2014003176A (en) 2014-01-09
JP6037544B2 JP6037544B2 (en) 2016-12-07

Family

ID=50036074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012137902A Active JP6037544B2 (en) 2012-06-19 2012-06-19 LED package and its manufacturing method

Country Status (1)

Country Link
JP (1) JP6037544B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013115070A (en) * 2011-11-25 2013-06-10 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method therefor
WO2015104928A1 (en) * 2014-01-10 2015-07-16 シャープ株式会社 Light emitting device-use substrate, light emitting device, and light emitting device-use substrate manufacturing method
JPWO2019186780A1 (en) * 2018-03-28 2020-12-03 株式会社Fuji Circuit formation method and circuit formation device
US11605766B2 (en) 2019-12-27 2023-03-14 Nichia Corporation Light-emitting module and method of manufacturing light-emitting module

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3061756B1 (en) * 2017-01-11 2019-05-10 H.E.F. PISTON FOR THERMAL MACHINE, THERMAL MACHINE COMPRISING SUCH A PISTON, AND METHODS

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61214444A (en) * 1985-03-18 1986-09-24 Fujitsu Ltd Semiconductor device
JP2006140270A (en) * 2004-11-11 2006-06-01 Seiko Epson Corp Mounting method of electronic device, circuit board, and electronic equipment
JP2006278511A (en) * 2005-03-28 2006-10-12 Matsushita Electric Works Ltd Light emitting device and its manufacturing method
JP2010141293A (en) * 2008-11-14 2010-06-24 Seiko Epson Corp Semiconductor device and method for manufacturing the same
JP2012256769A (en) * 2011-06-10 2012-12-27 Fuji Mach Mfg Co Ltd Semiconductor device and manufacturing the same
JP2013115070A (en) * 2011-11-25 2013-06-10 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method therefor
JP2013145852A (en) * 2012-01-16 2013-07-25 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method of the same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61214444A (en) * 1985-03-18 1986-09-24 Fujitsu Ltd Semiconductor device
JP2006140270A (en) * 2004-11-11 2006-06-01 Seiko Epson Corp Mounting method of electronic device, circuit board, and electronic equipment
JP2006278511A (en) * 2005-03-28 2006-10-12 Matsushita Electric Works Ltd Light emitting device and its manufacturing method
JP2010141293A (en) * 2008-11-14 2010-06-24 Seiko Epson Corp Semiconductor device and method for manufacturing the same
JP2012256769A (en) * 2011-06-10 2012-12-27 Fuji Mach Mfg Co Ltd Semiconductor device and manufacturing the same
JP2013115070A (en) * 2011-11-25 2013-06-10 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method therefor
JP2013145852A (en) * 2012-01-16 2013-07-25 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method of the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013115070A (en) * 2011-11-25 2013-06-10 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method therefor
WO2015104928A1 (en) * 2014-01-10 2015-07-16 シャープ株式会社 Light emitting device-use substrate, light emitting device, and light emitting device-use substrate manufacturing method
CN105874619A (en) * 2014-01-10 2016-08-17 夏普株式会社 Light emitting device-use substrate, light emitting device, and light emitting device-use substrate manufacturing method
US9806244B2 (en) 2014-01-10 2017-10-31 Sharp Kabushiki Kaisha Substrate for light emitting device, light emitting device, and manufacturing method of substrate for light emitting device
CN105874619B (en) * 2014-01-10 2019-08-20 夏普株式会社 The manufacturing method of light emitting device substrate, light emitting device and light emitting device substrate
JPWO2019186780A1 (en) * 2018-03-28 2020-12-03 株式会社Fuji Circuit formation method and circuit formation device
US11605766B2 (en) 2019-12-27 2023-03-14 Nichia Corporation Light-emitting module and method of manufacturing light-emitting module

Also Published As

Publication number Publication date
JP6037544B2 (en) 2016-12-07

Similar Documents

Publication Publication Date Title
JP4783583B2 (en) Method for internal electrical insulation of a substrate for a power semiconductor module
JP6037544B2 (en) LED package and its manufacturing method
JP6122423B2 (en) LED package and manufacturing method thereof
JP5748336B2 (en) Manufacturing method of semiconductor device
US7432601B2 (en) Semiconductor package and fabrication process thereof
CN104919586A (en) Module and method for producing same
US7348681B2 (en) Electronic component and manufacturing method of the electronic component
WO2013077144A1 (en) Semiconductor package and method for manufacturing same
JP6029821B2 (en) Light emitting device package and manufacturing method thereof
JP2001230347A (en) Semiconductor device and method of manufacturing the same
KR101426434B1 (en) Manufacturing method of semiconductor light emitting device
JP4723479B2 (en) Insulated power semiconductor module in which partial discharge behavior is suppressed to a low level and manufacturing method thereof
JP6081087B2 (en) Light emitting device package and manufacturing method thereof
US20120119358A1 (en) Semicondiuctor package substrate and method for manufacturing the same
JP5905267B2 (en) Light emitting device package and manufacturing method thereof
CN106328633A (en) Electronic device module and method of manufacturing the same
JP6037545B2 (en) LED package and manufacturing method thereof
KR102617348B1 (en) Chip on film semiconductor packages and display apparatus including the same
CN106299077B (en) The production method of LED encapsulation structure
JP6053053B2 (en) Semiconductor package and manufacturing method thereof
JP2005302813A (en) Electronic circuit assembly and method of manufacturing electronic circuit assembly
KR20100005852A (en) Light emitting diode package and method for making the same
JP4036017B2 (en) Electronic component mounting structure
JP2012248694A (en) Semiconductor device and manufacturing method of the same
JP2009302239A (en) Light source module

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150421

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20151218

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160107

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160229

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160822

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20161013

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20161028

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20161031

R150 Certificate of patent or registration of utility model

Ref document number: 6037544

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250