JP2013545300A - Optical communication module and manufacturing method thereof - Google Patents

Abstract

The improved optical communication module has a silicon mother board with a plurality of v-grooves that hold the laser diode emission within the enclosure for optical alignment, and the enclosure is made of silicon. It has two or more positioning parts that place and guide the motherboard to a desired position within the enclosure. The enclosure acts as a heat sink, which provides stability and helps the silicon motherboard mounting material to wick, avoiding damage to the silicon motherboard due to the mounting material. A method of forming an improved optical communication module is also disclosed.
[Selection] Figure 3B

Description

  An optical communication (photonics) module has optical components (eg, optical fibers and / or optical lenses) that align with an optical device. Currently, optical communication modules with relatively high light intensity (eg, greater than 1 W) and relatively low optical coupling loss (eg, less than about 15% optical coupling loss) are relatively time consuming to manufacture, It requires skill and requires operator intervention and / or high cost manufacturing equipment, thus making the manufacturing costs relatively high. As a result, currently available optical communication modules are used for costly end-user applications (eg, end-user applications for professionals who are not end users such as consumers). It is desirable to design the optical communication module so that it is suitable for a low-priced device application that can be sold with respect to the current device incorporating the optical communication module. Generation of high light intensity from an optical fiber (eg, greater than 1 W) generally requires an energy source that efficiently couples with the optical fiber. For example, suitable high light intensity devices include (1) diode lasers and (2) high efficiency coupling to optical fibers.

  FIG. 1 shows an example of a process flow 100 in manufacturing currently available optical communication modules. This exemplary process flow includes 15 operations. Any of these 15 operations is manual operation, automatic operation, or a combination of the two. In the first operation 101, the laser diode is die attached to the submount. In this operation 101, the diode laser can be a diode laser chip attached to the submount with the p-side facing down (eg, the positive side facing down is also referred to as the anode side facing down). The submount should generally be a high thermal conductivity material. The desired thermal conductivity of the submount material should be greater than about 180 W / m-K, with a coefficient of thermal expansion that approximates that of a diode laser (eg, about 4 ppm / K to 8 ppm / K). Suitable materials that can be used as submounts include, but are not limited to, WCu, AlN, SiC, and BeO, for example. In particular, it is desirable to use diode lasers and submount materials that exhibit similar thermal expansion characteristics when using a hard solder to attach the diode laser to the submount, otherwise stress generation due to these thermal expansion mismatches will occur. Yes, there is a risk of reducing the life and / or performance of the diode laser. Generally, hard solder is used to die attach a diode laser (eg, a diode laser chip) to the submount. Hard solder is commonly used because it provides the most stability over the lifetime of the optical communication module and / or the end device that uses the optical communication module. Representative examples of hard solder that can be used include, but are not limited to, alloys of AuSn and AuGe.

  Still referring to FIG. 1, in the next operation 102, the thermistor is die bonded to the submount. A thermistor is a resistor whose resistance varies with temperature. Station 1A of this process flow is operations 101 and 102 that form a chip on submount (CoS) assembly. “Tact time” is defined as the time required to produce a product in a given work step in an assembly sequence that meets the requirements, and is calculated by dividing the work time in minutes per day by the total customer demand. Or calculated by the number of units produced per day. Thus, the tact time is equal to the working time in minutes per unit produced. In essence, the takt time determines the maximum production capacity at a given work step. Therefore, the maximum tact time in the entire assembly sequence limits the capacity of the line that can be produced.

  Still referring to FIG. 1, the tact time of the station 1A producing the CoS assembly is about 2 minutes. In the station 2A, an operation 103 for wire bonding CoS is performed, and the tact time of the station 2A is about 0.3 minutes. CoS is wire bonded to provide electrical connectivity for various components (eg, thermistors and LD chips) to the outside world (eg, thermistors and LD chips are connected to other parts of the system, eg, power supplies, test stations or other Provide electrical connectivity to the control system).

  Operation 104 is performed at station 3A. In operation 104, the chip-on-submount formed in operations 101, 102, and 103 is tested. The photoelectric characteristics of a given device are obtained during this test. That is, light intensity, voltage and wavelength are measured as a function of current. This operation can be manual operation, automatic operation, or a combination of the two. In operation 104 at station 3A, the CoS test requires a tact time of about 2 minutes.

  It is important that there is efficient optical coupling (light collection) into the optical fiber. The fast axis of the diode laser is highly divergent from the diode laser, so a fast axis collimating (FAC) lens is used to reduce the far-field emission of the laser diode, thereby emitting the collimated diode laser. It can be matched or aligned with the optical fiber.

  In the exemplary optical communication module, both the FAC lens and the optical fiber are actively aligned to the diode laser. The diode laser emission light passes through the optical fiber after passing through the FAC lens. In one embodiment, the FAC lens is aligned before the optical fiber is aligned. Active alignment occurs when the device is actively operated to emit light, and the combined light output is monitored for both contour (profile) and light intensity, and finally each of the contour and light intensity (eg, Within the desired range, including the optimal value). Referring to FIG. 1, in operation 105, the optical communication module manufacturing process next includes a first step of FAC alignment and a second step of FAC lens attachment. Both alignment and attachment of the FAC lens occur simultaneously while operating the diode laser and emitting light. In this alignment and mounting step, the FAC lens is manipulated while the diode laser is operating so that the desired output pattern and / or the desired optical throughput to be achieved and optionally optimized are obtained. To. The alignment and attachment steps are time consuming. After the desired alignment or positioning of the FAC lens is obtained in the next part of operation 105, the lens is attached by any of a variety of attachment techniques.

  One typical attachment technique includes, but is not limited to, attaching a FAC lens to a submount or a surface adjacent to the submount. The process for bonding the FAC lens to the submount is time consuming and skillful, that is, the light intensity and beam pattern are monitored throughout the curing process and the adhesive (eg, epoxy) is cured. This is because a skilled operator must make corrections to compensate for the movement of the FAC lens. Alternatively, the process for adhering the lens to the submount requires complex automated equipment that provides the desired light intensity and beam pattern, but the process is still time consuming.

  After aligning and attaching the FAC lens, the lensed diode laser chip in the submount is tested in the post lens test (LIV, WL), operation 106. The post lens test 106 is similar to that described above for the CoS test (operation 104), but differs in that the lens coupling efficiency is evaluated by measuring the light intensity coupled through the lens. Thus, the post lens test 106 measures the light intensity, voltage and wavelength coupled through the lens as a function of current. This operation can be manual operation, automatic operation, or a combination of the two.

  In one embodiment, typical process times for performing station 4A processing, i.e., active optical alignment (e.g., in operation 105) and direct attachment (e.g., gluing) to the FAC lens submount. ), As well as post lens testing (eg, at operation 106) takes a relatively long time. The tact time of station 4A is on the order of about 15 minutes and the work requires operator intervention during the installation (eg, gluing and curing) time so that the FAC lens can be corrected during the curing process. . Furthermore, the amount of disposal due to a correction error varies from operator to operator due to operator skills associated with attachment (for example, adhesion).

  According to currently available manufacturing techniques, after the FAC lens is attached to the submount, the submount lensed diode laser chip (eg, lensed CoS) is attached in the enclosure during operation 108 at station 6A. The operation 108 requires a tact time of about 0.3 minutes. The enclosure includes a housing that houses a diode laser chip with a submount lens, and these components are kept in close proximity to each other and are protected from the external environment viewed from within the enclosure. The enclosure provides mechanical stability and / or support for the submount lensed diode laser chip. Furthermore, the enclosure can be a heat sink (so-called HS). Suitable materials that can be used to make the enclosure include, but are not limited to, copper, WCu, or other materials with high thermal conductivity.

  In one embodiment, operation 107 is performed before operation 108 at station 5A. In operation 107, an electrode is attached to an enclosure (eg, a so-called HS that is a heat sink). The electrodes are attached to the enclosure, for example by soldering. The electrodes provide electrical connectivity to other parts of the system, such as power supplies, test stations, and other control systems. Suitable electrodes include, for example, a metal suitable for the required current level (eg, a current level of about 0.1 amperes to about 5 amperes, or a current level necessary to operate the desired laser diode). There are thick film ceramics and / or printed circuit boards (eg, pcb boards) with traces. The operation 107 requires a takt time of about 0.3 minutes.

  At station 7A, wire bonding of the enclosure is performed in operation 109. In this operation, the diode laser chip with lens (for example, CoS with lens) in the submount is electrically connected to the electrode. The tact time of the station 7A is about 0.3 minutes. In one embodiment, during operations 110 and 111 at stations 8A and 9A, the bare optical fiber is cleaved (at operation 110) and attached to the ferrule assembly (at operation 111), respectively. In the station 8A, the tact time required for completing the work 110 by preparing the optical fiber by cleaving is about 1 minute. Referring again to FIG. 1, in one embodiment, during operation 111 at station 9A, a mechanism is added to the optical fiber that provides rigidity to the cleaved optical fiber and allows the optical fiber to be attached.

  In one embodiment, operation 111 attaches the cleaved optical fiber to the ferrule assembly (eg, installs the optical fiber in the ferrule). The ferrule acts as a mechanical support for the optical fiber, which can hold the optical fiber and fix the optical fiber in the desired position. The optical fiber is glued into the ferrule (eg, glued with epoxy) and / or soldered into the ferrule. If the epoxy attachment to the optical fiber ferrule assembly is performed during operation 111, the tact time of the operation is about 5 minutes.

  At station 10A, fiber coupling and testing are performed. During operation 112 at station 10A, the optical pigtails are aligned and installed. Operation 112 includes active alignment prior to installation. The fibers in the ferrule assembly are attached by any suitable means, such as laser welding, solder reflow, and epoxy bonding.

  During active alignment, some current is supplied to the laser diode chip to adjust the device to operate electrically, thereby maximizing the light throughput through the fiber. The optical pigtail serves to transfer light energy from the laser diode chip to the outside (eg, other parts of the system or device).

  As with the lens attachment method described in connection with operation 105, when this attachment method is complete (eg, the epoxy adhesive is cured), it requires active monitoring of light intensity with constant adjustment of the optical fiber position. To do. In general, the time required for any of these common fiber optic attachment methods (eg, laser welding, solder reflow, and epoxy bonding) is on the order of about 15 minutes to about 20 minutes.

  The optical fiber can be aligned to the lensed diode laser chip according to a process similar to aligning a FAC lens to the diode laser chip as described above. More specifically, the process of aligning the optical fiber to the lensed diode laser chip is performed actively while allowing the diode laser to operate and monitor the light intensity to ensure optical coupling and / or maximize. Optical fiber alignment can be performed using any of a variety of fiber attachment methods, each fiber attachment method requiring a different fiber preparation. Suitable fiber attachment methods include, but are not limited to, laser welding of ferrules containing optical fibers, solder reflow, and epoxy bonding. The ferrule acts as an attachment device that is attached to the base on which the optical fiber is seated. A ferrule is attached to the base and the optical fiber to support the optical fiber. The ferrule includes a mechanism for holding the fiber, attaching the fiber, and aligning the fiber. The rigidity of the ferrule assists the alignment and fixation of the optical fiber with the underlying support structure.

  During operation 112, solder reflow can be used to attach the ferrule that houses the fiber. During solder reflow, a solder platform is required and an optical fiber is attached to the solder platform. The selection or selection of solder is limited by the glass transition temperature of the fiber cladding and / or the glass transition temperature of the buffer. Optionally, the solder reflow can be reinforced and / or better supported by an additional gluing operation, in which case the additional adhesive and / or epoxy is on the top surface of the fiber relative to the ferrule assembly. Add and help to reinforce its position.

  Laser welding can be used during operation 112 of attaching the fiber. In laser welding, a specialized platform is used to weld the fiber to a weld clip, the weld clip is used to hold the ferrule, and the ferrule is used to support the optical fiber. The welding clip can be welded to a specialized platform.

  In operation 111, the use of ferrules can be avoided, and instead the outer surface of the cleaved fiber is additionally metallized. This is done prior to operation 112 if a portion of the outer surface of the optical fiber is metallized. In operation 112, the metallized fibers are aligned and the metallized fibers are attached by solder. In operation 111, the use of ferrules can be avoided, or alternatively, an adhesive can be applied to the outer surface of the fiber, the fiber aligned during operation 112, and attached using the adhesive directly.

  Thereafter, in operation 113, a post-fiber test is performed to evaluate the coupling across the optical fiber. In addition, as described for the tests performed in operations 104 and 106, this test also evaluates photoelectric characteristics, including light intensity, voltage, and wavelength for a device, and these characteristics are measured as a function of current. . The test in operation 113 can be a manual operation, an automatic operation, or a combination of the two. Fiber coupling and testing at station 10A has a tact time of about 15 minutes.

  After aligning the lensed diode laser chip to the optical fiber, the remaining manufacturing steps include lid mounting and sealing (at station 11A) and subsequent final test (at station 12A). These remaining manufacturing steps are general and will be well understood by those skilled in the art of optical communication module assembly. For example, still referring to FIG. 1, at station 11A, lid attachment and sealing occurs during operation 114. The lid can be formed of plastic and / or metal and can be bonded or soldered, respectively. Operation 114 includes lid attachment and sealing, with a tact time of about 1 minute. Station 12A includes an operation 115 that performs a final test. In the final test, the light intensity coupled through the lens, voltage, wavelength, and coupling by the optical fiber are measured as a function of current. The test at operation 115 can be a manual operation, an automatic operation, or a combination of the two. The takt time of the work 115 is about 1 minute.

  Referring again to FIG. 1, 15 operations in a conventional optical communication module require 12 stations, 2 wire bonding operations, 2 active alignment steps, and 4 test operations. A sequential tact time of 43 minutes is required.

  It is desirable to design an optical communication module that is suitable for use in devices that have lower price points than current devices that incorporate optical communication modules. Such low cost optical communication modules can be compared with minimal optical coupling loss (eg, less than about 15%, or less than about 12%, or less than about 10%, or less than about 5%). It is desirable to achieve a high optical intensity (greater than 1 W, greater than 0.5 W, or in the range of about 0.5 W to about 20 W, or greater than 20 W). As a lower cost optical communication module, the parts list (BOM) has a lower number of parts, the cost of the parts list (cBOM) is lower, and / or the manufacturing cost is lower (for example, an optical communication module) It is desirable to have one or more of a lower cost manufacturing process and / or a lower cost device for the assembly.

  In one embodiment, the optical communication module may include a motherboard and an enclosure having a base to which the motherboard can be attached. The motherboard can include a laser diode disposed on the motherboard and a channel configured to receive an optical fiber to align with the diode. The enclosure may further include a plurality of positioning elements that are spaced apart from each other to engage the motherboard in a desired position within the enclosure. Furthermore, the enclosure can define a volume sufficient to confiscate excess mounting material from the motherboard.

  The positioning part can further be referred to as a positioning element, and likewise the positioning element can be referred to as a positioning part. The positioning element can take various forms. In one embodiment, a plurality of positioning elements spaced from each other are projected from the base. For example, the positioning element can be a column or can be a wall portion of the enclosure. For example, the motherboard can be placed in a cavity defined by a base and one or more sidewalls. The sidewall of the cavity can protrude from the base and can have a plurality of spaced apart positioning elements formed as sidewalls or protruding from the sidewall. The spaces between the plurality of positioning elements and / or adjacent to the plurality of positioning elements may be configured to accommodate mounting material (eg, at least some excess mounting material) when the motherboard is mounted to the base. The space adjacent to the plurality of positioning elements and / or the space between several positioning elements is configured such that the mounting material does not contact at least one of the side surface or the top surface of the motherboard.

  The channel of the motherboard can take various forms. In one aspect, the channel provides a passive alignment of the optical fiber and the output of the diode so that the optical fiber can automatically align with the diode when the optical fiber is placed in the channel. The channel may have, for example, a v-groove, a half pipe, or any other cross-sectional shape, and may be disposed along the longitudinal or transversal dimension of the motherboard. The motherboard further has an additional channel, eg, a second channel configured to receive and align the lens, the lens being disposed between the diode and the optical fiber. The second channel has a lens disposed in the second channel, whereby the lens transmits the diode emission to the optical fiber. The second channel can extend, for example, along the longitudinal or transversal dimension of the motherboard.

  In a first aspect, an optical communication module includes a motherboard having a channel configured to receive an optical fiber and to align the optical fiber with laser diode emission. The motherboard can be, for example, a silicon motherboard. The optical communication module includes an enclosure having two or more positioning elements that position the motherboard at a desired location within the enclosure. The enclosure has a base portion and two or more positioning elements spaced from each other so that the mounting material disposed between the base portion of the enclosure and the bottom surface of the motherboard Wick in the space adjacent to (e.g., at least some excess mounting material is seized into the volumetric space adjacent to the positioning portion). In some embodiments, the enclosure is a heat sink. Optionally, two or more positioning elements engage and / or maintain the motherboard in a generally desired position within the enclosure. In some embodiments, the optical communication module further comprises a lid that covers the surface of the enclosure to protect the contents disposed within the enclosure. The enclosure can have a substantially flat base portion. In one embodiment, the motherboard further has other channels configured to hold the lens, and the lens and the optical fiber are optically aligned with the laser diode emission when held by the corresponding channel.

  The channel can be, for example, a v-groove that is sized to hold an optical fiber, so that when the optical fiber is held by a corresponding v-groove, the optical fiber is optically aligned with the emission of the laser diode. In one embodiment, the motherboard further has other v-grooves dimensioned to hold the lens, and the lens and the optical fiber are optically aligned with the laser diode emission when held by the respective v-groove. can do.

  In other embodiments, the optical fiber itself has a lens, which is part of the optical fiber.

  In some embodiments, a laser diode (eg, a laser diode chip) is placed on the top surface of the motherboard. Optionally, the laser diode itself has a lens, which can be part of the optical fiber.

  A suitable lens can be, for example, a collimating lens or, for example, a focusing lens.

  In one embodiment, the optical fiber should have a numerical aperture (NA) greater than or equal to about 0.48. If the optical fiber has a NA value greater than or equal to about 0.48, the use of a lens is not necessary. In some embodiments, the laser diode chip has a relatively low divergence (eg, less than 15 °). In another aspect, the optical communication module includes a laser diode disposed on a top surface of a silicon motherboard. The silicon motherboard has a plurality of v-grooves, a lens for collimating the emission of the laser diode, and an optical fiber. A silicon motherboard has one v-groove dimensioned to hold a lens and another v-groove dimensioned to hold an optical fiber. The lens and optical fiber are optically aligned with the emission of the laser diode when held by their corresponding v-groove. The enclosure has two or more positioning portions that locate the silicon motherboard at the desired location within the enclosure. The enclosure has a base portion and two or more positioning portions spaced apart from each other, and at least one mounting material is disposed between the base portion of the enclosure and the bottom surface of the silicon motherboard. Wick in the space adjacent to the two positioning parts. In one embodiment, the attachment material wicks between two or more positioning portions.

  In some embodiments, the space adjacent to the at least one positioning portion and / or the space between two or more positioning portions is such that the mounting material is a side surface of the silicon motherboard and a top surface of the silicon motherboard. It is possible to avoid touching at least one of them. In some embodiments, the positioning portion is a portion of the enclosure wall. In other embodiments, the positioning portion is a column.

  The column as a suitable positioning portion can be any of a number of cross-sectional shapes (eg, circular, triangular, quadrilateral (eg, square, rectangular), pentagonal, hexagonal, heptagonal, octagonal or enclosure desired Any other polygon that gives the properties). In one embodiment, one v-groove is disposed along the longitudinal plane (eg, longitudinal dimension) of the silicon motherboard and the other v-groove is disposed in the short plane (eg, short side) of the silicon motherboard. (Direction dimension). In one embodiment, each of the lens and optical fiber is attached by one or more of epoxy, solder, or combinations thereof in the corresponding v-groove.

  The optical communication module desirably has a lid that covers the surface of the enclosure so that the lidded enclosure protects the contents disposed within the enclosure from the external environment. Optionally, the enclosure has a substantially flat base portion.

  The positioning portion within the enclosure places and guides the silicon motherboard and / or electrical circuit board to a desired location within the enclosure. The positioning part (eg, the contents of the enclosure is rotated, shifted, etc.) so that the part held within the enclosure (eg, silicon motherboard and / or electrical circuit board) can be maintained in a substantially stable position. Or stability) so as to maintain the desired alignment of the silicon motherboard and / or the electrical circuit board.

  The positioning portion within the enclosure places and guides the silicon motherboard and / or electrical circuit board to a desired location (eg, recess and / or slot) within the enclosure, where the silicon motherboard and / or Alternatively, the electrical circuit boards are arranged by positioning parts that guide them into place.

  In another aspect, a method of forming an optical communication module includes: preparing a silicon motherboard having a plurality of v-grooves; placing a laser diode on a top surface of the silicon motherboard; A lens disposing step of disposing a lens in a lens v-groove disposed along a plane, wherein the lens v-groove has a dimension for retaining an outer dimension of the lens; Have. The method further includes an optical fiber placement step of placing an optical fiber in a v-groove for an optical fiber disposed along a longitudinal plane, wherein the v-groove for the optical fiber has an outer dimension of the optical fiber. An optical fiber placement step having dimensions to hold; The lens and the optical fiber are optically aligned with the laser diode emission from the laser diode when held by a corresponding v-groove. The method further includes a motherboard placement step of placing the silicon motherboard in an enclosure having two or more positioning portions, wherein the positioning portion places the silicon motherboard in a predetermined position in the enclosure. There is a mother board arranging step configured to arrange at a position. In one embodiment, the laser diode is placed on the top surface of the silicon motherboard prior to preparing the silicon motherboard. The method can optionally include cleaving the optical fiber from the bare fiber prior to placing the optical fiber in the v-groove for the optical fiber.

  Further, the method optionally includes placing an electrical circuit board in the enclosure. In some embodiments, the silicon motherboard and the electrical circuit board are placed in the enclosure at approximately the same time.

It is a flowchart of the manufacturing process of the optical communication module which can be obtained now. FIG. 6 is a flow diagram of a manufacturing process for an optical communication module using one or more innovative features disclosed herein. A silicon motherboard having a plurality of v-grooves and supporting a laser diode and a thermistor and an electrical circuit board are shown, both of which are arranged in an enclosure that acts as a heat sink. Has been. A silicon motherboard assembly (having a plurality of v-grooves and supporting laser diodes, thermistors, and optical fibers) and an electrical circuit board, both the silicon motherboard and the electrical circuit board being used as heat sinks Located in the working enclosure. Silicon having a laser diode, a lens disposed in the v-groove for the lens, and a cleaved portion of the optical fiber disposed in the v-groove for optical alignment and an uncleaved portion of the optical fiber disposed in the v-groove for the buffer It is a side view which shows a product motherboard assembly in cross section. Another embodiment of an enclosure, wherein the enclosure has a positioning portion that is a column, and each column H1, H2, H3, H4, H5 and H6 represents an embodiment with a generally circular cross-sectional shape. Another embodiment of an enclosure, wherein the enclosure has a positioning portion that is a column, and each column I1, I2, I3, I4, I5 and I6 represents an embodiment with a generally polygonal cross-sectional shape. Another embodiment of an enclosure, wherein the enclosure wall has two or more parts that are positioning parts, which are in particular the substantially triangular shaped positioning parts J1, J2, J3 and J4. The form is shown. In another embodiment of the enclosure, the wall of the enclosure has two or more parts that are positioning parts, in particular said parts are in particular triangular positioning parts K1, K2, K3, K4, K5 and FIG. 7 shows an embodiment that is K6. FIG. Another embodiment of the enclosure, wherein the wall of the enclosure has two or more parts that are positioning parts, in particular those parts are generally curved positioning parts L1, L2, L3 and I4. Indicates. 1 is a side view of an optical system of a silicon motherboard assembly having a laser diode, a lens and an optically aligned optical fiber, the output end of the laser diode taking an alignment distance (A) from the outer surface of the lens; A situation is shown in which the alignment distance (B) is taken from the closest end of the optical fiber. FIG. 5 shows a ray trace simulating the coupling of light emission from a laser diode through a lens and an optical fiber, drawn from the side of the optical system shown in FIG. It is the figure seen from the top side of the lid comprised so that it might attach to the enclosure which accommodates a silicon motherboard assembly. It is the figure seen from the bottom face side of the lid comprised so that it might attach to the enclosure which accommodates a silicon motherboard assembly.

  The ability to obtain lower cost optical communication modules than currently available optical communication modules depends, at least in part, on designs that reduce the number of parts that complete the optical communication module. Alternatively or additionally, the ability to obtain a lower cost optical communication module than currently available optical communication modules depends on a design that reduces the number of manufacturing steps, and this design depends on the manufacturing of the optical communication module. Reduce the time required (eg, tact time) and / or reduce the amount of manufacturing equipment required to produce the module In particular, the ability to obtain cost-reduced optical communication modules has the ability to eliminate active alignment with FAC lenses and / or optical fibers, reduce the number of components, and be equal to or greater than currently available optical communication modules. This is enabled by one or more of the reduced manufacturing steps in which performance is obtained, according to the exemplary embodiment of the present invention assembled according to the process described with respect to FIG.

  In addition to the number of manufacturing steps, the time for each unit operation in the manufacturing operation also affects the optical communication module production cost. The impact of each unit work time is particularly important when a relatively large amount of production is desired, that is, it requires additional equipment to maintain that amount when more production is needed Because. Thus, the manufacturing process has a relatively quick output through state-of-the-art processes, thereby avoiding unnecessary time-intensive steps and avoiding any steps that can be eliminated, and additional manufacturing equipment It is desirable to be able to avoid this.

Table 1: Work takt time for any one operation required to achieve the target weekly production as a function of production hours per week

  For example, referring to Table 1, the capacity of a certain work is limited by the tact time of the work. Therefore, the capacity of the entire production process is limited by the work having the maximum tact time. From the process shown in FIG. 1, the maximum tact time is about 15 minutes, and this time is 30,000 pieces even when 3 shifts of 7 hours per shift are adopted as 7 days a week. It is the length of time that it is impossible to achieve production. As Table 1 shows, reducing the tact time for the process is important in achieving the mass production required to bring optical communication modules to market on a large scale.

  In one embodiment, the improved optical communication module reduces the number of parts required for production compared to previously known optical communication modules (e.g., the total number of parts to produce an improved optical communication module is the optical components available so far). Less than the total number of parts producing the communication module).

  In other embodiments, the improved optical communication module is produced by a process that reduces the total number of manufacturing steps required to carry the diode laser chip along with both the FAC lens and the optical fiber. Optionally, the improved optical communication module is produced by a process that eliminates one or more manufacturing steps necessary to align the diode laser chip with both the FAC lens and the optical fiber.

  In still other embodiments, the requirement for active alignment of FAC lenses and / or optical fibers is eliminated. Referring again to FIG. 1, FAC lens alignment in operation 105 and optical fiber alignment in operation 112 are performed at stations 4A and 10A, both of which require a maximum tact time of approximately 15 minutes. Elimination of the active alignment requirement can be achieved by taking advantage of the crystallographic properties of the silicon semiconductor material. More specifically, the silicon semiconductor material has a diamond cubic structure with a known preferential plane.

  A preferential plane of silicon semiconductor material can be used to form a well-defined surface (eg, channel and / or v-groove shape features) that can be utilized for alignment of optical components. The elimination of active alignment reduces the number of manufacturing steps required to manufacture the optical communication module, ie it eliminates active alignment of the FAC lens (operation 105) and / or active optical fiber. This is because the alignment (operation 112) is eliminated. The elimination of active alignment greatly reduces the tact time required to position (eg, align) and attach optical elements and place them in a desired position (eg, a preferred or optimal position).

  FIG. 2 illustrates an optical communication module manufacturing process flow 200 that incorporates at least some of the innovative features described herein. In the process flow shown in FIG. 2, the total number of operations, the total number of stations, the number of wire bonding operations, and the total number of test operations are reduced compared to the process flow shown in FIG. Furthermore, the process shown in FIG. 2 eliminates the need for any active alignment step. As a result, the optical communication module manufacturing process flow shown in FIG. 2 significantly reduces the total tact time compared to the conventional process described with reference to FIG.

  Referring again to FIG. 2, at station 1B, the silicon motherboard assembly provides a silicon motherboard characterized by one or more channels, a laser diode chip (at operation 201), and a thermistor (at operation 202). The FAC lens (in operation 203) and the exposed cleaved fiber (in operation 204) are attached to a silicon motherboard characterized by one or more channels. Referring now to FIG. 3A, one or more channels 315 are etched into at least a portion of the silicon wafer to form a silicon motherboard 302.

  Channels can take a variety of forms. In one embodiment, the v-groove feature 315 is formed by directing the silicon wafer in a desired orientation and etching the desired location for optical elements in the silicon wafer via masking and chemical etching. More specifically, a silicon wafer having a thickness in the range of about 500 microns to about 1000 microns is oriented so that the channel v-groove 315 is aligned with the longitudinal plane and / or the lateral plane of the silicon wafer. Let More specifically, in one embodiment, the v groove 311 for the lens is etched along the direction of the short side plane of the silicon wafer, and the v groove 312 for optical alignment and the v groove 313 for buffer are used. All of the wicking grooves 314 are etched along the longitudinal plane of the silicon wafer. Optionally, one or more wicking v-grooves 314 can be etched in the direction of the transverse plane. Aligning the v-groove along each orientation (eg, along the longitudinal and transversal planes) allows the v-groove shape to be obtained by chemical etching.

  When chemical etching is used on silicon wafers, the resulting alignment tolerances are on the order of a few microns and are therefore well suited for some applications. This accuracy is possible because the v-groove 315 is formed at the silicon crystal level and the crystal lattice is well defined and precise. Any slight deviation of the v-groove is a disturbance in the step of masking the silicon wafer to define the position of the v-groove, and the tolerance of the deviation is within a few micrometers (eg, about 2 or about 3 micrometers). Can be held in. More specifically, the alignment feature and / or the shape of the v-groove 315 form an exposed surface in the silicon wafer that is preferentially masked with a layer that is resistant to the etchant by wet chemical etching. be able to.

A suitable etching chemical that may be used to etch a silicon wafer is, for example, potassium hydroxide (KOH), and a suitable masking agent is, for example, silicon dioxide that is resistant to the etchant. (SiO ₂ ). The unmasked portion of the silicon wafer is exposed to a chemical etchant. The shape of the v-groove 315 is a result of chemically etching the unpaired pairs of electron pairs present on the exposed surface of the silicon wafer. Etching continues across the surface of the silicon wafer until the etching chemistry reaches a surface with no unpaired pairs of electron pairs. The surface without electron-bonded unbonded pairs is defined as the surface (111) of the crystal structure, and the structure does not have electron-bonded unbonded pairs and is therefore resistant to chemical etchants. Limiting further etching across the silicon wafer surface (eg, in the y-direction shown in FIGS. 3A and 3B), thus creating a v-groove feature morphology. The shape and size of the v-groove is defined by the opening in the masking layer.

  The v-groove has a desired tolerance in the range of about 2 or about 3 micrometers. The v-groove tolerance is obtained as a result of a combination of the mask definition and the properties of the silicon crystal itself. V-grooves formed in silicon allow for active optical alignment of, for example, FAC lenses and optical fibers.

  Optionally, referring to FIG. 2, the silicon motherboard prepared in operation 201 is in the form of a silicon motherboard manufactured based on a standard silicon wafer process. The silicon motherboard can be provided with other metallizations (eg, metallized traces), such as, but not limited to, other components such as diode laser chips, thermistors, etc. can be attached. Furthermore, electrical connectivity can be facilitated by providing electrical traces on the microbench. Metallization can be designed to promote and improve heat dissipation performance.

  In one embodiment, referring to FIG. 3A below, the silicon motherboard 302 has one or more metallizations on the top surface 306 and / or bottom surface of the silicon substrate. The metallization part can be gold, for example. The metallization allows both soldering and Au wire bonding. In one embodiment, the metallization includes a Ti base layer, a Pt second layer, and an Au third layer, each layer being about 500 angstroms to about 8000 angstroms, or about 1000 angstroms to about 1000 angstroms. It may have a thickness in the range of 5000 Angstroms. A suitable metallization should be able to withstand a temperature of about 425 ° C. for about 15 minutes without causing peeling and / or blistering. The one or more metallizations may be in the form of one or more metallization traces 326 disposed on the top surface 306 of the silicon motherboard 302.

  The solder used to attach the laser diode chip and the thermistor 324 can be pre-deposited on the silicon motherboard 302. More specifically, the pre-deposited solder 323 can be deposited on the top surface of a metallization (for example, metallization trace 326) disposed on the top surface 306 side of the silicon motherboard 302. The pre-deposited solder 323 can be, for example, 80Au20Sn. In one embodiment, pre-deposited solder 323 is disposed on the top surface of solder barrier 322 (eg, a Pt layer), which solder barrier 322 has a metallization layer (eg, an Au layer) underlying it. Alternatively, separate and insulate from metallized trace 326).

  In one embodiment, the metallized base layer is Au (eg, metallized trace 326), the second layer is a solder barrier layer formed from Pt to a thickness of about 1500 angstroms, and the third layer is formed from 80Au20Sn. And a solder layer having a thickness of about 3 microns to about 7 microns. Each metallized trace 326 (eg, each Au pad region) can be electrically isolated from the other metallized traces 326, and this insulation is made of non-conductive silicon (typically about 500 microns thick). Or by using an individual underlying insulating layer. The individual underlying insulating layer should not be too thick. Thicknesses that inhibit the heat conduction of the heat generated by the laser diode through the silicon motherboard 302 should be avoided. The preferred thickness of the underlying insulating layer is in the range of about 300 angstroms to 5000 angstroms. Silicon has a thermal conductivity in the range of 130 W / mK to 180 W / mK or about 150 W / mK. Surprisingly, the heat conduction of silicon is lower than that of typical materials used for diode laser heat sinks. Typical materials used for diode laser heat sinks include, but are not limited to, BeO, WCu, and Cu, which are in the range of about 150 W / mK to about 400 W / mK. It has the heat conduction. Such representative heat sink materials are utilized in currently available high light intensity devices formed by currently available technology (described in the context of the present invention with respect to FIG. 1).

  However, the thickness of silicon is on the order of 500 microns, and metallization can be applied as part of manufacturing, and according to the techniques disclosed herein, currently available optical communication modules (eg, Resulting in an overall lower thermal resistance than occurs when producing optical communication modules that require active alignment during manufacture, as described above for one. Devices attached to typical materials used in currently available high light intensity devices generally have a thermal resistance of about 10 W / K to about 13 W / K. In contrast, due to the thickness and metallization of the motherboard used, the improved optical communication module employing the v-groove in the range of about 5 W / K to about 7 W / K, at least in part. Can have a thermal resistance within. Thus, a significant improvement in light intensity is present in the thermal resistance of currently available optical communication modules characterized by active alignment (eg, about 10 W / K˜ Resulting from a lower thermal resistance (e.g., in the range of about 5 W / K to about 7 W / K).

  Referring again to FIGS. 2 and 3A, at station 1B, the silicon motherboard 302 has a metallization (eg, Au metallization or metallization trace 326) on the top surface 306 of the silicon substrate. In some embodiments, the metallization (eg, metallization trace 326) does not overlap the v-groove 115. In FIG. 2, during operation 201, laser diode 320 is die bonded to pre-deposited solder 323 located on metallized trace 326 on the top surface of silicon motherboard 302.

  The laser diode 320 attached in operation 201 can be, for example, a laser diode chip. The laser diode chip can be, for example, a high power single emitter multimode semiconductor laser diode, a high light intensity multimode semiconductor laser diode, or an array type multiemitter chip. This array is not limited, but can be as large as 10 mm wide and can have two or more emitters. In one embodiment, the laser diode chip is categorized into a type that can distinguish its AR side (eg, anti-reflective coating side) from the HR side (eg, highly reflective coated side). The laser diode chip may have a chip width in the range of about 400 μm to about 12 mm, and the chip length (cavity length) may be in the range of about 500 μm to about 5000 μm.

  The thickness or depth of the laser diode can be from about 50 μm to about 500 μm. In one embodiment, the laser diode chip can be die bonded to the top surface 306 of the silicon motherboard 302 with the p side facing down (eg, the anode side facing down). The die bonding metallized portion can be a solder (eg, pre-deposited solder 323), for example, 80Au20Sn solder, and other suitable solders include, but are not limited to, AuGe, AuSn, Sn, SnAg, etc. There are other alloys. In one embodiment, using 80Au20Sn solder and attaching the laser diode 320 to the silicon motherboard 302 with the anode side (p side) facing down aids the requirement to transmit high light intensity. In one embodiment, the pre-deposited solder pad 323 for the laser diode is dimensioned to allow at least some future size change of the laser diode 320, and more specifically, the solder pad 323 for the laser diode 320 has a protruding chip size. Can be of greater width or longer length. In one embodiment, the solder pad 323 has a size in the range of about 1 to about 3 times the size of the protruding laser diode chip.

  In one embodiment, a flux-free attachment process is used to minimize and / or avoid contamination and / or damage to the exit surface. In one embodiment, the die attach laser diode can provide high light intensity. For example, a die attach metallization (eg, metallization trace 326) needs to maintain an operating current for laser diode 320 up to 5 amps. In one embodiment, the die attach metallization maintains operating current delivery to the laser diode 320 from 5 amps to 10 amps.

  Still referring to FIG. 3A, the silicon motherboard 302 is placed on the top side 306 of the silicon motherboard 302, eg, on a metallization (eg, metallization trace 326) present on the top surface 306 of the silicon motherboard 302. An attached sensor 324 (eg, a temperature sensor such as a thermistor) is supported. In operation 202 with reference to FIG. 2, the thermistor 324 is die bonded to a silicon motherboard, and more specifically, the thermistor 324 is pre-deposited on a metallized trace 326 on the top surface of the silicon motherboard 302. A die is bonded to the solder 323. The thermistor 324 is a temperature sensor, and more specifically, the thermistor 324 is a resistor whose resistance changes according to its temperature. The thermistor 324 provides a mechanism for monitoring the temperature of the silicon motherboard 302, and enables temperature monitoring and control of the optical communication module.

  The thermistor 324 has a resistance range that can sense, but is not limited to, a temperature in the range of about 0 ° C. to about 80 ° C., or a temperature of about 10K. A suitable thermistor is available from Beta therm, including serial number PN # 10K3CG3. Such a thermistor is suitable for wire bonding using Au, for example.

  2 and 3A-3C, in operation 203, the FAC lens 330 is epoxy-bonded to the assembly of the motherboard 302 made of silicon. The one or more v-grooves 315 disposed on the silicon motherboard assembly are v-grooves 311 for lenses, and the FAC lens 330 can be optically aligned with a laser diode 320 (eg, a laser diode chip). In this way, the lens v-groove 311 provides a means for passive optical alignment of light emission from the laser diode 320 to the FAC lens 330. The FAC lens 330 is optically aligned in a passive manner by simply placing the FAC lens 330 in the v-groove 311.

The FAC lens 330 may be, for example, a sapphire fast axis collimating lens made from any number of materials including optical grade sapphire. Other materials suitable for manufacturing FAC lenses can be, but are not limited to, other grade materials, for example optical plastic materials such as fused silica, quartz, or ZEONEX COP materials. The optical grade sapphire material can have a c-axis random orientation. A FAC lens is used to couple the light emission from the laser diode 320 to the optical fiber (work 205 and FIGS. 3B and 3C will be described later). The selected FAC lens 330 should be selected to provide optical coupling while avoiding unnecessary transmission loss. For example, the desired FAC lens 330 maximizes optical coupling and minimizes transmission loss. In one embodiment, the FAC lens employs a sapphire rod type lens that is substantially cylindrical (or completely cylindrical) in shape, and in another embodiment, the sapphire rod type lens employed as the FAC lens is at least partially The FAC lens is chamfered and the cross section is not circular but has a cross section similar to the letter “D”. As an alternative, a plurality of portions of the sapphire rod can be chamfered (for example, the cross section has two parallel side surfaces and these side surfaces are connected by curved surfaces). Optical simulation can be used to determine the desired lens shape and / or lens position. The FAC diameter can be, but is not limited to, within the range of about 100 microns to about 300 microns, and the length can be optical energy clipping (eg, light energy blocking or total or partial cut). Choose to prevent. A suitable length for the lens is not limited, but can be in the range of about 100 microns to about 6 mm. In one embodiment, the FAC lens has a diameter of about 0.200 mm and a length greater than 1 mm. The diameter can be fixed, but the length can be expanded as needed. The entire or part of the FAC lens can be coated with a coating that controls Fresnel loss (eg, limits and / or minimizes Fresnel loss). For example, in one embodiment, at least a portion of the FAC lens is coated with AR (anti-reflection coating). The AR coating deposited on the FAC lens shall be able to withstand an energy intensity of 1 KW / cm ² . The AR coating can be selected to minimize reflection to non-reflection.

  The AR coating should be selected according to the wavelength range employed by the laser diode so as to eliminate and / or minimize reflections within the desired wavelength range that the laser diode emits. The wavelength can be in the range of about 360 nm to about 3000 nm, or in the range of about 1390 nm to about 1430 nm, or in the range of about 1200 nm to about 1600 nm, or in the range of about 1460 nm to about 1480 nm. 3A and 3B, one or more wicking v-grooves 314 are disposed on the silicon motherboard 302. FIG. The wicking v-groove 314 can accept any excess of adhesive (eg, epoxy adhesive) or solder material used to attach the various components to the silicon motherboard 302 assembly. The wicking v-grooves employed in the silicon motherboard 302 do not cover the optical components, the laser diode, and / or the light beam due to diffusion caused by excess adhesive and / or excess solder material. Ensure that there is no interference.

  Referring now to FIG. 2, station 2B prepares the optical fiber including operation 205, and cleaves the optical fiber (eg, bare fiber). A suitable optical fiber that can be employed according to operation 205 is, for example, a large core multimode optical fiber (MMF). The takt time for preparing an optical fiber by cleaving is about 1 minute.

  Suitable optical fibers can have a numerical aperture (NA) in the range of about 0.1 to about 1.0, or greater than 0.2, or greater than 0.22. Suitable optical fibers include large core multimode optical fibers available from Poly micro Technologies. A suitable optical fiber may have a fused silica core, a doped fused silica cladding surrounding all or part of the fused silica core, and a buffer surrounding all or part of the doped fused silica coating. it can. Suitable buffers include, for example, acrylate buffers or polyimide buffers. The fiber should have low light absorption, and a suitable fiber is, for example, a low OH type (eg, a low hydroxide type). One suitable fiber is, for example, a silica optical fiber having an ultra low OH core. The physical dimensions of the optical fiber are tailored to match the v-groove dimensions to allow proper passive alignment. In one embodiment, the fused silica core has a diameter in the range of about 100 microns to 1 mm or about 150 microns, and the optical fiber has a cladding portion in the range of about 105 microns to or about 1.05 mm or about 165 microns. And the buffer should have an outer diameter in the range of about 200 microns to or 1.2 mm or about 250 microns. During operation 205, the bare fiber cleave includes removing at least a portion of the buffer from the outer diameter of the optical fiber to allow critical optical alignment. After cleaving, the optical fiber has a cleaved portion in which the core is surrounded only by the cladding portion. By disposing the optical fiber in the v-groove, passive optical alignment with the optical communication module becomes possible. Next, referring to FIGS. 3A to 3C, both the cleaved portion 342 and the uncleaved portion 344 of the optical fiber 340 are disposed in the v-groove 315. More specifically, the cleaved portion 342 is disposed in the v-groove 312 for optical alignment, and the uncleaved portion 344 is disposed in the v-groove 313 for buffer. The optical alignment v-groove 312 allows optical alignment of the cleaved portion 342 of the optical fiber 340. The buffer v-groove 313 allows the uncleaved portion 344 of the optical fiber 340 to be mechanically supported.

  2 and 3A-3C, in operation 204 at station 1B, the bare optical fiber cleaved in operation 205 is epoxy-attached to v-groove 315 (eg, cleave portion 342 is v-groove for optical alignment). 312 and optionally an uncleaved portion 344 is placed in the buffer v-groove 313). The tact time of the four operations (e.g. operations 201, 202, 203 and 204) occurring at station 1 is about 3 minutes. The assembly process of the silicon motherboard 302 performed at the station 1 can be adapted to, for example, a standard multilayer silicon wafer production process easily adopted in the computer chip industry.

  The silicon motherboard 302 is configured to accommodate features for improved mounting of the diode laser 320 and optical components (eg, FAC lens 330 and optical fiber 340). A suitable v-groove 315 located within the silicon motherboard 302 assembly can support the laser diode 320. In one embodiment, the diode laser 320 is attached to a top surface 306 on the surface of the silicon motherboard 302, eg, a metallization (eg, metallization trace 326) present on the top surface 306 of the silicon motherboard 302. The features for mounting the diode laser include, but are not limited to, providing the features necessary to align the FAC lens 330 with the optical fiber 340 so that the FAC lens 330 and the optical fiber 340 are aligned with each other at the same time. Optical alignment also occurs. Preferably, these features for optical components (eg, FAC lens 330 and optical fiber 340) allow alignment tolerances to be in the range of a few microns. Passive alignment and attachment of both the FAC lens 330 and the optical fiber 340 are possible. In this manner, the FAC lens is actively aligned (about 15 minutes at station 4A) and the optical fiber is actively aligned (about 10 minutes at station 10A) in the currently available process (described with respect to FIG. 1). 15 minutes to about 20 minutes) The skill and time required so far is unnecessary and / or significantly reduced.

  More specifically, referring to FIG. 2 and FIGS. 3A to 3C, after the diode laser 320 is attached to the silicon motherboard 302, the FAC lens 330 and the optical fiber 340 are etched into the silicon motherboard 302, respectively. The corresponding v-grooves 315 (for example, the v-groove 311 for the lens, the v-groove 312 for optical alignment, and the optional v-groove 313 for buffering) are arranged in the silicon mother board 302. In contrast, they are passively aligned and attached at the corresponding v-groove 315 locations. The v-groove 315 (eg, lens v-groove 311 and optical alignment v-groove 312) should be designed to allow passive alignment of the lens 330 (eg, FAC lens) and optical fiber 340. However, at the same time, the v-groove 315 should not interfere with the light emission from the laser diode 320 with the p-side (for example, the anode side) attached. This is facilitated by positioning the laser diode 320 such that the light emission is incident in an aperture in which passively aligned optical members are disposed and mounted.

  FIG. 4 shows a side view of an optical system that includes a laser diode 320, a lens 330 (eg, a FAC lens), and an optical fiber 340 (eg, a cleave portion 342 of an MMF fiber) in optical alignment. The output end of the laser diode 320 has an alignment distance (A) from the outer surface of the lens 330 that is about 5 microns to about 30 microns, or about 10 microns to 20 microns, or about 15 microns. In the range of about 18 microns, or about 17 microns. Lens 330 has an alignment distance (B) from the closest end of optical fiber 340, which is from about 10 microns to about 200 microns, or from about 50 microns to about 150 microns, or about 80. Within the range of microns to about 120 microns, or about 100 microns.

  The cleaved portion of the optical fiber lens 330 has an outer diameter tolerance on the order of ± 1 to 2 microns, for example. The FAC lens 330 has an outer diameter (C), and the tolerance of the outer diameter (C) is, for example, on the order of ± 1 to 2 microns. The laser diode 320 has a cathode side 320a and an anode side 320b.

  FIG. 5 shows a rate that simulates a situation in which light emission from a laser diode is coupled through the FAC lens 330 and the optical fiber 340 drawn from the optical system side (for example, the side surface of the FAC lens 330 and the side surface of the optical fiber 340). Show the race. More specifically, this ray trace shows a simulation where light emission 321 (eg, fast axis emission) from a laser diode chip passes through a FAC lens 330 and a cleave portion 342 of an optical fiber 340 that is an MMF fiber. All parts are passively aligned, for example, by employing a v-groove 311 for the lens and a v-groove 312 for optical alignment as described with respect to FIG. 3A. In one embodiment, as shown in FIGS. 4 and 5, the ray trace shows light emission 321 from the laser diode 320, which has an alignment distance (A) of about 17 microns from the FAC lens 330. In addition, the ray trace also shows light emission from the FAC lens 330, which is approximately 80 microns from the closest end of the optical fiber 340 (eg, the end of the cleaved portion 342 of the optical fiber 340). Alignment distance (B). The light emission is bent when exiting the FAC lens 330, and the degree of bending of the light emission is due to the FAC lens 330. Thereafter, the light emission is coupled to the optical fiber 340.

  According to laser emission, the z-axis is defined as the light emission direction away from the light emission surface of the laser diode. On the other hand, the corresponding x-axis direction and y-axis direction are the slow axis direction and the fast axis direction, respectively. Accordingly, the corresponding definitions of the alignment tolerances of the optical layouts shown in FIGS. 3A-3C and FIGS. 4-5 are defined as follows, and the alignment tolerances are shown in Table 2.

1. The ΔX laser diode is an arrangement tolerance of the laser diode 320 with respect to the optical fiber 340 in the x-axis direction.
2. ΔY laser diode is the vertical tolerance of the diode laser 320 (this is affected, for example, by the amount of solder placed on the anode side 320a of the laser diode 320).
3. ΔA = Tolerance of distance between diode laser 320 and FAC lens 330
4. ΔB = Tolerance of distance between FAC lens 330 and optical fiber 340
5. ΔY lens is the vertical tolerance of a lens (eg, FAC lens 330).
6. ΔY cleaved optical fiber is the vertical tolerance of optical fiber 340.

Table 2: Alignment tolerances corresponding to 5% and 10% optical transmission degradation

  2 and 3B, during the operation 206 at the station 3B, the silicon motherboard 302 assembly formed in the operations 201, 202, 203, and 204 at the station 1B is arranged in the enclosure 502. And an electrical circuit board 402 can be attached to the enclosure 502.

  3A and 3B, the silicon mother board 302 assembly formed in the station 1B is characterized by a diode laser 320, a FAC lens 330, and an optical fiber 340. The v-groove 311 for the lens and the FAC lens, respectively. 330 and optical fiber 340 (especially the cleaved portion 342 of the optical fiber) are preferably aligned with each other by an optical alignment v-groove 312 that passively aligns. Referring to FIG. 2, in the station 3B, the silicon mother board 302 formed in the station 1B is soldered to the enclosure 502 (for example, the heat sink [HS]) during the operation 206. Any number of any solder can be used to solder the silicon motherboard 302 to the enclosure 502, for example, 100Sn, SnAg based alloy (eg 97Sn3Ag), or a reflow temperature range. There are any solders that are between 100 ° C and 400 ° C.

  The electrical circuit board 402 can be formed according to a number of methods. For example, the electrical circuit board 402 can be a thick film or metallized ceramic with metallized traces 326 and one or more wires to an external power source and / or from an external power source to the silicon motherboard 302. Current is transmitted through bonding 405. The metallized trace 326 can be formed from any of a number of conductive materials including, for example, Cu and / or Au. Alternatively, the electrical circuit board 402 can be formed according to the technique used to form a standard copper clad PCB board (printed circuit board).

  The electrical circuit board can have an anode trace 426A and a cathode trace 426B. The copper area and thickness in the anode trace 426A and cathode trace 426B is important, that is, the purpose of the electrical circuit board 402 is as large as possible from the anode wire 416A and cathode wire 416B to the silicon motherboard 302. This is to minimize the electrical loss (for example, series resistance) and, in turn, the additional heat radiation from the optical communication module. In certain embodiments, the anode trace 426A and cathode trace 426B have a solder barrier to prevent solder wicking in certain areas of the anode trace 426A and cathode trace 426B. The anode wire 416A supplies electricity to the laser diode chip 320. Laser diode 320 is mounted on pre-deposited solder 323 with the positive side facing down (anode side 320A facing down), which solder 323 is an anode trace 426A (eg, Au anode trace) located on a silicon motherboard 320. Deposit on top. The negative side (eg, cathode side 320B) of the laser diode 320 is wire bonded (by one or more wire bonds 405) to the cathode trace 426B located on the silicon motherboard 302. The anode trace 426A of the electrical circuit board 402 is connected to the anode trace 426A disposed on the silicon motherboard 302 by one or more wire bonds 405, and the cathode trace 426A of the electrical circuit board 402 is similarly made of silicon. One or more wire bonds 405 are connected to the cathode trace 426A disposed on the motherboard 302. Appropriate wire bonding can be performed by any of a number of materials including, for example, Au, Al, or similar materials.

  In some embodiments, the electrical circuit board 402 has one or more wires and reaches the thermistor 324. In one embodiment, two feedback control wires 410 are provided and these feedback control wires 410 enter and exit the thermistor 324 via metallized traces 326 located on the electrical circuit board 402, and the electrical circuit board 402 is connected to the wire bond 405. To the metalized trace 326 of the silicon motherboard 302. The two feedback control wires 410 are connected to the external environment of the optical communication module, and the temperature of the silicon mother board 302 assembly is measured via the thermistor 324 and a temperature sensing resistor (for example, the resistance changes depending on the temperature). Can be monitored and controlled.

  Still referring to FIG. 2, during operation 206, electrical circuit board 402 is soldered to enclosure 502. The electrical circuit board 402 may be, but is not limited to, a thick film, a metallized ceramic, or a PCB board (printed circuit board) having a suitable copper thickness (eg, about 0.5 OzCu to about 10 OzCu). Can do. The electrical circuit board 402 is soldered to the enclosure 502 using any of a number of solders, for example, SnAg based alloys or any having a reflow temperature in the range of 100 ° C. to 300 ° C. Solder of can be used. Other mounting materials can be used instead of or in addition to solder, for example, suitable epoxies can be used, such as those from Arctic Silver, Inc. There are optional silver-based thermal epoxies such as epoxy. The takt time of station 3B is about 0.6 minutes.

  Still referring to FIGS. 3A and 3B, the enclosure 502 may be, for example, a heat sink (HS). A suitable enclosure 502 can remove heat from one or more of the components to be contained within the enclosure 502. The enclosure 502 can be made from any of a number of materials, including but not limited to copper, WCu, aluminum, or any material having high thermal conductivity. The enclosure 502 provides mechanical support for the assembly of the silicon motherboard 302, provides thermal properties that facilitate the removal of heat generated by the diode laser chip 320 (acts as a heat sink), and / or is made of silicon. Acts as a protective enclosure for motherboard 302 (including laser diode 320). Suitable materials for use in the enclosure 502 include metals, such as but not limited to Cu, WCu, Al, or combinations thereof. The enclosure 502 can be an injection molded metal, such as injection molded copper. A suitable enclosure 502 can be formed from a metal composite (eg, a metal and copper composite). Enclosure 502 can be formed from any thermally conductive material including Al. The enclosure 502 can be formed from a single structure (eg, injection molded) or from two or more parts (eg, multiple parts) and can be combined.

  The enclosure can also take a variety of forms. Still referring to FIG. 3A, in one embodiment, the enclosure 502 has a generally flat bottom surface 506 and a wall 508 arranged to be substantially orthogonal to the bottom surface 506. A silicon motherboard 302 and / or electrical circuit board 402 is applied to the bottom surface 506 of the enclosure 502 (eg, permanently or removably), for example, by soldering or adhesive (eg, epoxy or thermal epoxy). It can be attached via any suitable means including.

  The enclosure further includes a plurality of positioning elements spaced from each other to allow the motherboard to engage a desired position within the enclosure. For example, as shown in FIG. 3A, the enclosure wall 508 is sized, shaped, and relative to the enclosure 502 so that, for example, the silicon motherboard 302 and / or the electrical circuit board 402 can be properly positioned within the enclosure 502. And / or the placement can be determined. Appropriate walls 508 are sized, shaped and / or arranged to ensure that the silicon motherboard 302 and / or electrical circuit board 402 can be securely held in the desired location within the enclosure 502. The wall 508 of the enclosure 502 guides the silicon motherboard 302 so that the wall 508 of the enclosure 502 is curved at portions G1, G2, G3, G4, G5 and G6, for example, as shown in FIGS. 3A and 3B. These curved portions then act as positioning portions in the wall 508 to assist in positioning the silicon motherboard 302 in place within the enclosure 502. Appropriate walls 508 can be sized, shaped and / or arranged like the electrical circuit board 402 so that the appropriate wall 508 can be placed in place within the enclosure 502. In this way, the portion of the enclosure 502 (eg, the wall portion and / or the bottom portion) assists in positioning the contents (eg, a silicon motherboard assembly) to be retained in the enclosure 502. And this can achieve proper alignment with respect to other objects. The positioning portion of the enclosure provides structural stability and avoids rotation, shifting, or other disturbances to the desired alignment of the enclosure contents. In this way, the structural stability of the enclosure helps to maintain the optical elements placed on the silicon motherboard in proper alignment with the laser diode emission. The positioning portion of the enclosure can engage the motherboard at a predetermined position within the enclosure.

  The enclosure may further define a volume sufficient to seize excess mounting material from the silicon motherboard. A space between and / or adjacent to the plurality of positioning elements can be configured to receive mounting material when the motherboard is mounted to the base, and the mounting material is at least one of a side surface or a top surface of the motherboard. Can be configured to prevent contact. Thus, the adjacent pitch (eg, space) between positioning elements or positioning portions and / or the frequency of adjacent positioning elements or positioning portions in the enclosure is the desired function: 1) made of silicon Guiding and / or engaging the motherboard and / or electrical circuit board within the enclosure, 2) stabilizing the contents of the enclosure, 3) adjacent to the positioning part and / or between the two positioning parts The wicking area (for example, an area having sufficient volume to seize excess mounting material leaking from the motherboard) can be selected. The pitch limit is a position where the positioning portion is too close to function as a flat wall where the space adjacent to the positioning portion is insufficient to act as a wicking area. The enclosure can remove heat from the contents held therein. Furthermore, when the enclosure is covered with a lid, the contents held in the enclosure can be protected from the external environment.

  More specifically, the wall 508 allows any wicking (eg, requisition) of attachment material (eg, solder and / or adhesive) from below the surface of the silicon motherboard 302 to be made from the silicon motherboard 302. Size relative to the enclosure 502 so as to avoid contacting the side walls 304 and / or the top surface 306 of the silicon motherboard 302 and / or the side walls and / or top surface of the electrical circuit board 402, The shape and / or arrangement can be determined. Similarly, any wicking of mounting material from the lower surface side of the electrical circuit board 402 may be applied to the sidewalls and / or top surface of the electrical circuit board 402 and / or to the sidewalls and / or top surface of the silicon motherboard 302. Avoid contact. In this way, determining the size, shape, and / or placement of the wall 508 of the enclosure 502 reduces (eg, minimizes) the risk of shorting the silicon motherboard 302 and / or the electrical circuit board 402. be able to. Referring to FIG. 3B, the positioning portions G1, G2, G3, G4, G5 and G6 of the wall 508 of the enclosure 502 guide the placement of the assembly of the silicon motherboard 302 within the enclosure 502. Referring to FIG. 3A, between the positioning portions G <b> 2 and G <b> 3 is a region indicated by a reference sign “W” outlined by a dotted line on the bottom surface 506 of the enclosure 502. Any excess attachment material (eg, solder and / or adhesive) can be wicked (eg, confiscated) within the wicking area labeled “W”, where the excess attachment material is wicked. Retain and / or cover at least the footprint of the king area W and thereby avoid the risk of short circuiting of the silicon motherboard 302 due to contact with the side walls 304 and / or the top surface 306 of the silicon motherboard. Or reduce. FIG. 3A shows that the wicking region W can be formed adjacent to the positioning portions G2 and G3, and in particular, the wicking region W can be formed between the two positioning portions G2 and G3 and / or adjacent to one positioning portion. It can be formed by. In particular, the wicking region W can be formed by a gap between the side wall 304 of the silicon motherboard 302 and a portion of the enclosure wall 508 (eg, region Z), the portion of the enclosure wall 508 being made of silicon. A longer distance from the side wall 304 than the positioning portions G2 and G3 of the enclosure wall 508 that guides the motherboard 302 (and / or the electrical circuit board 402) (eg, assistance to guide the silicon motherboard 302 into place) Part of the enclosure wall 508).

  The enclosure wall 508 (more specifically, the positioning portions G 1, G 2, G 3, G 4, G 5 and G 6 of the enclosure wall 508) allows the assembly of the silicon motherboard 302 and the electrical circuit board 402 to be desired within the enclosure 502. To assist in positioning (e.g., toward the center of the enclosure 502), positioning portions (e.g., between two positioning portions such as G2 and G3) and silicon motherboard 302 and / or electrical The wicking area “W” formed adjacent to other portions of the enclosure wall 508 that does not assist in positioning the circuit board 402 is the sidewall of the motherboard 304 whose mounting material (eg, solder and / or adhesive) is made of silicon. And / or the top surface 306 of the silicon motherboard 302 assembly and / or Minimizes the possibility of wicking to the side wall or the top surface of the electric circuit board 402.

  Any of a number of enclosure configurations may be used to produce the desired functionality described with respect to FIGS. 3A and 3B, ie, the desired functionality includes (1) a silicon motherboard assembly (and Positioning of the electrical circuit board) within the enclosure, and (2) preventing rotation of the portion held and aligned within the enclosure by the positioning portion (eg, silicon motherboard assembly and / or electrical circuit) Stability of the board to prevent rotation within the enclosure, and (3) of the silicon motherboard assembly (and / or electrical circuit board) due to wicking of the mounting material (eg solder or adhesive) There is the ability of the enclosure to produce one or more wicking areas that minimize and / or eliminate short circuits.

  Suitable enclosures are characterized by two or more positioning elements. More specifically, the wall portion acts as a positioning element in a suitable enclosure. The positioning element can be a number of any shape and / or a column having a number of any cross-sectional shape. Exemplary enclosure configurations provide one or more of the following features: positioning / mechanical alignment, structural stability, and one or more wicking regions, and in certain embodiments, the enclosure configuration is Bring everything.

  Finally, the enclosure can be manufactured with a single piece, ie, a single structure formed by injection molding, for example, the bottom surface, the wall, the wicking region W, and the positioning portions G1-G6.

  In certain embodiments, the enclosure can be manufactured from two or more pieces. For example, the positioning portion is coupled to the bottom surface and / or the wall. The positioning portion is, for example, at least one side surface that fits into the complementary portion of the bottom surface (eg, the side surface of the “male” column fits into the “female” region of the bottom surface and is connected, for example, by an interference fit ). The positioning portion can be part of the enclosure wall, and the column can be configured to mate with a complementary portion of the enclosure (eg, the wall mate with the bottom surface of the enclosure). Alternatively, the positioning portion can be configured to couple to the enclosure wall.

  Next, referring to FIG. 3D, another embodiment of the enclosure has a positioning element as a column. Each column H1, H2, H3, H4, H5 and H6 has a substantially circular cross-sectional shape. These columns are positioned within the enclosure to provide mechanical alignment capability and assist in aligning the silicon motherboard and / or electrical circuit board. The gap between the columns creates one or more wicking regions (eg, a wicking region WH located between columns H2 and H3). Suitable enclosures can have two or more columns, eg, H1 and H5, or H2 and H5, or H1 and H6. Alternatively, a suitable enclosure may have three or more columns, eg, H1, H3 and H5, or H1, H2 and H5, or H1, H2 and H6. As an alternative, a suitable enclosure may have four or more columns, eg, H1, H2, H3 and H4, or H1, H3, H4 and H6. The shaped column can have at least one side that fits into the complementary portion of the bottom surface (eg, the side of the “male” column fits into the “female” region of the bottom surface, eg, an interference fit. Linked by). Thus, in some embodiments, the column and bottom surface of the enclosure are not monolithic but are formed of multiple pieces. A suitable enclosure is characterized by a columnar positioning element (eg, a positioning portion), which can alternatively be a unitary structure.

  FIG. 3E shows another embodiment of an enclosure having positioning elements as columns. Each column I1, I2, I3, I4, I5 and I6 has a polygonal cross section. These columns are positioned within the enclosure to provide mechanical alignment capability and assist in aligning the silicon motherboard and / or electrical circuit board. The gap between columns I1, I2, I3, I4, I5 and / or I6 creates one or more wicking regions (eg, wicking region WI located between columns I2 and I3). Suitable enclosures can have two or more columns, eg, I1 and I5, or I2 and I5, or I1 and I6. Alternatively, a suitable enclosure may have three or more columns, eg, I1, I3 and I5, or I1, I2 and I5, or I1, I2 and I6. As an alternative, a suitable enclosure may have four or more columns, eg, I1, I2, I3 and I4, or I1, I3, I4 and I6. Combinations of columns used in the enclosure can have the same cross-section, or alternatively, have different cross-sectional shapes. The position of the polygonal cross section can be selected as in columns I2 and I6, with a pointed tip (eg, a triangular apex in the cross section of column I2) that connects the silicon motherboard and / or electrical circuit board to the enclosure. It becomes a part of the positioning part which guides to a predetermined position along the longitudinal direction axial line located in the substantially center. Suitable enclosures have multiple columns, each column having the same cross-sectional shape, or each column having a different cross-sectional shape, or two or more columns having the same cross-sectional shape, or Two or more columns may have different cross-sectional shapes. Suitable cross-sectional shapes include, for example, circles, triangles, quadrilaterals (eg, squares, rectangles), pentagons, hexagons, heptagons, octagons, or other suitable polygons that impart desired properties to the enclosure. is there.

  The shaped column can have at least one side that fits into the complementary portion of the bottom surface (eg, the side of the “male” triangular section column I2 fits into the “female” triangular area of the bottom surface, and For example, connect by interference fit). Thus, in some embodiments, the column and bottom surface of the enclosure are not monolithic but are formed of multiple pieces. A suitable enclosure characterized by a column positioning element (e.g. positioning part) may alternatively be a unitary structure.

  FIG. 3F illustrates another embodiment of an enclosure, where the wall of the enclosure has two or more portions that are positioning elements (eg, positioning portions).

  In particular, the wall of the enclosure has four generally triangular positioning portions, classified by J1, J2, J3 and J4. In this case, at least one portion of the enclosure wall is shown as having a substantially zigzag or substantially triangular profile, and a wicking area adjacent to the positioning portion (eg, WJ2 adjacent to the positioning portion J2) or 2 The wicking region (for example, the wicking region WJ1 between J1 and J2) located between the two positioning portions has a substantially polygonal shape. In some embodiments, the enclosure is a unitary structure, and the enclosure wall, including generally triangular and bottom portions, is formed from a single piece of material (eg, injection molded). In other embodiments, the enclosure is formed from multiple pieces, and the enclosure wall is permanently or temporarily attachable to an enclosure (eg, the bottom surface of the enclosure). A suitable enclosure can have two or more positioning portions, eg, J1 and J4, or J1 and J3. Alternatively, a suitable enclosure has three or more positioning portions, for example J1, J2 and J3. As an alternative, a suitable enclosure may have four or more positioning portions, for example J1, J2, J3 and J4. The combination of positioning parts is selected such that two or more positioning parts guide the silicon motherboard and / or electrical circuit board in place and provide stability to the contents held in the enclosure. The

  FIG. 3G shows another embodiment of the enclosure, where the enclosure wall has two or more portions as positioning portions. In particular, the enclosure wall has six generally triangular positioning portions classified by K1, K2, K3, K4, K5 and K6. In this case, at least one portion of the enclosure wall can be shown as having a substantially zigzag or substantially triangular profile, and a wicking region adjacent to the positioning portion (eg, wicking region WK2 adjacent to the positioning portion K3). ) Or the wicking region located between the two positioning portions (eg, the wicking region WK1 between K1 and K2) is substantially polygonal (eg, a triangle). In certain embodiments, the enclosure is a unitary structure and, alternatively, can be formed from multiple pieces.

  Suitable enclosures can have two or more positioning portions, for example K1 and K4, or K1 and K5, or K1 or K6. As an alternative, a suitable enclosure shall have three or more positioning parts, for example K1, K2 and K4, or K1, K3 and K5, or K1, K4 and K3, or K1, K5 and K6. . As an alternative, a suitable enclosure may have four or more positioning portions, for example K1, K2, K4 and K5. In the combination of positioning parts, two or more positioning parts guide the silicon mother board and / or electrical circuit board in place. Also, the combination of positioning elements (eg, positioning portions) can be selected to provide stability that keeps the contents of the enclosure (eg, a silicon motherboard) in alignment.

  FIG. 3H shows another embodiment of the enclosure, where the enclosure wall has two or more portions as positioning portions, in particular, substantially curved positioning portions L1, L2, L3 and L4. The enclosure shown in FIG. 3H is similar to the enclosure described with respect to FIGS. 3A and 3B, but the enclosure shown in FIG. 3H has four positioning portions (while the enclosure shown in FIGS. 3A and 3B has six positioning portions). .

  In particular, the enclosure wall has four generally curved positioning portions, labeled L1, L2, L3 and L4. In this case, at least one portion of the enclosure wall can be shown as having a generally curved profile, such as a wicking region adjacent to the positioning portion (eg, wicking region WL2 adjacent to L2) or two positioning portions. The wicking regions located between each other (for example, the wicking region WL1 between L1 and L2) have a substantially curved shape. In certain embodiments, the enclosure is formed as a unitary structure, and the enclosure wall including a generally curved portion and a bottom portion is formed from a single piece of material (eg, injection molded). In other embodiments, the enclosure may be formed from a number of pieces, and the wall of the enclosure may be permanently or temporarily attachable to the enclosure (eg, attachable to the bottom of the enclosure). it can. A suitable enclosure can have two or more positioning portions, eg, L1 and L4, or L1 and L3. Alternatively, a suitable enclosure may have three or more positioning portions, eg, L1, L2, and L3. As an alternative, a suitable enclosure may have four or more columns, eg, L1, L2, L3, and L4. The combination of positioning elements (eg, positioning portions) is selected such that two or more positioning portions guide the silicon motherboard and / or electrical circuit board to a predetermined position within the enclosure.

  Suitable enclosures can further include both an enclosure wall having a positioning portion and one or more columns that act as positioning portions.

  In one embodiment, the wall 508 of the enclosure 502 is sized, shaped and arranged to ensure structural integrity of the enclosure 502 and its contents (eg, silicon motherboard 302 and / or electrical circuit board 402). Decide. In certain embodiments, the enclosure 502 is assumed to have a thermal mass that accepts heat generated within the silicon motherboard 302, and thus, in certain embodiments, the enclosure 502 is heat generated by the laser diode 320 for some application. Get additional heat capacity to store energy. Optionally, the wall 508 of the enclosure 502 is sized, shaped and arranged to produce a thermal mass that receives heat generated within the silicon motherboard 302. Referring also to FIG. 2, in another implementation of operation 206, separate from installing the silicon motherboard 302 in the enclosure 502, the electrical circuit board 402 is installed in the enclosure 502, and such installation operations include: One extra assembly step is required to form an improved optical communication module. By separating the mounting step of the electrical circuit board 402 and the mounting step of the silicon motherboard 302 assembly, the tact time is about 0.3, which is required to solder the electrical circuit board 402 to the enclosure 502. Increase by minutes to about 0.6 minutes.

  2, 3A and 3B, in the station 4B, the silicon mother board 302 and the electric circuit board 402 mounted in the enclosure 502 are joined by wire bonding 405 during the operation 207. The enclosure 502 performs wire bonding 405 with a suitable wire bonding material, such as Au wire, Al wire, or other suitable material.

  In the wire bonding module of operation 207, the wire bond 405 is shaped to connect the metalized trace 326 of the electrical circuit board 402 to the metalized trace 326 of the silicon motherboard 302 assembly. The wire bond 405 can electrically transport current from an external power source to the silicon motherboard 302 assembly via the electrical circuit board 402. The electrical circuit board can have an anode trace 426A and a cathode trace 426B. The laser diode 320 is attached to the pre-deposited solder 323 on the top surface of the anode trace 426A located on the assembly of the silicon motherboard 302 with the positive side facing down (the anode side 320A facing down). The negative side of laser diode 320 (eg, cathode side 320B) is wire bonded (via one or more wire bonds 405) to cathode trace 426B located on the silicon motherboard 302 assembly. The anode trace 426A of the electrical circuit board 402 is connected to the anode trace 426A disposed on the silicon motherboard 302 via one or more wire bonds 405, and similarly the cathode trace of the electrical circuit board 402. 426B is connected to cathode trace 426B located on silicon motherboard 302 via one or more wire bonds 405.

  The size of the wire bond selected is made to be compatible with the current handling capability. Suitable wire diameters are, for example, in the range of about 0.5 mil to about 5 mil, or about 1 mil to about 1.3 mil. In one embodiment, 1.3 mil diameter Au wire was used. The wire can be bonded by, for example, ball bonding or wedge bonding. Gold ball bonding is used to achieve high throughput (eg, with less tact time) through this operation. The tact time of the station 4B is about 0.3 minutes. 2, 3A, 3B, 6A and 6B, at station 5B in the process diagram of FIG. 2, lid 600 is attached to enclosure 502 and sealed during operation 208 where lid installation and sealing is performed. . The lid 600 can be formed from any of a number of materials including metal or plastic. In one embodiment, plastic is used for cost control reasons. The lid bottom surface 604 may be provided with a feature 608 that aligns with a complementary wall 508 of the enclosure 502. The lid bottom surface 604 has a tunnel 610 that can be exposed from the lidded enclosure so that the optical fiber does not disturb the position and / or function of the optical fiber when assembled to the enclosure 502. In FIG. 2, in the station 5 </ b> B, the lid 600 is attached to the top surface of the enclosure 502. The lid 600 is sealed with any suitable material, such as a suitable epoxy / adhesive. In one embodiment, the lid 600 is a protective lid 600 that protects the entire laser diode 320 and / or silicon motherboard 302 assembly and / or the electrical circuit board 402 from the external environment. The lid 600 is disposed on the top surface of the enclosure 502, covers the silicon motherboard 302 and the electrical circuit board 402 housed in the enclosure 502, and protects these components from the external environment. The lid 600 protects the laser diode 320 and other components contained within the enclosure 502 from, for example, possible environmental damage or contamination. Any of a number of lid configurations can be used as long as the lid complements the enclosure, thereby protecting the contents of the enclosure from the external environment and / or without disrupting the optical fiber. Can be exposed from the enclosure. More specifically, the lid can be selected to complement the enclosure wall, wicking area, and fiber optic exit route for a given enclosure (eg, lid features and tunnels are selected for the selected enclosure). Positioning to complement each other). The tact time of the station 5B is about 1 minute.

  At station 6B, the final test (LIV, WL) occurs during operation 209. In this test, the final photoelectric characteristics are measured. In particular, the operating voltage, light intensity, and wavelength are measured according to means and methods known to those skilled in the art of optical communications. The tact time of the station 6B is about 1 minute.

  The exemplary improved process flow described with reference to FIG. 2 requires nine operations, six stations, one wire bonding, one test operation without active alignment steps. The total sequential tact time of the process described with reference to FIG. 2 is 6.9 minutes. The total sequential tact time of the process described with reference to FIG. 2 is several orders of magnitude shorter than 43 minutes, which is the total sequential tact time required to complete the conventional process described with reference to FIG.

  While only certain embodiments have been described, those skilled in the art will recognize that various changes and details can be made without departing from the spirit and scope as defined by the claims. Those skilled in the art will recognize, or be able to ascertain using no more than routine experience, many equivalents to the specific embodiments described herein. Such equivalents are intended to be within the scope of the claims.

  The patent literature, scientific and medical publications referred to in this specification constitute knowledge that is available to those with skill in the art. Published US patents, published patent documents and pending patent applications, and other references cited herein are hereby incorporated by reference.

  All technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined below. References to techniques used herein are intended to be those generally understood in the prior art that will be apparent to those skilled in the art, including such technical modifications or equivalents or substitutions of subsequently developed techniques. Intended to be mentioned. Furthermore, in order to further clarify and strictly describe the gist of the claims, the following definitions are provided for some terms used in the specification and claims.

  As used herein, a variable number of numerical ranges may be implemented using any numerical value within the range, including range boundaries. Thus, with respect to an originally discrete variable number, the variable number can be equal to any integer value within the numerical range, including the end points of the range. Similarly, for an inherently continuous variable number, the variable number may be equal to any real value within the numerical range, including the end points of the range. For example, without limitation, a variable number described as having a value in the range of 0 to 2 can take the value 0, 1 or 2 if the variable number is originally discrete and is inherently continuous. Can be any value 0.0, 0.1, 0.01, 0.001, or any other real number greater than or equal to 0 (0 ≧) and less than or equal to 2 (≦ 2). Finally, variable numbers can take on many values within a range, including any subconceptual range of values within the quoted range.

  As used herein, unless stated otherwise, the term “or” is used generically to include the meaning of “and / or” and “either / or) ”is not used in an exclusive sense.

Claims (43)

In optical communication module,
A motherboard with a laser diode disposed therein, the motherboard having a channel configured to receive an optical fiber and align the optical fiber with the laser diode, and a base to which the motherboard is mounted, and spaced apart from each other An enclosure having a plurality of positioning elements, the positioning elements engaging the motherboard in place on the enclosure and defining a volume sufficient to confiscate excess mounting material from the motherboard; An optical communication module comprising the enclosure.   2. The optical communication module according to claim 1, wherein the plurality of positioning elements arranged at intervals from each other protrude from the base.   The optical communication module according to claim 1, wherein the mother board is disposed in a cavity, the cavity is defined by the base and a side wall protruding from the base, and the plurality of positioning elements spaced apart from each other include: An optical communication module configured to protrude from the side wall.   The optical communication module according to claim 1, wherein the attachment material connects the mother board to the base.   5. The optical communication module according to claim 4, wherein a space between the plurality of positioning elements is configured to receive the attachment material when the mother board is attached to the base. 6.   The optical communication module according to claim 1, wherein a space between the plurality of positioning elements is configured to prevent the attachment material from contacting at least one of a side surface or a top surface of the motherboard. module.   2. The optical communication module according to claim 1, wherein at least one positioning element is a part of an enclosure wall.   2. The optical communication module according to claim 1, wherein at least one positioning element is a column.   9. The optical communication module according to claim 8, wherein the column protrudes from the base.   The optical communication module according to claim 1, wherein the channel has a v-groove arranged along a longitudinal dimension direction of the mother board.   The optical communication module according to claim 1, further comprising a second channel configured to receive and align a lens, wherein the lens is disposed between the diode and the optical fiber.   The optical communication module according to claim 11, further comprising a lens disposed in the second channel, wherein the lens transmits emission from the diode to the optical fiber.   12. The optical communication module according to claim 11, wherein the second channel extends along a short dimension direction of the motherboard.   13. The optical communication module of claim 12, wherein each of the lens and the optical fiber is coupled in a corresponding channel by one or more of epoxy, solder, or combinations thereof. module.   The optical communication module according to claim 1, further comprising a lid that covers a surface of the enclosure, and protecting contents disposed in the enclosure.   2. The optical communication module according to claim 1, wherein the base is substantially flat.   The optical communication module according to claim 1, wherein a space adjacent to the plurality of positioning elements is configured to receive the attachment material when the motherboard is attached to the base.   2. The optical communication module according to claim 1, wherein the enclosure is a heat sink. In optical communication module,
A laser diode disposed on the top surface of a silicon motherboard having a plurality of v-grooves;
A lens that collimates the emission of the laser diode;
An optical fiber, wherein the silicon motherboard has one v-groove dimensioned to hold the lens and another v-groove dimensioned to hold the optical fiber, the lens and the optical fiber being respectively An optical fiber optically aligned with the laser diode emission when held by the corresponding v-groove;
An enclosure having two or more positioning portions, wherein the positioning portions place the silicon motherboard in a desired location within the enclosure, the enclosure having a base portion, the two or more Positioning portions are spaced apart from each other, so that the mounting material disposed between the base portion of the enclosure and the bottom surface of the silicon motherboard wicks into the space adjacent to the positioning portion, An optical communication module comprising the enclosure.   20. The optical communication module of claim 19, wherein the mounting material wicks between the two or more positioning portions.   21. The optical communication module according to claim 20, wherein the space between the two or more positioning portions is at least one of a side surface of the silicon motherboard and a top surface of the silicon motherboard. An optical communication module that can avoid contact with one side.   20. The optical communication module according to claim 19, wherein at least one positioning portion is a part of the enclosure wall.   20. The optical communication module according to claim 19, wherein the at least one positioning portion is a column.   The optical communication module according to claim 19, wherein one v-groove is disposed along a longitudinal plane of the silicon motherboard, and another v-groove is disposed along a longitudinal plane of the silicon motherboard. Optical communication module.   20. The optical communication module of claim 19, wherein each of the lens and the optical fiber is mounted in one or more of epoxy, solder, or combinations thereof in a corresponding v-groove. Communication module.   The optical communication module according to claim 19, further comprising a lid that covers a surface of the enclosure, and protecting contents disposed in the enclosure.   20. The optical communication module of claim 19, wherein the enclosure has a substantially flat base portion. A method of forming an optical communication module comprising:
Providing a silicon motherboard having a plurality of v-grooves;
Placing a laser diode on the top surface of the silicon motherboard;
A lens disposing step of disposing a lens in a v-groove for a lens disposed along a lateral plane, wherein the v-groove for the lens has a dimension for retaining an outer dimension of the lens;
An optical fiber placement step for placing an optical fiber in a v-groove for an optical fiber disposed along a longitudinal plane, wherein the v-groove for the optical fiber has a dimension for retaining an outer dimension of the optical fiber. An optical fiber placement step that optically aligns the laser diode emission from the laser diode when the lens and the optical fiber are held by their corresponding v-grooves;
A motherboard placement step of placing the silicon motherboard in an enclosure having two or more positioning portions, wherein the positioning portion places the silicon motherboard in a predetermined position in the enclosure. And a method. 30. The method of claim 28, further comprising:
Cleaving the optical fiber from the bare fiber before placing the optical fiber in the v-groove for the optical fiber. 30. The method of claim 28, further comprising:
Placing an electrical circuit board within the enclosure.   32. The method of claim 30, wherein the silicon motherboard and the electrical circuit board are disposed in the enclosure substantially simultaneously.   30. The method of claim 28, wherein the laser diode is placed on a top surface of the silicon motherboard prior to preparing the silicon motherboard. In optical communication module,
A motherboard having a channel containing an optical fiber and configured to align the optical fiber with a laser diode emission;
An enclosure having a base portion and two or more positioning elements, wherein the positioning elements position the motherboard at a desired location within the enclosure, the two or more positioning elements spaced apart from each other; An optical communication module comprising: an enclosure disposed in between, wherein the mounting material disposed between the base portion and the bottom surface of the motherboard wicks in a space adjacent to a positioning element.   34. The optical communication module according to claim 33, wherein the enclosure is a heat sink.   34. The optical communication module of claim 33, wherein the two or more positioning elements maintain the motherboard at approximately the desired position within the enclosure.   34. The optical communication module according to claim 33, further comprising a lid that covers a surface of the enclosure, and protecting contents disposed in the enclosure.   34. The optical communication module of claim 33, wherein the enclosure has a substantially flat base portion.   34. The optical communication module of claim 33, wherein the motherboard further includes other channels configured to hold a lens, and the laser and the optical fiber are held in corresponding channels, respectively, the laser. An optical communication module that is optically aligned with the output of the diode.   34. The optical communication module according to claim 33, wherein the channel is constituted by a v-groove.   40. The optical communication module according to claim 39, wherein the mother board further has another v-groove configured to hold a lens, and the lens and the optical fiber are held by a corresponding v-groove. An optical communication module that optically aligns with the laser diode emission when done.   34. The optical communication module according to claim 33, wherein the optical fiber further includes a lens.   34. The optical communication module according to claim 33, wherein a laser diode is disposed on the top surface of the motherboard.   43. The optical communication module according to claim 42, wherein the laser diode has a lens.