JP2013258275A - Quantum well structure and nitride semiconductor element including quantum well structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a novel quantum well structure composed of a nitride semiconductor; and provide a nitride semiconductor element including such quantum well structure; and provide a manufacturing method of such quantum well structure.SOLUTION: A quantum well structure includes a well layer of a structure having a corrugated part. Polarized luminescence can be emitted by the well layer having such corrugated part.

Description

  The present invention relates to a quantum well structure composed of a nitride semiconductor.

The nitride semiconductor is represented by a general formula such as Al _x Ga _y In _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), (Al, Ga, In) N. Compound semiconductors, also called nitride III-V compound semiconductors, gallium nitride (GaN) semiconductors, and the like.

  Nitride semiconductors have a wurtzite crystal structure and belong to the hexagonal system. Of the crystal planes of the nitride semiconductor, the C plane (including the + C plane and the −C plane) is a polar plane, and the M plane and the A plane are nonpolar planes. A crystal plane that does not correspond to any of the C, M, and A planes is called a semipolar plane.

A nitride semiconductor light-emitting element, which is a light-emitting element having a pn junction type light-emitting structure formed using a nitride semiconductor, is known.
Nitride semiconductor light emitting devices usually have a quantum well structure in the light emitting portion. In the manufacturing process of the nitride semiconductor light emitting device, as shown in FIG. 1, a plurality of nitride semiconductor layers are epitaxially grown and stacked on the surface of the nitride semiconductor 1 as a base, thereby forming the quantum well structure 10. Is formed. The underlying nitride semiconductor 1 may be, for example, a nitride semiconductor substrate such as a GaN substrate, or may be a nitride semiconductor layer epitaxially grown on a substrate such as a GaN substrate or a sapphire substrate. A conventional quantum well structure 10 formed by this method includes a flat well layer and a flat barrier layer (Photo 2 of Non-Patent Document 1, FIG. 5 of Non-Patent Document 2).
As shown in FIG. 1, such a prior art quantum well structure includes a first barrier layer 3 including a nitride semiconductor and a second barrier including a nitride semiconductor and stacked on the first barrier layer. And a well layer 4 including a nitride semiconductor and sandwiched between the first barrier layer and the second barrier layer.

Takashi Kyono et al. “Development of the world's first pure green laser on a new GaN substrate I”, SEI Technical Review No. 176, pp. 88-92 (2010) F. Wu, et.al, “Misfit dislocation formation at heterointerfaces in (Al, In) GaN heteroepitaxial layers grown on semipolar free-standing GaN substrates”, Journal of Applied Physics, 109 (2011) 033505

  The present invention provides a novel quantum well structure composed of a nitride semiconductor, provides a nitride semiconductor device including such a quantum well structure, and provides a method for manufacturing such a quantum well structure. This is an issue.

The first gist of the present invention is as follows.
(A1) a first barrier layer including a nitride semiconductor, a second barrier layer including the nitride semiconductor and stacked on the first barrier layer, the first barrier layer including a nitride semiconductor, and the A quantum well structure including a well layer sandwiched between the second barrier layer,
The well layer includes a undulating portion that undulates along the first direction with an amplitude greater than the thickness of the well layer;
A quantum well structure capable of emitting polarized luminescence having a polarization axis perpendicular to the first direction.
(A2) The quantum well structure according to (a1), wherein the well layer includes a nitride semiconductor containing In. (A3) The quantum well structure according to (a2), wherein a region where the In composition is maximum extends one-dimensionally along a direction orthogonal to the first direction in the wavy portion.
(A4) The quantum well structure according to (a2) or (a3), wherein the waved portion has a region where the In composition is maximized at the bottom.
(A5) The quantum well structure according to any one of (a2) to (a4), wherein the well layer is an InGaN layer.
(A6) The quantum well structure according to any one of (a1) to (a5), wherein the waved portion includes a waved portion with an amplitude twice or more the film thickness of the well layer.
(A7) The quantum well structure according to any one of (a1) to (a6), wherein the waved portion includes a portion having a top and a bottom that are adjacent to each other with a height difference of 3 nm or more.
(A8) The quantum well structure according to any one of (a1) to (a7), wherein the waved portion includes a portion having two tops adjacent to each other with an interval of 30 nm or less across one bottom.
(A9) The quantum well structure according to any one of (a1) to (a8), wherein the quantum well structure is epitaxially grown on a semipolar plane of a first nitride semiconductor.
(A10) The quantum well structure according to (a9), wherein the semipolar plane is parallel to the a-axis of the first nitride semiconductor.
(A11) The quantum well structure according to (a10), wherein the semipolar plane is a (20-2-1) plane. (A12) The quantum well structure according to (a10) or (a11), wherein the first direction is orthogonal to the a-axis of the first nitride semiconductor.
(A13) A nitride semiconductor device in which the quantum well structure of any one of (a1) to (a12) is disposed between a p-type nitride semiconductor layer and an n-type nitride semiconductor layer.
(A14) The nitride semiconductor device according to (a13), which is a light-emitting device.

The second gist of the present invention is as follows.
(B1) a first barrier layer including a nitride semiconductor, a second barrier layer including the nitride semiconductor and stacked on the first barrier layer, the first barrier layer including a nitride semiconductor, and the A quantum well structure including a well layer sandwiched between the second barrier layer, the well layer undulating along the first direction with an amplitude larger than the thickness of the well layer A method of manufacturing a quantum well structure that includes a wavy portion and is capable of emitting polarized luminescence having a polarization axis orthogonal to the first direction,
A method of manufacturing a quantum well structure, comprising: preparing a first nitride semiconductor having a semipolar plane; and growing the first barrier layer on the semipolar plane.
(B2) The manufacturing method according to (b1), wherein the well layer includes a nitride semiconductor containing In.
(B3) The manufacturing method according to (b2), wherein a region where the In composition is maximum extends one-dimensionally along a direction orthogonal to the first direction in the wavy portion.
(B4) The method according to (b2) or (b3), wherein the wavy portion has a region where the In composition is maximized at the bottom.
(B5) The method according to any one of (b2) to (b4), wherein the well layer is an InGaN layer.
(B6) The method according to any one of (b1) to (b5), wherein the semipolar plane is parallel to the a-axis of the first nitride semiconductor.
(B7) The production method of (b6), wherein the semipolar plane is a (20-2-1) plane.
(B8) A base layer including a nitride semiconductor is grown on the semipolar surface so that a base layer corrugated surface that undulates along the first direction is formed on the surface of the base layer. A first growth step;
A second growth step of growing a second nitride semiconductor disposed between the base layer and the well layer without flatly embedding the base layer corrugated surface formed by the first growth step;
The manufacturing method in any one of said (b1)-(b7) containing.
(B9) The manufacturing method according to (b8), wherein, in the first growth step, the growth temperature of the base layer is set to 900 ° C. or higher.
(B10) The method according to (b8) or (b9), wherein in the first growth step, at least a part of the base layer is doped with silicon.
(B11) The method according to any one of (b8) to (b10), wherein, in the first growth step, the thickness of the base layer is set to 2 μm or more.
(B12) The method according to any one of (b8) to (b11), wherein, in the second growth step, the second nitride semiconductor is grown at a growth temperature of 800 ° C. or higher.
(B13) The method according to any one of (b8) to (b12), wherein in the second growth step, at least a part of the second nitride semiconductor is doped with silicon.
(B14) The method according to any one of (b8) to (b13), wherein, in the second growth step, the thickness of the second nitride semiconductor is 80 nm or less.
(B15) The manufacturing method according to any one of (b1) to (b14), wherein the waved portion of the well layer includes a waved portion having an amplitude twice or more the film thickness of the well layer.
(B16) The manufacturing method according to any one of (b1) to (b15), wherein the waved portion of the well layer includes a portion having a top and a bottom adjacent to each other with a height difference of 3 nm or more.
(B17) The manufacturing method according to any one of (b1) to (b16), wherein the corrugated portion of the well layer includes a portion having two tops adjacent to each other with an interval of 30 nm or less across one bottom.
(B18) The method according to any one of (b1) to (b17), wherein the quantum well structure is disposed between a p-type nitride semiconductor and an n-type nitride semiconductor.
(B19) The first nitride semiconductor is either a substrate made of a nitride semiconductor, an epitaxially grown layer made of a nitride semiconductor, or a thin nitride semiconductor layer cut from a bulk single crystal (b1) ) To (b18).

Since the quantum well structure represented by the first and second aspects of the present invention can generate polarized luminescence, it can be used as a light-emitting structure for a low-loss polarized light source element.
In the quantum well structure represented by the first and second aspects of the present invention, the light emitting region constitutes a quantum wire. In the quantum wire, carrier confinement becomes strong (becomes one-dimensional confinement), so that the state density function is close to a δ function. For example, when applied to a semiconductor laser, the oscillation threshold density can be reduced. That is, the inversion distribution necessary for laser oscillation is achieved with a low carrier injection density. Therefore, it is considered that a laser light source employing this quantum well structure in the light emitting part can be driven at a low voltage.

It is a perspective schematic diagram which shows the layer structure of the semiconductor laminated body containing the quantum well structure of a prior art. It is a perspective schematic diagram which shows the layer structure of the semiconductor laminated body containing the quantum well structure of this invention. It is the schematic diagram which expanded the wave shape in FIG. It is the schematic diagram which represented a mode that the quantum well structure of this invention was formed over time. It is a cross-sectional TEM image of the semiconductor laminated body of an experiment example (drawing substitute photograph). It is a cross-sectional TEM image of the semiconductor laminated body of an experiment example (drawing substitute photograph). It is a perspective schematic diagram of the sample used for TEM observation of the semiconductor laminated body of an experiment example. It is the front schematic diagram of the sample used for TEM observation of the semiconductor laminated body of an experiment example. It is a cross-sectional TEM image of the semiconductor laminated body of an experiment example (drawing substitute photograph). It is a conceptual diagram which shows a polarization photoluminescence measuring system. It is a graph which shows a polarization photoluminescence measurement result, Fig.11 (a) has shown the result of the experimental example, FIG.11 (b) has shown the result of the comparative experimental example, respectively. It is a cross-sectional TEM image of the semiconductor laminated body of the comparative experiment example (drawing substitute photograph). It is a cross-sectional TEM image of the semiconductor laminated body of the comparative experiment example (drawing substitute photograph). It is a cross-sectional TEM image of the semiconductor laminated body of the comparative experiment example (drawing substitute photograph).

Hereinafter, although the quantum well structure and the manufacturing method of the quantum well structure will be described in detail according to the embodiments, the present invention is not limited to these embodiments.

  FIG. 2 is a diagram showing a semiconductor stacked body having a quantum well structure according to an embodiment of the present invention. The semiconductor stacked body 100 has an n-type semiconductor layer 2 and a p-type semiconductor layer 6 on a substrate 1, and a light emitting layer 10 is formed between the n-type semiconductor layer 2 and the p-type semiconductor layer 6. The light emitting layer 10 has a structure including the well layer 4 between the first barrier layer 3 and the second barrier layer 5. The n-type semiconductor layer 2, the first barrier layer 3, the well layer 4, the second barrier layer 5, and the p-type semiconductor layer 6 are all nitride semiconductor layers. In particular, the well layer 4 is a nitride semiconductor layer containing In. The well layer 4 undulates along the direction indicated by the arrow 8 as indicated by the alternate long and short dash line 7 in the figure.

The well layer usually has a thickness of 1 nm to 10 nm. The amplitude of the corrugation of the well layer 4 is larger than the film thickness of the well layer 4.
Due to the undulation, the luminescence emitted from the well layer 4 is polarized in a direction parallel to the arrow 9 (a direction perpendicular to the arrow 8). Although the detailed reason is not clear, it is presumed that the region in which the In composition is maximized is related to the formation of a structure extending one-dimensionally along the direction parallel to the arrow 9.
The well layer 4 preferably includes a portion that undulates with an amplitude twice or more of its own thickness so that the degree of polarization of emitted luminescence is sufficient. It is more preferable to include the part which is.
The well layer 4 may have a top and a bottom adjacent to each other with a height difference of 3 nm or more. Moreover, it may have two tops adjacent to each other with an interval of 30 nm or less across one bottom. These will be described with reference to FIG.

  FIG. 3 is an enlarged schematic diagram of the n-type semiconductor layer 2, the first barrier layer 3, the well layer 4, and the second barrier layer 5 in FIG. The amplitude of the well layer 4 means the maximum displacement amount in one cycle of the waviness of the well layer 4 and is represented by an arrow 46. The film thickness of the well layer 4 is represented by an arrow 45. The top and bottom of the well layer 4 are represented by 41 and 42, respectively. Further, the interval between the tops adjacent to each other with one bottom of the well layer 4 means the distance between the adjacent tops, and is represented by an arrow 44.

  The substrate 1 is preferably a nitride semiconductor substrate, especially a GaN substrate. The substrate 1 or a substrate different from the nitride semiconductor substrate (for example, sapphire, spinel, silicon carbide, silicon, gallium arsenide, gallium phosphide, gallium oxide, zinc oxide, LGO, NGO, LAO, zirconium boride, A nitride semiconductor epitaxial growth layer may be provided on the surface of a crystal substrate made of titanium boride or the like. Further, the substrate 1 may be one in which a thin nitride semiconductor layer cut out from a bulk single crystal is bonded to the surface of a silicon substrate or the like. In any of the substrates, the main surface used for epitaxial growth of the semiconductor stacked body 100 is preferably a (20-2-1) plane of a nitride semiconductor.

The n-type semiconductor layer 2 is, for example, a Si-doped GaN layer. Alternatively, the n-type semiconductor layer 2 may have a multilayer film structure. For example, the n-type semiconductor layer 2 includes an undoped layer in a portion in contact with the substrate 1 and a portion in contact with the first barrier layer 3, and between the two undoped layers. A three-layer structure in which a Si-doped layer is sandwiched between two layers can be obtained.
In the example of FIG. 2, the light-emitting layer 10 is a single quantum well layer including two barrier layers (first barrier layer 3 and second barrier layer 5) and one quantum well layer 4. It can also be set as the multiple quantum well layer containing a quantum well layer.
The p-type semiconductor layer 6 is a multilayer film including, for example, an Mg-doped AlGaN layer and an Mg-doped GaN layer stacked thereon.

  Such a semiconductor stacked body can be applied as a nitride semiconductor element by forming an electrode, and can also be applied as a light emitting element.

Next, the manufacturing method of the semiconductor laminated body 100 shown in FIG. 2 is demonstrated.
FIG. 4 is a schematic view showing how the semiconductor stacked body 100 is formed over time.
First, as shown in FIG. 4A, a substrate 1 whose main surface on which a semiconductor stacked body 100 is to be epitaxially grown is a (20-2-1) plane of GaN is prepared. The substrate 1 is typically a semipolar (20-2-1) GaN substrate.

  Subsequently, as shown in FIG. 4B, the n-type semiconductor layer 2 having a wavy surface is grown on the substrate 1. Preferred conditions for the surface to be a wavy surface include lowering the V / III ratio (molar ratio of the V group raw material and the III group raw material supplied onto the substrate), increasing the substrate temperature, and growth. Increasing the speed, changing the carrier gas to nitrogen gas, and the like can be mentioned. Si doping does not inhibit at least the surface of the n-type semiconductor layer 2 from undulating.

More specifically, the growth temperature of the n-type semiconductor layer 2 is 900 ° C. or higher, preferably 950 ° C. or higher, more preferably 1020 ° C. or higher. The upper limit of the growth temperature of this layer is usually 1150 ° C.
The film thickness of the n-type nitride semiconductor layer 2 is preferably 2 μm or more, more preferably 3 μm or more, and even more preferably 4 μm or more so that the surface has a corrugated surface with sufficient amplitude. When the film thickness of the n-type nitride semiconductor layer 2 is too small, the amplitude of the corrugation on the surface becomes insufficient. There is no particular upper limit to the film thickness of n-type nitride semiconductor layer 2, but it is usually 20 μm or less.

Subsequently, as shown in FIG. 4C, the first barrier layer 3 is stacked on the n-type semiconductor layer 2. What is important in this step is that the surface of the n-type nitride semiconductor layer 2 is handed over to the surface of the first barrier layer 3, in other words, the surface of the first barrier layer 3 is In other words, the undulating surface reflects the surface shape of the n-type nitride semiconductor layer 2.
Therefore, it is desirable that the first barrier layer 3 is not too thick. Specifically, the film thickness of the first barrier layer 3 is preferably 80 nm or less, more preferably 50 nm or less, and still more preferably 20 nm or less. Although a minimum is not specifically limited, For example, it is 4 nm or more.

When the growth temperature of the first barrier layer 3 is lower than the growth temperature of the n-type nitride semiconductor layer 2, it is particularly important that the first barrier layer 3 is not too thick. This is because if the growth temperature is lowered, the surface of the layer tends to be flat.
Since the difference between the growth temperature of the n-type nitride semiconductor layer 2 grown under the first barrier layer 3 and the growth temperature (described later) of the well layer 4 grown thereon is large, the first barrier layer The growth temperature of 3 is preferably set to the middle of these temperatures or the same as the growth temperature of the well layer 4. This is because the strain that the well layer 4 receives due to the thermal action is considered to be relaxed.
Specifically, the growth temperature of the first barrier layer 3 is usually 700 ° C. to 880 ° C., preferably 740 ° C. to 860 ° C., more preferably 780 ° C. to 840 ° C. The first barrier layer 3 may be doped with Si.

  Subsequently, as shown in FIG. 4D, when the well layer 4 is grown conformally on the surface of the first barrier layer 3, the surface of the first barrier layer 3 is undulated. The well layer 4 is also formed in a wavy shape. In order to grow the well layer 4 in this way, the growth conditions of the well layer 4 may be brought close to or the same as the growth conditions of the first barrier layer 3.

Subsequently, as shown in FIG. 4E, a second barrier layer 5 is grown on the well layer 4. In the example of FIG. 4E, the second barrier layer 5 is grown so that the surface is flattened.
Preferred conditions for making the surface flat are that the V / III ratio is high, the substrate temperature is low, the growth rate is low, the carrier gas is hydrogen gas, etc. Can be mentioned. Mg doping does not inhibit at least the surface of the second barrier layer 5 from being flattened.

Finally, as shown in FIG. 4F, the p-type semiconductor layer 6 is grown on the second barrier layer 5 to complete the semiconductor stacked body 100.
Known methods can be referred to as appropriate for the method for forming the light-emitting element. For example, the n-electrode can be formed on the back surface of the substrate 1 or on the surface of the n-type semiconductor layer 2 exposed by etching. The p electrode can be formed on the surface of the p-type layer 6.
In this example, the surface of the second barrier layer 5 is flattened, but this is not essential. By growing under the condition that the surface is not flattened, the surface of the second barrier layer 5 may be a corrugated surface, and the surface of the p-type semiconductor layer 6 may be a corrugated surface.

The results of experiments conducted by the present inventors will be described below.
<Experimental example>
1. Formation of Semiconductor Laminate A semipolar (20-2-1) GaN substrate is prepared, and the following layers are epitaxially grown in order on the (20-2-1) plane by using a normal MOVPE method. Manufactured. The raw materials used are group III materials TMG (trimethylgallium), TMI (trimethylindium) and TMA (trimethylaluminum), and group V materials ammonia.
1) Undoped GaN layer (composition GaN, thickness 10 nm)
(Growth conditions) Substrate temperature: 1040 ° C., carrier gas: nitrogen gas, growth rate: 0.8 μm / h, undoped, V / III ratio: 3300
2) GaN: Si layer (composition GaN, thickness 2000 nm)
(Growth conditions) Substrate temperature: 1040 ° C., carrier gas: nitrogen gas, growth rate: 1.3 μm / h, Si dope, V / III ratio: 2200
3) Undoped GaN layer (composition GaN, thickness 120 nm)
(Growth conditions) Substrate temperature: 840 ° C., carrier gas: nitrogen gas, growth rate: 0.14 μm / h, undoped, V / III ratio: 28000, TMI / TMG molar supply ratio: 0.83
4) InGaN barrier layer (composition InGaN, thickness 18 nm)
(Growth conditions) Substrate temperature: 840 ° C., carrier gas: nitrogen gas, growth rate: 0.14 μm / h, undoped, V / III ratio: 28000, TMI / TMG molar supply ratio: 3.3
5) InGaN well layer (composition InGaN, thickness (average) 3 nm)
(Growth conditions) Substrate temperature: 800 ° C., carrier gas: nitrogen gas, growth rate: 0.14 μm / h, undoped, V / III ratio: 28000, TMI / TMG molar supply ratio: 0.83
6) InGaN barrier layer (composition InGaN, thickness 18 nm)
(Growth conditions) Substrate temperature: 840 ° C., carrier gas: nitrogen gas, growth rate: 0.14 μm / h, undoped, V / III ratio: 28000
7) AlGaN: Mg layer (composition Al _0.10 Ga _0.90 N, thickness 160 nm)
(Growth conditions) Substrate temperature: 1030 ° C., carrier gas: hydrogen gas, growth rate: 1.2 μm / h, Mg dope, V / III ratio: 4800
8) AlGaN: Mg layer (composition Al _0.03 Ga _0.97 N, thickness 40 nm)
(Growth conditions) Substrate temperature: 1070 ° C., carrier gas: hydrogen gas, growth rate: 0.4 μm / h, Mg dope, V / III ratio: 5000

  In the above, growth of 5) InGaN well layer and 6) InGaN barrier layer was repeated three times. Thereby, a light emitting layer having a multiple quantum well structure including three well layers was formed.

2. TEM observation The cross-sectional TEM observation of the semiconductor laminated body of this experiment example obtained by (1) was performed.
A TEM image of a cross section orthogonal to the a-axis of the semiconductor stacked body of the experimental example is shown in FIGS. FIG. 6 is an enlarged view of a part of FIG. As these TEM images show, the cross section of the quantum well layer is not linear but has a waveform.
Here, it should be noted that the quantum well layer is grown so as to have a thickness of about 3 nm, and that the quantum well layer having a thickness of about 3 nm appears clearly in the cross-sectional TEM image. Considering that the TEM sample has a thickness of about 100 nm (FIG. 7), the three-dimensional shape of the quantum well layer is a wavy shape in the left-right direction in FIGS. Estimated.
Although not shown, when the cross section parallel to the a axis of the quantum well structure of the experimental example is observed with a TEM, the cross section of the quantum well layer does not exhibit a waveform, and the thickness direction of the layer The fact that it seemed to spread out also supports this presumption. As schematically shown in FIG. 8, since the thickness of the TEM sample is larger than the undulation period of the well layer, the quantum well layer has the same amplitude as the undulation amplitude when the cross section perpendicular to the undulation direction is viewed. It will spread out.

FIG. 9 emphasizes the contrast of the TEM image of FIG.
In FIG. 9, the portion that appears bright is a portion with a high In concentration. According to FIG. 9, it can be seen that the In concentration in the quantum well layer is not uniform, and a region where the In concentration is locally increased is formed.
It is considered that the distribution in the quantum well layer in such a high In region is not uniform. This is because if the high In region is uniformly distributed, it is considered that the density of In does not appear in the cross-sectional TEM image.
According to such consideration, it is considered that the high In region tends to be formed at the bottom of the wavy quantum well layer.
Furthermore, since the bottom of the quantum well layer extends parallel to the a-axis, it is estimated that the region is also formed in a linear shape parallel to the a-axis. The results of polarized photoluminescence measurements described below indicate that this estimate is probably correct.
Since the linear high In region has a smaller band gap than the surrounding area, it is expected to be a quantum wire having a carrier confinement function.

3. Polarized Photoluminescence Measurement Next, the polarization characteristics of the photoluminescence of the quantum well layer were measured for the semiconductor stack of the experimental example.
A conceptual diagram of the measurement system used is shown in FIG. A semiconductor laser having an oscillation wavelength of 375 nm was used as the excitation light source 21, and the quantum well layer was selectively excited. The depolarizer 22 is intended to cancel the linear polarization of the excitation light. The polarizing filter 24 transmits only the polarized light component in a specific direction out of the luminescence generated from the sample 23. The polarized light that has passed through the polarizing filter 24 is converted from linearly polarized light into circularly polarized light by the λ / 4 wavelength plate 25 and then enters the spectroscope 26. With this configuration, the influence of the polarization sensitivity characteristic of the spectroscope 26 is removed. The light split by the spectroscope 26 is detected by a PM (photomultiplier tube) 27 and amplified by a lock-in amplifier.

Using such a measurement system, the spectra of two polarization components contained in the photoluminescence of the quantum well layer were measured, and the degree of polarization P was determined. One of the two polarization components is a polarization component (abbreviated as E // a) having an electric field vector parallel to the a-axis of the semiconductor laminate, and the other is orthogonal to the a-axis and on the surface of the semiconductor laminate. A polarization component having a parallel electric field vector (abbreviated as E⊥a).
The degree of polarization P was calculated by the following formula.
P = ((E // a)-(E⊥a)) / ((E // a) + (E⊥a))
The results are shown in FIG. In FIG. 11A, the spectrum of the E // a component is indicated by a broken line, and the spectrum of the E⊥a component is indicated by a curved solid line. The degree of polarization P is a solid line and shows a saw blade shape.

<Comparative experiment example>
Using a semipolar (20-21) GaN substrate, a semiconductor laminate was grown on the (20-21) plane in the same manner as in the experimental example.
FIGS. 12 and 13 show TEM images of a cross section orthogonal to the a-axis of the obtained semiconductor stacked body. FIG. 13 is an enlarged view of a part of FIG. These TEM images indicate that the well layer is formed flat.
FIG. 14 emphasizes the contrast of the TEM image of FIG. Unlike the semiconductor stacked body of the experimental example, the In concentration in the quantum well layer is substantially uniform in the comparative experimental example.

FIG. 11B shows the degree of polarization of the photoluminescence of the quantum well layer included in the semiconductor stacked body of the comparative experimental example, measured in the same manner as in the experimental example. In FIG. 11B, the spectrum of the E // a component is indicated by a broken line, and the spectrum of the E⊥a component is indicated by a curved solid line. The degree of polarization P is a solid line and shows a saw blade shape.
Since the (20-2-1) plane and the (20-21) plane have the same inclination from the m-plane, if the structure of the quantum well layer is the same, the semiconductor stacked body of the experimental example and the comparative experimental example The degree of polarization of the photoluminescence should be the same, but the degree of polarization of both is greatly different as shown in FIGS. 11 (a) and 11 (b). In the experimental example, the E // a component is the E⊥a component. In contrast, it became significantly larger. This result strongly suggests that a quantum wire structure is formed in the quantum well structure of the experimental example.

100 Semiconductor laminated body 1 Substrate 10 Light emitting layer (quantum well structure)
2 n-type semiconductor layer 3 first barrier layer 4 quantum well layer 5 second barrier layer 6 p-type semiconductor layer 20 polarized photoluminescence measurement system 21 excitation light source 22 depolarizer 23 sample 24 polarizing filter 25 λ / 4 wavelength plate 26 Spectrometer 27 Photomultiplier tube 41 Top 42 Bottom

Claims (14)

A first barrier layer including a nitride semiconductor; a second barrier layer including the nitride semiconductor and stacked on the first barrier layer; and the first barrier layer including the nitride semiconductor and the second barrier layer. A quantum well structure including a well layer sandwiched between barrier layers,
The well layer includes a undulating portion that undulates along the first direction with an amplitude greater than the thickness of the well layer;
A quantum well structure capable of emitting polarized luminescence having a polarization axis perpendicular to the first direction.   The quantum well structure according to claim 1, wherein the well layer includes a nitride semiconductor containing In.   3. The quantum well structure according to claim 2, wherein a region where the In composition is maximum extends one-dimensionally along a direction orthogonal to the first direction in the wavy portion.   4. The quantum well structure according to claim 2, wherein the undulating portion has a region having a maximum In composition at the bottom. 5.   The quantum well structure according to claim 2, wherein the well layer is an InGaN layer.   The quantum well structure according to claim 1, wherein the waved portion includes a waved portion having an amplitude that is twice or more the film thickness of the well layer.   The quantum well structure according to claim 1, wherein the wavy portion includes a portion having a top and a bottom that are adjacent to each other with a height difference of 3 nm or more.   The quantum well structure according to claim 1, wherein the wavy portion includes a portion having two tops adjacent to each other with an interval of 30 nm or less across one bottom.   The quantum well structure according to any one of claims 1 to 8, wherein the quantum well structure is epitaxially grown on a semipolar plane of a first nitride semiconductor.   The quantum well structure according to claim 9, wherein the semipolar plane is parallel to the a-axis of the first nitride semiconductor.   The quantum well structure according to claim 10, wherein the semipolar plane is a (20-2-1) plane.   The quantum well structure according to claim 10 or 11, wherein the first direction is orthogonal to the a-axis of the first nitride semiconductor.   A nitride semiconductor device, wherein the quantum well structure according to claim 1 is disposed between a p-type nitride semiconductor layer and an n-type nitride semiconductor layer.   The nitride semiconductor device according to claim 13, which is a light emitting device.