JP2013113876A - Display device and display method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize errors in a whole image while simultaneously addressing a plurality of lines and thereby reliably achieve picture quality improvement.SOLUTION: A display device 1 is provided with a selected pattern table 13 defining a selected pattern of each block. A data determining unit 3 of the display device 1, using a data conversion table 12 for each block, so determines image data for displaying as to minimize the error between the original image data and image data for displaying in the block as a matter of whole image data in the block and to make the bit values of adjoining lines with respect to prescribed subfields (SF) of the same weight. The data determining unit 3, when it has determined a plurality of sets of image data for displaying, extracts the selected pattern of the pertinent block by using the selected pattern table 13, and selects one set of image data for displaying out of the plurality of sets of image data for displaying on the basis of the extracted selected pattern.

Description

  The present invention relates to a matrix display device such as a plasma display panel (PDP) and a display method, and in particular, a field for displaying image data is divided into a plurality of subfields, and the plurality of subfields are added to produce a gradation. Related to display technology.

  2. Description of the Related Art Conventionally, there is known a matrix type display device that selects a plurality of pixels arranged in a horizontal direction (row direction) and a vertical direction (column direction) to emit light by applying a voltage to electrodes arranged in a matrix. Yes. In this display device, a field corresponding to a time for displaying image data is divided into a plurality of subfields (hereinafter referred to as “SF”) in time, and the display time of each divided SF is weighted. These SFs are added together (integrated over time) to display an image. As a result, gradation display can be realized by temporal integration of an image reflected in the human eye.

  For example, in Patent Document 1, in order to display an image of 256 gradations on a display panel, one field is divided into eight SFs and weights of 1, 2, 4, 8, 16, 32, 64, and 128 are assigned. A display device (first display device) is described in which each SF is provided and an image is displayed by adding these SFs together.

  The first display device converts 8-bit image data into eight types of binary image data SF1 to SF8 when displaying 256 gradations of 8-bit image data per pixel on the display panel. . Then, according to the converted binary image data, the processing of SF1 to SF8 is performed to display an image with 256 gradations.

  FIG. 12 is a diagram for explaining image data for each SF in the conventional first display device. In each pixel constituting the display panel, 8-bit image data is converted into binary image data for each of SF1 to SF8, and the converted image data is used as it is for display. FIG. 12 shows binary image data SF1 to SF8 in pixels in a predetermined column of each row.

  FIG. 13 is a diagram for explaining drive timing in the conventional first display device. As shown in FIG. 13, 8-bit image data specified by a row and a column is displayed in 256 gradations by processing of one field. One field is divided into eight SFs of SF1 to SF8, and each SF is composed of address periods a1 to a8 and display periods b1 to b8. The address periods a1 to a8 are periods during which processing for selecting pixels to emit light is performed, and all have the same time length. The display periods b1 to b8 are periods in which processing for causing the pixels selected in the address periods a1 to a8 to emit light for a predetermined time according to the weight is performed, and the display period b1 has the shortest time length. The period b8 is the longest time length.

  With the binary image data of SF1 to SF8 converted from 8-bit image data, the pixel emits light for a predetermined period of the display period b1 to b8 according to the weight. For example, when 8-bit image data is converted into binary image data of SF1 to SF8 (“10100100”: the left side is the lower bit and the right side is the upper bit. The same applies hereinafter), the pixel is SF1. Is selected in the address period a1, the display period b1 is executed, and light is emitted for that time. And it is selected in address periods a3 and a6 of SF3 and 6, display periods b3 and b6 are executed in the same manner, and light is emitted for that time. In SF2, SF4, SF5, SF7, and SF8, no pixel is selected, so no light is emitted. In this way, the pixel emits light for the time in SF1, SF3, and SF6, thereby performing gradation display.

  FIG. 14 is a diagram for explaining an address period and a display period constituting the SF. The horizontal axis represents the elapsed time, and the vertical axis represents the address electrode pulse, the scan electrode pulse, and the sustain electrode pulse with respect to the elapsed time, and these pulses are applied to the electrodes of the respective pixels. In the address period, an address electrode pulse corresponding to a pixel having n columns is applied to each row with a predetermined pulse width. The address electrode pulse is applied when the pixel is caused to emit light, and is not applied when the pixel is not caused to emit light. Further, scan electrode pulses 0 to M-1 corresponding to pixels of the number M of rows are applied with the same pulse width as that of the address electrode pulses, respectively. In the pixel to which the address electrode pulse and the scan electrode pulse are applied simultaneously, the cell discharges and emits light. In the discharged cell, electric charges are accumulated on the dielectric covering the electrodes, and discharge can be generated again within a certain period thereafter.

  On the other hand, in the display period, scan electrode pulses and sustain electrode pulses corresponding to pixels of the number M of rows are alternately applied. Thereby, discharge and charge are repeated in the cell, and light emission continues. The display periods b1 to b8 shown in FIG. 13 have different time lengths depending on the number of repetitions.

  As described above, in the display panel constituted by the pixels of the number of rows M and the number of columns N, each SF is one row simultaneous address, and one row of data is written in one address period. However, in the first display device, when the number of rows increases or the number of bits to be displayed increases, the number of addresses increases, the address time becomes longer, and a sufficient address pulse width cannot be obtained. . In addition to the problem that the luminance is lowered and the frame rate is lowered, there is a problem that the power of the address electrode pulse is increased.

  In order to solve such a problem of the first display device, in a predetermined SF, the data of a plurality of consecutive rows are set to the same value, the plurality of rows are simultaneously addressed, and the data of the plurality of rows is written in one address period. A display device (second display device) that performs image display by multi-run simultaneous scanning drive is known. According to the second display device, since the address period can be shortened, the above-described problem can be solved. However, as a trade-off, there is a problem that an error occurs between the original image data that is input data and the display image data that is display data, and image quality deteriorates.

  In order to solve such a problem of the second display device, for example, a display device (third display device) of Non-Patent Document 1 is known. In the third display device, the error between the original image data and the display image data is minimized in units of image data of a predetermined number of adjacent rows within a practical processing time range. In the SF, a plurality of rows adjacent in the vertical direction are set to the same value, and a multi-run simultaneous scanning drive for simultaneously addressing the plurality of rows is performed.

Japanese Patent No. 3259253

Takeharu Asai and five others, “Examination of pixel value determination method in multi-line simultaneous scanning drive method of PDP”, Proceedings of 2010 Winter Conference of the Institute of Image Information and Television Engineers, The Institute of Image Information and Television Engineers, November 2010 26th

  In the above-described third display device, a plurality of rows are addressed simultaneously, and a plurality of rows of data are written in one address period, so that the address period can be shortened. In addition, since the error between the original image data and the display image data is minimized in units of adjacent predetermined number of lines of image data, the image quality of the entire display image can be improved.

  However, in the third display device, the display image data with the smallest error is not necessarily specified as only one, and a plurality of candidates may be specified. Non-Patent Document 1 describes a method for specifying image data for display using a table for the third display device, but a plurality of display image data candidates that minimize the error are specified. No mention is made of the processing. In Non-Patent Document 1, it is not clear how to determine one display image data from a plurality of display image data candidates. However, in some cases, improvement in image quality as a whole display image is insufficiently realized. In other words, the image quality may be significantly degraded.

  According to the experiment (computer simulation) of the inventors of the present application, in the third display device described in Non-Patent Document 1, when the image data of four adjacent rows is used as a unit, For about 30%, an experimental result was obtained that a plurality of display image data candidates with minimum error may be specified. In this case, the display image has a degradation of image quality within about 30% of the image area, for example, the color of human hair becomes red. Based on these results, when minimizing the error between the original image data and the display image data, even if multiple display image data candidates are specified, the entire display image is displayed. Therefore, there has been a demand for a display device that can reliably improve the image quality and suppress the deterioration of the image quality.

  Accordingly, the present invention has been made to solve the above-mentioned problems, and the object thereof is to minimize errors in the entire image and to reliably improve image quality while simultaneously addressing a plurality of rows. And a display method are provided.

  In order to achieve the above object, the display device according to the present invention, when displaying a plurality of pixels arranged in a row direction and a column direction in gray scale, converts the original image data of the pixels into a subfield indicating a bit position. Converting to display image data consisting of each bit value and selecting the pixel; and a display period for causing the selected pixel to emit light based on the bit value for a time corresponding to the weight of the bit position; In the display device that performs the gradation display according to the display image data by the processing of the subfield consisting of, a plurality of the original image data in the block for each block having a plurality of image data of a predetermined number of rows Between the display image data and the plurality of display image data is minimized, and a predetermined sub-field includes a plurality of consecutive lines within the predetermined number of lines. The data determination unit for determining display image data for performing gradation display and scanning the pixels in a plurality of consecutive rows simultaneously in the address period of the predetermined subfield so that the dot values are the same. And when the data determination unit determines a plurality of display image data as display image data for performing the gradation display, the plurality of display units are set according to a selection condition set in advance for each block. One display image data is selected from the display image data.

  In the display device according to the present invention, when the data determination unit determines a plurality of display image data as the display image data for performing the gradation display, the data determination unit is predetermined according to a selection condition set in advance for each block. One display image data is selected from the plurality of display image data so that the display image data of the block is different from the display image data of adjacent blocks positioned vertically and horizontally with respect to the predetermined block. It is characterized by.

  Further, in the display device according to the present invention, when the data determination unit determines a plurality of display image data as display image data for performing the gradation display, each of the display units is set according to a selection condition set in advance for each block. One display image data is selected from the plurality of display image data so that the display image data of the block is random.

  Furthermore, in the display method according to the present invention, when a plurality of pixels arranged in the row direction and the column direction are displayed in grayscale, the original image data for the pixels is composed of bit values for each subfield indicating a bit position. Processing of a subfield comprising an address period for converting to display image data and selecting the pixel, and a display period for causing the selected pixel to emit light based on the bit value for a time corresponding to the weight of the bit position Thus, in the method of performing the gradation display according to the display image data, a plurality of the original image data and a plurality of the display images in the block for each block having a plurality of image data of a predetermined number of rows The error between the data and the data is minimized, and the bit values of a plurality of consecutive rows within the predetermined number of rows are the same for a predetermined subfield. And determining the display image data for performing the gradation display, and when determining a plurality of display image data as the display image data for performing the gradation display in the step, The step of selecting one display image data from the plurality of display image data in accordance with the set selection condition, and simultaneously scanning the pixels in the plurality of consecutive rows in the address period of the predetermined subfield And a step of performing.

  As described above, according to the present invention, an error between the original image data and the display image data in the block is obtained for each block in which a predetermined number of adjacent rows of image data are simultaneously scanned. When there are a plurality of display image data to be targeted when the image data is minimized, a plurality of display image data having similar errors are dispersed according to a preset selection condition for each block. One image data for display is selected from among them. Accordingly, it is possible to minimize the error of the entire image while addressing a plurality of lines at the same time, to surely improve the image quality, and to suppress the deterioration of the image quality.

It is a block diagram which shows the structure of the display apparatus by embodiment of this invention. It is a figure explaining a drive timing. It is a figure explaining an address period. It is a figure explaining the image data for a display for every SF determined by the data determination part. It is a figure which shows the structure of a data conversion table. It is a figure which shows the structure of a selection pattern table. It is a figure explaining the outline | summary of the algorithm of a data determination part. It is a flowchart which shows the process of a data determination part. It is a flowchart which shows the detail of the process (step S808) which specifies the image data Y1-Y4 for display by a data determination part. It is a figure explaining the specific example 1 (when one piece of display image data Y1 to Y4 that minimizes the error is determined) of the algorithm of the data determination unit. It is a figure explaining the specific example 2 (when a plurality of display image data Y1 to Y4 with the smallest error is determined) of the algorithm of the data determination unit. It is a figure explaining the image data for every SF in the conventional 1st display apparatus. It is a figure explaining the drive timing in the conventional 1st display apparatus. It is a figure explaining the address period and display period which comprise SF in the conventional 1st display apparatus. It is a figure which shows the image quality evaluation result by SSIM (Structural SIMlarity) with respect to RGB image data. It is a figure which shows the image quality evaluation result by SSIM with respect to the image data of YUV.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.
[Outline of the Invention]
A display device according to an embodiment of the present invention is a matrix-type display device that selects pixels by orthogonal row electrodes and column electrodes, such as a PDP, and converts original image data into bit-by-bit data as display image data. Data for each SF is generated, and SF processing is temporally overlapped (integrated) by a cycle including an address period for selecting a pixel and a display period in which the selected pixel emits light for a time corresponding to the bit weight. ) To display the gradation of the image data. In order to shorten the address period, the image data of a predetermined SF is set to the same value in a plurality of consecutive rows, and the plurality of rows are simultaneously scanned. In order to suppress the deterioration of image quality, the error between the original image data and the display image data in the block is minimized for each block having a predetermined number of adjacent rows of image data to be simultaneously scanned. As described above, image data for display is determined using a preset data conversion table. Here, when there is a candidate for display image data, a similar error (plus error or minus error) is used based on the selection pattern (selection condition) of the block using a preset selection pattern table. One display image data is selected from a plurality of candidates so that display image data having an error) is dispersed. As a result, the error is dispersed in the entire display image without being biased, so that an improvement in image quality can be realized with certainty and deterioration in image quality can be suppressed.

  In this data conversion table, the error between the original image data and the display image data is calculated in advance for all combinations between the original image data and the SF bit values for simultaneous scanning of a plurality of rows. , A table storing data of all combinations thereof. When determining the display image data, the display device instantly derives an error between the original image data and the display image data by referring to the preset data conversion table, Compare errors. Then, the combination having the smallest error is specified, and the display image data in the combination is specified.

  The selection pattern table is a table in which a selection pattern is defined for each block. When the display device determines a plurality of display image data candidates that minimize the error, the display device refers to the selection pattern of the block in the selection pattern table to obtain one display image data from the plurality of candidates. select. That is, when a plurality of combination candidates between the original image data and the display image data are specified, the display device selects one combination from the plurality of candidates.

[Configuration of display device]
First, the configuration of the display device according to the embodiment of the present invention will be described. FIG. 1 is a block diagram showing a configuration of a display device according to an embodiment of the present invention. The display device 1 is a matrix display device such as a PDP having pixels arranged in M rows × N columns, and includes a subfield conversion unit 2, a data determination unit 3, a frame memory 4, a timing pulse generation unit 5, a display A panel 6, a data driver 7, a sustain driver 8, an address electrode 9, a scan electrode 10, a sustain electrode 11, a data conversion table 12, and a selection pattern table 13 are provided. In FIG. 1, the scan electrode 10 and the sustain electrode 11 are different electrodes, but are shown as the same electrode for convenience in order to simplify the description.

The subfield conversion unit 2 inputs image data of 8 bits per pixel for each pixel, and displays it on the display panel 6 with 2 ⁸ = 256 gradations, from the least significant bit to the most significant bit, The image data is converted into eight types of binary image data (bit values) including only each bit, and binary image data for each SF in SF1 to SF8 is output to the data determination unit 3. The conversion process by the subfield conversion unit 2 is performed based on the timing signal generated by the timing pulse generation unit 5.

  The data determination unit 3 inputs binary image data for each SF in SF1 to SF8 as one-pixel image data (original image data) from the subfield conversion unit 2. Here, image data of a predetermined number of adjacent rows to be simultaneously scanned is set in advance as one block, and the data determination unit 3 performs processing for each block. The data determination unit 3 uses the data conversion table 12 for each block so that the error between the original image data and the display image data in the block is minimized as the entire image data in the block ( Bit values of adjacent rows for a given SF of the same weight, so that errors between the plurality of original image data and the plurality of display image data in the block are minimized as the entire image data in the block) So that the original image data is converted into display image data so that the image data for display is divided into the image data for display from SF1 to SF8. Data is converted into data, and image data for display in the block is determined. Then, when there is one determined display image data, the data determination unit 3 stores the display image data in the frame memory 4 as binary image data in SF1 to SF8. For example, when the image data is converted, the data determination unit 3 uses the same bit values d1 and SF2 for SF1 and SF2 in which the weight of the image data for display is small in rows 4m to 4m + 3 as shown in FIG. Set to be d2, and SF3 and 4 are set so that the bit values are the same d3 and d4 in the 4m and 4m + 1 rows, so that the bit values are the same d5 and d6 in the 4m + 2 and 4m + 3 rows, respectively. . The determination process by the data determination unit 3 is performed based on the timing signal generated by the timing pulse generation unit 5. Details of the processing of the data determination unit 3 that converts the original image data into display image data with reference to the data conversion table 12 will be described later.

  In addition, the data determination unit 3 sets the bit values of adjacent rows for a predetermined SF having the same weight so that the error between the original image data and the display image data is minimized as a whole in the block. When the display image data in the block is determined so that the same is present, when there are a plurality of determined display image data instead of one (a plurality of display image data having the same error) Is selected), the selection pattern of the block is specified using the selection pattern table 13, one image data for display is selected based on the specified selection pattern, and the selected display image data Are stored in the frame memory 4 as binary image data in SF1 to SF8, respectively. That is, when the data determining unit 3 determines a plurality of display image data that minimizes an error from the original image data, the data determining unit 3 selects one display image data based on the selection pattern of the block. select. Such selection is performed for all blocks for which a plurality of display image data has been determined, and the selection pattern is defined for each block in the selection pattern table 13.

  The frame memory 4 stores binary image data (image data for display / image data for one pixel) for each SF in SF1 to SF8 by the data determination unit 3, and from the pixels of M rows × N columns. Image data is stored in units of frames of one screen. In addition, binary image data for each subfield in SF1 to SF8 is read from the frame memory 4 by the data driver 7 for each frame. The processing by the frame memory 4 is performed based on the timing signal generated by the timing pulse generator 5.

  The timing pulse generation unit 5 inputs 8-bit image data per pixel, and the subfield conversion unit 2, the data determination unit 3, the frame memory 4, the data driver 7, and the sustain driver 8 perform respective processes according to the input timing. A timing signal for performing the above is generated.

  The display panel 6 includes two glass plates, an address electrode 9, a scanning electrode 10, a sustain electrode 11, and the like, and discharge cells in a space partitioned by the two glass plates and the partition walls are arranged in a horizontal direction (row direction). ) And a plurality of pixels arranged in the vertical direction (column direction). A rare gas is sealed in the discharge cell. In the address period of SF, when a voltage is applied to the address electrode 9 by the data driver 7 and a voltage is applied to the scan electrode 10 by the sustain driver 8, discharge occurs and ultraviolet rays are generated. A phosphor is applied to the partition walls, and the phosphor is excited by ultraviolet rays, so that the pixels emit light. Further, when a voltage is alternately applied to the scan electrode 10 and the sustain electrode 11 by the sustain driver 8 during the display period, the discharge and the charge are repeated, and the light emission of the pixel continues for the display period. Note that the emission colors of the phosphors are colored red, green, and blue for each discharge cell, and the pixel of the discharge cell is selected according to the image data to perform color display.

  The data driver 7 reads from the frame memory 4 binary image data for each SF in SF1 to SF8 for one frame. In the address period constituting the SF, a drive pulse (address electrode pulse) is applied to the address electrode 9 for each row and for each SF according to binary image data for each SF. Specifically, the data driver 7 applies each address electrode pulse to the address electrode 9 according to the image data of the first row / each column of SF1 in the address period of SF1. The same processing is sequentially performed for the second to Mth rows of SF1. In the address period of SF2 to SF8, the same processing is sequentially performed for the first to Mth rows. A pixel to emit light is selected by applying the address electrode pulse.

  In the embodiment of the present invention, the data driver 7 applies address electrode pulses of the same timing to the address electrodes 9 for a plurality of rows in the SF in which the same binary image data is set by the data determination unit 3. Accordingly, since a plurality of rows are scanned simultaneously, the number of address electrode pulses applied to the address electrodes 9 can be reduced. That is, the number of address scans can be reduced, the address period can be shortened, and the power of the address electrode pulses can be reduced.

  The sustain driver 8 applies a drive pulse (scan electrode pulse) to the scan electrode 10 for each row at a preset timing in the address period constituting the SF. Thereby, when the address electrode pulse from the data driver 7 is applied at the same time, the pixel to emit light is selected. The sustain driver 8 applies a different number of scan electrode pulses to the scan electrode 10 for each SF in the display period constituting the SF, and generates a drive pulse (sustain electrode pulse) paired with the scan electrode pulse. 11 is applied. Scan electrode pulses and sustain electrode pulses are alternately applied repeatedly, and the smaller the bit weight, the smaller the number of repetitions and the shorter the display period.

  In the embodiment of the present invention, the sustain driver 8 applies each scan electrode pulse to the scan electrode 10 at the same timing for a plurality of rows in the SF in which the same binary image data is set by the data determination unit 3. Thereby, since a plurality of rows are scanned simultaneously, the number of address scans can be reduced, and the address period can be shortened.

  When the address electrode pulse applied by the data driver 7 and the scan electrode pulse applied by the sustain driver 8 are simultaneously applied to the discharge cell, a discharge occurs, the phosphor is excited, and the pixel emits light. Thereby, an address period is executed. In the display period, when the scan electrode pulse and the sustain electrode pulse applied by the sustain driver 8 are alternately applied to the discharge cell, the discharge and the charge are repeated, and the light emission of the pixel is continued. Thereby, the display period is executed. In this way, the address period is executed according to the binary image data of SF, and the pixel selected by executing the address period emits light by executing a display period of a time length corresponding to the SF weight. Then, by executing SF from SF1 to SF8, it is possible to display 256 gradations according to the image data.

[Drive timing]
Next, drive timing will be described. FIG. 2 is a diagram for explaining drive timings in the display device 1 shown in FIG. 1, and FIG. 3 is a diagram for explaining an address period constituting the SF shown in FIG. As shown in FIG. 4 which will be described later, the display device 1 has 8-bit gradation weights of 1, 2, 4, 8, 16, 32, 64, and 128 when displaying 8-bit image data. When displaying with SF1 to SF8, image data of 4 rows (4m to 4m + 3rd row) is treated as one block, and processing is performed for each block. Specifically, the display device 1 sets the image data of the adjacent four rows (4m to 4m + 3th row) of SF1 and SF2 having the weights of 1 and 2 to the same value, and simultaneously applies to the adjacent four rows. Set the same value for the adjacent image data (4m, 4m + 1, 4m + 2, 4m + 3) in SF3 and SF4 with 4 and 8 weights, and simultaneously address the two adjacent rows. I do. The display apparatus 1 addresses SF5 to SF8 having weights of 16, 32, 64, and 128 for each row as in the past.

  Referring to FIG. 2, one field is divided into eight SFs of SF1 to SF8, and each SF is composed of address periods a1 to a8 and display periods b1 to b8. The address periods a1 to a8 are not all the same time length (address count), the time length of a5 to a8 is the longest, the time length of a3 and a4 is 1/2 of a5 to a8, and the time of a1 and a2 It can be seen that the length is 1/4 of a5 to a8. In the display periods b1 to b8, the display period b1 has the shortest time length, and the display period b8 has the longest time length.

  The address period will be described in detail with reference to FIG. The abscissa indicates the elapsed time, and the ordinate indicates the address electrode pulses and the scan electrode pulses 4m to 4m + 3 with respect to the elapsed time, and these pulses are applied to the respective electrodes. In the address period a1 of SF1, the address electrode pulses of n columns are applied to the address electrodes 9 at the same timing every four rows of blocks, and the scanning electrode 10 is also scanned at the same timing for every four rows of blocks. To be applied. The same applies to the address period a2 of SF2. Specifically, the n-column address electrode pulses and four consecutive rows of scan electrode pulses 4m to 4m + 3 are simultaneously applied to the respective electrodes. As a result, the time length of the address periods a1 and a2 can be shortened to ¼ the time length t of the address periods a5 and a6.

  In the address period a3 of SF3, the address electrode pulse of n columns is applied to the address electrode 9 every two consecutive rows at the same timing, and the scan electrode pulse is also applied to the scan electrode 10 at the same timing every two consecutive rows. Is done. The same applies to the address period a4 of SF4. Specifically, the scanning electrode pulses 4m and 4m + 1 for two rows that are continuous with the first address electrode pulse in the n column are applied to the respective electrodes at the same time, and are continuous with the second address electrode pulse in the n column. Two rows of scan electrode pulses 4m + 2 and 4m + 3 are simultaneously applied to the respective electrodes. As a result, the time length of the address periods a3 and a4 can be shortened to ½ of the time length t of the address periods a5 and a6.

  Further, in the address period a5 of SF5, address electrode pulses of n columns are applied to the address electrodes 9 for each row, and scan electrode pulses are also applied to the scan electrodes 10 for each row. The same applies to the address periods a6 to a8 of SF6 to SF8. Specifically, the address electrode pulse and the scan electrode pulse 4m are simultaneously applied to the electrodes, and then the address electrode pulse and the scan electrode pulse 4m + 1 are simultaneously applied. The same applies to scan electrode pulses 4m + 2 and 4m + 3. The time length of these address periods a5 to a8 is the time length t.

  As described above, the data driver 7 applies the address electrode pulse to the address electrode 9 for each block of four adjacent rows according to the same image data for SF1 and SF2 by the data determination unit 3. Further, the sustain driver 8 applies the scan electrode pulse to the scan electrode 10 at the same timing for each of the adjacent four rows of blocks for SF1 and SF2. As a result, the number of address electrode pulses applied to the address electrode 9 can be reduced to ¼, and the address period can be shortened to ¼.

  Similarly, the data driver 7 applies the address electrode pulse to the address electrode 9 every two adjacent rows according to the same image data for SF3 and SF4 by the data determination unit 3. Further, the sustain driver 8 applies the scan electrode pulse to the scan electrode 10 at the same timing for every two adjacent rows for SF3 and SF4. Thereby, the number of address electrode pulses applied to the address electrode 9 can be reduced to ½, and the address period can be shortened to ½.

[Data decision part]
Next, the data determination unit 3 of the display device 1 shown in FIG. 1 will be described in detail. As described above, the data determination unit 3 uses the data conversion table 12 for each block so that the error between the original image data and the display image data in the block is minimized as a whole, and The image data for display in the block is determined so that the bit values of adjacent rows are the same for a given SF of the same weight. When there are a plurality of determined display image data, one display image data is selected using the selection pattern table 13.

  FIG. 4 is a diagram for explaining the display image data for each SF, which is determined by the data determination unit 3. As shown in FIG. 4, processing is performed for each block in units of image data of four adjacent rows (4m to 4m + third row) on which multiple rows are simultaneously scanned. For the four rows of image data constituting the block, the original image data is X1 to X4, the converted image data for display is Y1 to Y4, and the bit value of SF for simultaneous scanning of a plurality of rows is d1. To d6. A square error between Xi and Yi (i = 1 to 4) is assumed to be δi.

  The image data of SF1 to SF8 in the display image data Y1 to Y4 is set for each block so that the error between the original image data and the display image data in the block is minimized as a whole. Is done. The display image data Y1 to Y4 are set so that the bit values of SF1 and SF2 having small weights are the same d1 and d2, and the bit values of SF3 and 4 are the same as d3 and d4 in the first two rows. Thus, the bit values are set to be the same d5 and d6 in the next two rows. That is, the SF is set so that the number of rows with the same bit value increases as the SF of the bit weight is smaller. Even if the SF image data with a small bit weight is changed, the influence on the image quality is not so great, so that the image quality deterioration can be suppressed.

(Data conversion table)
Next, the configuration of the data conversion table 12 used when the data determining unit 3 performs data conversion will be described. FIG. 5 is a diagram showing the configuration. The data conversion table 12 is created in advance before the display device 1 actually operates. The data conversion table 12 includes original image data X, d1 indicating the bit value of SF1, d2 indicating the bit value of SF2, d3 and d5 indicating the bit value of SF3, d4 and d6 indicating the bit value of SF4, for display Image data Y and error δ. The original image data X and the display image data Y are values from 0 to 255, d1 to d6 are bit values of 0 or 1, and the error δ is the original image data X and the display image data Y. Is the square error between. By making the error δ a square error, the error between the original image data X and the display image data Y can be adapted to the visual characteristics of the person viewing the image. The image quality can be improved by specifying the image data.

A combination between the original image data X and the bit values of d1, d2, d3 (or d5), d4 (or d6) is, for example, d1, d2, d3 ( Or there are 2 ⁴ = 16 combinations of bit values d5) and d4 (or d6), and there are 16 combinations of original image data X = 1. Therefore, when the original image data X is 8 bits and the data range is 0 to 255, there are 256 × 16 = 4096 patterns. That is, in the data conversion table 12 of FIG. 5, there are 4096 combinations of d1, d2, d3 (or d5), and d4 (or d6) for the original image data X.

The display image data Y includes original image data X, image data including bit values d1, d2, d3 (or d5), d4 (or d6) of SF1 to SF4 and bit values of SF5 to SF8. Data that minimizes the difference between is set. For example, if the original image data X = 0, d1, d2, d3 (or d5), d4 (or d6) = (1100) at the location (1) in FIG. Data with the smallest difference from the original image data X = 0, that is, image data when SF5 to SF8 = 0 = (11000000). That is, the display image data Y = 3, and the error δ = (0−3) ² = 9. Further, at the location (2) in FIG. 5, when the original image data X = 255, d1, d2, d3 (or d5), d4 (or d6) = (1011), the display image data Y is Data with the smallest difference from the original image data X = 255, that is, image data when SF5 to SF8 = 1111 = (10111111). That is, the display image data Y = 253, and the error δ = (255−253) ² = 4.

  In this way, the original image data X, the bit values d1, d2, d3 (or d5), d4 (or d6) of the SF1 to SF4, the bit values d1, d2, d3 of the original image data X and SF1 to SF4 ( Alternatively, the data conversion table 12 including the display image data Y and the error δ that minimize the difference between the image data including the bit values of d5), d4 (or d6) and SF5 to SF8 is preset. That is, the data conversion table 12 shows that the error between the original image data X and the display image data Y is the same for every combination of the original image data X and the SF bit values for simultaneous scanning of a plurality of rows. It is a table that is calculated in advance and stores all combinations thereof.

(Selection pattern table)
Next, the configuration of the selection pattern table 13 used when the data determining unit 3 determines a plurality of display image data will be described. FIG. 6 is a diagram showing the configuration. This selection pattern table 13 is created in advance before the display device 1 actually operates, and selection patterns A and B are defined for each block for a frame of one screen composed of pixels of M rows × N columns. . 0, 1, 2,..., N−1 indicate numbers (column numbers) for specifying the positions of blocks in the horizontal direction of the frame, and 0, 1, 2,. -1 indicates a number for specifying the position of the block in the vertical direction of the frame. M is a multiple of 4.

  The selection pattern table 13 shown in FIG. 6 is defined so that the selection pattern in an arbitrary block is different from the selection patterns in adjacent blocks on the top, bottom, left, and right with the block as the center. For example, the selection pattern in the block with the number 2 in the horizontal direction and the block with the number 2 in the vertical direction is A, and the selection patterns in the adjacent blocks on the top, bottom, left, and right are all B, and the selection patterns are different. The same applies to the other blocks.

  When the number indicating the combination of the SF bit values for performing the simultaneous scanning of a plurality of rows with respect to the original image data X is k, for example, the selection pattern A is a plurality corresponding to a plurality of determined image data for display. This indicates that the smallest k is selected from among k, and the selection pattern B indicates that the largest k is selected. In other words, when the data determining unit 3 determines two pieces of display image data and k = k1, k2 (k1 <k2) corresponding to the two pieces of display image data, the selection pattern A Indicates that k = k1 is selected, and the selection pattern B indicates that k = k2 is selected.

  Note that the selection pattern table 13 may be defined so that the selection patterns A and B are randomly arranged for each block, or three or more on the assumption that three or more display image data are determined. Different selection patterns may be defined. Further, the selection pattern in an arbitrary block may be defined so as to be different from the selection pattern in the up / down / left / right and oblique adjacent blocks centered on the block. In short, it suffices if the same selection pattern is arranged so as to be distributed without being biased over the entire frame of one screen. In the frame of one screen displayed on the display panel 6, the selection pattern is dispersed, so that the display image data is dispersed and the error is also dispersed, and has the same error (plus error or minus error). This is because display image data is not biased to the same region, and image quality deterioration can be suppressed. For example, when four selection patterns A, B, C, and D are defined in the selection pattern table 13 and four pieces of display image data are determined by the data determination unit 3, the selection pattern A is determined. Indicates that the smallest k of the four k corresponding to the four displayed image data is selected, the selection pattern D indicates that the largest k is selected, and the selection pattern B indicates the selection. It may indicate that the next smallest k after the pattern A is selected, and the selection pattern C may indicate that the next largest k after the selection pattern D is selected. For example, when four selection patterns A, B, C, and D are defined in the selection pattern table 13 and two display image data are determined by the data determination unit 3, the selection patterns A and B are Indicates that the smaller k of the two k corresponding to the determined two display image data is selected, and the selection patterns C and D indicate that the larger k is selected. It may be.

  As described above, when the data determination unit 3 determines a plurality of display image data, the selection pattern table 13 indicating which display image data is selected for each block corresponding to the pixel position in the frame is provided. It is set in advance. By using the selection pattern table 13 defined so that the selection pattern is dispersed within a frame of one screen, the display image data is dispersed, that is, the error is dispersed, so that the same error (plus error or minus error). The display image data having the error (2) is not biased to the same region, and image quality deterioration can be suppressed.

(Data determination unit / processing)
Next, the process of the data determination part 3 is demonstrated in detail. FIG. 7 is a diagram for explaining the outline of the algorithm of the data determination unit 3, and FIG. 8 is a flowchart showing the processing of the data determination unit 3. FIG. 10 is a diagram for explaining a specific example 1 of the algorithm of the data determination unit 3 (when one piece of display image data Y1 to Y4 that minimizes the error is determined), and FIG. It is a figure explaining the example 2 of the algorithm of the determination part 13 (when several image data Y1 for display Y1 from which an error becomes the minimum is determined). 7 and 8, the processes in steps S801 to S809 shown below are performed for each block.

  First, the data determination unit 3 inputs the original image data X1 to X4 constituting the block from the subfield conversion unit 2 (step S801), and sets the parameter k = 0 (step S802). Here, k is a numerical value considering the weight of each bit value of d1 to d6. For example, k = 0 indicates d1 to d6 = (000000), k = 1 indicates d1 to d6 = (100,000), similarly, k = 62 indicates d1 to d6 = (011111), and k = 63 Indicates d1 to d6 = (111111).

  In the specific example of FIG. 10, the data determination unit 3 inputs image data X1 = 47, X2 = 60, X3 = 44, and X4 = 47. In the specific example of FIG. 11, the data determination unit 3 inputs image data X1 = 32, X2 = 40, X3 = 40, and X4 = 48.

Returning to FIGS. 7 and 8, the data determination unit 3 displays the original image data X = X1, k = 0 (ie, d1 to d6 = (000000)) from the data conversion table 12 shown in FIG. Image data Y = Y1 and error δ = δ1 are extracted. Similarly, display image data Y = Y2 to Y4 and errors δ = δ2 to δ4 in the original image data X = X2 to X4 and k = 0. Is extracted (step S803). Then, the data determination unit 3 calculates an error Δ _k = δ1 + δ2 + δ3 + δ4 (step S804), calculates k = k + 1, and resets d1 to d6 (step S805).

  The data determination unit 3 determines whether k is larger than 63 (whether k> 63) (step S806), and k is larger than 63 (k> 63), that is, k = 64. If it is determined that there is (step S806: Y), the process proceeds to step S807. On the other hand, if the data determination unit 3 determines in step S806 that k is not greater than 63 (k> 63 is not satisfied) (step S806: N), the data determination unit 3 proceeds to step S803 and performs the new calculation calculated in step S805. Processing for k is performed.

In the specific example 1 of FIG. 10, when the data determination unit 3 is k = 0, that is, when d1 to d6 = (000000), the image data for display Y1 = 48, Y2 = 64, Y3 = 48, Y4 = 48, and errors δ1 = 1, δ2 = 16, δ3 = 16, δ4 = 1 are extracted, and an error Δ ₀ = 1 + 16 + 16 + 1 = 34 is calculated. In the specific example 2 of FIG. 11, when k = 0, that is, when d1 to d6 = (000000), the data determination unit 3 reads the display image data Y1 = 32, Y2 = 32, Y3 = 32, Y4 = 48, and errors δ1 = 0, δ2 = 64, δ3 = 64, δ4 = 0 are extracted, and an error Δ ₀ = 0 + 64 + 64 + 0 = 128 is calculated. Similarly, the data determination unit 3 extracts display image data Y1 to Y4 and errors δ1 to δ4 when k = _{1 to 63,} and calculates errors Δ1 to Δ63.

Returning to FIG. 7 and FIG. 8, the data determining unit 3 shifts from step S806, among all the error delta _k at k = 0 to 63, the error delta _k becomes minimum k = k _min; (d1 , D2,..., D6) are specified (step S807), and display image data Y1 to Y4 at k = _kmin are specified (step S808). Then, the data determination unit 3 determines the display image data Y1 to Y4 specified in step S808 as display image data Y1 to Y4 having a minimum error with respect to the entire original image data X1 to X4. These are output to the frame memory 4 (step S809). The data determining unit 3, in step S807, there may be cases where error delta _k is a plurality identify smallest k = k _min. The processing in this case will be described with reference to FIG.

FIG. 9 is a flowchart showing details of the processing (step S808) for specifying display image data Y1 to Y4 in the flowchart shown in FIG. The data determination unit 3 determines whether or not there are a plurality of k = _kmin specified in step S807 (step S901), and determines that there are a plurality of k = _kmin (step S901: Y). The process proceeds to step S902, and if it is determined that k = _kmin is 1 (step S901: N), the process proceeds to step S904.

When there are a plurality of k = _kmin , the data determination unit 3 moves from step S901, extracts a selection pattern corresponding to the blocks X1 to X4 from the selection pattern table 13 (step S902), and selects the selection pattern. Based on the plurality of k, one k is selected (step S903).

The data determining unit 3 shifts from step S901 when k = _kmin is one, or shifts from step S903 to display image data Y1 to Y4 for k when k = _kmin is one. Alternatively, display image data Y1 to Y4 at k selected in step S903 are specified (step S904).

In the specific example 1 of FIG. 10, the data determination unit 3 determines the minimum error Δ ₆₁ = 10 among the errors Δ _{0 to} Δ ₆₃ , that is, k = k _min = 61 where the error Δ _k is minimum. d1 to d6 = (101111) are specified, and display image data Y1 = 45, Y2 = 61, Y3 = 45, Y4 = 45 when k = _kmin = 61 are specified and output to the frame memory 4 . In this case, the specified (determined) display image data Y1 to Y4 is one.

In Example 2 of FIG. 11, the data determining unit 3 determines the minimum error Δ ₂₀ = Δ ₆₀ = 10 of the error Δ ₀ ~Δ _63, i.e., the error delta _k 2 pieces of k to be the minimum = K _min = 20; d1-d6 = (001010) and k = _kmin = 60; d1-d6 = (001111). Then, the data determination unit 3 extracts a selection pattern corresponding to the block from the selection pattern table 13. For example, when the extracted selection pattern of the aforementioned A, based on the selected pattern A, select k = k _min = 20,60 of smaller of _{k = k min = 20, k} = k min = 20 The display image data Y1 = 36, Y2 = 36, Y3 = 36, and Y4 = 52 are specified and output to the frame memory 4. On the other hand, when the extracted selection pattern of the aforementioned B, and based on the selected pattern B, select k = k _min = 60 the larger of the _{k = k min = 20,60, k} = k min = 60 The image data for display Y1 = 28, Y2 = 44, Y3 = 44, and Y4 = 44 are specified and output to the frame memory 4. In this case, the specified (determined) display image data Y1 to Y4 are two. Although there may be three or more display image data Y1 to Y4, one k based on the selection pattern is selected by the same method as described above.

  The data determination unit 3 repeatedly performs the above-described processing for all the blocks constituting the frame of one screen, thereby converting the original image data into display image data for all the pixels, and the frame memory 4 Output to.

〔Experimental result〕
Next, experimental results (results of computer simulation) will be described. FIG. 15 is a diagram illustrating an image quality evaluation result by SSIM (Structural SIMarity) for RGB image data, and FIG. 16 is a diagram illustrating an image quality evaluation result by SSIM for YUV image data. 15 and 16, (1) shows the SSIM of the image quality evaluation result when using a display device according to the prior art (display device of Non-Patent Document 1), and (2) shows the book shown in FIG. The SSIM of the image quality evaluation result at the time of using the display apparatus 1 by embodiment of invention is shown. In addition, “clock”, “sakura”, “drama”, and “night view” on the horizontal axis indicate image data types, and the vertical axis indicates SSIM. SSIM is an index of structural similarity used to evaluate image quality between original image data and image data on which gradation display is performed. The larger the SSIM value, the higher the degree of similarity between the two image data. In other words, the image data on which gradation display is performed is closer to the original image data, and the image quality is better. . 15 and 16, it can be seen that the SSIM is larger in all image data types in the embodiment of the present invention of (2) than in the prior art of (1). That is, it can be seen that the embodiment of the present invention of (2) has a higher similarity with the original image data and the image quality is better than the prior art of (1).

As described above, according to the display device 1 according to the embodiment of the present invention, the original image data X, the bit values d1, d2, d3 (or d5), d4 (or d6) of SF1 to SF4, the original image data. Display image data Y that minimizes a difference between X and image data composed of bit values d1, d2, d3 (or d5), d4 (or d6) of SF1 to SF4 and SF5 to SF8. A data conversion table 12 composed of errors δ is preset, and the data determination unit 3 uses this data conversion table 12 to display all combinations of the original image data X1 to X4 and d1 to d6 for each block. extracts image data Y1~Y4 and error δ1~δ4 of use, to calculate the 64 kinds _{Δ k = δ1 + δ2 + δ3} + δ4 (k = 0~63), identifies the k where delta _k is minimized, the k Image data Y1~Y4 for display kicking was determined as the image data for display having the smallest error with respect to the entire original image data X1 to X4. As a result, the SF having a predetermined weight in the display image data Y has the same bit value for adjacent rows, so that the data driver 7 simultaneously addresses a plurality of rows according to the value of the display image data Y. It is possible to minimize the error of the entire image and to suppress the deterioration of the image quality.

Further, according to the display apparatus 1 according to an embodiment of the present invention, the selection pattern table 13 that defines the selected pattern for each block is set in advance, if the data decision unit 3, in which a plurality identify k where delta _k is minimized Based on the selection pattern defined in the selection pattern table 13, one k is selected from the plurality of k, and the display image data Y1 to Y4 at that k is converted into the original image data X1 to X4. The image data for display having the smallest error with respect to the whole is determined. By using the selection pattern table 13 defined so that the selection pattern is dispersed within a frame of one screen, the display image data is dispersed, that is, has the same error (plus error or minus error). Since display image data is not biased to the same region and errors are dispersed, image quality deterioration can be suppressed.

For example, a case is assumed where, in a plurality of blocks in a certain area, a plurality of _k values having a minimum Δk are specified by the data determination unit 3, that is, a plurality of display image data are determined. In the prior art, there is a possibility that the error of all the display image data Y1 is biased to the plus side or the minus side in the region, and the image quality is deteriorated. On the other hand, in the display device 1 according to the embodiment of the present invention, the selection pattern table 13 defined so that the selection pattern is dispersed in the area is used. Therefore, the same plus error or minus side is used in the area. Since the display image data Y1 to Y4 having the error of? Are dispersed and the display image data Y1 to Y4 having the same polarity error are not biased, deterioration of the image quality can be suppressed.

  In the specific example shown in FIG. 11, when the original image data X1 = 32, X2 = 40, X3 = 40, and X4 = 48 are the same in all blocks in a certain area, the conventional technique uses all of the blocks in that area. In the block, the same display image data Y1 = 36, Y2 = 36, Y3 = 36, and Y4 = 52 (selection pattern A) may be determined. In contrast, in the display device 1 according to the embodiment of the present invention, the same display image data Y1 to Y4 is not determined, and the display image data Y1 = 36, Y2 = 36, Y3 = 36, Y4. = 52 (selection pattern A) and display image data Y1 = 28, Y2 = 44, Y3 = 44, Y4 = 44 (selection pattern B) are dispersed. Here, with respect to the original image data X1 = 32, the image data Y1 = 36 for displaying the selection pattern A has an error on the plus side, and the image data Y1 = 28 for displaying the selection pattern B is on the minus side. Have errors. Similarly, the image data Y2 and Y3 = 36 for displaying the selected pattern A have a minus side error with respect to the original image data X2 and X3 = 40, and the image data Y2 and Y3 for displaying the selected pattern B are displayed. Y3 = 44 has an error on the minus side. Further, the image data Y4 = 52 for displaying the selection pattern A has a plus error with respect to the original image data X4 = 48, and the image data Y4 = 44 for displaying the selection pattern B is minus. Has an error. Thus, the same display image data Y1 to Y4 are not dispersed, and the display image data Y1 to Y4 having the same error are not biased to the same region. Accordingly, since the plus side error and the minus side error are dispersed in units of pixels, when viewed as the entire image, the error is canceled and becomes 0, and as a result, image quality deterioration can be suppressed.

  The present invention has been described with reference to the embodiment. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the technical idea thereof. In the embodiment, the data determination unit 3 of the display device 1 uses the data conversion table 12 that defines the square error between the original image data X and the display image data Y. Instead, the data conversion table 12 that defines the difference between the original image data X and the display image data Y may be used. The data conversion table 12 shown in FIG. 5 is an example, and the present invention is not limited to using the data conversion table 12. The same applies to the selection pattern table 13 shown in FIG.

  In the embodiment, the data determination unit 3 of the display device 1 uses the data conversion table 12 in which the predetermined bits d1 to d6 of the display image data Y1 to Y4 are used to display the display image data. Although Y1 to Y4 are determined, the process for determining the display image data Y1 to Y4 is not limited to this. For example, the data determination unit 3 calculates the average value of the original image data X1 to X4, sets the lower 2 bits in the average value to d1 and d2, and uses the data conversion table 12 in which d3 to d6 are defined. It is also possible to determine the display image data Y1 to Y4. As a result, the number of parameters k can be reduced, and the processing load on the data determination unit 3 can be reduced.

  Further, the present invention does not limit the number of gradations of image data to 8 bits, and does not limit SFs for distributing bits to set the same bit value to SF1 to SF4. For example, SFs that set the same bit value may be SF1 to SF3, or SF1 to SF5. Further, which SF is to be a target of simultaneous addresses of a plurality of rows and what the data conversion table 12 and the selection pattern table 13 are to be made are not limited to the above embodiment. Further, in the present invention, the unit for performing data conversion by the data determination unit 3 is four lines, but is not limited to four lines, and may be eight lines, for example.

  Further, in the display image data Y1 to Y4 for each SF shown in FIG. 4, the bit values of SF1 and SF2 having small weights are the same d1 and d2 for each block of the conversion unit (four rows). SF3 and SF4 are set so that the bit values are the same d3 and d4 in the first two rows, and the bit values are the same d5 and d6 in the next two rows. That is, in SF1 and SF2, the number of rows in which the same bit value continues is 4, which is the maximum value. On the other hand, in SF3 and SF4, the number of rows in which the same bit value continues is 2, which is a divisor of the maximum value 4. In the present invention, for a predetermined first SF (SF1 and SF2 in the example of FIG. 4), when the number of consecutive rows having the same bit value is the maximum value (maximum value 4 in the example of FIG. 4), For a second SF different from the first SF (SF3 and SF4 in the example of FIG. 4), the number of consecutive rows having the same bit value is a divisor of the maximum value (example of FIG. 4). Then, the number of rows of SF3 and SF4 is 2), and the image data Y for each display may be determined.

DESCRIPTION OF SYMBOLS 1 Display apparatus 2 Subfield conversion part 3 Data determination part 4 Frame memory 5 Timing pulse generation part 6 Display panel 7 Data driver 8 Sustain driver 9 Address electrode 10 Scan electrode 11 Sustain electrode 12 Data conversion table 13 Selection pattern table

Claims (4)

When gradation-displaying a plurality of pixels arranged in a row direction and a column direction, the original image data for the pixels is converted into display image data composed of bit values for each subfield indicating a bit position, and In accordance with the display image data, processing is performed in a subfield including an address period for selecting a pixel and a display period for causing the selected pixel to emit light based on the bit value for a time corresponding to the weight of the bit position. In a display device that performs gradation display,
For each block having a plurality of image data of a predetermined number of rows as a unit, an error between the plurality of original image data and the plurality of display image data in the block is minimized, and a predetermined subfield A data determination unit that determines display image data for performing the gradation display so that the bit values of a plurality of consecutive rows within the predetermined number of rows are the same;
A driver section that simultaneously scans the pixels in the plurality of consecutive rows in the address period of the predetermined subfield,
The data determination unit
When a plurality of display image data are determined as display image data for performing the gradation display, one display image data is selected from the plurality of display image data according to a selection condition preset for each block. A display device characterized by selecting. The display device according to claim 1,
The data determination unit
When a plurality of display image data are determined as the display image data for performing the gradation display, the display image data for a predetermined block and the predetermined block are selected according to a selection condition set in advance for each block. A display device, wherein one display image data is selected from the plurality of display image data so that display image data of adjacent blocks positioned vertically and horizontally are different. The display device according to claim 1,
The data determination unit
When a plurality of display image data are determined as the display image data for performing the gradation display, the plurality of display image data are randomized according to a selection condition set in advance for each block. One display image data is selected from the display image data. When gradation-displaying a plurality of pixels arranged in a row direction and a column direction, the original image data for the pixels is converted into display image data composed of bit values for each subfield indicating a bit position, and In accordance with the display image data, processing is performed in a subfield including an address period for selecting a pixel and a display period for causing the selected pixel to emit light based on the bit value for a time corresponding to the weight of the bit position. In the method of performing gradation display,
For each block having a plurality of image data of a predetermined number of rows as a unit, an error between the plurality of original image data and the plurality of display image data in the block is minimized, and a predetermined subfield A step of determining display image data for gradation display so that the bit values of a plurality of consecutive rows within the predetermined number of rows are the same;
In the step, when a plurality of display image data is determined as the display image data for performing the gradation display, one piece is selected from the plurality of display image data according to a selection condition preset for each block. Selecting display image data; and
Simultaneously scanning the plurality of rows of pixels in the address period of the predetermined subfield;
A display method characterized by comprising:

Images