JP2013109921A - Drive circuit for light-emitting element, and light-emitting device and electronic equipment using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stabilize the luminance of a light-emitting element at a scanning operation.SOLUTION: An error amplifier 10, on the basis of an error between the lowest voltage among respective voltages Vto Vof n LED terminals and a predetermined reference voltage V, generates a source current Idepending on the error when the reference voltage Vis higher and generates a sink current Idepending on the error when the reference voltage Vis lower to change a feedback voltage Vgenerated at an FB terminal. The error amplifier 10 is configured to be switched between a first state φ1 where both the source current Iand the sink current Ican be generated and a second state φ2 where only the source current Ican be generated.

Description

  The present invention relates to a drive circuit for a light emitting element.

  In recent years, light-emitting devices using light-emitting elements such as LEDs (light-emitting diodes) have been used as backlights and lighting devices for liquid crystal panels. FIG. 1 is a circuit diagram showing a configuration of a light emitting device studied by the present inventors. The light emitting device 2r includes a plurality of LED strings 6_1 to 6_n, a driving circuit 100r, an output circuit 102, and a host processor 3.

Each LED string 6 includes a plurality of LEDs connected in series. The DC / DC converter 4r boosts the input voltage _VIN and supplies the drive voltage _VOUT to one end of the LED strings 6_1 to 6_n.

The drive circuit 100r includes current sources CS _{1 to} CS _n provided for the LED strings 6_1 to 6_n. Each current source CS _i supplies a drive current I _LEDi corresponding to the target luminance to the corresponding LED string 6 — _i .

A part of the drive circuit 100r and the output circuit 102 constitute a DC / DC converter 4r. The output circuit 102 includes an inductor L1, a switching transistor M1, a rectifier diode D1, an output capacitor C1, resistors R1 and R2, and a detection resistor Rs. The drive circuit 100r adjusts the drive voltage _VOUT by controlling the on / off duty ratio of the switching transistor M1. Specifically, as the lowest voltage of the voltages _V LED1 _{~V LEDn} LED strings 6_1~6_n respective cathode terminals of a plurality of channels is equal to a predetermined reference voltage _{V REF,} the feedback duty ratio of the switching transistor M1 Control.

A phase compensation resistor R _FB and a capacitor C _FB are connected to the feedback terminal (also referred to as FB terminal). The error amplifier 10 is a transconductance amplifier, and the lowest voltage among the cathode terminal voltages V _{LED1 to} V _LEDn amplifies an error of a predetermined reference voltage V _REF , generates a current corresponding to the error, and generates a feedback terminal _FB. A feedback voltage V _FB is generated.

The DC / DC converter control unit 14 includes a pulse modulator 20 and a driver 30.
Pulse modulator 20 receives a feedback voltage _{V FB,} based on the feedback voltage _{V FB,} and generates a pulse signal _{S PWM} for driving the switching transistor M1. The pulse modulator 20 in FIG. 1 is a so-called peak current mode pulse width modulator. Soft start circuit 22, in response to the standby signal from the host processor 3 and generates a soft start voltage V _SS which rises with time. Comparator 24, the detection signal _{V CS} corresponding to the current _{I M} flowing through the switching transistor M1, compared to the low voltage of the feedback voltage _{V FB} and the soft-start voltage _{V SS,} generates an off signal _{S OFF} in accordance with the comparison result To do. The slope compensation circuit 28 superimposes the slope signal _{V SLOPE} the detection signal _{V CS.}

When the off signal S _OFF is asserted, the logic unit 26 transitions the pulse signal S _PWM to a level corresponding to the off state of the switching transistor M1 (hereinafter referred to as an off level). Further, in synchronization with a predetermined clock signal or after a predetermined off time has elapsed, the pulse signal _SPWM is _shifted to a level corresponding to the on state of the switching transistor M1 (hereinafter referred to as an on level). The driver 30 switches the switching transistor M1 based on the pulse signal _SPWM from the logic unit 26.

In such a light emitting device 2r, in order to adjust the luminance of the LED string 6, the drive current I _LED may be subjected to PWM (Pulse Width Modulation) control. Specifically, the host processor 3 generates pulse dimming signals PWM _{1 to} PWM _n having a duty ratio corresponding to the luminance of the LED string 6 of each channel. The current sources CS _{1 to} CS _n of each channel are subjected to switching control based on the corresponding pulse dimming signals PWM _{1 to} PWM _n . Such control is also referred to as burst dimming or burst control.

In the case of performing burst dimming, the potential V _LEDi of the cathode terminal of the LED string 6 of that channel is pulled up to a high level voltage and excluded from the feedback target during the period when the current source CS _i of that channel is turned off. The This is because the cathode terminal V _LEDi of the channel during the extinguishing period takes a level that is unrelated to the state of the load.

JP 2008-186668 A

The LED strings 6_1 to 6_n of a plurality of channels may be driven with a certain phase difference. This is called a scanning operation. The pulse dimming signals PWM _{1 to} PWM _{n at} this time have a certain phase difference.

FIG. 2 is a waveform diagram during the scanning operation of the drive circuit 100r of FIG. In order from the top, pulse dimming signals PWM ₁ , PWM ₂ , PWM ₃ , feedback voltage V _FB , output voltage V _OUT , and total I _LED of drive currents of all channels are shown. n = 3 channels, and the pulse dimming signals PWM ₁ , PWM ₂ , and PWM ₃ are at a high level (lighting period) with a phase difference of 120 °.

Voltage drop of the LED string 6 (forward voltage) _{V F} is varies for each channel. In the waveform diagram of FIG. 2, it is assumed that the relational expression (1) holds among the voltage drop V _{F1 of} the LED string 6_1, the voltage drop V _{F2 of} the LED string 6_2, and the voltage drop V _F3 of the LED string 6_3.
V _F1 > V _F3 > V _F2 (1)

Before time t0, a first channel and a second channel lighting period, feedback is applied as the cathode voltage V _LED1 of the first channel coincides with the reference voltage V _REF.
Period t0-t1, the second channel is a lighting period, feedback is applied as the cathode voltage _{V LED2} of the second channel matches the reference voltage _{V REF.}
Period t1-t2 is the second channel and the third channel lighting period, feedback is applied as the cathode voltage _{V LED 3} of the third channel coincides with the reference voltage _{V REF.}

Further, the following relational expression (2) is established in the channel during the lighting period.
V _OUT = V _F1 + V _LED1 = V _F2 + V _LED2 = V _F3 + V _LED3 (2)

Before time t0, the output voltage _{V OUT} is regulated so that the potential of the cathode terminal LED ₁ of the LED strings 6_1 matches the reference voltage _{V REF.} When the pulse dimming signal PWM ₁ becomes low level at time t0, the first channel is excluded from the feedback target, the second channel is a feedback target.
Since V _F1 > V _F2 holds, the cathode voltage V _LED2 of the LED string 6_2 at time t0 is higher than the reference voltage V _REF . At this time, the error amplifier 10 absorbs (sinks) current so that the cathode voltage V _LED2 matches the reference voltage V _REF , reduces the feedback voltage V _FB, and decreases the output voltage _VOUT .

Subsequently, at time t1, the third channel is in the lighting period. Thus, feedback is applied as the cathode voltage _{V LED 3} of the third channel coincides with the reference voltage _{V REF.}
Since V _F3 > V _F2 holds, the cathode voltage V _LED3 of the LED string 6_3 at time t1 is lower than the reference voltage V _REF . Accordingly, the error amplifier 10 tries to increase the feedback voltage V _FB by discharging current (source) so that the cathode voltage V _LED3 matches the reference voltage V _REF , thereby increasing the output voltage _VOUT .

However, the phase compensation capacitor C _FB and the resistor R _FB are connected to the FB terminal, and the feedback voltage V _FB does not immediately follow the error between the cathode voltage V _LED and the reference voltage V _REF , and changes with a delay. . That is, the output voltage _VOUT continues to decrease without immediately increasing at time t1, and the amount of fluctuation of the output voltage _VOUT increases.
As a result, immediately after time t1, the cathode terminal V _LED3 of the third channel is greatly below the reference voltage V _REF , the drive current I _LED3 generated by the current source CS ₃ is reduced, and the brightness of the LED string 6 is reduced. End up.

In order to solve this problem, it is conceivable to increase the resistance value of the feedback resistor _RFB . However, increasing the resistance _RFB induces other problems such as rush current and coil noise.

  It should be noted that the above consideration should not be regarded as a range of common general knowledge in the field of the present invention. Furthermore, the above-mentioned consideration itself is the first time the present applicant has conceived.

  The present invention has been made in view of such problems, and one of exemplary purposes of an embodiment thereof is to stabilize the luminance of a light emitting element during a scanning operation.

  An embodiment of the present invention controls a DC / DC converter for generating a driving voltage at a first terminal commonly connected to n (n is a natural number) light emitting elements, and drives each of the n light emitting elements. The present invention relates to a driver circuit for supplying current. Each of the drive circuits is provided for each light emitting element, and each of the n drive terminals to be connected to the second terminal of the corresponding light emitting element is provided for each drive terminal. A feedback capacitor is connected to n current sources that receive a pulse dimming signal and supply a driving current to a corresponding light emitting element via a corresponding driving terminal during a period in which the corresponding pulse dimming signal is asserted. Based on the error between the lowest voltage of the feedback terminal and each of the n drive terminals and a predetermined reference voltage, a source current corresponding to the error is generated when the reference voltage is higher. An error amplifier that generates a sink current corresponding to an error when the voltage is low and changes a feedback voltage generated at the feedback terminal, and at least the feedback voltage Based includes a pulse modulator for generating a pulse signal, based on the pulse signal comprises a DC / DC converter control unit for driving the DC / DC converter of a switching transistor. The error amplifier is configured to be able to switch between a first state in which both a source current and a sink current can be generated and a second state in which only the source current can be generated.

During scanning operation, the feedback target is in transition from a large channel voltage drop V _F in a small channel, setting the error amplifier in the second state, no current is drawn from the feedback terminal. That is, the feedback voltage V _FB is stabilized to a level at which the potential of the drive terminal of the channel having the largest voltage drop V _F matches the reference voltage. As a result, it is possible to prevent the feedback voltage from being lowered more than necessary and the output voltage from being lowered during the scanning operation, and the luminance of the light emitting element can be stabilized.

  The error amplifier is connected to a transconductance amplifier that generates a source current and a sink current based on an error between the lowest voltage of each of the n drive terminals and a predetermined reference voltage, and to the output terminal of the transconductance amplifier. A rectifier element having an input terminal, a first input terminal connected to the output terminal of the transconductance amplifier, a second input terminal connected to the output terminal of the rectifier element, and the first input terminal in the first state. And a selector having an output terminal connected to the second input terminal in the second state.

The error amplifier may be in the first state when the feedback voltage is higher than a predetermined threshold voltage.
If the feedback voltage becomes too high, the output voltage becomes high, and the loss and heat generation in the current source increases. Therefore, when the feedback voltage becomes high to a certain extent, the feedback voltage can be lowered by returning the error amplifier to the first state, and loss and heat generation can be reduced.

The error amplifier may be in the first state when the potentials of the drive terminals of all channels become higher than the reference voltage.
A state in which the potentials of the drive terminals of all channels are higher than the reference voltage is not preferable because loss in the current source is large. In this case, by setting the error amplifier to the first state, feedback is applied so that the lowest potential among the plurality of drive terminals matches the reference voltage, and loss can be reduced.

The error amplifier may be in the first state before the soft start operation at the start is completed.
When soft start control is performed at startup, the potential of the drive terminal rises from zero toward the reference voltage. That is, the feedback voltage should be the highest immediately after startup, and then the feedback voltage should decrease. However, when the error amplifier is set to the second state, the feedback voltage continues to maintain the highest level immediately after startup, and thus the output voltage cannot be maintained at the target level. According to this aspect, during the soft start operation, the output voltage can be appropriately raised by setting the error amplifier to the first state.

The error amplifier may be in the first state when an open fault is detected at at least one drive terminal.
If an open failure occurs in a certain channel, that channel is excluded from the feedback target. By setting the error amplifier to the first state, it is possible to optimize the output voltage and the feedback voltage with reference to a channel having a large voltage drop among channels other than the failed channel.

  The error amplifier may be in the first state when the drive current generated by the current source of each channel is smaller than the set value.

The driving circuit of a certain aspect may be integrated on a single semiconductor substrate.
“Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate. By integrating the control circuit as one IC, the circuit area can be reduced and the characteristics of the circuit elements can be kept uniform.

  Another embodiment of the present invention relates to a light emitting device. The light-emitting device controls n (n is a natural number) light-emitting elements, a DC / DC converter output circuit that supplies a driving voltage to one end of n light-emitting elements connected in common, and the DC / DC converter. A driving circuit according to any one of the above-described aspects, which supplies a driving current to each of the n light emitting elements.

  Still another embodiment of the present invention relates to an electronic device or a display device. An electronic device or a display device includes a liquid crystal panel and a light emitting device provided as a backlight of the liquid crystal panel.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  According to an aspect of the present invention, the luminance of the light emitting element during the scanning operation can be stabilized.

It is a circuit diagram which shows the structure of the light-emitting device which this inventor examined. FIG. 2 is a waveform diagram during a scanning operation of the drive circuit of FIG. 1. It is a circuit diagram which shows the structure of the electronic device which concerns on embodiment. It is a circuit diagram which shows the concrete structure of an error amplifier. FIG. 4 is a waveform diagram during a scanning operation of the drive circuit of FIG. 3.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are electrically connected to each other in addition to the case where the member A and the member B are physically directly connected. It includes cases where the connection is indirectly made through other members that do not substantially affect the general connection state, or that do not impair the functions and effects achieved by their combination.
Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as their electric It includes cases where the connection is indirectly made through other members that do not substantially affect the general connection state, or that do not impair the functions and effects achieved by their combination.

  FIG. 3 is a circuit diagram illustrating a configuration of the electronic apparatus 1 according to the embodiment. The electronic device 1 is a battery-driven device such as a notebook PC, a digital camera, a digital video camera, a mobile phone terminal, a PDA (Personal Digital Assistant), a portable audio player, etc., and includes a light emitting device 2, a host processor 3, an LCD (Liquid Crystal Display) panel 5 etc. are provided. The light emitting device 2 is provided as a backlight of the LCD panel 5. The host processor 3 is an IC (Integrated Circuit) that controls the entire electronic device 1.

The light emitting device 2 mainly includes n-channel LED strings 6_1 to 6_n, a drive circuit 100, and an output circuit 102. A part of the drive circuit 100 and the output circuit 102 form a DC / DC converter 4 that boosts the input voltage _VIN and supplies the drive voltage _VOUT to one end (anode) connected to the LED string 6 in common.

The output circuit 102 includes an inductor L1, a switching transistor M1, a rectifier diode D1, an output capacitor C1, resistors R1 and R2, and a detection resistor Rs. Since the topology of the output circuit 102 is general, the description thereof is omitted. The gate of the switching transistor M1 is connected to the output terminal (OUT terminal), and the detection signal V _CS generated in the detection resistor Rs is input to the current detection terminal (CS terminal).

The drive circuit 100 adjusts the drive voltage _VOUT by controlling the on / off duty ratio of the switching transistor M1. Specifically, as the lowest voltage of the voltages _V LED1 _{~V LEDn} LED strings 6_1~6_n respective cathode terminals of a plurality of channels is equal to a predetermined reference voltage _{V REF,} the feedback duty ratio of the switching transistor M1 Control.

The drive circuit 100 is a functional IC integrated on one or a plurality of semiconductor substrates, and is driven to a first terminal (anode) commonly connected to n (n is a natural number) LED strings 6_1 to 6_n. controls the supply DC / DC converter 4 a voltage _{V OUT,} supplies a drive current _I LED1 _{~I LEDn} each n-number of LED strings 6_1～6_N. “Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate. Alternatively, the drive circuit 100 may be divided into a plurality of semiconductor substrates.

The drive circuit 100 includes n drive terminals LED _{1 to} LED _n (hereinafter also referred to as LED terminals), n current sources CS _{1 to} CS _n , an error amplifier 10, a logic gate 12, a feedback terminal FB (hereinafter referred to as FB). A DC / DC converter controller 14, a first switch SW1, and a second switch SW2.

The n LED terminals LED _{1 to} LED _n are respectively provided for the LED strings 6_1 to 6_n, and the i-th LED terminal LED _i is connected to the second terminal (cathode) of the corresponding LED string 6_i.

n current source _CS 1 to CS _n, respectively are provided for each LED terminal _LED 1 _{~LED n.} i-th current source CS _i receives the corresponding pulse dimming signal PWM _i, period corresponding pulse dimming signal PWM _i is asserted (high level in this embodiment), the corresponding LED terminal LED _i Then, the drive current I _LEDi is supplied to the corresponding LED string 6_i.

The error amplifier 10 amplifies the lowest voltage of the n LED terminal _LED 1 ～LED _n respective voltages _V LED1 _{~V LEDn,} an error between a predetermined reference voltage _{V REF.} A phase compensation feedback capacitor C _FB and a feedback resistor R _FB are provided in series between the FB terminal and an external ground terminal. The error amplifier 10 generates a source current I _SRC corresponding to the error when the reference voltage V _REF is higher, based on the error between the lowest cathode voltage V _LED and the predetermined reference voltage V _REF , and the reference voltage V _REF it is to generate the sink current I _sINK corresponding to the error when low, changes the feedback voltage V _FB generated to the FB terminal.

The logic gate 12 generates an all-channel off signal (hereinafter also referred to as a PWM_ALL_L signal) based on the _n pulse dimming signals PWM _{1 to} PWM _n . The PWM_ALL_L signal is asserted when the pulse dimming signals PWM _{1 to} PWM _{n of} all the channels are negated (low level in the present embodiment). For example, the logic gate 12 includes a NOR gate that generates a negative logical sum of _n pulse dimming signals PWM _{1 to} PWM _n .

  The first switch SW1 and the second switch SW2 are in the off state during the period when the PWM_ALL_L signal is asserted.

Resistors R1 and R2 of the output circuit 102 divide the drive voltage V _OUT to generate a detection voltage V _OUT ′. The detection voltage V _OUT ′ is input to an OVP (overvoltage protection) terminal of the drive circuit 100.

The DC / DC converter control unit 14 includes a pulse modulator 20 and a driver 30. The pulse modulator 20 generates a pulse signal S _PWM based on at least the feedback voltage V _FB . Pulse modulator 20, when the PWM_ALL_L signal is negated, based on the pulse signal _{S PWM,} and drives the switching transistor M1 of the DC / DC converter 4.
The pulse modulator 20 stops driving the switching transistor M1 when the PWM_ALL_L signal is asserted.

  The pulse modulator 20 is a peak current mode modulator, and includes a soft start circuit 22, a comparator 24, a logic unit 26, a slope compensation circuit 28, and a driver 30. The configuration and operation of the pulse modulator 20 are as described with reference to FIG.

Soft start circuit 22 is responsive to the standby signal from the host processor 3 and generates a soft start voltage V _SS which rises with time. When the transition of the soft-start voltage _{V SS} is completed, the soft start end signal (SS_END signal) is asserted.

Comparator 24, the detection signal _{V CS} corresponding to the current _{I M} flowing through the switching transistor M1, compared to the low voltage of the feedback voltage _{V FB} and the soft-start voltage _{V SS,} generates an off signal _{S OFF} in accordance with the comparison result To do. The slope compensation circuit 28 superimposes the slope signal _{V SLOPE} the detection signal _{V CS.}

When the off signal S _OFF is asserted, the logic unit 26 transitions the pulse signal S _PWM to a level corresponding to the off state of the switching transistor M1 (hereinafter referred to as an off level). Further, in synchronization with a predetermined clock signal or after a predetermined off time has elapsed, the pulse signal _SPWM is _shifted to a level corresponding to the on state of the switching transistor M1 (hereinafter referred to as an on level).

The driver 30 switches the switching transistor M1 based on the pulse signal _SPWM from the logic unit 26.

The error amplifier 10 includes a source current _{I SRC} and sink current _{I SINK} first state φ1 both capable of generating of the second state φ2 can be generated only source current _{I SRC,} is switchably configured. The error amplifier 10 increases the feedback voltage V _FB in the first state .phi.1, can be reduced, although it is possible to raise the second state φ2 at the feedback voltage V _FB, it can not be lowered.

FIG. 4 is a circuit diagram showing a specific configuration of the error amplifier 10. The error amplifier 10 includes a transconductance (gm) amplifier 11, a rectifier element D11, a selector SEL1, and a control unit 13.
gm amplifier 11, based on the lowest voltage and the error of a predetermined reference voltage _{V REF} of n of each LED terminal voltages _V LED1 _{~V LEDn,} generates the source current _{I SRC} and the sink current _{I SINK.} The input terminal of the rectifier element D11 is connected to the output terminal of the gm amplifier 11. For example, the rectifying element D11 is a diode, and the anode is connected to the output terminal of the gm amplifier. The first input terminal P1 of the selector SEL1 is connected to the output terminal of the gm amplifier 11, and the second input terminal P2 is connected to the output terminal (cathode) of the rectifier element D11. The output terminal P3 of the selector SEL1 is connected to the first input terminal P1 in the first state φ1, and is connected to the second input terminal P2 in the second state φ2.

  The control unit 13 switches between the first state φ1 and the second state φ2 according to the state of the drive circuit 100 and the LED string 6.

  The control unit 13 normally operates the error amplifier 10 in the second state φ2, and if any abnormality occurs in the driving of the LED string 6 or the loss of the current source becomes large, the error amplifier 10 is set in the first state. Set to φ1.

For example, the control unit determines that it is abnormal when at least one of the following conditions (a) to (e) is satisfied, sets the error amplifier 10 to the first state φ1, and otherwise sets the error amplifier 10 to the first state φ1. Two states are assumed to be φ2.
(A) When feedback voltage V _FB is higher than a predetermined threshold voltage V _TH1 (b) Before completion of soft start operation at start-up (c) Potentials V _{LED1 to} V _LEDn of LED terminals of all channels are reference voltages When it becomes higher than V _REF (d) When an open failure is detected at at least one LED terminal (e) The drive currents I _{LED1 to} I _LEDn generated by the current sources CS _{1 to} CS _{n of} each channel are set values When smaller than

The control unit 13 receives flag signals (status signals) FB_CMP, SS_END, LED_ALL_H, LED_OPEN, and ILED_OK corresponding to the conditions (a) to (e).
The FB_CMP signal corresponds to the condition (a). The comparator 15 compares the feedback voltage V _FB with a predetermined threshold voltage V _TH1 and generates an FB_CMP signal that is asserted when V _FB > V _TH1 .
The SS_END signal corresponds to the condition (b), is asserted when the soft start is completed, and is negated during the soft start period. The SS_END signal is output from the soft start circuit 22 of FIG.

The LED_ALL_H signal corresponds to the condition (c), and is asserted when the potentials V _{LED1 to} V _LEDn of the LED terminals of all the channels become higher than the reference voltage V _REF . The LED_ALL_H signal, a reference voltage _{V REF,} can be generated by the comparator for comparing the lowest voltage among the voltages _V LED1 _{~V LEDn} the LED terminals. Note that a threshold voltage V _TH2 higher than the reference voltage V _REF may be input to the comparator 17.

The LED_OPEN signal corresponds to the condition (d) and is asserted when an open failure is detected in any channel. The open failure detection means is not particularly limited, and a known technique may be used. For example, an open failure can be detected by comparing the voltage V _LED at the LED terminal with a predetermined threshold voltage VTH3.

The ILED_OK signal corresponds to the condition (e) and is asserted when the drive currents I _{LED1 to} I _LEDn generated by the current sources CS _{1 to} CS _{n of} all the channels have the set value, and any channel drive current I _LED of is negated when less than the set value.

  In addition, since satisfying the conditions (d) and (e) indicates that the circuit is abnormal, in the present embodiment, these conditions are considered in the state control of the control unit 13. However, in practice, the error amplifier 10 performs a source operation at the time of an open failure or when the drive current is insufficient, so the conditions (d) and (e) may be excluded.

  The control unit 13 includes a logic gate OR1 that generates a logical sum CNT of the SS_END signal, the signal #SS_END obtained by inverting the ILED_OK signal, and the #ILED_OK signal, and the other LED_OPEN signal, FB_CMP signal, and LED_ALL_H signal. When at least one of the conditions (a) to (e) is satisfied, the logical sum CNT becomes high level, the selector SEL1 becomes the first state φ1, otherwise the logical sum CNT becomes low level, and the selector SEL1 The state becomes φ2.

The above is the configuration of the driving circuit 100 according to the embodiment. Next, the operation will be described. FIG. 5 is a waveform diagram during the scanning operation of the drive circuit 100 of FIG. In order from the top, pulse dimming signals PWM ₁ , PWM ₂ , PWM ₃ , feedback voltage V _FB , output voltage V _OUT , and total I _LED of drive currents of all channels are shown. As in FIG. 2, n = 3 channels, and the pulse dimming signals PWM ₁ , PWM ₂ , and PWM ₃ are at a high level (lighting period) with a phase difference of 120 °. Further, it is assumed that the relational expression (1) holds as in FIG.
V _F1 > V _F3 > V _F2 (1)

Error amplifier 10 is set to the second state φ2. Before time t0, a first channel and a second channel lighting period, feedback is applied as the cathode voltage V _LED1 of the first channel coincides with the reference voltage V _REF.
Before time t0, the output voltage _{V OUT} is regulated so that the potential of the cathode terminal LED ₁ of the LED strings 6_1 matches the reference voltage _{V REF.} When the pulse dimming signal PWM ₁ becomes low level at time t0, the first channel is excluded from the feedback target, the second channel is a feedback target.

Since V _F1 > V _F2 holds, the cathode voltage V _LED2 of the LED string 6_2 at time t0 is higher than the reference voltage V _REF . In the drive circuit 100r of FIG. 1, the error amplifier 10 sucks current so that the cathode voltage V _LED2 matches the reference voltage V _REF and the feedback voltage V _FB decreases. since 10 is in the second state .phi.2, it does not flow sink current _{I sINK,} thus the feedback voltage _{V FB} does not decrease, the time t0 to maintain the previous level.

Subsequently, at time t1, the third channel is in the lighting period. Thus, feedback is applied as the cathode voltage _{V LED 3} of the third channel coincides with the reference voltage _{V REF.} However, since the error amplifier 10 can not generate a sink current _{I SINK,} the feedback voltage _{V FB} does not drop to maintain the original level.
The above is the operation of the drive circuit 100.

According to the drive circuit 100, during the scanning operation, when the feedback target is changed from a large channel voltage drop V _F in a small channel, by setting the error amplifier 10 to the second state .phi.2, FB terminal No current is drawn from the. That is, the feedback voltage V _FB is stabilized to a level at which the potential V _LED1 of the LED terminal of the channel (first channel in FIG. 5) having the largest voltage drop V _F and the reference voltage V _REF coincide.

As a result, as shown in FIG. 5, it is possible to prevent the feedback voltage _VFB from being lowered more than necessary and the output voltage _{VOUT from} being lowered during the scanning operation, and the brightness of the LED string 6 can be stabilized.

  Further, the error amplifier 10 sets the error amplifier 10 to the first state φ1 as necessary. As a result, it is possible to prevent troubles in driving the LED string 6 or increase in the loss of the current source.

For example, when the feedback voltage V _FB becomes too high, the output voltage _VOUT becomes high, and loss and heat generation in the current source CS increase. When the feedback voltage V _FB becomes high to some extent according to the condition (a), the feedback voltage V _FB can be lowered by returning the error amplifier 10 to the first state φ1, and loss and heat generation can be reduced. .

Further, a state in which the potentials V _{LED1 to} V _LEDn of the LED terminals of all channels are higher than the reference voltage V _REF is not preferable because the loss in the current source CS is large. Therefore, by setting the error amplifier 10 to the first state φ1 according to the condition (b), feedback is applied so that the lowest potential among the plurality of LED terminals matches the reference voltage V _REF, and loss can be reduced.

When soft start control is performed at the time of startup, the potential V _{LED at the} LED terminal increases from zero toward the reference voltage V _REF . That is, the feedback voltage V _FB should be the highest immediately after startup, and then the feedback voltage V _FB should decrease. However, if the error amplifier 10 is set to the second state φ2 at the time of soft start, the feedback voltage V _FB continues to maintain the highest level immediately after startup, and thus the output voltage _VOUT cannot be maintained at the target level. . Therefore, during the soft start operation according to the condition (c), the output voltage _VOUT can be appropriately raised by setting the error amplifier 10 to the first state φ1.

When an open failure occurs in a certain channel, that channel is excluded from the feedback target. At this time, by setting the error amplifier 10 to the first state φ1, the output voltage V _OUT and the feedback voltage V _FB are optimized with reference to a channel having a large voltage drop V _F among the channels other than the failed channel. be able to.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and various modifications may exist in each of those constituent elements, each processing process, and a combination thereof. Hereinafter, such modifications will be described.

The configuration of the error amplifier 10 capable of switching between the first state φ1 and the second state φ2 is not limited to that of FIG. A general gm amplifier has a push-pull type output stage composed of a high-side transistor and a low-side transistor. The output current I _OUT of the gm amplifier, a current I _H flowing through the high-side transistor of the output stage is given by the difference between the current I _L flowing through the low-side transistor.
I _OUT = I _H −I _L
And the sink current _{I SINK} when the output current _{I OUT} is the source current _{I SRC} next when positive, negative.

That is, the second state φ2 can be realized by changing the configuration of the gm amplifier so that I _H > I _L is satisfied. This can be realized by changing the bias state of at least one of the high-side transistor and the low-side transistor of the gm amplifier, or changing the size of the high-side transistor and the low-side transistor.

  Although the pulse modulator 20 in the peak current mode has been described in the embodiment, the pulse modulator 20 may be in an average current mode or a voltage mode.

  In the embodiment, a non-insulated DC / DC converter using an inductor has been described. However, the present invention can also be applied to an isolated DC / DC converter using a transformer.

  In the embodiment, an electronic apparatus has been described as an application of the light emitting device 2, but the application is not particularly limited and can be used for lighting or the like.

  In the present embodiment, the setting of the high level and low level logic signals is merely an example, and can be freely changed by appropriately inverting it with an inverter or the like.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are permitted without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 1 ... Electronic device, 2 ... Light-emitting device, 3 ... Host processor, 4 ... DC / DC converter, 5 ... LCD panel, 6 ... LED string, 100 ... Drive circuit, 102 ... Output circuit, 10 ... Error amplifier, 11 ... gm Amplifier 12, logic gate 14, DC / DC converter control unit 20, pulse modulator 22, soft start circuit 24, comparator 26, logic unit 28, slope compensation circuit 30, driver L 1, inductor , C1 ... output capacitor, D1 ... rectifier diode, M1 ... switching transistor.

Claims (10)

A driving circuit that controls a DC / DC converter for generating a driving voltage at a first terminal commonly connected to n (n is a natural number) light emitting elements and supplies a driving current to each of the n light emitting elements. Because
N drive terminals, each of which is provided for each of the light emitting elements, each of which should be connected to a second terminal of the corresponding light emitting element;
Each is provided for each drive terminal, each receives a corresponding pulse dimming signal, and during the period when the corresponding pulse dimming signal is asserted, a driving current is supplied to the corresponding light emitting element via the corresponding driving terminal. N current sources to be supplied;
A feedback terminal to which a feedback capacitor is connected;
Based on the error between the lowest voltage of the n drive terminals and a predetermined reference voltage, a source current corresponding to the error is generated when the reference voltage is higher, and the reference voltage is An error amplifier that generates a sink current corresponding to the error when low and changes a feedback voltage generated at a feedback terminal;
A DC / DC converter control unit that includes a pulse modulator that generates at least a pulse signal based on the feedback voltage, and drives a switching transistor of the DC / DC converter based on the pulse signal;
With
The error amplifier is configured to be able to switch between a first state in which both the source current and the sink current can be generated and a second state in which only the source current can be generated. The error amplifier is
A transconductance amplifier that generates the source current and the sink current based on an error between the lowest voltage among the voltages of the n drive terminals and a predetermined reference voltage;
A rectifying element having an input terminal connected to the output terminal of the transconductance amplifier;
A first input terminal connected to the output terminal of the transconductance amplifier; a second input terminal connected to the output terminal of the rectifying element; and the first input terminal in the first state; A selector having an output terminal connected to the second input terminal in a state;
The drive circuit according to claim 1, comprising:   3. The drive circuit according to claim 1, wherein the error amplifier enters the first state when the feedback voltage is higher than a predetermined threshold voltage. 4.   4. The drive circuit according to claim 1, wherein the error amplifier enters the first state before completion of a soft start operation at startup. 5.   5. The drive circuit according to claim 1, wherein the error amplifier enters the first state when potentials of drive terminals of all channels become higher than the reference voltage. 6.   6. The drive circuit according to claim 1, wherein the error amplifier enters the first state when an open failure is detected at at least one drive terminal.   6. The drive circuit according to claim 1, wherein the error amplifier enters the first state when a drive current generated by a current source of each channel is smaller than a set value.   8. The drive circuit according to claim 1, wherein the drive circuit is integrated on a single semiconductor substrate. n light emitting elements (n is a natural number);
An output circuit of a DC / DC converter that supplies a driving voltage to one end of the n light emitting elements connected in common;
9. The drive circuit according to claim 1, wherein the drive circuit controls the DC / DC converter and supplies a drive current to each of the n light emitting elements.
A light emitting device comprising: LCD panel,
The light emitting device according to claim 9 provided as a backlight of the liquid crystal panel;
An electronic device comprising:

Images