JP2013102005A - Method of manufacturing semiconductor device, semiconductor device, and manufacturing jig for semiconductor device - Google Patents

Method of manufacturing semiconductor device, semiconductor device, and manufacturing jig for semiconductor device Download PDF

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JP2013102005A
JP2013102005A JP2011243981A JP2011243981A JP2013102005A JP 2013102005 A JP2013102005 A JP 2013102005A JP 2011243981 A JP2011243981 A JP 2011243981A JP 2011243981 A JP2011243981 A JP 2011243981A JP 2013102005 A JP2013102005 A JP 2013102005A
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semiconductor device
connector
long connector
manufacturing
lead frame
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JP5820696B2 (en
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Ryokei Suzuki
亮兄 鈴木
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Shindengen Electric Manufacturing Co Ltd
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Shindengen Electric Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/40139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous strap daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

PROBLEM TO BE SOLVED: To maintain a proper interval between a long connection member and respective semiconductor chips by preventing deflection of the long connection member in a case where a plurality of the semiconductor chips arrayed in a straight line are commonly connected with the long connection member by soldering.SOLUTION: A long connection member 110 has a projection part 114 on a lower surface side of an extension part 150 that is formed by extending a connection plate part 113 of the long connection member 110 beyond a semiconductor chip 133 positioned on the side of a tip end of the long connection member 110. A pedestal 200 has a projection abutment part 210 with which the projection part 114 of the long connection member 110 is caused to abut, on a lead frame placement surface 200a on which a lead frame 120 is placed. Using the long connection member and the pedestal, under a condition in which the lead frame 120 is placed on the pedestal 200 such that the projection part 114 of the long connection member 110 abuts with the projection abutment part 210 of the pedestal 200, respective upper surfaces of semiconductor chips 131-133 are soldered to a lower surface of the connection plate part 113 of the long connection member 110.

Description

本発明は、複数の半導体チップを１つの長尺接続子によって接続している内部接続構造を有する半導体装置の製造方法、当該半導体装置の製造方法によって製造された半導体装置及び前記半導体装置の製造方法に用いるための半導体装置の製造用治具に関する。   The present invention relates to a method of manufacturing a semiconductor device having an internal connection structure in which a plurality of semiconductor chips are connected by one long connector, a semiconductor device manufactured by the method of manufacturing the semiconductor device, and a method of manufacturing the semiconductor device The present invention relates to a semiconductor device manufacturing jig for use in manufacturing.

複数の半導体チップを１つの接続子によって接続することは従来から行われている（例えば、特許文献１参照。）。   Conventionally, a plurality of semiconductor chips are connected by a single connector (see, for example, Patent Document 1).

図９は、特許文献１に開示されている半導体装置の内部接続構造の一例を説明するために示す図である。特許文献１に開示されている半導体装置の内部接続構造は、図９に示すように、ダイパッド８１１、８１２，８１３に搭載されている半導体チップ８２１，８２２，８２３を、１つの接続子８３０によって共通接続するような内部接続構造となっており、このような内部接続構造において、半導体チップ８２１，８２２，８２３の配列方向と、接続子８３０の延出方向とが交差するような内部接続構造となっている。この場合、半導体チップ８２１，８２２，８２３の配列方向はｘ軸に沿った方向であり、接続子８３０の延出方向はｙ軸に沿った方向であるため、両者は直交関係にある。   FIG. 9 is a diagram shown for explaining an example of the internal connection structure of the semiconductor device disclosed in Patent Document 1. In FIG. As shown in FIG. 9, the internal connection structure of the semiconductor device disclosed in Patent Document 1 is common to the semiconductor chips 821, 822, and 823 mounted on the die pads 811, 812, and 813 by one connector 830. In such an internal connection structure, the internal connection structure is such that the arrangement direction of the semiconductor chips 821, 822, and 823 and the extending direction of the connector 830 intersect. ing. In this case, since the arrangement direction of the semiconductor chips 821, 822, and 823 is the direction along the x-axis, and the extending direction of the connector 830 is the direction along the y-axis, they are orthogonal to each other.

複数の半導体チップを１つの接続子で接続する場合、図９に示すような内部接続構造とすることにより、複数の半導体チップを安定した状態で接続することができる。なお、図９においては、接続子８３０は、リードフレームのコネクタ部８４０に接続子８３０の基端部８５０のみが支持された状態となっている。このように、リードフレームのコネクタ部に基端部のみが支持された状態で当該リードフレームに取り付けられている接続子を、「片側支持の接続子」と呼ぶことにする。   When a plurality of semiconductor chips are connected with one connector, the plurality of semiconductor chips can be stably connected by adopting an internal connection structure as shown in FIG. In FIG. 9, the connector 830 is in a state where only the base end portion 850 of the connector 830 is supported by the connector portion 840 of the lead frame. In this way, a connector attached to the lead frame in a state where only the base end portion is supported by the connector portion of the lead frame is referred to as a “one-side supported connector”.

特開２０１１−１９８９２９号公報JP 2011-198929 A

特許文献１に開示されている半導体装置の内部接続構造においては、複数の半導体チップ８２１，８２２，８２３の配列方向と接続子８３０の延出方向とが交差するように接続子８３０を配置して、当該接続子８３０によって複数の半導体チップ８２１，８２２，８２３を共通接続しているが、半導体装置の種類によっては、片側支持の接続子を複数の半導体の配列方向に沿うように配置して、当該接続子によって複数の半導体チップを共通接続するような内部接続構造を採用するものもある。この場合の接続子は、複数の半導体の配列方向に沿うように配置されるため、長尺の接続子（長尺接続子という。）が用いられる。   In the internal connection structure of the semiconductor device disclosed in Patent Document 1, the connector 830 is arranged so that the arrangement direction of the plurality of semiconductor chips 821, 822, 823 and the extending direction of the connector 830 intersect. The plurality of semiconductor chips 821, 822, and 823 are commonly connected by the connector 830, but depending on the type of the semiconductor device, the one-side support connector is arranged along the arrangement direction of the plurality of semiconductors, Some of the connectors employ an internal connection structure in which a plurality of semiconductor chips are connected in common. Since the connector in this case is arranged along the arrangement direction of the plurality of semiconductors, a long connector (referred to as a long connector) is used.

図１０は、長尺接続子によって複数の半導体チップを共通接続するような半導体装置９００の内部接続構造について説明するために示す図である。なお、図１０は半導体装置９００の内部接続構造を側断面図として示している。なお、半導体装置９００において用いられている長尺接続子９１０は、全体的には、細長い薄板状をなしており、図１０に示すように、基端部９１１と、立ち上がり部９１２と、接続板部９１３とを有している。また、当該長尺接続子９１０は、基端部９１１がリードフレーム９２０のコネクタ部９２５に固定されている「片側支持の長尺接続子」である。   FIG. 10 is a diagram for explaining an internal connection structure of a semiconductor device 900 in which a plurality of semiconductor chips are commonly connected by a long connector. FIG. 10 shows the internal connection structure of the semiconductor device 900 as a side sectional view. The long connector 910 used in the semiconductor device 900 has an elongated thin plate shape as a whole. As shown in FIG. 10, the base end portion 911, the rising portion 912, and the connection plate Part 913. The long connector 910 is a “one-side supported long connector” in which the base end portion 911 is fixed to the connector portion 925 of the lead frame 920.

半導体装置９００の内部接続構造は、このような長尺接続子９１０によって、リードフレーム９２０のダイパッド９２１、９２２，９２３にｘ軸に沿って配列された複数（３個とする。）の半導体チップ９３１，９３２，９３３を共通接続している。
また、長尺接続子９１０の接続板部９１３と各半導体チップ９３１，９３２，９３３とは半田付けによって接続され、長尺接続子８１０の接続板部９１３の下面と各半導体チップ９３１，９３２，９３３の上面との間には半田層９５０が形成されている。なお、以下では、「長尺接続子９１０の接続板部９１３と各半導体チップ９３１，９３２，９３３とを半田付する」というような表記を行う場合、「接続板部」を省略して、「長尺接続子と各半導体チップとを半田付けする」というように表記する場合もある。 The internal connection structure of the semiconductor device 900 has a plurality (three) of semiconductor chips 931 arranged along the x-axis on the die pads 921, 922, and 923 of the lead frame 920 by such a long connector 910. 932, 933 are commonly connected.
The connection plate portion 913 of the long connector 910 and the semiconductor chips 931, 932, 933 are connected by soldering, and the lower surface of the connection plate portion 913 of the long connector 810 and the semiconductor chips 931, 932, 933 are connected. A solder layer 950 is formed between the upper surface and the upper surface. In the following, when a notation such as “soldering the connection plate portion 913 of the long connector 910 and the respective semiconductor chips 931, 932, 933” is performed, the “connection plate portion” is omitted, and “ In some cases, the long connector and each semiconductor chip are soldered.

なお、基端部９１１を延長した基端部延長線（図１０における破線で示す。）と接続板部９１３とは平行となっている。また、長尺接続子９１０の接続板部９１３の長さＬ０は、図１０に示すように、３個の半導体チップ９３１，９３２，９３３を共通接続したときに、長尺接続子９１０の先端部９１０ａが、当該長尺接続子９１０の先端部９１０ａ側に位置する半導体チップ９３３を覆うことができる程度の長さとしている。   In addition, the base end part extension line (it shows with the broken line in FIG. 10) which extended the base end part 911, and the connection board part 913 are parallel. Further, the length L0 of the connection plate portion 913 of the long connector 910 is such that the tip of the long connector 910 is obtained when three semiconductor chips 931, 932, and 933 are connected in common as shown in FIG. 910a has a length that can cover the semiconductor chip 933 located on the distal end portion 910a side of the long connector 910.

このような片側支持の長尺接続子９１０を用いて、図１０に示すように、３個の半導体チップ９３１，９３２，９３３を共通接続する場合、長尺接続子９１０の先端部９１０ａ側に位置する半導体チップほど、長尺接続子９１０の接続板部９１３の撓みによる当該接続板部９１３の重みが半導体チップに加わる。特に、長尺接続子９１０の最も先端側に位置する半導体チップ９３３においては、接続板部９１３の撓みがより大きくなり、当該接続板部９１３の重みが半導体チップ９３３に加わる。   When the three semiconductor chips 931, 932, and 933 are commonly connected using such a one-side supported long connector 910, as shown in FIG. 10, the long connector 910 is positioned on the distal end portion 910a side. The weight of the connection plate portion 913 due to the bending of the connection plate portion 913 of the long connector 910 is applied to the semiconductor chip as the semiconductor chip is made. In particular, in the semiconductor chip 933 located on the most distal end side of the long connector 910, the bending of the connection plate portion 913 becomes larger, and the weight of the connection plate portion 913 is applied to the semiconductor chip 933.

このため、半導体チップ９３３と長尺接続子９１０の接続板部９１３との間隔ｔ２は、適正間隔（半導体チップ９３１と長尺接続子９１０の接続板部９１３との間隔ｔ１とする。）に比べて小さくなり、半導体チップ９３３に形成される半田層９５０が押し潰されて、半田が半導体チップ９３３の外周に回り込むことがある。その結果、図示しない他の部品や配線との絶縁距離が不足して短絡などが生じるおそれがある。また、半田層９５０の厚みが薄くなると、温度サイクルなどによる耐候性が劣化するといった課題が生じる。   For this reason, the interval t2 between the semiconductor chip 933 and the connection plate portion 913 of the long connector 910 is compared to an appropriate interval (the interval t1 between the semiconductor chip 931 and the connection plate portion 913 of the long connector 910). The solder layer 950 formed on the semiconductor chip 933 may be crushed and the solder may wrap around the outer periphery of the semiconductor chip 933. As a result, there is a possibility that a short circuit or the like may occur due to insufficient insulation distance from other parts and wiring not shown. Further, when the thickness of the solder layer 950 is reduced, there arises a problem that weather resistance due to a temperature cycle or the like is deteriorated.

本発明は、片側支持の長尺接続子を用いて直線上に配列された複数の半導体チップを半田付けにより共通接続する場合において、長尺接続子の接続板部の撓みを防止して当該長尺接続子の接続板部と各半導体チップとの間隔を適正間隔に保持することにより、長尺接続子と各半導体チップとの間の半田付けの状態を適切な状態とすることができる半導体装置の製造方法を提供することを目的とする。また、このような半導体装置の製造方法によって半導体装置を製造することにより、長尺接続子と各半導体チップとの間の半田付けの状態が適切な状態に保持されている半導体装置を提供することを目的とする。また、このような半導体装置の製造方法に用いるための半導体装置の製造用治具を提供することを目的とする。   In the case where a plurality of semiconductor chips arranged in a straight line are commonly connected by soldering using a single-side supported long connector, the present invention prevents the connection plate portion of the long connector from being bent. A semiconductor device capable of bringing the soldering state between the long connector and each semiconductor chip into an appropriate state by maintaining the distance between the connecting plate portion of the long connector and each semiconductor chip at an appropriate interval. It aims at providing the manufacturing method of. Further, by providing a semiconductor device by such a method for manufacturing a semiconductor device, a semiconductor device in which the state of soldering between the long connector and each semiconductor chip is maintained in an appropriate state is provided. With the goal. It is another object of the present invention to provide a semiconductor device manufacturing jig for use in such a method of manufacturing a semiconductor device.

［１］本発明の半導体装置の製造方法は、複数の半導体チップが直線上に沿った配列となるように前記複数の半導体チップを個々の半導体チップごとに搭載する複数のダイパッドを有するとともに、前記ダイパッドとは離隔した位置でかつ前記複数の半導体チップの配列方向に沿った位置に設けられるコネクタ部を有するリードフレームと、前記コネクタ部に基端部が固定され、前記基端部とは反対側の先端部と前記基端部との間の接続板部で前記複数の半導体素子を共通接続する長尺接続子とを備え、前記複数の半導体チップの各上面と前記長尺接続子の前記接続板部の下面とが半田付けによって接続されている内部接続構造を有する半導体装置の製造方法であって、前記長尺接続子として、前記接続板部を前記複数の半導体チップのうち当該長尺接続子の先端部の側に位置する半導体チップよりもさらに先方にまで延長することによって形成された延長部を有するとともに、前記延長部の下面に下方向に突出する突起部を有する長尺接続子を準備する工程と、前記リードフレームを当該リードフレームの下面側から支持するようにして載置するリードフレーム載置面を有するとともに、当該リードフレーム載置面に、前記長尺接続子の突起部を当接させるための突起当接部を有する台座を準備する工程と、前記長尺接続子の突起部を前記台座の突起当接部に当接させるように前記リードフレームを前記台座に載置した状態で前記複数の半導体チップの各上面と前記長尺接続子の前記接続板部の下面とを半田付けする工程とを有し、前記長尺接続子の突起部の高さ及び前記台座の突起当接部は、前記長尺接続子の突起部を前記台座の突起当接部に当接させるように前記リードフレームを前記台座に載置した状態としたときに、前記各半導体チップの各上面を結ぶ平面と前記長尺接続子の前記接続板部の下面とが平行となるように前記長尺接続子の突起部の突出長さ及び前記台座の突起当接部の高さが設定されていることを特徴とする。   [1] A method of manufacturing a semiconductor device according to the present invention includes a plurality of die pads for mounting the plurality of semiconductor chips for each semiconductor chip so that the plurality of semiconductor chips are arranged along a straight line. A lead frame having a connector portion provided at a position separated from the die pad and along the arrangement direction of the plurality of semiconductor chips, and a base end portion fixed to the connector portion, opposite to the base end portion A long connector that commonly connects the plurality of semiconductor elements at a connecting plate portion between the distal end portion and the base end portion, and the connection between each upper surface of the plurality of semiconductor chips and the long connector. A method of manufacturing a semiconductor device having an internal connection structure in which a lower surface of a plate portion is connected by soldering, wherein the connection plate portion is used as the long connector among the plurality of semiconductor chips. A length having an extension formed by extending further forward than the semiconductor chip located on the tip side of the long connector, and a protrusion protruding downward on the lower surface of the extension And a lead frame mounting surface for mounting the lead frame so as to support the lead frame from the lower surface side of the lead frame, and the long connector on the lead frame mounting surface. A step of preparing a pedestal having a protrusion abutting part for abutting the protruding part of the long connector, and the lead frame to the pedestal so as to abut the protruding part of the elongated connector against the protrusion abutting part of the pedestal Soldering the upper surface of each of the plurality of semiconductor chips and the lower surface of the connection plate portion of the long connector in a state of being placed on the height of the protrusion of the long connector, and Of the pedestal When the lead frame is placed on the pedestal so that the protruding portion of the long connector contacts the protruding contact portion of the pedestal, The protruding length of the protrusion of the long connector and the height of the protrusion contact portion of the pedestal are set so that the plane connecting the upper surface and the lower surface of the connecting plate portion of the long connector are parallel to each other. It is characterized by.

［２］本発明の半導体装置の製造方法においては、前記長尺接続子の突起部は、当該長尺接続子を下面側から見たときの形状が前記接続板部の幅方向に大きく、前記接続板部の長手方向に小さい細長形状をなしていることが好ましい。   [2] In the method for manufacturing a semiconductor device of the present invention, the protrusion of the long connector has a large shape in the width direction of the connection plate when the long connector is viewed from the lower surface side. It is preferable that the connecting plate portion has a small elongated shape in the longitudinal direction.

［３］本発明の半導体装置の製造方法においては、前記突起部における前記接続板部の幅方向の寸法は、前記接続板部の幅方向と同等又は当該接続板部の幅方向よりもわずかに短い長さとすることが好ましい。   [3] In the method for manufacturing a semiconductor device according to the present invention, the dimension in the width direction of the connection plate portion in the protrusion is equal to or slightly smaller than the width direction of the connection plate portion. A short length is preferred.

［４］本発明の半導体装置の製造方法においては、前記台座の前記突起当接部は、上方向に突出する凸部であることが好ましい。   [4] In the method for manufacturing a semiconductor device of the present invention, it is preferable that the protrusion contact portion of the pedestal is a protrusion protruding upward.

［５］本発明の半導体装置の製造方法においては、前記凸部の高さは、前記リードフレームの板厚以下とすることが好ましい。   [5] In the method for manufacturing a semiconductor device of the present invention, it is preferable that the height of the convex portion is equal to or less than the plate thickness of the lead frame.

［６］本発明の半導体装置は、複数の半導体チップが直線上に沿った配列となるように前記複数の半導体チップを個々の半導体チップごとに搭載する複数のダイパッドを有するとともに、前記ダイパッドとは離隔した位置でかつ前記複数の半導体チップの配列方向に沿った位置に設けられるコネクタ部を有するリードフレームと、前記コネクタ部に基端部が固定され、前記基端部とは反対側の先端部と前記基端部との間の接続板部で前記複数の半導体素子を共通接続する長尺接続子とを備え、前記複数の半導体チップの各上面と前記長尺接続子の前記接続板部の下面とが半田付けによって接続されている内部接続構造を有する半導体装置であって、当該半導体装置は、［１］〜［５］のいずれかの半導体装置の製造方法によって製造されたものであることを特徴とする。   [6] The semiconductor device of the present invention has a plurality of die pads for mounting the plurality of semiconductor chips for each individual semiconductor chip so that the plurality of semiconductor chips are arranged along a straight line. A lead frame having a connector portion provided at a position separated from each other and along the arrangement direction of the plurality of semiconductor chips, and a proximal end portion fixed to the connector portion, and a distal end portion opposite to the proximal end portion And a long connector for commonly connecting the plurality of semiconductor elements at a connection plate portion between the base end portion and the upper surface of the plurality of semiconductor chips and the connection plate portion of the long connector. A semiconductor device having an internal connection structure in which a lower surface is connected by soldering, and the semiconductor device is manufactured by the method for manufacturing a semiconductor device according to any one of [1] to [5]. And characterized in that.

［７］本発明の半導体装置の製造用治具は、［１］〜［５］のいずれかに記載の半導体装置の製造方法によって半導体装置を製造する際に用いるための半導体装置の製造用治具であって、前記リードフレームを当該リードフレームの下面側から支持するようにして載置するリードフレーム載置面を有するとともに、当該リードフレーム載置面に、前記長尺接続子の突起部を当接させるための突起当接部を有する台座を備えていることを特徴とする。   [7] A jig for manufacturing a semiconductor device according to the present invention is a jig for manufacturing a semiconductor device for use in manufacturing a semiconductor device by the method for manufacturing a semiconductor device according to any one of [1] to [5]. A lead frame mounting surface for mounting the lead frame so as to support the lead frame from the lower surface side of the lead frame, and a protrusion of the long connector on the lead frame mounting surface. A pedestal having a projecting contact portion for contacting is provided.

本発明の半導体装置の製造方法は、接続板部を延長することによって形成された延長部の下面側に下方向に突出する突起部を有する長尺接続子と、当該突起部を当接させるための突起当接部を有する台座とを用い、長尺接続子の突起部を台座の突起当接部に当接させるようにリードフレームを台座に載置した状態で、複数の半導体チップの各上面と長尺接続子の接続板部の下面と半田付けするようにしている。なお、長尺接続子の突起部の突出長さ及び台座の突起当接部の高さは、長尺接続子の突起部を台座の突起当接部に当接させるようにリードフレームを台座に載置した状態としたときに、各半導体チップの各上面を結ぶ平面と接続板部の下面とが平行となるように設定されている。   In the method for manufacturing a semiconductor device of the present invention, a long connector having a protrusion protruding downward on the lower surface side of an extension formed by extending a connection plate is brought into contact with the protrusion. Each of the upper surfaces of the plurality of semiconductor chips in a state where the lead frame is placed on the pedestal so that the protruding portion of the long connector contacts the protruding contact portion of the pedestal. And soldering to the lower surface of the connecting plate portion of the long connector. Note that the protrusion length of the protrusion of the long connector and the height of the protrusion contact portion of the pedestal are set so that the protrusion of the long connector contacts the protrusion contact portion of the pedestal. When placed, the plane connecting each upper surface of each semiconductor chip and the lower surface of the connecting plate portion are set to be parallel.

このため、本発明の半導体装置の製造方法によれば、片側支持の長尺接続子を用いて直線上に配列された複数の半導体チップを半田付けにより共通接続するような場合において、接続板部の撓みを防止して当該接続板部と各半導体チップとの間隔を適正間隔に保持することにより、長尺接続子と各半導体チップとの間の半田付けの状態を適切な状態とすることができる。   Therefore, according to the method for manufacturing a semiconductor device of the present invention, in the case where a plurality of semiconductor chips arranged in a straight line are commonly connected by soldering using a single-side supported long connector, the connection plate portion The soldering state between the long connector and each semiconductor chip can be made to be in an appropriate state by keeping the distance between the connection plate portion and each semiconductor chip at an appropriate interval by preventing the bending of the semiconductor chip. it can.

また、本発明の半導体装置は、前記半導体装置の製造方法によって製造されたものであるため、本発明の半導体装置によれば、前記本発明の半導体装置の製造方法によって得られる効果と同様の効果が得られる。また、本発明の半導体装置は、長尺接続子に突起部が存在しているため、半田付け工程の後に行われる樹脂封止工程によって樹脂封止された場合に、モールドロックの効果が得られ、耐久性に優れた半導体装置とすることができる。また、本発明の半導体装置は、長尺接続子に突起部が存在していることにより、長尺接続子の表面積が大きくなるため、放熱性向上の効果も得られる。   Further, since the semiconductor device of the present invention is manufactured by the method for manufacturing a semiconductor device, according to the semiconductor device of the present invention, the same effect as that obtained by the method for manufacturing a semiconductor device of the present invention is used. Is obtained. Further, since the semiconductor device of the present invention has a protrusion on the long connector, the effect of mold lock can be obtained when resin sealing is performed by a resin sealing process performed after the soldering process. Thus, a semiconductor device having excellent durability can be obtained. In addition, since the semiconductor device of the present invention has a protrusion on the long connector, the surface area of the long connector is increased, so that an effect of improving heat dissipation can also be obtained.

また、本発明の半導体装置の製造用治具を上記半導体装置の製造方法において用いることにより、半導体装置を製造する際の製造工程を容易かつ適切に行うことができる。   In addition, by using the semiconductor device manufacturing jig of the present invention in the semiconductor device manufacturing method, the manufacturing process for manufacturing the semiconductor device can be performed easily and appropriately.

実施形態１に係る半導体装置１０の内部接続構造を説明するために示す図である。1 is a view for explaining an internal connection structure of a semiconductor device 10 according to Embodiment 1. FIG. 実施形態１に係る半導体装置１０において用いる長尺接続子１１０を説明するために示す図である。FIG. 3 is a view for explaining a long connector 110 used in the semiconductor device 10 according to the first embodiment. 実施形態１に係る半導体装置１０を製造する際に用いる台座２００を説明するために示す図である。It is a figure shown in order to demonstrate the base 200 used when manufacturing the semiconductor device 10 concerning Embodiment 1. FIG. 長尺接続子１１０と、半導体チップ１３１，１３２，１３３をダイパッド１２１，１２２，１２３に搭載したリードフレーム１２０と、台座２００との配置について説明するために示す図である。FIG. 3 is a view for explaining the arrangement of a long connector 110, a lead frame 120 on which semiconductor chips 131, 132, and 133 are mounted on die pads 121, 122, and 123, and a pedestal 200; 半田付け工程により長尺接続子１１０と半導体チップ１３１，１３２，１３３とを半田付けした状態を示す図である。It is a figure which shows the state which soldered the long connector 110 and the semiconductor chips 131,132,133 by the soldering process. 実施形態１に係る半導体装置１０を製造するための製造工程の説明するフローチャートである。3 is a flowchart illustrating a manufacturing process for manufacturing the semiconductor device 10 according to the first embodiment. 図６に示す半導体装置の製造工程を適用可能な半導体装置の一例を示す図である。FIG. 7 is a diagram showing an example of a semiconductor device to which the manufacturing process of the semiconductor device shown in FIG. 6 can be applied. 実施形態２に係る半導体装置２０を製造する際の半田付け工程により長尺接続子１１０の接続板部１１３と半導体チップ１３１，１３２，１３３とを半田付けした状態を示す図である。6 is a diagram illustrating a state in which a connection plate portion 113 of a long connector 110 and semiconductor chips 131, 132, and 133 are soldered by a soldering process when manufacturing a semiconductor device 20 according to Embodiment 2. FIG. 特許文献１に開示されている半導体装置の内部接続構造の一例を説明するために示す図である。FIG. 6 is a diagram shown for explaining an example of an internal connection structure of a semiconductor device disclosed in Patent Document 1; 長尺接続子によって複数の半導体チップを共通接続するような半導体装置９００の内部接続構造について説明するために示す図である。It is a figure shown in order to demonstrate the internal connection structure of the semiconductor device 900 which connects a several semiconductor chip in common by a elongate connector.

以下、本発明の実施形態について説明する。   Hereinafter, embodiments of the present invention will be described.

［実施形態１］
図１は、実施形態１に係る半導体装置１０の内部接続構造を説明するために示す図である。なお、図１は半導体装置１０の側断面図であり、樹脂封止工程を行う前の状態を示している。半導体装置１０の内部接続構造は、基本的には、図１０に示した半導体装置９００と同様の内部接続構造となっているが、長尺接続子１１０の構成が図１０に示した半導体装置９００において用いられている長尺接続子９１０と少し異なっている。 [Embodiment 1]
FIG. 1 is a diagram for explaining the internal connection structure of the semiconductor device 10 according to the first embodiment. FIG. 1 is a side sectional view of the semiconductor device 10 and shows a state before the resin sealing step. The internal connection structure of the semiconductor device 10 is basically the same internal connection structure as the semiconductor device 900 shown in FIG. 10, but the configuration of the long connector 110 is the semiconductor device 900 shown in FIG. Is slightly different from the long connector 910 used in FIG.

実施形態１に係る半導体装置１０において用いられる長尺接続子１１０の全体的な外観形状は、図１０に示した長尺接続子８１０と同様に、細長い薄板状をなし、基端部１１１と、立ち上がり部１１２と、接続板部１１３とを有しており、基端部１１１がリードフレーム１２０のコネクタ部１２５に固定されている片側支持の長尺接続子である。なお、長尺接続子１１０においても、基端部１１１を延長した基端部延長線（図１における破線で示す。）と接続板部１１３とは平行となっている。   The overall appearance of the long connector 110 used in the semiconductor device 10 according to the first embodiment is an elongated thin plate shape, similar to the long connector 810 shown in FIG. This is a one-side supported long connector having a rising portion 112 and a connecting plate portion 113, and a base end portion 111 fixed to the connector portion 125 of the lead frame 120. In the long connector 110 as well, a base end extension line (indicated by a broken line in FIG. 1) obtained by extending the base end 111 and the connection plate portion 113 are parallel to each other.

このような長尺接続子１１０が図１０に示した長尺接続子９１０と異なるのは、接続板部１１３を長尺接続子１１０の先端部１１０ａの側に位置する半導体チップ１３３よりもさらに先方にまで延長することによって形成された延長部１１５を有することと、当該延長部１１５の下面に下方向に突出する突起部１１４を有することである。なお、延長部１１５のｘ軸方向長さＬ１（図１参照。）は、例えば、１つの半導体チップのｘ軸に沿った寸法と同程度でよい。また、突起部１１４の突出長さｈ１（突起部１１４の高さｈ１ともいう。）については後述する。   Such a long connector 110 is different from the long connector 910 shown in FIG. 10 in that the connecting plate portion 113 is further ahead of the semiconductor chip 133 positioned on the distal end portion 110 a side of the long connector 110. And having an extension 115 formed by extending to the bottom and a protrusion 114 protruding downward on the lower surface of the extension 115. Note that the length L1 (see FIG. 1) of the extension 115 in the x-axis direction may be approximately the same as the dimension along the x-axis of one semiconductor chip, for example. The protrusion length h1 of the protrusion 114 (also referred to as the height h1 of the protrusion 114) will be described later.

実施形態１に係る半導体装置１０の内部接続構造は、このような長尺接続子１１０を用いて、リードフレーム１２０のダイパッド１２１、１２２，１２３に直線上に配列（ｘ軸上に沿うように配列）された複数（３個とする。）の半導体チップ１３１，１３２，１３３を共通接続するような内部接続構造となっている。なお、半導体チップ１３１，１３２，１３３のそれぞれの厚みはそれぞれ同じ厚み（ｔ４とする。）であるとする。   The internal connection structure of the semiconductor device 10 according to the first embodiment is arranged linearly on the die pads 121, 122, and 123 of the lead frame 120 using such a long connector 110 (arranged along the x axis). The internal connection structure is such that a plurality of (three) semiconductor chips 131, 132, 133 are connected in common. The thicknesses of the semiconductor chips 131, 132, and 133 are assumed to be the same thickness (referred to as t4).

また、長尺接続子１１０の接続板部１１３と各半導体チップ１３１，１３２，１３３とは半田付けによって接続され、長尺接続子１１０の接続板部１１３の下面と各半導体チップ１３１，１３２，１３３の上面との間には半田層１５０が形成されている   The connection plate portion 113 of the long connector 110 and the semiconductor chips 131, 132, 133 are connected by soldering, and the lower surface of the connection plate portion 113 of the long connector 110 and the semiconductor chips 131, 132, 133 are connected. A solder layer 150 is formed between the upper surface of

図２は、実施形態１に係る半導体装置１０において用いる長尺接続子１１０を説明するために示す図である。図２（ａ）は長尺接続子１１０の側面図であり、図２（ｂ）は長尺接続子１１０を下方向（裏面）から見た平面図である。長尺接続子１１０は、上記したように、接続板部１１３を延長することにより形成された延長部１１５を有するとともに、当該延長部１１５の下面に下方向に突出する突起部１１４を有する。   FIG. 2 is a view for explaining the long connector 110 used in the semiconductor device 10 according to the first embodiment. FIG. 2A is a side view of the long connector 110, and FIG. 2B is a plan view of the long connector 110 viewed from the lower side (back surface). As described above, the long connector 110 includes the extension 115 formed by extending the connection plate 113 and the protrusion 114 protruding downward on the lower surface of the extension 115.

突起部１１４を下面側から見たときの平面形状は、図２（ｂ）に示すように、長尺接続子１１０の接続板部１１３の幅方向（ｙ軸に沿った方向）に長く、当該長尺接続子１１０の接続板部１１３の長手方向（ｘ軸に沿った方向）に短い細長形状（例えば細長い長円形）としている。なお、突起部１１４のｙ軸方向の寸法Ｌ２は、長尺接続子１１０の接続板部１１３の幅方向の寸法Ｌ３に可能な限り近い寸法が好ましい。なお、このような突起部１１４はプレス加工によって形成することができる。   The planar shape when the projection 114 is viewed from the lower surface side is long in the width direction (direction along the y-axis) of the connection plate portion 113 of the long connector 110, as shown in FIG. A long and narrow shape (for example, a long and narrow oval shape) is formed in the longitudinal direction (direction along the x-axis) of the connection plate portion 113 of the long connector 110. The dimension L2 in the y-axis direction of the protrusion 114 is preferably as close as possible to the dimension L3 in the width direction of the connection plate 113 of the long connector 110. Such a protrusion 114 can be formed by press working.

図３は、実施形態１に係る半導体装置１０を製造する際に用いる台座２００を説明するために示す図である。図３（ａ）は台座２００の側断面図を示す図であり、図３（ｂ）は台座２００の一部を示す平面図であり、図３（ｃ）は半導体チップ１３１，１３２，１３３がダイパッド１２１，１２２，１２３に搭載されているリードフレーム１２０を台座２００に載置した状態を示す図である。なお、台座２００は例えばカーボン製でなる。   FIG. 3 is a view for explaining the pedestal 200 used when manufacturing the semiconductor device 10 according to the first embodiment. 3A is a side sectional view of the pedestal 200, FIG. 3B is a plan view showing a part of the pedestal 200, and FIG. 3C shows the semiconductor chips 131, 132, and 133. FIG. 3 is a view showing a state in which a lead frame 120 mounted on die pads 121, 122, 123 is placed on a pedestal 200. The pedestal 200 is made of carbon, for example.

台座２００は、上面がリードフレーム載置面２００ａとなっており、当該リードフレーム載置面２００ａの所定位置（長尺接続子１１０の突起部１１４に対向する位置）に、長尺接続子１１０の突起部１１４を当接させるための突起当接部２１０を有している。この突起当接部２１０は、実施形態１においては、上方に突出した台状の凸部としている。このため、実施形態１においては、突起当接部２１０を凸部２１０ともいう。   The upper surface of the pedestal 200 is a lead frame placement surface 200a, and the long connector 110 is placed at a predetermined position on the lead frame placement surface 200a (a position facing the protrusion 114 of the long connector 110). A protrusion abutting portion 210 for abutting the protrusion 114 is provided. In the first embodiment, the protrusion abutting portion 210 is a trapezoidal convex portion protruding upward. For this reason, in Embodiment 1, the protrusion contact part 210 is also called the convex part 210. FIG.

なお、凸部２１０の台座２００のリードフレーム載置面２００ａからの高さｈ２は、リードフレーム１２０の板厚ｔ３以下とすることが好ましい。これは、台座２００がカーボン製でなる場合、カーボンが脆い素材であるために、凸部２１０を必要以上に高くすると、凸部２１０が破損しやすくなるためである。このような凸部２１０は台座２００を切削加工することによって形成することができる実施形態１においては、凸部２１０の高さｈ２は、リードフレーム１２０の板厚ｔ３としている。   Note that the height h2 of the pedestal 200 from the lead frame mounting surface 200a of the convex part 210 is preferably equal to or less than the plate thickness t3 of the lead frame 120. This is because when the pedestal 200 is made of carbon, since the carbon is a brittle material, if the convex portion 210 is made higher than necessary, the convex portion 210 is likely to be damaged. Such a convex portion 210 can be formed by cutting the base 200. In the first embodiment, the height h2 of the convex portion 210 is the plate thickness t3 of the lead frame 120.

このように構成された台座２００は、半導体装置１０を製造する際の半導体装置の製造用治具の１つとして用いられる。なお、半導体装置の製造用治具全体の図示及び説明は省略する。そして、このような台座２００は半導体製造工程のうち、長尺接続子１１０と半導体チップ１３１，１３２，１３３とを半田付けする半田付け工程において用いられるものであり、当該半田付け工程の終了後おいては取り外される。   The pedestal 200 thus configured is used as one of semiconductor device manufacturing jigs when the semiconductor device 10 is manufactured. In addition, illustration and description of the whole semiconductor device manufacturing jig are omitted. Such a pedestal 200 is used in a soldering process of soldering the long connector 110 and the semiconductor chips 131, 132, 133 in the semiconductor manufacturing process. It will be removed.

図４は、長尺接続子１１０と、半導体チップ１３１，１３２，１３３がダイパッド１２１，１２２，１２３に搭載されているリードフレーム１２０と、台座２００との配置について説明するために示す図である。なお、図４は半田付け工程を行う前の状態を示しているが、長尺接続子１１０の基端部１１１はリードフレーム１２０のコネクタ部１２５に固定されている状態が示されている。   FIG. 4 is a view for explaining the arrangement of the long connector 110, the lead frame 120 on which the semiconductor chips 131, 132, and 133 are mounted on the die pads 121, 122, and 123, and the pedestal 200. 4 shows a state before the soldering process is performed, but a state in which the base end portion 111 of the long connector 110 is fixed to the connector portion 125 of the lead frame 120 is shown.

図４に示すような状態で、長尺接続子１１０の突起部１１４を台座２００の凸部２１０に当接させるようにリードフレーム１２０を台座２００に載置すると、長尺接続子１１０の接続板部１１３は撓むことがないため、長尺接続子１１０の接続板部１１３の下面と台座２００のリードフレーム載置面２００ａとは平行となる。すなわち、半導体チップ１３１，１３２，１３３の各上面を結ぶ平面と長尺接続子１１０の接続板部１１３の下面とが平行となる。これにより、ダイパッド１２１，１２２，１２３に搭載されている各半導体チップ１３１，１３２，１３３の上面と長尺接続子１１０の接続板部１１３の下面との間隔は、どの半導体チップにおいても同じ間隔（この場合、適正間隔ｔ１）となる。   In the state shown in FIG. 4, when the lead frame 120 is placed on the pedestal 200 so that the protrusion 114 of the long connector 110 abuts the convex portion 210 of the pedestal 200, the connection plate of the long connector 110 Since the portion 113 does not bend, the lower surface of the connection plate portion 113 of the long connector 110 and the lead frame mounting surface 200a of the base 200 are parallel to each other. That is, the plane connecting the upper surfaces of the semiconductor chips 131, 132, 133 is parallel to the lower surface of the connection plate portion 113 of the long connector 110. As a result, the distance between the upper surface of each semiconductor chip 131, 132, 133 mounted on the die pad 121, 122, 123 and the lower surface of the connection plate portion 113 of the long connector 110 is the same for any semiconductor chip ( In this case, the proper interval is t1).

このようにするには、長尺接続子１１０に設けられている突起部１１４の高さｈ１と台座２００の凸部２１０の高さｈ２とを足した合計の高さ（ｈ１＋ｈ２）が、ｈ１＋ｈ２＝ｔ１＋ｔ３＋ｔ４となるように設定すればよい。すなわち、長尺接続子１１０に設けられている突起部１１４の高さｈ１と台座２００の凸部２１０の高さｈ２とを足した合計の高さ（ｈ１＋ｈ２）が、適正間隔ｔ１とリードフレーム１２０の板厚ｔ３と半導体チップ１３１，１３２，１３３のそれぞれの厚みｔ４とを足した値（ｔ１＋ｔ３＋ｔ４）となるように設定すればよい。なお、実施形態１においては、台座２００の凸部２１０の高さｈ２をリードフレーム１２０の板厚ｔ３としているため、長尺接続子１１０の突出長さｈ１は、適正間隔ｔ１に半導体チップの厚みｔ４を足した値（ｔ１＋ｔ４）に設定すればよい。   To do this, the total height (h1 + h2) obtained by adding the height h1 of the projection 114 provided on the long connector 110 and the height h2 of the projection 210 of the pedestal 200 is h1 + h2 = What is necessary is just to set so that it may become t1 + t3 + t4. That is, the total height (h1 + h2) obtained by adding the height h1 of the protrusion 114 provided on the long connector 110 and the height h2 of the projection 210 of the base 200 is the appropriate interval t1 and the lead frame 120. What is necessary is just to set so that it may become the value (t1 + t3 + t4) which added plate | board thickness t3 and each thickness t4 of the semiconductor chips 131,132,133. In the first embodiment, since the height h2 of the convex portion 210 of the pedestal 200 is the plate thickness t3 of the lead frame 120, the protruding length h1 of the long connector 110 is the thickness of the semiconductor chip at an appropriate interval t1. What is necessary is just to set to the value (t1 + t4) which added t4.

長尺接続子１１０の突起部１１４の高さｈ１と台座２００の凸部２１０の高さｈ２をこのように設定することにより、長尺接続子１１０の接続板部１１３が下方向に撓むことがなくなり、半導体チップ１３１，１３２，１３３の上面と長尺接続子１１０の接続板部１１３の下面との間隔をどの半導体チップおいても適正間隔ｔ１とすることができる。   By setting the height h1 of the protrusion 114 of the long connector 110 and the height h2 of the convex portion 210 of the pedestal 200 in this way, the connection plate 113 of the long connector 110 bends downward. The distance between the upper surface of the semiconductor chips 131, 132, and 133 and the lower surface of the connection plate portion 113 of the long connector 110 can be set to an appropriate interval t1 in any semiconductor chip.

図５は、半田付け工程により長尺接続子１１０と半導体チップ１３１，１３２，１３３とを半田付けした状態を示す図である。図５に示すように、半導体チップ１３１，１３２，１３３がダイパッド１２１，１２２，１２３に搭載されたリードフレーム１２０を台座２００に載置した状態とし、かつ、長尺接続子１１０の突起部１１４を台座２００の凸部２１０に当接させた状態（図４参照。）で、長尺接続子１１０の接続板部１１３と半導体チップ１３１，１３２，１３３とを半田付けすると、長尺接続子１１０の接続板部１１３と半導体チップ１３１，１３２，１３３との間に形成される半田層１５０の厚みは、どの半導体チップにおいても適正な厚み（適正間隔ｔ１に対応する厚み）とすることができる。   FIG. 5 is a diagram illustrating a state in which the long connector 110 and the semiconductor chips 131, 132, and 133 are soldered by the soldering process. As shown in FIG. 5, the semiconductor chip 131, 132, 133 is placed on the pedestal 200 with the lead frame 120 mounted on the die pads 121, 122, 123, and the protrusion 114 of the long connector 110 is formed. When the connection plate portion 113 of the long connector 110 and the semiconductor chips 131, 132, 133 are soldered in a state in which the convex portion 210 of the pedestal 200 is in contact (see FIG. 4), the long connector 110 The thickness of the solder layer 150 formed between the connecting plate portion 113 and the semiconductor chips 131, 132, 133 can be set to an appropriate thickness (a thickness corresponding to the appropriate interval t1) in any semiconductor chip.

これは、図４において説明したように、長尺接続子１１０の突起部１１４と台座２００の凸部２１０とが当接した状態となっていることにより、長尺接続子１１０の接続板部１１３が下方向に撓むことがなくなり、半導体チップ１３１，１３２，１３３の上面と長尺接続子１１０の接続板部１１３の下面との間隔をどの半導体チップおいても適正間隔ｔ１とすることができるからである。これにより、半田層１５０の潰れを確実に防止することができ、それによって、半田層１５０の厚みを適正な厚みとすることができる。   As described with reference to FIG. 4, the protrusion 114 of the long connector 110 and the convex portion 210 of the pedestal 200 are in contact with each other, so that the connection plate portion 113 of the long connector 110. Will not bend downward, and the distance between the upper surface of the semiconductor chips 131, 132, 133 and the lower surface of the connection plate portion 113 of the long connector 110 can be set to an appropriate distance t1 in any semiconductor chip. Because. As a result, the solder layer 150 can be reliably prevented from being crushed, whereby the thickness of the solder layer 150 can be set to an appropriate thickness.

ところで、前述したように、長尺接続子１１０の突起部１１４の平面形状は、長尺接続子１１０の接続板部１１３の幅方向（ｙ軸に沿った方向）に長く、当該長尺接続子１１０の接続板部１１３の長手方向（ｘ軸に沿った方向）に短い細長形状としている。長尺接続子１１０の突起部１１４の平面形状をこのような形状としたのは、突起部１１４に近接する部品（例えば、半導体チップ１３３及びダイパッド１２３）との最短距離ｄ１（図５参照。）を可能な限り大きくとることができるようにするとともに、当該突起部１１４を台座２００の凸部２１０に当接させた状態としたときに、長尺接続子１１０の幅方向の安定感を持たせることができるようにするためである。   Incidentally, as described above, the planar shape of the protrusion 114 of the long connector 110 is long in the width direction (direction along the y-axis) of the connection plate 113 of the long connector 110, and the long connector The connecting plate 113 has a long and narrow shape that is short in the longitudinal direction (the direction along the x axis). The reason why the planar shape of the protrusion 114 of the long connector 110 is set to such a shape is that the shortest distance d1 from the components (for example, the semiconductor chip 133 and the die pad 123) close to the protrusion 114 (see FIG. 5). When the projection 114 is brought into contact with the projection 210 of the pedestal 200, the long connector 110 has a sense of stability in the width direction. To be able to do that.

すなわち、長尺接続子１１０の突起部１１４の平面形状がｘ軸に沿った方向において短い細長形状であることにより、近接する部品と間の最短距離ｄ１をより大きく確保することができる。仮に、長尺接続子１１０の突起部１１４の平面形状がｘ軸に沿った方向においても長い形状であると、突起部１１４と近接する部品との距離が近くなり過ぎる場合もあり、絶縁性などに課題が生じるおそれもある。これに対処するために、実施形態１においては、長尺接続子１１０の突起部１１４の平面形状がｘ軸に沿った方向に短い細長形状としている。   That is, since the planar shape of the protrusion 114 of the long connector 110 is a short and narrow shape in the direction along the x-axis, the shortest distance d1 between adjacent components can be further ensured. If the planar shape of the protrusion 114 of the long connector 110 is long in the direction along the x-axis, the distance between the protrusion 114 and the adjacent component may be too close, and insulation may be caused. There is also a risk of problems. In order to cope with this, in the first embodiment, the planar shape of the protrusion 114 of the long connector 110 is an elongated shape that is short in the direction along the x-axis.

また、長尺接続子１１０の突起部１１４の平面形状がｙ軸に沿った方向において長い細長形状であることにより、当該突起部１１４を台座２００の凸部２１０に当接させた状態としたときに、長尺接続子１１０のｘ軸に沿った中心軸ｍ（図２（ｂ）参照。）を中心とした回転力が当該長尺接続子１１０に働きにくくなり、それによって長尺接続子１１０の幅方向の水平度を保持しやすくなる。   In addition, when the planar shape of the protrusion 114 of the long connector 110 is a long and narrow shape in the direction along the y-axis, the protrusion 114 is brought into contact with the convex portion 210 of the base 200. In addition, the rotational force around the central axis m (see FIG. 2B) along the x-axis of the long connector 110 is less likely to act on the long connector 110, thereby the long connector 110. It becomes easy to maintain the level in the width direction.

なお、図５に示すような半田付け工程がなされたあとは、台座２００は取り外す。一方、長尺接続子１１０の突起部１１４は、図５に示すような半田付け工程がなされたあとにおいても切除する必要は特にない。むしろ、突起部１１４が存在していることにより、後に行われる樹脂樹脂封止工程によって樹脂封止された場合に、モールドロックの効果が得られる。また、突起部１１４が存在していることにより、長尺接続子１１０の表面積が大きくなるため、放熱性向上の効果も得られる。   Note that the base 200 is removed after the soldering process as shown in FIG. On the other hand, the protrusion 114 of the long connector 110 does not need to be cut away even after the soldering process as shown in FIG. 5 is performed. Rather, the presence of the protrusion 114 provides a mold lock effect when resin sealing is performed in a resin resin sealing process performed later. Further, since the protrusion 114 is present, the surface area of the long connector 110 is increased, so that an effect of improving heat dissipation can be obtained.

図６は、実施形態１に係る半導体装置１０を製造するための製造工程の説明するフローチャートである。なお、図６に示すフローチャートは実施形態１に係る半導体装置１０を製造する工程のうち、長尺接続子１１０と半導体チップ１３１，１３２，１３３とを半田付けする半田付け工程までを示すものある。   FIG. 6 is a flowchart illustrating a manufacturing process for manufacturing the semiconductor device 10 according to the first embodiment. Note that the flowchart shown in FIG. 6 shows the soldering process for soldering the long connector 110 and the semiconductor chips 131, 132, 133 among the processes for manufacturing the semiconductor device 10 according to the first embodiment.

実施形態１に係る半導体装置１０を製造する際の製造工程は、図６に示すように、長尺接続子として図２に示したような長尺接続子１１０を準備する工程（ステップＳ１）と、図３に示したような台座２００を準備する工程（ステップＳ２）と、長尺接続子１１０の突起部１１４を台座２００の突起当接部（凸部）２１０に当接させるようにリードフレーム１２０を台座２００に載置した状態で半導体チップ１３１，１３２，１３３の各上面と長尺接続子１１０の接続板部１１３の下面とを図５に示すように半田付けする工程（ステップＳ３）とを有する。   As shown in FIG. 6, the manufacturing process for manufacturing the semiconductor device 10 according to the first embodiment is a process of preparing the long connector 110 as shown in FIG. 2 as a long connector (step S1). The step of preparing the pedestal 200 as shown in FIG. 3 (step S2), and the lead frame so that the protrusion 114 of the long connector 110 is brought into contact with the protrusion abutment (projection) 210 of the pedestal 200 A process of soldering the upper surfaces of the semiconductor chips 131, 132, 133 and the lower surface of the connection plate portion 113 of the long connector 110 as shown in FIG. 5 with the 120 placed on the pedestal 200 (step S3); Have

このような工程を実施することにより、長尺接続子１１０の接続板部１１３が下方向に撓むことがなくなり、半導体チップ１３１，１３２，１３３の上面と長尺接続子１１０の接続板部１１３の下面との間隔をどの半導体チップおいても適正間隔ｔ１とすることができる。これにより、半田層１５０の潰れを確実に防止することができ、それによって、半田層１５０の厚みを適正な厚みとすることができる。   By performing such a process, the connection plate 113 of the long connector 110 is not bent downward, and the upper surface of the semiconductor chips 131, 132, 133 and the connection plate 113 of the long connector 110 are prevented. The proper distance t1 can be set for any semiconductor chip. As a result, the solder layer 150 can be reliably prevented from being crushed, whereby the thickness of the solder layer 150 can be set to an appropriate thickness.

図７は、図６に示す半導体装置の製造工程を適用可能な半導体装置の一例を示す図である。図７（ａ）は半導体装置としての３相ブリッジダイオードの構成を模式的に示す図であり、図７（ｂ）は図７（ａ）に示す３相ブリッジダイオードに対応する回路構成を示す図である。   FIG. 7 is a diagram illustrating an example of a semiconductor device to which the manufacturing process of the semiconductor device illustrated in FIG. 6 can be applied. FIG. 7A is a diagram schematically showing a configuration of a three-phase bridge diode as a semiconductor device, and FIG. 7B is a diagram showing a circuit configuration corresponding to the three-phase bridge diode shown in FIG. It is.

３相ブリッジダイオードは、図７に示すように、リードフレーム１２０のダイパッド１２１，１２２，１２３に搭載された３個のダイオードＤ１，Ｄ２，Ｄ３と、リードフレーム１２０のダイパッド１２４，１２５，１２６に搭載された３個のダイオードＤ４，Ｄ５，Ｄ６とを有している。   As shown in FIG. 7, the three-phase bridge diode is mounted on the three diodes D1, D2, D3 mounted on the die pads 121, 122, 123 of the lead frame 120 and the die pads 124, 125, 126 of the lead frame 120. Three diodes D4, D5, and D6.

なお、ダイオードＤ１，Ｄ２，Ｄ３は、それぞれのカソード側がそれぞれ対応するダイパッド１２１，１２２，１２３に接続されており、ダイオードＤ４，Ｄ５，Ｄ６は、それぞれのアノード側がそれぞれ対応するダイパッド１２４，１２５，１２６に接続されている。そして、ダイオードＤ１を搭載しているダイパッド１２１とダイオードＤ４を搭載しているダイパッド１２４は一体となっており、交流端子Ｒとしてのリードが延出している。また、ダイオードＤ２を搭載しているダイパッド１２２とダイオードＤ５を搭載しているダイパッド１２５も一体となっており、交流端子Ｓとしてのリードが延出している。また、ダイオードＤ３を搭載しているダイパッド１２３とダイオードＤ６を搭載しているダイパッド１２６も一体となっており、交流端子Ｔとしてのリードが延出している。   The diodes D1, D2, and D3 are connected to the corresponding die pads 121, 122, and 123 on the cathode side, and the diodes D4, D5, and D6 are connected to the corresponding die pads 124, 125, and 126 on the anode side, respectively. It is connected to the. The die pad 121 on which the diode D1 is mounted and the die pad 124 on which the diode D4 is mounted are integrated, and the lead as the AC terminal R extends. Further, the die pad 122 on which the diode D2 is mounted and the die pad 125 on which the diode D5 is mounted are integrated, and the lead as the AC terminal S extends. Further, the die pad 123 on which the diode D3 is mounted and the die pad 126 on which the diode D6 is mounted are integrated, and the lead as the AC terminal T extends.

一方、ダイオードＤ１，Ｄ２，Ｄ３のアノード側は長尺接続子（長尺接続子１１０Ａとする。）の接続板部１１３Ａによって共通接続され、当該長尺接続子１１０Ａの基端部１１１Ａは、リードフレーム１２０のコネクタ部（コネクタ部１２５Ａとする。）に接続されている。また、ダイオードＤ４，Ｄ５，Ｄ６のカソード側は長尺接続子（長尺接続子１１０Ｂとする。）の接続板部１１３Ｂによって共通接続され、当該長尺接続子１１０Ｂの基端部１１１Ｂは、リードフレーム１２０のコネクタ部（コネクタ部１２５Ｂとする。）に接続されている。これらコネクタ部１２５Ａ，１２５Ｂには直流端子としてのリードがそれぞれ延出している。   On the other hand, the anodes of the diodes D1, D2, and D3 are commonly connected by a connection plate portion 113A of a long connector (long connector 110A), and the base end portion 111A of the long connector 110A is a lead. It is connected to a connector part (referred to as a connector part 125A) of the frame 120. The cathodes of the diodes D4, D5, and D6 are commonly connected by a connection plate portion 113B of a long connector (the long connector 110B), and the base end portion 111B of the long connector 110B is a lead. It is connected to a connector part (referred to as a connector part 125B) of the frame 120. Leads as DC terminals extend from these connector portions 125A and 125B, respectively.

このように構成された３相ブリッジダイオードは、図６において説明したと同様の工程を行うことによって半田付け工程までを実施することができる。すなわち、長尺接続子１１０Ａ，１１０Ｂとしては、図２と同様の長尺接続子１１０を用いる。そして、リードフレーム１２０を図３に示すような台座２００に載置した状態で、長尺接続子１１０Ａの突起部（突起部１１４Ａとする。）を台座２００の凸部（２１０Ａとする。）に当接させ、また、長尺接続子１１０Ｂの突起部（突起部１１４Ｂとする。）を台座２００の凸部（２１０Ｂとする。）に当接させた状態として、図５に示すように半田付けを行う。   The three-phase bridge diode configured as described above can perform the soldering process by performing the same process as described in FIG. That is, as the long connectors 110A and 110B, the long connectors 110 similar to those in FIG. 2 are used. Then, in a state where the lead frame 120 is placed on the pedestal 200 as shown in FIG. As shown in FIG. 5, soldering is performed in a state where the projecting portion (referred to as the projecting portion 114B) of the long connector 110B is brought into contact with the convex portion (referred to as 210B) of the base 200. I do.

これにより、長尺接続子１１０Ａ，１１０Ｂの接続板部１１３Ａ，１１３Ｂが下方向に撓むことがなくなり、ダイオードＤ１，Ｄ２，Ｄ３の上面と長尺接続子１１０Ａの接続板部１１３Ａの下面との間隔をどのダイオードにおいても適正間隔ｔ１とすることができる。また、ダイオードＤ４，Ｄ５，Ｄ６の上面と長尺接続子１１０Ｂの接続板部１１３Ｂの下面との間隔をどのダイオードにおいても適正間隔ｔ１とすることができる。これにより、どのダイオードにおいても半田層の潰れを確実に防止することができ、それぞれの半田層の厚みを適正な厚みとすることができる。   As a result, the connection plates 113A and 113B of the long connectors 110A and 110B do not bend downward, and the upper surface of the diodes D1, D2, and D3 and the lower surface of the connection plate 113A of the long connector 110A are not affected. The interval can be set to an appropriate interval t1 in any diode. In addition, the distance between the upper surface of the diodes D4, D5, and D6 and the lower surface of the connection plate portion 113B of the long connector 110B can be set to an appropriate distance t1 in any diode. Thereby, in any diode, the solder layer can be reliably prevented from being crushed, and the thickness of each solder layer can be set to an appropriate thickness.

ところで、図７に示す３相ブリッジダイオードにおいては、長尺接続子１１０Ｂは、基端部１１１Ｂが図示の右端側に存在し、接続板部１１３Ｂが図示の左方向に伸びているような配置となるため、長尺接続子１１０Ｂの突起部１１４Ｂ及び台座２００の凸部２１０Ｂの位置は、長尺接続子１１０Ａ及び台座２００の凸部２１０Ａとは左右方向においてそれぞれが逆の位置となる。   By the way, in the three-phase bridge diode shown in FIG. 7, the long connector 110B has an arrangement in which the base end portion 111B exists on the right end side in the drawing and the connection plate portion 113B extends in the left direction in the drawing. Therefore, the positions of the protrusion 114B of the long connector 110B and the protrusion 210B of the pedestal 200 are opposite to each other in the left-right direction with respect to the long connector 110A and the protrusion 210A of the pedestal 200.

なお、図７においては、台座２００は、１個の３相ブリッジダイオードに対応した台座とした場合が示されているが、実際には、複数の３相ブリッジダイオードの各３相ブリッジダイオードに対応する複数のリードフレームが繋がった状態となっているため、台座２００も複数の３相ブリッジダイオードに対応した大きさとすることが可能である。また、台座２００は、各長尺接続子１１０Ａ．１１０Ｂにそれぞれ対応するように個別に設けるようにしてもよい。   In FIG. 7, the pedestal 200 is shown as a pedestal corresponding to one three-phase bridge diode, but actually corresponds to each three-phase bridge diode of a plurality of three-phase bridge diodes. Since the plurality of lead frames connected to each other are connected, the pedestal 200 can also have a size corresponding to the plurality of three-phase bridge diodes. In addition, the pedestal 200 includes the long connectors 110A. You may make it provide separately so that it may each correspond to 110B.

［実施形態２］
図８は、実施形態２に係る半導体装置２０を製造する際の半田付け工程を説明するために示す図である。なお、図８は実施形態１の説明で用いた図５に対応する図であり、長尺接続子１１０の接続板部１１３と半導体チップ１３１，１３２，１３３とを半田付けした状態を示す図である。図８が図５と異なるのは、長尺接続子１１０の突起部１１４及び台座２００の突起当接部２１０のみであり、その他の構成は図５と同じであるので同一構成要素には同一符号が付されている。 [Embodiment 2]
FIG. 8 is a view for explaining a soldering process when manufacturing the semiconductor device 20 according to the second embodiment. 8 is a diagram corresponding to FIG. 5 used in the description of the first embodiment, and shows a state in which the connection plate portion 113 of the long connector 110 and the semiconductor chips 131, 132, 133 are soldered. is there. FIG. 8 differs from FIG. 5 only in the protrusion 114 of the long connector 110 and the protrusion abutment 210 of the pedestal 200, and the other components are the same as those in FIG. Is attached.

前述の実施形態１においては、台座２００は突起当接部２１０としての凸部（凸部２１０）を有し、長尺接続子１１０の突起部１１４を台座２００の凸部２１０に当接させるようにしたが、実施形態２においては、台座２００には突起当接部２１０としての凸部（凸部２１０）は存在せずに、長尺接続子１１０の突起部１１４の高さを台座２００の凸部２１０の高さｈ２の分だけ高くしている。すなわち、実施形態２においては、台座２００のリードフレーム載置面２００ａを突起当接部２１０とし、長尺接続子１１０の突起部１１４の高さをｔ１＋ｔ３＋ｔ４としている。なお、台座２００のリードフレーム載置面２００ａを突起当接部２１０とするということは、台座２００における突起当接部２１０の高さをゼロとするということである。   In the first embodiment described above, the pedestal 200 has a projection (projection 210) as the projection abutment 210, and the projection 114 of the long connector 110 is brought into contact with the projection 210 of the pedestal 200. However, in the second embodiment, the pedestal 200 does not have the convex portion (the convex portion 210) as the projection abutting portion 210, and the height of the protruding portion 114 of the long connector 110 is set to the height of the pedestal 200. The height of the convex portion 210 is increased by h2. That is, in the second embodiment, the lead frame mounting surface 200a of the pedestal 200 is the protrusion abutting portion 210, and the height of the protrusion 114 of the long connector 110 is t1 + t3 + t4. In addition, making the lead frame mounting surface 200a of the pedestal 200 the projection contact portion 210 means that the height of the projection contact portion 210 in the pedestal 200 is zero.

長尺接続子１１０及び台座２００をこのような構成とすることによっても、実施形態１と同様、長尺接続子１１０の突起部１１４が台座２００の突起当接部２１０（台座２００のリードフレーム載置面２００ａ）に当接することにより、長尺接続子１１０の接続板部１１３と台座２００のリードフレーム載置面２００ａとが平行となる。すなわち、半導体チップ１３１，１３２，１３３の各上面を結ぶ平面と長尺接続子１１０の接続板部１１３の下面とが平行となる。このため、長尺接続子１１０の接続板部１１３が下方向に撓むことがなくなり、半導体チップ１３１，１３２，１３３の上面と長尺接続子１１０の接続板部１１３の下面との間隔をどの半導体チップおいても適正間隔ｔ１とすることができる。   Even when the long connector 110 and the pedestal 200 are configured as described above, similarly to the first embodiment, the protrusion 114 of the long connector 110 is connected to the protrusion contact portion 210 of the pedestal 200 (the lead frame mounting of the pedestal 200). By contacting the mounting surface 200a), the connecting plate portion 113 of the long connector 110 and the lead frame mounting surface 200a of the base 200 become parallel. That is, the plane connecting the upper surfaces of the semiconductor chips 131, 132, 133 is parallel to the lower surface of the connection plate portion 113 of the long connector 110. Therefore, the connection plate portion 113 of the long connector 110 is not bent downward, and the distance between the upper surface of the semiconductor chips 131, 132, 133 and the lower surface of the connection plate portion 113 of the long connector 110 is determined. Even in the semiconductor chip, the appropriate interval t1 can be set.

また、実施形態２において示すような長尺接続子１１０と台座２００とを用いることによっても図７において説明した３相ブリッジダイオードの製造が可能であることは勿論である。   Of course, the three-phase bridge diode described in FIG. 7 can also be manufactured by using the long connector 110 and the pedestal 200 as shown in the second embodiment.

なお、本発明は上述の実施形態に限られるものではなく、本発明の要旨を逸脱しない範囲で種々変形実施可能となるものである。たとえば、下記に示すような変形実施も可能である。   The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, the following modifications are possible.

（１）上記各実施形態においては、長尺接続子１１０の突起部１１４の平面形状を図２に示すような細長形状とした場合を例示したが、近接する半導体チップなどとの距離を適切に確保することができ、かつ、長尺接続子１１０の幅方向の傾きの安定性などが確保できれば、長尺接続子１１０の突起部１１４の平面形状は特に限定されるものではない。   (1) In each of the above embodiments, the case where the planar shape of the protrusion 114 of the long connector 110 is an elongated shape as shown in FIG. 2 is exemplified, but the distance from the adjacent semiconductor chip or the like is appropriately set. The planar shape of the protrusion 114 of the long connector 110 is not particularly limited as long as it can be ensured and stability of the inclination in the width direction of the long connector 110 can be ensured.

（２）上記各実施形態においては、本発明の半導体装置の製造方法を３相ブリッジダイオードに適用した場合を例示したが、本発明は３相ブリッジダイオードに限らず、片側支持の長尺接続子によって直線上に配列された複数の半導体チップを共通接続するような内部接続構造を有する半導体装置には広く適用可能である。   (2) In each of the above embodiments, the semiconductor device manufacturing method of the present invention is applied to a three-phase bridge diode. However, the present invention is not limited to a three-phase bridge diode, and is a one-side supported long connector. Thus, the present invention can be widely applied to semiconductor devices having an internal connection structure in which a plurality of semiconductor chips arranged on a straight line are commonly connected.

（３）上記各実施形態においては、長尺接続子１１０によって共通接続する半導体チップの数を３個とした場合を例示したが、３個に限られるものではなく、片側支持の長尺接続子が撓む可能性があれば、２個の半導体チップを共通接続する場合にも適用することができ、また、４個以上の半導体チップを共通接続する場合においても適用可能である。   (3) In each of the above embodiments, the case where the number of semiconductor chips commonly connected by the long connector 110 is three is exemplified, but the number of semiconductor chips is not limited to three. If there is a possibility of bending, the present invention can be applied to a case where two semiconductor chips are commonly connected, and can also be applied to a case where four or more semiconductor chips are commonly connected.

（４）上記各実施形態においては、台座はカーボン製としたが、これに限られるものではなく、他の素材を用いることも可能である。   (4) In the above embodiments, the pedestal is made of carbon. However, the pedestal is not limited to this, and other materials can be used.

１０，２０・・・半導体装置、１１０，１１０Ａ，１１０Ｂ・・・長尺接続子、１１１，１１１Ａ，１１１Ｂ・・・基端部、１１２・・・立ち上がり部、１１３，１１３Ａ，１１３Ｂ・・・接続板部、１１４，１１４Ａ，１１４Ｂ・・・突起部、１１５・・・延長部、１２０・・・リードフレーム、１２１，１２２，１２３，１２４，１２５，１２６・・・ダイパッド、１２５，１２５Ａ，１２５Ｂ・・・コネクタ部、１３１，１３２，１３３・・・半導体チップ、１５０・・・半田層、２００・・・台座、２００ａ・・・リードフレーム載置面、２１０，２１０Ａ，２１０Ｂ・・・突起当接部（凸部）、Ｄ１，Ｄ２，Ｄ３，Ｄ４，Ｄ５，Ｄ６・・・ダイオード、ｈ１・・・突起部１１４の突出長さ（高さ）、ｈ２・・・凸部２１０の高さ、Ｌ１・・・延長部１１５のｘ軸方向長さＬ１、Ｌ２・・・突起部１１４のｙ軸方向の寸法、Ｌ３・・・接続板部１１３の幅方向の寸法、ｔ１・・・適正間隔、ｔ３・・・リードフレーム１２０の板厚、ｔ４・・・半導体チップの厚み   DESCRIPTION OF SYMBOLS 10,20 ... Semiconductor device, 110, 110A, 110B ... Long connector, 111, 111A, 111B ... Base end part, 112 ... Rising part, 113, 113A, 113B ... Connection Plate part, 114, 114A, 114B ... Projection part, 115 ... Extension part, 120 ... Lead frame, 121, 122, 123, 124, 125, 126 ... Die pad, 125, 125A, 125B ..Connector portion, 131, 132, 133 ... semiconductor chip, 150 ... solder layer, 200 ... pedestal, 200a ... lead frame mounting surface, 210, 210A, 210B ... projection contact Part (convex part), D1, D2, D3, D4, D5, D6... Diode, h1... Projecting length (height) of the projecting part 114, h2. DESCRIPTION OF SYMBOLS 1 ... Length X1 of extension part 115 L1, L2 ... Y-axis direction dimension of the protrusion 114, L3 ... Width direction dimension of the connection board part 113, t1 ... Appropriate space | interval, t3: Lead frame 120 plate thickness, t4: Semiconductor chip thickness

Claims (7)

複数の半導体チップが直線上に沿った配列となるように前記複数の半導体チップを個々の半導体チップごとに搭載する複数のダイパッドを有するとともに、前記ダイパッドとは離隔した位置でかつ前記複数の半導体チップの配列方向に沿った位置に設けられるコネクタ部を有するリードフレームと、
前記コネクタ部に基端部が固定され、前記基端部とは反対側の先端部と前記基端部との間の接続板部で前記複数の半導体素子を共通接続する長尺接続子と、
を備え、前記複数の半導体チップの各上面と前記長尺接続子の前記接続板部の下面とが半田付けによって接続されている内部接続構造を有する半導体装置の製造方法であって、
前記長尺接続子として、前記接続板部を前記複数の半導体チップのうち当該長尺接続子の先端部の側に位置する半導体チップよりもさらに先方にまで延長することによって形成された延長部を有するとともに、前記延長部の下面に下方向に突出する突起部を有する長尺接続子を準備する工程と、
前記リードフレームを当該リードフレームの下面側から支持するようにして載置するリードフレーム載置面を有するとともに、当該リードフレーム載置面に、前記長尺接続子の突起部を当接させるための突起当接部を有する台座を準備する工程と、
前記長尺接続子の突起部を前記台座の突起当接部に当接させるように前記リードフレームを前記台座に載置した状態で前記複数の半導体チップの各上面と前記長尺接続子の前記接続板部の下面とを半田付けする工程と、
を有し、
前記長尺接続子の突起部及び前記台座の突起当接部は、前記長尺接続子の突起部を前記台座の突起当接部に当接させるように前記リードフレームを前記台座に載置した状態としたときに、前記各半導体チップの各上面を結ぶ平面と前記長尺接続子の前記接続板部の下面とが平行となるように前記長尺接続子の突起部の突出長さ及び前記台座の突起当接部の高さが設定されていることを特徴とする半導体装置の製造方法。 The plurality of semiconductor chips have a plurality of die pads for mounting the plurality of semiconductor chips for each semiconductor chip so that the plurality of semiconductor chips are arranged along a straight line, and are separated from the die pad and the plurality of semiconductor chips. A lead frame having a connector portion provided at a position along the arrangement direction of
A base end portion fixed to the connector portion, and a long connector for commonly connecting the plurality of semiconductor elements at a connecting plate portion between the tip end portion and the base end portion opposite to the base end portion,
A method of manufacturing a semiconductor device having an internal connection structure in which each upper surface of the plurality of semiconductor chips and a lower surface of the connection plate portion of the long connector are connected by soldering,
As the long connector, an extension portion formed by extending the connection plate portion further forward than the semiconductor chip located on the tip portion side of the long connector among the plurality of semiconductor chips. And preparing a long connector having a protrusion protruding downward on the lower surface of the extension, and
The lead frame has a lead frame placement surface for placing the lead frame so as to be supported from the lower surface side of the lead frame, and the protrusion of the long connector is brought into contact with the lead frame placement surface. Preparing a pedestal having a protrusion contact portion;
Each upper surface of the plurality of semiconductor chips and the long connector are mounted in a state where the lead frame is placed on the pedestal so that the protruding portion of the long connector contacts the protruding contact portion of the pedestal. Soldering the lower surface of the connecting plate part;
Have
The lead connector is placed on the pedestal so that the protrusion of the long connector and the protrusion contact portion of the pedestal are in contact with the protrusion contact portion of the pedestal. The projection length of the projection of the long connector and the projection length of the long connector so that the plane connecting the upper surfaces of the semiconductor chips and the lower surface of the connection plate of the long connector are parallel to each other when in the state A method of manufacturing a semiconductor device, characterized in that the height of the protrusion contact portion of the pedestal is set. 請求項１又は２に記載の半導体装置の製造方法において、
前記長尺接続子の突起部は、当該長尺接続子を下面側から見たときの形状が前記接続板部の幅方向に長く、前記接続板部の長手方向に短い細長形状をなしていることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 1 or 2,
The protrusion of the long connector has an elongated shape when the long connector is viewed from the lower surface side and is long in the width direction of the connection plate portion and short in the longitudinal direction of the connection plate portion. A method for manufacturing a semiconductor device. 請求項２に記載の半導体装置の製造方法において、
前記突起部における前記接続板部の幅方向の寸法は、前記接続板部の幅方向と同等又は当該接続板部の幅方向よりもわずかに短い長さとすることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 2,
The method of manufacturing a semiconductor device, wherein a dimension in the width direction of the connection plate portion in the protrusion is equal to or slightly shorter than the width direction of the connection plate portion. . 請求項１〜３のいずれかに記載の半導体装置の製造方法において、
前記台座の前記突起当接部は、上方向に突出する凸部であることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device in any one of Claims 1-3,
The method for manufacturing a semiconductor device, wherein the protrusion contact portion of the base is a convex portion protruding upward. 請求項４に記載の半導体装置の製造方法において、
前記凸部の高さは、前記リードフレームの板厚以下とすることを特徴とする半導体装置の製造方法。 In the manufacturing method of the semiconductor device according to claim 4,
The method of manufacturing a semiconductor device, wherein the height of the convex portion is equal to or less than a plate thickness of the lead frame. 複数の半導体チップが直線上に沿った配列となるように前記複数の半導体チップを個々の半導体チップごとに搭載する複数のダイパッドを有するとともに、前記ダイパッドとは離隔した位置でかつ前記複数の半導体チップの配列方向に沿った位置に設けられるコネクタ部を有するリードフレームと、
前記コネクタ部に基端部が固定され、前記基端部とは反対側の先端部と前記基端部との間の接続板部で前記複数の半導体素子を共通接続する長尺接続子と、
を備え、前記複数の半導体チップの各上面と前記長尺接続子の前記接続板部の下面とが半田付けによって接続されている内部接続構造を有する半導体装置であって、
当該半導体装置は、請求項１〜５のいずれかの半導体装置の製造方法によって製造されたものであることを特徴とする半導体装置。 The plurality of semiconductor chips have a plurality of die pads for mounting the plurality of semiconductor chips for each semiconductor chip so that the plurality of semiconductor chips are arranged along a straight line, and are separated from the die pad and the plurality of semiconductor chips. A lead frame having a connector portion provided at a position along the arrangement direction of
A base end portion fixed to the connector portion, and a long connector for commonly connecting the plurality of semiconductor elements at a connecting plate portion between the tip end portion and the base end portion opposite to the base end portion,
A semiconductor device having an internal connection structure in which each upper surface of the plurality of semiconductor chips and a lower surface of the connection plate portion of the long connector are connected by soldering,
The semiconductor device is manufactured by the method for manufacturing a semiconductor device according to claim 1. 請求項１〜５のいずれかに記載の半導体装置の製造方法によって半導体装置を製造する際に用いるための半導体装置の製造用治具であって、
前記リードフレームを当該リードフレームの下面側から支持するようにして載置するリードフレーム載置面を有するとともに、当該リードフレーム載置面に、前記長尺接続子の突起部を当接させるための突起当接部を有する台座を備えていることを特徴とする半導体装置の製造用治具。 A semiconductor device manufacturing jig for use in manufacturing a semiconductor device by the semiconductor device manufacturing method according to claim 1,
The lead frame has a lead frame placement surface for placing the lead frame so as to be supported from the lower surface side of the lead frame, and the protrusion of the long connector is brought into contact with the lead frame placement surface. A jig for manufacturing a semiconductor device, comprising a pedestal having a protrusion contact portion.
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