JP2013089784A - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- JP2013089784A JP2013089784A JP2011229341A JP2011229341A JP2013089784A JP 2013089784 A JP2013089784 A JP 2013089784A JP 2011229341 A JP2011229341 A JP 2011229341A JP 2011229341 A JP2011229341 A JP 2011229341A JP 2013089784 A JP2013089784 A JP 2013089784A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Abstract
Description
本発明は半導体装置に関するものであり、特にＩＧＢＴ（Insulated Gate Bipolar Transistor）等のパワー半導体素子を有するパワー半導体装置に関するものである。 The present invention relates to a semiconductor device, and more particularly to a power semiconductor device having a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor).
パワー半導体装置は、大出力のモータや発電機等の電気機器の制御や電力変換のために用いられる半導体装置である。近年は、電気機器の高効率化や大容量化のため、パワー半導体装置の大電力化がさらに進展し、要求される使用温度環境等も一層厳しくなっている。長期間使用されるパワー半導体装置においては信頼性低下を引き起こさないことが重要なので、過酷な温度条件に耐えうる構造が求められている。 The power semiconductor device is a semiconductor device used for control of electric equipment such as a high-output motor and a generator and power conversion. In recent years, in order to increase the efficiency and capacity of electrical equipment, the power semiconductor device has been further increased in power and the required operating temperature environment has become more severe. In a power semiconductor device that is used for a long period of time, it is important not to cause a decrease in reliability. Therefore, a structure that can withstand severe temperature conditions is required.
例えば、当該パワー半導体装置の動作中は半導体チップ等にジュール熱が発生し高温になるが、停止中は周囲環境温度まで冷却される。よって、パワー半導体装置においては、動作時と停止時とで大きな温度差が発生することがある。その結果、電子部材間の接続部には熱応力が作用する。この繰り返し熱応力が大きい場合には、接続部の亀裂や破断等を引き起こす可能性があり、パワー半導体装置の機能低下を引き起こしかねない。したがって、熱膨張差に起因する接合部の応力低減は重要な課題である。 For example, Joule heat is generated in the semiconductor chip or the like during operation of the power semiconductor device and becomes high temperature, but is cooled to the ambient environment temperature during stoppage. Therefore, in a power semiconductor device, a large temperature difference may occur between when it is operating and when it is stopped. As a result, thermal stress acts on the connection between the electronic members. When this repeated thermal stress is large, there is a possibility of causing a crack or breakage of the connection portion, which may cause a reduction in the function of the power semiconductor device. Therefore, reducing the stress at the joint due to the difference in thermal expansion is an important issue.
接合部の応力を低減する技術として、特許文献１に、端子の積層平面部が金属ベースの平面に対して略平行になるように構成されることにより、温度サイクルによって端子の接続端と回路配線パターンとの接続面の垂直方向に加わる応力を緩和する技術が開示されている。また、他にパワー半導体装置の信頼性を高める技術が、特許文献２、特許文献３、特許文献４、特許文献５に開示されている。 As a technique for reducing the stress of the joint portion, Patent Document 1 discloses that the terminal connection end and the circuit wiring are formed by a temperature cycle by configuring the laminated plane portion of the terminal to be substantially parallel to the plane of the metal base. A technique for relieving stress applied in a direction perpendicular to a connection surface with a pattern is disclosed. Other techniques for improving the reliability of the power semiconductor device are disclosed in Patent Document 2, Patent Document 3, Patent Document 4, and Patent Document 5.
電化製品や産業用電子機器、自動車、電鉄用機器等、様々な製品の省エネルギーに不可欠であるパワー半導体装置に対して、近年は、高効率化の要求のみならず、搭載スペース削減等の目的から小型化の要求も益々高まっている。 In recent years, power semiconductor devices, which are indispensable for energy saving of various products such as electrical appliances, industrial electronic equipment, automobiles, and railway equipment, are not only required for higher efficiency but also for the purpose of reducing mounting space. The demand for miniaturization is also increasing.
特許文献１に記載されているパワーモジュールでは、直流正極端子および直流負極端子として、３相で共有する幅広な端子が使用されている。しかし、装置の小型化が進行すると端子と回路配線パターンとを接続できる位置が限定される。 In the power module described in Patent Document 1, wide terminals shared by three phases are used as the DC positive terminal and the DC negative terminal. However, the position where the terminal and the circuit wiring pattern can be connected is limited as the device becomes smaller.
装置のレイアウト自由度を向上させるためには、１相毎に独立した端子を用いることが有効である、さらに、端子の、外部装置との接続端と回路との接続端との間の距離を延ばすことが有効である。ただしこの場合、端子の幾何学的なバランスが悪くなり、端子を装置に組付ける際に端子が傾いて組立性が低下する可能性がある。 In order to improve the layout flexibility of the device, it is effective to use an independent terminal for each phase. Further, the distance between the connection end of the terminal to the external device and the connection end of the circuit is reduced. It is effective to extend it. However, in this case, the geometric balance of the terminals is deteriorated, and when the terminals are assembled to the apparatus, the terminals may be inclined and the assemblability may be deteriorated.
また、組立性向上のために端子の拘束箇所を多くしすぎると、端子と回路との接続面の応力が増加し、接続面の剥離等の原因となる。 Further, if the number of restrained portions of the terminal is excessively increased in order to improve the assemblability, the stress on the connection surface between the terminal and the circuit increases, resulting in peeling of the connection surface.
以上のことから、本発明が解決しようとする課題は、回路配線パターンのレイアウトの自由度の高さを有し、かつ、高い組立性を有し、かつ、厳しい温度環境下においても部材接続信頼性を維持するようなパワー半導体装置を提供することである。 From the above, the problem to be solved by the present invention is that the circuit wiring pattern has a high degree of freedom in layout, has high assemblability, and is reliable in the connection of members even under severe temperature environments. It is an object of the present invention to provide a power semiconductor device that maintains the performance.
上記課題を解決するために、交流端子と直流端子ならびに、それらが接続される基板と、前記基板に接続されるベースと、前記ベースに接続され前記基板を格納するケースを有し、前記交流端子と前記直流端子それぞれは、前記基板との接続部位である基板接続端および、他の外部装置と接続するための外部接続端を有しており、前記交流端子の前記基板接続端と前記直流端子の前記基板接続端とは、前記ケースの外周部において対向するように配置されているパワー半導体装置において、前記交流端子と前記直流端子それぞれは、前記基板接続端と前記外部接続端との間に前記基板の主面と略平行な平面部を有し、前記交流端子と前記直流端子それぞれは、前記平面部よりも幅の狭い連結部を有し、前記交流端子と前記直流端子は、前記交流端子の前記基板接続端側において、前記連結部によって連結する。 In order to solve the above problems, the AC terminal and the DC terminal, a substrate to which they are connected, a base connected to the substrate, a case connected to the base and storing the substrate, the AC terminal And each of the DC terminals has a board connection end which is a connection portion with the board and an external connection end for connecting to another external device, and the board connection end of the AC terminal and the DC terminal In the power semiconductor device disposed so as to be opposed to the substrate connection end of the outer periphery of the case, each of the AC terminal and the DC terminal is between the substrate connection end and the external connection end. The AC terminal and the DC terminal each have a connecting part that is narrower than the plane part, and the AC terminal and the DC terminal are connected to the AC terminal. In the substrate connecting end side of the terminal, it is connected by the connecting portion.
本発明によれば、交流端子と直流端子とが連結されることにより回路配線パターンのレイアウトの自由度の高さを有し、かつ、高い組立性を有する。さらに、熱的変形の少ない交流端子の基板接続端側において交流端子と直流端子が連結されることにより、厳しい温度環境下においても部材接続信頼性を維持することができる。 According to the present invention, since the AC terminal and the DC terminal are connected, the circuit wiring pattern has a high degree of freedom in layout and high assemblability. Furthermore, by connecting the AC terminal and the DC terminal on the board connection end side of the AC terminal with little thermal deformation, the member connection reliability can be maintained even in a severe temperature environment.
以下、本発明の実施例について、図面を参照しながら詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
図１（ａ）は本実施例に係るパワー半導体装置の上方斜視図である。図１（ｂ）は当該パワー半導体装置の上面図である。図１（ｃ）は当該パワー半導体装置が備える主端子の上面図である。 FIG. 1A is an upper perspective view of the power semiconductor device according to this embodiment. FIG. 1B is a top view of the power semiconductor device. FIG. 1C is a top view of a main terminal provided in the power semiconductor device.
当該パワー半導体装置は、例えばＣｕ、Ａｌ、もしくは、ＣｕまたはＡｌのいずれかあるいは両方を含む、例えばＡｌＳｉＣ等の合金のような金属材料からなる金属ベース１０の上に、セラミック製の絶縁基板上に回路配線パターンが接合され、かつこの回路配線基板上に半導体素子が接合されるパワー半導体回路部１を備え、パワー半導体回路部１を囲み保護する例えばＰＢＴ（Polybutylene Terephtalate）、ＰＰＳ（Polyphenylene Sulfide）等の樹脂製のケース１１を金属ベース１０の上に備えている。パワー半導体回路部１は、絶縁基板７の下面の導体層８と金属ベース１０とが、はんだ９によって半田付けされることにより、金属ベース１０に接続される。また、外部と電気的に接続するための端子として主端子１３および、図中には示していないが制御用の電極を備えている。 The power semiconductor device is formed on a ceramic base, on a metal base 10 made of a metal material such as an alloy such as AlSiC, for example, containing Cu, Al, or either or both of Cu and Al. A power semiconductor circuit unit 1 to which a circuit wiring pattern is bonded and a semiconductor element is bonded on the circuit wiring board is provided, and surrounds and protects the power semiconductor circuit unit 1, such as PBT (Polybutylene Terephtalate), PPS (Polyphenylene Sulfide), etc. The resin case 11 is provided on the metal base 10. The power semiconductor circuit unit 1 is connected to the metal base 10 by soldering the conductor layer 8 on the lower surface of the insulating substrate 7 and the metal base 10 with solder 9. Further, a main terminal 13 is provided as a terminal for electrical connection with the outside, and a control electrode (not shown in the figure) is provided.
樹脂製ケース１１は、金属ベース１０の上面にシリコンゴム系の接着剤とネジにより固定されている。樹脂製ケース１１は絶縁基板７を囲み、絶縁基板７を含むパワー半導体回路部１は樹脂製ケース１１に格納される。 The resin case 11 is fixed to the upper surface of the metal base 10 with a silicon rubber adhesive and screws. The resin case 11 surrounds the insulating substrate 7, and the power semiconductor circuit portion 1 including the insulating substrate 7 is stored in the resin case 11.
また、図示していないが、樹脂製ケース１１の内部はシリコンゲルが満たしており、さらに樹脂製ケース１１の上面には樹脂製のフタを備えている。これらのシリコンゲルによる封止およびフタによって、パワー半導体回路部１が保護されている。 Although not shown, the inside of the resin case 11 is filled with silicon gel, and the upper surface of the resin case 11 is provided with a resin lid. The power semiconductor circuit portion 1 is protected by sealing and lids with these silicon gels.
主端子１３は３種類に分類される。その３種類とは、モータや発電機等と接続するための交流端子１３０と、バッテリ等と接続するための直流正極端子１３１および直流負極端子１３２である。それぞれの主端子は、絶縁基板７上の回路配線パターン６（図３参照）との接続部である回路接続端１３０ａ、１３１ａ、１３２ａおよび、モータ、発電機、バッテリ等と接続するための外部機器接続端１３０ｄ、１３１ｄ、１３２ｄを有する。交流端子１３０と直流正極端子１３１は、連結部１３０ｃ、１３１ｃにおいて、絶縁紙１６を挟んで積層構造をなすように互いに連結されている。ここで、交流端子１３０、直流正極端子１３１および直流負極端子１３２は、Ｃｕ、Ａｌ、もしくは、ＣｕまたはＡｌのいずれかあるいは両方を含む合金のような金属材料からなる。 The main terminal 13 is classified into three types. The three types are an AC terminal 130 for connecting to a motor, a generator, etc., and a DC positive terminal 131 and a DC negative terminal 132 for connecting to a battery or the like. Each main terminal is an external device for connecting to circuit connection ends 130a, 131a, 132a, which are connection portions with the circuit wiring pattern 6 (see FIG. 3) on the insulating substrate 7, and motors, generators, batteries, and the like It has connection ends 130d, 131d, and 132d. The AC terminal 130 and the DC positive terminal 131 are connected to each other at the connecting portions 130c and 131c so as to form a laminated structure with the insulating paper 16 interposed therebetween. Here, the AC terminal 130, the DC positive terminal 131, and the DC negative terminal 132 are made of a metal material such as Cu, Al, or an alloy containing either or both of Cu and Al.
また、それぞれの主端子は、平板状の平面部１３０ｂ、１３１ｂ、１３２ｂを備えており、直流正極端子１３１と直流負極端子１３２は、平面部１３１ｂ、１３２ｂにおいて絶縁紙１６を挟んで積層構造をなすように互いに連結されている。連結部１３０ｃ、１３１ｃと絶縁紙１６との間の接続および、平面部１３１ｂ、１３２ｂと絶縁紙１６との間の接続には、接着剤を用いる。このとき、交流端子１３０の連結部１３０ｃは、その幅が平面部１３０ｂの幅よりも狭く、回路接続端１３０ａに近い側に寄って位置している。また直流正極端子１３１の連結部１３１ｃは、その幅が平面部１３１ｂの幅よりも狭く、交流端子１３０の回路接続端１３０ａに近い側に寄って位置している。なお、平面部１３０ｂ、１３１ｂ、１３２ｂの幅は、それぞれ、回路接続端１３０ａ、１３１ａ、１３２ａの幅の合計値よりも大きな値に設定される。 Each main terminal includes flat plate-like flat portions 130b, 131b, and 132b. The DC positive terminal 131 and the DC negative terminal 132 have a laminated structure with the insulating paper 16 sandwiched between the flat portions 131b and 132b. Are connected to each other. An adhesive is used for the connection between the connecting portions 130 c and 131 c and the insulating paper 16 and the connection between the flat portions 131 b and 132 b and the insulating paper 16. At this time, the connecting portion 130c of the AC terminal 130 has a width narrower than that of the flat surface portion 130b, and is located closer to the circuit connection end 130a. The connecting portion 131c of the DC positive terminal 131 is narrower than the width of the flat portion 131b, and is located closer to the circuit connection end 130a of the AC terminal 130. The widths of the plane portions 130b, 131b, and 132b are set to values larger than the total value of the widths of the circuit connection ends 130a, 131a, and 132a, respectively.
金属ベース１０及び樹脂製ケース１１は、平面的に見た場合の外周形状が略長方形あるいは略正方形である。交流端子１３０の外部機器接続端１３０ｄは、樹脂製ケース１１の外周部の一辺上に位置する。外部配線は、外部機器接続端１３０ｄの穴にネジを通して樹脂製ケース１１にネジ止めされることにより、外部機器接続端１３０ｄに電気的に接続される。また、直流正極端子１３１の外部機器接続端１３１ｄと、直流負極端子１３２の外部機器接続端１３２ｄは、樹脂製ケース１１の外周部において交流端子１３０の外部機器接続端１３０ｄが位置する一辺の対辺上に並んで位置し、交流端子１３０の外部機器接続端１３０ｄと同様に外部配線がネジ止めにより電気的に接続される。このように、交流端子１３０の外部機器接続端１３０ｄと、直流正極端子１３１の外部機器接続端１３１ｄ及び直流負極端子１３２の外部機器接続端１３２ｄとは、樹脂製ケース１１の外周部において対向配置される。樹脂製ケース１１内のパワー半導体回路部１上において、直流正極端子１３１の平面部１３１ｂ及び直流負極端子１３２の平面部１３２ｂは、それぞれ外部機器接続端１３１ｄ及び外部機器接続端１３２ｄから、交流端子１３０の外部機器接続端１３０ｄに向かって伸びている。なお、交流端子１３０の平面部１３０ｂ、直流正極端子１３１の平面部１３１ｂ及び直流負極端子１３２の平面部１３２ｂは、金属ベース１の表面、並びにパワー半導体回路部１における絶縁基板７の表面すなわち絶縁基板７の主面である平面部に対して略平行に配置される。 The metal base 10 and the resin case 11 have a substantially rectangular or substantially square outer peripheral shape when viewed in plan. The external device connection end 130 d of the AC terminal 130 is located on one side of the outer peripheral portion of the resin case 11. The external wiring is electrically connected to the external device connection end 130d by being screwed to the resin case 11 through a screw in the hole of the external device connection end 130d. Further, the external device connection end 131 d of the DC positive terminal 131 and the external device connection end 132 d of the DC negative terminal 132 are on opposite sides of the outer periphery of the resin case 11 where the external device connection end 130 d of the AC terminal 130 is located. The external wiring is electrically connected by screwing similarly to the external device connection end 130d of the AC terminal 130. Thus, the external device connection end 130 d of the AC terminal 130, the external device connection end 131 d of the DC positive terminal 131 and the external device connection end 132 d of the DC negative terminal 132 are arranged to face each other on the outer peripheral portion of the resin case 11. The On the power semiconductor circuit portion 1 in the resin case 11, the flat portion 131b of the DC positive terminal 131 and the flat portion 132b of the DC negative terminal 132 are connected to the AC terminal 130 from the external device connecting end 131d and the external device connecting end 132d, respectively. It extends toward the external device connection end 130d. The flat portion 130b of the AC terminal 130, the flat portion 131b of the DC positive terminal 131, and the flat portion 132b of the DC negative terminal 132 are the surface of the metal base 1 and the surface of the insulating substrate 7 in the power semiconductor circuit portion 1, that is, the insulating substrate. 7 is arranged substantially in parallel with the plane portion which is the main surface of 7.
本実施例のパワー半導体装置が構成する回路の一例としては、いわゆるハーフブリッジ回路が有る。本回路では、ＩＧＢＴなどの半導体スイッチング素子が２個直列に接続され、直列接続端が交流端子に接続され、直列接続体の両端が直流端子に接続される。なお、このハーフブリッジ回路を扱う交流の相数に等しい個数だけ並列接続すれば、直流電力を交流電力に変換するインバータ装置や交流電力を直流電力に変換するコンバータ装置などの電力変換装置を構成することができる。 As an example of a circuit that is configured by the power semiconductor device of this embodiment, there is a so-called half-bridge circuit. In this circuit, two semiconductor switching elements such as IGBTs are connected in series, a series connection end is connected to an AC terminal, and both ends of the series connection body are connected to a DC terminal. In addition, if a number equal to the number of alternating current phases that handle this half-bridge circuit is connected in parallel, a power conversion device such as an inverter device that converts direct current power into alternating current power or a converter device that converts alternating current power into direct current power is configured. be able to.
図２は当該パワー半導体装置の主端子の分解斜視図である。図２を用いて、主端子の構成の詳細について説明する。 FIG. 2 is an exploded perspective view of the main terminal of the power semiconductor device. Details of the configuration of the main terminal will be described with reference to FIG.
まず、主端子同士の接続について説明する。直流正極端子１３１と直流負極端子１３２とは、絶縁紙１６を挟んで積層構造をなすように接着剤を用いて互いに接続されている。また、交流端子１３０と直流正極端子１３１は、連結部１３０ｃと１３１ｃとが絶縁紙１６を挟んで積層構造をなすように接着剤を用いて互いに接続されている。絶縁紙１６は複数枚重ねて用いられても良い。複数枚を重ねると絶縁の信頼性を高めることができる。また、絶縁紙１６の代替物として、端子に絶縁物をコーティングしても構わない。絶縁物をコーティングする場合は、薄い領域の無いよう均一にコーティングすることが好ましいが、紙の切り抜きや貼り付けが不要となる。また、本実施例では直流正極端子１３１と直流負極端子１３２との間に挟む絶縁紙１６と、連結部１３０ｃと１３１ｃとの間に挟む絶縁紙１６とを同一の部材としたが、これが別々の部材であっても構わない。別々の部材とすることで、各連結部の電圧や温度に応じた絶縁部材の選定が可能となる。また、本実施例では交流端子１３０と直流正極端子１３１とが連結されているものとしたが、直流負極端子１３２が連結部を有していて絶縁紙１６を挟んで交流端子１３０の連結部１３０ｃと接続されているとしても構わない。 First, connection between main terminals will be described. The DC positive terminal 131 and the DC negative terminal 132 are connected to each other using an adhesive so as to form a laminated structure with the insulating paper 16 interposed therebetween. The AC terminal 130 and the DC positive terminal 131 are connected to each other using an adhesive so that the connecting portions 130c and 131c have a laminated structure with the insulating paper 16 interposed therebetween. A plurality of insulating papers 16 may be used in a stacked manner. If a plurality of sheets are stacked, the reliability of insulation can be improved. Further, as an alternative to the insulating paper 16, the terminal may be coated with an insulating material. In the case of coating an insulating material, it is preferable to coat uniformly so as not to have a thin region, but it is not necessary to cut out or attach paper. In this embodiment, the insulating paper 16 sandwiched between the DC positive terminal 131 and the DC negative terminal 132 and the insulating paper 16 sandwiched between the connecting portions 130c and 131c are the same member. It may be a member. By using separate members, it is possible to select an insulating member according to the voltage and temperature of each connecting portion. In this embodiment, the AC terminal 130 and the DC positive terminal 131 are connected. However, the DC negative terminal 132 has a connecting portion, and the connecting portion 130c of the AC terminal 130 with the insulating paper 16 interposed therebetween. It does not matter even if it is connected to.
以上の接続により、交流端子１３０、直流正極端子１３１、直流負極端子１３２は、電気的には互いに絶縁されている一方で、機械的には３主端子一体の構造をなしている。当該パワー半導体装置の組立ての順序は概ね、まず金属ベース１０の上面にパワー半導体回路部１を接続し、次に金属ベース１０の上面に樹脂製ケース１１を固定し、その後パワー半導体回路部１および樹脂製ケース１１の上面に主端子を接続する、というものである。３つの主端子同士の連結は、このパワー半導体回路部１および樹脂製ケース１１の上面に主端子を接続する前に実施される。予め主端子を一体化しておくことで、主端子を組付ける際に主端子を保持する箇所が増えて安定性が向上し、主端子が傾くことなく自立するので、組立性が向上する。なお、平面部１３０ｂ、１３１ｂ、１３２ｂが互いに積層され、かつ金属ベース１０及びパワー半導体回路部１の表面に対して略平行に配置されるため、樹脂製ケース１１の高さが低減され、パワー半導体装置が薄型化できる。 With the above connection, the AC terminal 130, the DC positive terminal 131, and the DC negative terminal 132 are electrically insulated from each other, but mechanically have a structure of three main terminals. The assembly order of the power semiconductor device is generally as follows. First, the power semiconductor circuit unit 1 is connected to the upper surface of the metal base 10, and then the resin case 11 is fixed to the upper surface of the metal base 10, and then the power semiconductor circuit unit 1 and The main terminal is connected to the upper surface of the resin case 11. The three main terminals are connected to each other before connecting the main terminals to the upper surfaces of the power semiconductor circuit portion 1 and the resin case 11. By integrating the main terminals in advance, the number of locations where the main terminals are held increases when the main terminals are assembled, the stability is improved, and the main terminals are self-supporting without being tilted, so that the assemblability is improved. In addition, since the flat portions 130b, 131b, and 132b are stacked on each other and disposed substantially parallel to the surfaces of the metal base 10 and the power semiconductor circuit portion 1, the height of the resin case 11 is reduced, and the power semiconductor The device can be thinned.
次に、主端子１３と他の装置構成部材との接続について説明する。交流端子１３０、直流正極端子１３１、直流負極端子１３２はそれぞれ、外部機器接続端１３０ｄ、１３１ｄ、１３２ｄにおいて樹脂製ケース１１の上面と固定される。 Next, connection between the main terminal 13 and other apparatus constituent members will be described. The AC terminal 130, the DC positive terminal 131, and the DC negative terminal 132 are fixed to the upper surface of the resin case 11 at the external device connection ends 130d, 131d, and 132d, respectively.
また、交流端子１３０、直流正極端子１３１、直流負極端子１３２は、回路配線パターン６と接続するための回路接続端１３０ａ、１３１ａ、１３２ａを有している。各回路接続端１３０ａ、１３１ａ、１３２ａは、それぞれ平面部１３０ｂ、１３１ｂ、１３２ｂから回路配線パターン６の方向に向かって突出しており、かつ回路配線パターン６との接合面を形成するために、その先端部が屈曲している。回路接続端１３０ａ、１３１ａ、１３２ａと回路配線パターン６とは、超音波溶接により直接金属同士を接続（メタルボンディング）されるか、はんだなどを介して接続されており、機械的にも電気的にも接続されている。本実施例ではメタルボンディング接続を用いている。メタルボンディング接続の場合は加熱工程が不要であり、また金属同士の直接接続を行うため、接続信頼性が高く電気抵抗も小さい。はんだ接続の場合は装置全体を高温に加熱する必要があるが、回路接続端１３０ａ、１３１ａ、１３２ａの上部にメタルボンディング用の工具の挿入スペースを確保する必要が無く、超音波振動による金属屑も出ない。 The AC terminal 130, the DC positive terminal 131, and the DC negative terminal 132 have circuit connection ends 130 a, 131 a, and 132 a for connecting to the circuit wiring pattern 6. Each circuit connection end 130 a, 131 a, 132 a protrudes from the flat portion 130 b, 131 b, 132 b toward the circuit wiring pattern 6, and at the tip thereof to form a joint surface with the circuit wiring pattern 6. The part is bent. The circuit connection ends 130a, 131a, 132a and the circuit wiring pattern 6 are either directly connected to each other by metal welding (metal bonding) or connected via solder or the like, and mechanically and electrically. Is also connected. In this embodiment, metal bonding connection is used. In the case of metal bonding connection, a heating process is not required, and since direct metal-to-metal connection is performed, connection reliability is high and electric resistance is low. In the case of solder connection, it is necessary to heat the entire apparatus to a high temperature. However, it is not necessary to secure a space for inserting a metal bonding tool above the circuit connection ends 130a, 131a, 132a, and metal debris caused by ultrasonic vibration is also generated. Does not appear.
各回路接続端１３０ａ、１３１ａ、１３２ａの本数は１本のみでも良いし、各主端子についてそれぞれ複数本ずつ存在しても良い。１本のみの場合は回路上の接続スペースを削減できる。本実施例に係るパワー半導体装置は、回路接続端１３０ａ、１３１ａ、１３２ａそれぞれ２本ないし３本、すなわち複数本ずつを有しており、それぞれの回路接続端が横並びになるよう配置されている。複数の回路接続端を有することにより主端子の接続安定性が高まる。また、回路接続端が横並びに配置されていることにより、主端子と回路との接続箇所を省スペース化できる効果があり、またメタルボンディング工程を同時または連続的に実施しやすく生産性が向上するという効果がある。さらに、本実施例に係るパワー半導体装置では、図３ないし図２に示すように交流端子の回路接続端１３０ａと、直流端子の回路接続端１３１ａおよび１３２ａとが、平面部１３１ｂ、１３２ｂを挟んで互いに逆側になるよう配置されている。交流側と直流側とで回路接続端が逆側に配置されることにより、交流側の回路接続端１３０ａと直流側の回路接続端１３１ａ、１３２ａとの間に半導体素子を挟む電流経路を、スペースの無駄無くレイアウトできる。 The number of circuit connection ends 130a, 131a, 132a may be only one, or a plurality of each may be present for each main terminal. In the case of only one, the connection space on the circuit can be reduced. The power semiconductor device according to the present embodiment has two to three circuit connection ends 130a, 131a, 132a, that is, a plurality of circuit connection ends 130a, 131a, 132a, and the circuit connection ends are arranged side by side. By having a plurality of circuit connection ends, the connection stability of the main terminal is increased. In addition, since the circuit connection ends are arranged side by side, there is an effect that the space for connecting the main terminal and the circuit can be saved, and the metal bonding process can be performed simultaneously or continuously, and the productivity is improved. There is an effect. Furthermore, in the power semiconductor device according to the present embodiment, as shown in FIGS. 3 to 2, the circuit connection end 130a of the AC terminal and the circuit connection ends 131a and 132a of the DC terminal sandwich the plane portions 131b and 132b. It arrange | positions so that it may mutually become a reverse side. By arranging the circuit connection ends on the opposite side between the AC side and the DC side, a current path sandwiching the semiconductor element between the circuit connection end 130a on the AC side and the circuit connection ends 131a and 132a on the DC side can be separated by a space. Layout without waste.
また、交流端子１３０、直流正極端子１３１、直流負極端子１３２はそれぞれ、外部機器接続端１３０ｄ、１３１ｄ、１３２ｄと回路接続端１３０ａ、１３１ａ、１３２ａとの間に平面部１３０ｂ、１３１ｂ、１３２ｂを有している。これにより、回路接続端１３０ａ、１３１ａ、１３２ａの位置を、外部機器接続端１３０ｄ、１３１ｄ、１３２ｄと離れた任意の位置に設計することが可能となる。よって、回路配線パターン６のレイアウトの自由度が向上し、ひいては装置全体の設計自由度が向上するので、設置スペースに合わせた装置設計が容易になる。また、平面部１３０ｂ、１３１ｂ、１３２ｂは、主端子の発熱を抑制する役割も果たしている。通電時の主端子の電流密度を下げてジュール熱を低減するために、平面部１３０ｂ、１３１ｂ、１３２ｂの幅は大きくとる。 The AC terminal 130, the DC positive terminal 131, and the DC negative terminal 132 have flat portions 130b, 131b, and 132b between the external device connection ends 130d, 131d, and 132d and the circuit connection ends 130a, 131a, and 132a, respectively. ing. As a result, the positions of the circuit connection ends 130a, 131a, and 132a can be designed at arbitrary positions apart from the external device connection ends 130d, 131d, and 132d. Therefore, the degree of freedom of layout of the circuit wiring pattern 6 is improved, and as a result, the degree of freedom of design of the entire apparatus is improved. Further, the flat portions 130b, 131b, and 132b also play a role of suppressing heat generation of the main terminal. In order to reduce the Joule heat by reducing the current density of the main terminal during energization, the width of the planar portions 130b, 131b, 132b is increased.
図３はパワー半導体回路部１の断面模式図である。図３を用いて、本実施例に係るパワー半導体装置のパワー半導体回路部１の縦構造について説明する。 FIG. 3 is a schematic cross-sectional view of the power semiconductor circuit unit 1. The vertical structure of the power semiconductor circuit unit 1 of the power semiconductor device according to the present embodiment will be described with reference to FIG.
絶縁基板７の上面に例えばＣｕ、Ａｌ等からなる金属製の回路配線パターン６が形成されており、下面には金属製の下面導体層８が形成されている。本実施例では絶縁基板７として熱伝導性の良いセラミック製基板を用いた。金属製の下面導体層８は、金属ベース１０の上面とはんだ９で接続されている。回路配線パターン６の上面には半導体素子２を備える。半導体素子２には、例えばスイッチング用半導体素子ＩＧＢＴ（Insulated Gate Bipolar Transistor）３とダイオード４とがあり、ダイオード４はＩＧＢＴ３のコレクタ電極とエミッタ電極との間に、金属ワイヤ１４により電気的に接続されている。これらの半導体素子２は、はんだ５により回路配線パターン６と接続されている。半導体素子２と金属製回路配線パターン６とは、金属ワイヤ１４により電気的に接続されている。 A metal circuit wiring pattern 6 made of, for example, Cu, Al or the like is formed on the upper surface of the insulating substrate 7, and a metal lower surface conductor layer 8 is formed on the lower surface. In this embodiment, a ceramic substrate having good thermal conductivity was used as the insulating substrate 7. The metal lower conductor layer 8 is connected to the upper surface of the metal base 10 by solder 9. A semiconductor element 2 is provided on the upper surface of the circuit wiring pattern 6. The semiconductor element 2 includes, for example, a switching semiconductor element IGBT (Insulated Gate Bipolar Transistor) 3 and a diode 4, and the diode 4 is electrically connected by a metal wire 14 between the collector electrode and the emitter electrode of the IGBT 3. ing. These semiconductor elements 2 are connected to the circuit wiring pattern 6 by solder 5. The semiconductor element 2 and the metal circuit wiring pattern 6 are electrically connected by a metal wire 14.
ここで、本実施例に係るパワー半導体装置（図１）と、図４、図５に示すパワー半導体装置を比較して、本実施例の効果を説明する。 Here, the power semiconductor device according to the present embodiment (FIG. 1) is compared with the power semiconductor device shown in FIGS. 4 and 5 to explain the effects of the present embodiment.
パワー半導体装置は、運転時の温度サイクルによって膨張および収縮を繰り返す。特に体積の大きい金属ベース１０および樹脂製ケース１１は大きく変形する。このとき、金属ベース１０の熱膨張率は例えばＣｕ製の場合約１７ppm／Ｋであるのに対して、樹脂製ケース１１の熱膨張係数は約２５ppm／Ｋと大きい。主端子１３は外部機器接続端１３０ｄ、１３１ｄ、１３２ｄにおいて樹脂製ケース１１と固定されているため、温度上昇の際には樹脂製ケース１１の大きな膨張に引張られる。しかし一方で主端子１３は回路接続端１３０ａ、１３１ａ、１３２ａにおいて回路配線パターン６と接続されており、変形が拘束される。したがって、温度サイクルが生じると、回路接続端１３０ａ、１３１ａ、１３２ａと回路配線パターン６との接続界面に繰返し応力が作用する。特に平面部１３１ｂ、１３２ｂにおいて積層されている直流正極端子１３１、直流負極端子１３２は、積層部分での曲げ剛性が高くなっており、平面部１３１ｂ、１３２ｂにおいて金属ベース１０と樹脂製ケース１１との熱膨張差を吸収しにくいため、回路接続端１３１ａ、１３２ａの接続界面での応力が課題となる。 The power semiconductor device repeats expansion and contraction according to a temperature cycle during operation. Particularly, the metal base 10 and the resin case 11 having a large volume are greatly deformed. At this time, the thermal expansion coefficient of the metal base 10 is about 17 ppm / K in the case of Cu, for example, whereas the thermal expansion coefficient of the resin case 11 is as large as about 25 ppm / K. Since the main terminal 13 is fixed to the resin case 11 at the external device connection ends 130d, 131d, and 132d, the main terminal 13 is pulled by a large expansion of the resin case 11 when the temperature rises. However, on the other hand, the main terminal 13 is connected to the circuit wiring pattern 6 at the circuit connection ends 130a, 131a, and 132a, and deformation is restrained. Therefore, when a temperature cycle occurs, stress repeatedly acts on the connection interface between the circuit connection ends 130 a, 131 a, 132 a and the circuit wiring pattern 6. In particular, the DC positive terminal 131 and the DC negative terminal 132 stacked in the flat portions 131b and 132b have high bending rigidity in the stacked portions, and the metal base 10 and the resin case 11 are in the flat portions 131b and 132b. Since it is difficult to absorb the difference in thermal expansion, the stress at the connection interface between the circuit connection ends 131a and 132a becomes a problem.
図４は、本実施例に係るパワー半導体装置の構造とは異なり、交流端子１７０と直流正極端子１７１との連結部を無くし、連結しない場合の構造の例を示している。図４（ａ）はパワー半導体装置の上面図である。図４（ｂ）は主端子の上面図である。 FIG. 4 shows an example of a structure in which the connecting portion between the AC terminal 170 and the DC positive terminal 171 is eliminated and not connected, unlike the structure of the power semiconductor device according to the present embodiment. FIG. 4A is a top view of the power semiconductor device. FIG. 4B is a top view of the main terminal.
交流端子１７０と直流正極端子１７１とが連結されていない場合は、主端子を装置に組付ける際に主端子を保持する箇所が減少することで幾何学的に不安定になり、装置の組立性は低下する。しかし一方で、温度サイクルにより装置が熱変形する際に、主端子同士が互いの反りの影響を受けないため、その分、主端子の回路接続面に作用する応力の増加は抑えられる。 When the AC terminal 170 and the DC positive terminal 171 are not connected, the number of places for holding the main terminal when the main terminal is assembled to the apparatus is reduced, resulting in geometric instability, and the assembly of the apparatus. Will decline. However, when the device is thermally deformed due to a temperature cycle, the main terminals are not affected by each other's warpage, and accordingly, an increase in stress acting on the circuit connection surface of the main terminals can be suppressed.
図５は、本実施例に係るパワー半導体装置の構造とは異なり、交流端子１８０と直流正極端子１８１の連結部１８０ｃ、１８１ｃの幅を拡張し、交流端子１８０の回路接続端１８０ａに近い側のみならず、直流正極端子１８１の回路接続端１８１ａに近い側も含めて広範囲で連結する場合の構造を示している。図５（ａ）はパワー半導体装置の上面図である。図５（ｂ）は主端子の上面図である。 FIG. 5 is different from the structure of the power semiconductor device according to the present embodiment in that the width of the connecting portions 180c and 181c between the AC terminal 180 and the DC positive terminal 181 is expanded and only the side of the AC terminal 180 close to the circuit connection end 180a. Instead, the structure in the case where the DC positive electrode terminal 181 is connected in a wide range including the side close to the circuit connection end 181a is shown. FIG. 5A is a top view of the power semiconductor device. FIG. 5B is a top view of the main terminal.
連結部１８０ｃ、１８１ｃの幅が拡張されている場合は、本実施例の構造と同様に主端子を組付ける際に主端子を保持する箇所が増えて安定性が向上し、主端子が傾くことなく自立するので、装置の組立性は変わらない。しかし、主端子同士の連結箇所が増えたことで、主端子同士が互いの反りの影響を受けやすくなり、主端子の回路接続面に作用する応力は、交流端子１７０と直流正極端子１７１とを連結しない場合と比較して大きくなる。 When the widths of the connecting portions 180c and 181c are expanded, the number of locations for holding the main terminal is increased when the main terminal is assembled as in the structure of the present embodiment, the stability is improved, and the main terminal is inclined. Because it is self-supporting, the assembly of the device does not change. However, since the number of connection points between the main terminals is increased, the main terminals are easily affected by the warpage of each other, and the stress acting on the circuit connection surface of the main terminals causes the AC terminal 170 and the DC positive terminal 171 to It becomes larger than the case where it is not connected.
図６は、図４に示した交流端子と直流端子との連結を行わない構造Ａと、図５に示した連結部の幅を平面部と同等にした構造Ｂおよび、本実施例に係るパワー半導体装置の構造Ｃのそれぞれについて、組立性および主端子の回路接続部の信頼性を比較してまとめたものである。相対的に性能がより良いものを○として表記している。なお、主端子の回路接続部の信頼性評価の手法としては、有限要素法による応力解析を用いた。それぞれの構造を満たすパワー半導体装置の三次元モデルについて装置全体の温度を−４０℃から１２５℃に上昇させる解析を実施し、主端子と回路との接続界面に作用する相当応力の最大値を取得した。 FIG. 6 shows a structure A in which the connection between the AC terminal and the DC terminal shown in FIG. 4 is not performed, a structure B in which the width of the connection part shown in FIG. 5 is equal to the plane part, and the power according to this embodiment. For each of the structures C of the semiconductor device, the assemblability and the reliability of the circuit connection portion of the main terminal are compared and summarized. Those with relatively better performance are marked with ◯. As a method for evaluating the reliability of the circuit connection portion of the main terminal, stress analysis by a finite element method was used. Performs an analysis to raise the temperature of the entire power semiconductor device from -40 ° C to 125 ° C for a three-dimensional model of a power semiconductor device that satisfies each structure, and obtains the maximum value of the equivalent stress that acts on the connection interface between the main terminal and the circuit did.
交流端子と直流端子との連結を行わない構造Ａの応力の最大値は２０９ＭＰａと算出された。これに対して、連結部の幅を平面部と同等にした構造Ｂの主端子の回路接続面の応力最大値は２２７ＭＰａとなり、約９％高い値となった。一方、本実施例の構造Ｃの主端子の回路接続面の応力最大値は２１１ＭＰａとなり、構造Ａと比較して１％以下の増加に止まった。 The maximum value of the stress of the structure A in which the connection between the AC terminal and the DC terminal was not performed was calculated to be 209 MPa. On the other hand, the maximum stress value of the circuit connection surface of the main terminal of the structure B in which the width of the connecting portion is equal to that of the flat portion is 227 MPa, which is about 9% higher. On the other hand, the stress maximum value of the circuit connection surface of the main terminal of the structure C of this example was 211 MPa, which was an increase of 1% or less compared to the structure A.
本実施例に係るパワー半導体装置は、主端子同士を連結することにより高い組立性を有する一方で、主端子回路接続部については、交流端子と直流端子とを連結しない場合と同等の高い信頼性を有する。 The power semiconductor device according to the present embodiment has high assemblability by connecting the main terminals to each other, while the main terminal circuit connection portion has high reliability equivalent to the case where the AC terminal and the DC terminal are not connected. Have
図７は、交流端子と直流端子との連結部の形状を変更した場合の、主端子と回路との接続界面に作用する応力最大値を比較して、まとめたものである。構造Ｃは本実施例に係るパワー半導体装置の構造である。構造Ｄ、Ｅ、Ｆは、主端子形状以外は本実施例に係る構造と同じだが、交流端子および直流正極端子の連結部の形状が本実施例とは異なる構造である。 FIG. 7 summarizes the maximum stress acting on the connection interface between the main terminal and the circuit when the shape of the connecting portion between the AC terminal and the DC terminal is changed. Structure C is the structure of the power semiconductor device according to this embodiment. Structures D, E, and F are the same as the structure according to the present embodiment except for the shape of the main terminal, but the structure of the connecting portion of the AC terminal and the DC positive electrode terminal is different from that of the present embodiment.
構造Ｄは、交流端子２００の連結部２００ｃおよび直流正極端子２０１の連結部２０１ｃが、回路接続端２００ａおよび２０１ａのいずれに近い側の端にも寄っておらず、主端子平面部の中央に位置している場合の構造である。 In the structure D, the connecting portion 200c of the AC terminal 200 and the connecting portion 201c of the DC positive electrode terminal 201 are not close to either end of the circuit connection ends 200a and 201a, and are located in the center of the main terminal plane portion. This is the structure when
構造Ｅは、交流端子２１０の連結部２１０ｃが回路接続端２１０ａに近い側から直流正極端子２１１の回路接続端２１１ａの方へ向って伸びており、一方直流正極端子２１１の連結部２１１ｃが回路接続端２１１ａに近い側から交流端子２１０の回路接続端２１０ａの方へ向って伸びている構造である。 In the structure E, the connecting portion 210c of the AC terminal 210 extends from the side close to the circuit connecting end 210a toward the circuit connecting end 211a of the DC positive terminal 211, while the connecting portion 211c of the DC positive terminal 211 is connected to the circuit. The structure extends from the side close to the end 211 a toward the circuit connection end 210 a of the AC terminal 210.
構造Ｆは、交流端子２２０の連結部２２０ｃが直流正極端子２２１の回路接続端２２１ａに近い側に位置しており、直流正極端子２２１の連結部２２１ｃが直流正極端子２２１の回路接続端２２１ａに近い側に位置している構造である。 In the structure F, the connecting part 220c of the AC terminal 220 is located on the side close to the circuit connecting end 221a of the DC positive terminal 221, and the connecting part 221c of the DC positive terminal 221 is close to the circuit connecting end 221a of the DC positive terminal 221. It is a structure located on the side.
それぞれの構造のパワー半導体装置の三次元モデルで装置全体の温度を−４０℃から１２５℃に上昇させる解析を実施し、主端子と回路との接続界面に作用する相当応力の最大値を取得した。その結果、いずれの構造においても直流負極端子の主端子と回路との接続界面で応力が最大となり、構造Ｄは構造Ｃよりも１１％高い値となり、構造Ｅは構造Ｃよりも７％高い値となり、構造Ｆは構造Ｃよりも７％高い値となった。すなわち、構造Ｃ、Ｄ、Ｅ、Ｆの中で、本実施例に係る構造である構造Ｃの主端子と回路との接続界面での応力が最も低い値となる。 An analysis was conducted to increase the temperature of the entire device from -40 ° C to 125 ° C with a three-dimensional model of the power semiconductor device of each structure, and the maximum value of the equivalent stress acting on the connection interface between the main terminal and the circuit was obtained. . As a result, in any structure, the stress is maximized at the connection interface between the main terminal of the DC negative electrode terminal and the circuit, the structure D is 11% higher than the structure C, and the structure E is 7% higher than the structure C. Thus, the structure F was 7% higher than the structure C. That is, among the structures C, D, E, and F, the stress at the connection interface between the main terminal and the circuit of the structure C that is the structure according to the present embodiment is the lowest value.
構造Ｃの主端子と回路との接続界面での応力が低い理由について、以下の図８を用いて説明する。 The reason why the stress at the connection interface between the main terminal of the structure C and the circuit is low will be described with reference to FIG.
図８（ａ）は、図４に示した交流端子と直流正極端子とが連結部を持たない構造について、全体の温度を−４０℃から１２５℃まで上昇させた場合の変形を有限要素解析により計算し、その１２５℃における変形形状を、変形量を５０倍に拡大して表示したものである。交流端子１７０、直流正極端子１７１および直流負極端子１７２が、外部機器接続端１７０ｄ、１７１ｄ、１７２ｄにおいて樹脂製ケース１１と接続されているため、熱膨張率の大きい樹脂製ケース１１の膨張に引張られて反り返っている。樹脂製ケース１１や回路配線パターン６に直接接続されていない交流端子の端部２３ａおよび直流端子側の端部２４ａは、上方向（金属ベース１０等から遠ざかる方向）へ大きく変位している。主端子と回路配線パターン６との接続面のうち、温度サイクル時の応力振幅が最大となる箇所は、直流負極端子１７２側の主端子と回路との接続面である。直流端子側の主端子と回路との接続面での応力が最大となる理由は、直流端子側では平面部（１７１ｂ等）が積層された構造であるため平面部での剛性が高くなっており、平面部においてケース／ベース間の熱膨張差を吸収しにくいからである。 FIG. 8A shows the deformation when the overall temperature is raised from −40 ° C. to 125 ° C. by the finite element analysis for the structure in which the AC terminal and the DC positive terminal shown in FIG. The calculated deformation shape at 125 ° C. is displayed by enlarging the deformation amount by 50 times. Since the AC terminal 170, the DC positive terminal 171 and the DC negative terminal 172 are connected to the resin case 11 at the external device connection ends 170d, 171d and 172d, they are pulled by the expansion of the resin case 11 having a high thermal expansion coefficient. And warping. The end 23a of the AC terminal and the end 24a on the DC terminal side that are not directly connected to the resin case 11 and the circuit wiring pattern 6 are greatly displaced upward (in a direction away from the metal base 10 or the like). Of the connection surface between the main terminal and the circuit wiring pattern 6, the portion where the stress amplitude during the temperature cycle is maximum is the connection surface between the main terminal on the DC negative electrode terminal 172 side and the circuit. The reason why the stress at the connection surface between the main terminal on the DC terminal side and the circuit is maximized is that the planar portion (171b, etc.) is laminated on the DC terminal side, so the rigidity at the planar portion is high. This is because it is difficult to absorb the difference in thermal expansion between the case / base in the flat portion.
図８（ｂ）は本実施例に係るパワー半導体装置の温度を−４０℃から１２５℃まで上昇させた場合の変形を有限要素解析により計算し、その１２５℃における変形形状を、変形量を５０倍に拡大して表示したものである。 FIG. 8B shows the deformation when the temperature of the power semiconductor device according to the present embodiment is raised from −40 ° C. to 125 ° C. by finite element analysis. It is enlarged and displayed.
本実施例に係るパワー半導体装置は、図８（ａ）の構造と同じように直流端子の平面部（１３１ｂ等）が積層構造を成しているため、直流正極端子１３１及び直流負極端子１３２の側の主端子と回路との接続面において温度サイクル時の応力振幅が最大となる。熱膨張時は、主端子が外部機器接続端１３１ｄ、１３２ｄにおける樹脂製ケース１１との接続を通して樹脂製ケース１１の熱膨張に引張られることで、主端子と回路との接続面での応力は増加する。しかし、本実施例に係るパワー半導体装置は連結部（１３１ｃ等）を有しており、直流端子側も、交流端子１３０の回路接続端１３０ａでの拘束の影響を受けるため、直流端子側の端部２４での変位を抑制することができる。一方、交流端子１３０の端部２３は直流端子の積層体に覆われず露出しており、直流正極端子１３１及び直流負極端子１３２は交流端子１３０において変位の大きい端部２３とは連結されていないため、端部２３の変位に引張られる影響による応力の増加は少ない。 In the power semiconductor device according to the present embodiment, since the planar portion (131b, etc.) of the DC terminal has a laminated structure as in the structure of FIG. 8A, the DC positive terminal 131 and the DC negative terminal 132 are The stress amplitude during the temperature cycle is maximized at the connection surface between the main terminal on the side and the circuit. At the time of thermal expansion, the main terminal is pulled by the thermal expansion of the resin case 11 through the connection with the resin case 11 at the external device connection ends 131d and 132d, thereby increasing the stress on the connection surface between the main terminal and the circuit. To do. However, the power semiconductor device according to the present embodiment has a connecting portion (131c and the like), and the DC terminal side is also affected by the restraint at the circuit connection end 130a of the AC terminal 130. The displacement at the portion 24 can be suppressed. On the other hand, the end 23 of the AC terminal 130 is exposed without being covered with the DC terminal laminate, and the DC positive terminal 131 and the DC negative terminal 132 are not connected to the end 23 having a large displacement in the AC terminal 130. Therefore, there is little increase in stress due to the effect of being pulled by the displacement of the end portion 23.
このように、本実施例に係るパワー半導体装置は、交流端子の回路接続端１３０ａに近い側に主端子連結部を備えることにより、直流正極端子１３１及び直流負極端子１３２の反りが交流端子の回路接続端１３０ａの拘束によって抑制され、かつ、交流端子１３０の端部２３の反りの影響は受けない。よって、本実施例に係るパワー半導体装置では、平面部（１３１ｂ等）の剛性の高い直流端子側においても、主端子と回路との接続界面での応力が低い。 Thus, the power semiconductor device according to the present embodiment includes the main terminal coupling portion on the side close to the circuit connection end 130a of the AC terminal, so that the warp of the DC positive terminal 131 and the DC negative terminal 132 is the circuit of the AC terminal. It is suppressed by restraint of the connection end 130a and is not affected by the warp of the end 23 of the AC terminal 130. Therefore, in the power semiconductor device according to the present embodiment, the stress at the connection interface between the main terminal and the circuit is low even on the DC terminal side with high rigidity of the flat portion (131b or the like).
以上により、本実施例に係るパワー半導体装置では、パワー半導体装置において回路配線パターン６の高いレイアウト自由度と装置の高い組立性を維持しながら、温度サイクル時に主端子の回路接続端１３０ａ、１３１ａ、１３２ａの接続界面に作用する応力振幅の増大を抑制することが可能となる。 As described above, in the power semiconductor device according to the present embodiment, the circuit connection ends 130a, 131a of the main terminal at the time of the temperature cycle while maintaining a high layout flexibility of the circuit wiring pattern 6 and a high assembly property of the device in the power semiconductor device. It is possible to suppress an increase in the stress amplitude acting on the connection interface 132a.
なお、本発明は上記した実施例に限定されるものではなく、様々な変形例が含まれる。例えば、上記した実施例は本発明をわかりやすく説明するために詳細に説明したものであり、必ずしも説明した全ての構成を備えるものに限定されるものではない。また、各実施例の構成の一部について、他の構成の追加・削除・置換をすることが可能である。 In addition, this invention is not limited to an above-described Example, Various modifications are included. For example, the above-described embodiments have been described in detail for easy understanding of the present invention, and are not necessarily limited to those having all the configurations described. Further, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment.
１ パワー半導体回路部
２ 半導体素子
３ ＩＧＢＴ
４ ダイオード
５、９ はんだ
６ 回路配線パターン
７ 絶縁基板
８ 下面導体層
１０ 金属ベース
１１ 樹脂製ケース
１３ 主端子
１４ 金属ワイヤ
１６ 絶縁紙
２３、２３ａ 交流端子の端部
２４、２４ａ 直流端子側の端部
１３０、１７０、１８０、２００、２１０、２２０ 交流端子
１３０ａ、１３１ａ、１３２ａ 回路接続端
１３０ｂ、１３１ｂ、１３２ｂ、１８２ｂ 平面部
１３０ｃ、１３１ｃ、１８０ｃ、１８１ｃ、２００ｃ、２０１ｃ、２１０ｃ、２１１ｃ、２２０ｃ、２２１ｃ 連結部
１３０ｄ、１３１ｄ、１３２ｄ 外部機器接続端
１３１、１７１、１８１、２０１、２１１、２２１ 直流正極端子
１３２、１７２、１８２ 直流負極端子
DESCRIPTION OF SYMBOLS 1 Power semiconductor circuit part 2 Semiconductor element 3 IGBT
4 Diode 5, 9 Solder 6 Circuit wiring pattern 7 Insulating substrate 8 Lower surface conductor layer 10 Metal base 11 Resin case 13 Main terminal 14 Metal wire 16 Insulating paper 23, 23a AC terminal end 24, 24a DC terminal side end 130, 170, 180, 200, 210, 220 AC terminals 130a, 131a, 132a Circuit connection ends 130b, 131b, 132b, 182b Planar portion 130c, 131c, 180c, 181c, 200c, 201c, 210c, 211c, 220c, 221c Part 130d, 131d, 132d External device connection end 131, 171, 181, 201, 211, 221 DC positive terminal 132, 172, 182 DC negative terminal
Claims (8)
前記交流端子と前記直流端子それぞれは、前記基板との接続部位である基板接続端および、他の外部装置と接続するための外部接続端を有しており、
前記交流端子の前記外部接続端と前記直流端子の前記外部接続端とは、前記ケースの外周部において対向するように配置されているパワー半導体装置において、
前記交流端子と前記直流端子それぞれは、前記基板接続端と前記外部接続端との間に前記基板の主面と略平行な平面部を有し、
前記交流端子と前記直流端子それぞれは、前記平面部よりも幅の狭い連結部を有し、
前記交流端子と前記直流端子は、前記交流端子の前記基板接続端側において、前記連結部によって連結されていることを特徴とするパワー半導体装置。 An AC terminal and a DC terminal, a board to which they are connected, a base connected to the board, and a case connected to the base to store the board;
Each of the AC terminal and the DC terminal has a board connection end that is a connection portion with the board, and an external connection end for connecting to another external device,
In the power semiconductor device in which the external connection end of the AC terminal and the external connection end of the DC terminal are arranged to face each other at the outer periphery of the case,
Each of the AC terminal and the DC terminal has a plane portion substantially parallel to the main surface of the substrate between the substrate connection end and the external connection end,
Each of the AC terminal and the DC terminal has a connecting portion that is narrower than the planar portion,
The power semiconductor device, wherein the AC terminal and the DC terminal are connected by the connecting portion on the substrate connection end side of the AC terminal.
前記直流端子は、直流正極端子および直流負極端子が絶縁物を挟み積層されて構成されていることを特徴とするパワー半導体装置。 The power semiconductor device according to claim 1,
The power semiconductor device is characterized in that the DC terminal is formed by laminating a DC positive terminal and a DC negative terminal with an insulator interposed therebetween.
前記直流正極端子と前記直流負極端子と前記絶縁物とが互いに接着剤により固定されていることを特徴とするパワー半導体装置。 The power semiconductor device according to claim 2,
The power semiconductor device, wherein the DC positive terminal, the DC negative terminal, and the insulator are fixed to each other by an adhesive.
前記交流端子と前記直流正極端子ならびに前記直流負極端子のそれぞれの前記平面部の幅は、各端子が有する前記基板接続端の幅の合計よりも大きいことを特徴とするパワー半導体装置。 In the power semiconductor device according to any one of claims 1 to 3,
The power semiconductor device according to claim 1, wherein a width of the planar portion of each of the AC terminal, the DC positive terminal, and the DC negative terminal is larger than a total width of the substrate connection ends of the terminals.
前記交流端子ならびに前記直流端子の前記基板接続端は、前記平面部との接続箇所から前記基板の方向へ向かって屈曲していることを特徴とするパワー半導体装置。 The power semiconductor device according to claim 1,
The power semiconductor device, wherein the AC terminal and the substrate connection end of the DC terminal are bent toward the substrate from a connection point with the flat portion.
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