JP2013058619A - Component built-in wiring board and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a component built-in wiring board which enables built-in components to be accurately positioned without performing a complicated process when the built-in components are housed in a housing part of a core substrate.SOLUTION: A component built-in wiring board 10 includes: a core substrate 11; a housing part 21 penetrating through the core substrate 11; a built-in component 50 housed in the housing part 21; and wiring lamination parts 12, 13 formed so as to be laminated on an upper surface and a lower surface of the core substrate 11. The housing part 21 is defined by an inner wall surface 20 of the core substrate 11 which includes first and second inner wall surfaces respectively formed in different directions in a plain view. The built-in component 50 is housed in the housing part 21 while partially contacting with the first and second inner wall surfaces. A resin filler F fills an area in a gap between the inner wall surface 20 and the built-in component 50 where the built-in component 50 does not contact with the first and second inner wall surfaces.

Description

  The present invention relates to a component built-in wiring board in which a built-in component is housed in a housing portion that penetrates an upper surface and a lower surface of a core substrate.

  Conventionally, a wiring board is used in which a buildup layer is formed by alternately laminating conductor layers and insulating layers on the upper surface side and the lower surface side of a core substrate. As a structure of such a wiring board, there is known a component built-in wiring board in which a housing part that vertically penetrates a core substrate is provided and a built-in component is housed in the housing part. For example, it is possible to stabilize the power supply voltage and reduce noise by incorporating a capacitor as a built-in component in the housing part of the component built-in wiring board and connecting the capacitor to the power supply voltage wiring supplied to the semiconductor element. it can. When manufacturing such a component built-in wiring board, a housing portion having an outer shape larger than that of the built-in component in a plan view is formed, and after positioning the built-in component at the approximate center of the housing portion, A procedure for filling a resin filler in a gap between a wall surface and a built-in component is general. For example, when the built-in component is a via array type capacitor, electrical connection in the stacking direction is formed between the external electrodes formed on the front and back surfaces of the built-in component and the upper and lower buildup layers. Therefore, in order to ensure electrical connection in the stacking direction with respect to the built-in component, it is important to accurately position the built-in component within the housing portion. For example, in Patent Document 1, the accommodation portion provided on the substrate is tapered so as to go upward (for example, the shape of the insertion hole 3 in FIG. 2), and when the built-in component is inserted from above the accommodation portion, the accommodation portion is accommodated. A structure of a wiring board is disclosed in which proper positioning can be performed by matching the shape of the lower side of the portion with the built-in component.

JP-A-6-120673

  However, in the structure of the wiring board disclosed in Patent Document 1, the housing portion must be formed in a tapered shape, and the shape on the lower side must match the built-in component. Difficulty of processing when opening a hole becomes high. Moreover, when using various built-in components, it is necessary to change the shape of the accommodating portion according to each shape, which is complicated. In addition, when there is an error between the shape of the built-in component and the shape of the lower side of the housing portion, the built-in component is inclined, and accurate positioning becomes difficult. As described above, in the conventional component-embedded wiring board, even if the housing portion penetrating the core substrate is rectangular or tapered in plan view, the built-in component is positioned with high accuracy in the housing portion. There was a problem that was not easy.

  The present invention has been made to solve these problems, and provides a component-embedded wiring board capable of accurate positioning without performing complicated processing when housing a built-in component in a housing portion of a core substrate. For the purpose.

  In order to solve the above-described problems, a component-embedded wiring board according to the present invention includes a core substrate, a housing portion penetrating the upper and lower surfaces of the core substrate, a built-in component housed in the housing portion, and the core substrate. In the component built-in wiring board comprising: a wiring laminated portion in which an insulating layer and a conductor layer are alternately laminated on at least one of the upper surface side and the lower surface side. The housing is defined by an inner wall surface of the core substrate including an inner wall surface and a second inner wall surface, and the built-in component is in the state of being in partial contact with each of the first inner wall surface and the second inner wall surface. In a gap between the inner wall surface and the built-in component, a resin filler is filled in a region where the built-in component is not in contact with the first inner wall surface and the second inner wall surface. It is characterized by.

  According to the wiring board with a built-in component of the present invention, when the built-in component is housed in the housing portion that penetrates the core substrate of the wiring board with the built-in component, the housing portion is defined rather than arranged at the approximate center of the housing portion. Of the inner wall surface of the core substrate to be placed in a position where it is partially in contact with the first and second inner wall surfaces, and the resin filler is filled in the gap between the inner wall surface on the side where the built-in components are not in contact To do. As a result, the position of the built-in component in the housing portion is regulated by the inner wall surface of the core substrate, so that accurate positioning is possible, and the reliability of electrical connection in the stacking direction between the built-in component and the wiring laminated portion is improved. Can do. In addition, since many portions of each side surface of the built-in component are arranged in contact with the resin filler, the deformation due to the difference in thermal expansion coefficient can be absorbed by the action of the resin filler, It is possible to securely fix the built-in components.

  The first inner wall surface and the second inner wall surface that define the housing portion are provided with counterbore portions made of one or a plurality of recesses, and the resin filler is placed in the respective recesses of the counterbore portions. It may be filled. By providing such counterbore parts, positioning is performed in a state in which parts other than the respective recesses of the counterbore part are in contact with the side surface of the built-in component, and each recess of the counterbore part is filled with a resin filler. Therefore, it is possible to more securely fix the built-in component. In this case, the spot facing portion can be formed with a structure having a plurality of groove-shaped recesses formed along the stacking direction. The counterbore part can be formed with a structure having a plurality of groove-like recesses formed along the plane direction in addition to the plurality of groove-like recesses formed along the stacking direction.

  The housing part and the built-in component can be formed in various shapes in plan view as long as the built-in component is partially in contact with the first and second inner wall surfaces. For example, the housing portion and the built-in component may be formed in a substantially rectangular shape in plan view, and the built-in component may have a smaller outer shape than the housing portion. In this case, at least one corner portion is formed in the housing portion by the first and second inner wall surfaces, and the built-in component is disposed at the corner portion, and the first and second side surfaces of the built-in component intersect each other. Of these, the first side surface may be in contact with the first inner wall surface, and the second side surface may be in contact with the second inner wall surface. With such a shape and arrangement, it is possible to easily position the built-in component without complicating the shapes of the accommodating portion and the built-in component.

  Further, the number of the built-in components arranged in the housing portion is not limited to one. For example, you may accommodate four built-in components each arrange | positioned at four said substantially rectangular corner | angular parts in an accommodating part.

  Various components can be used as the built-in component. For example, if a capacitor as a built-in component is housed in the housing portion and connected to the power supply wiring, the effect of stabilizing the power supply voltage and reducing noise in the component built-in wiring board can be obtained.

  In order to solve the above-described problem, a method for manufacturing a wiring board with a built-in component according to the present invention provides a core board, passes through the upper and lower surfaces of the core board and extends in different directions in plan view. An accommodating portion forming step for forming an accommodating portion defined by the inner wall surface of the core substrate including an inner wall surface and a second inner wall surface, and a built-in component are prepared, and the first inner wall surface and the first inner surface of the core substrate are prepared. Positioning step of positioning the built-in component so as to partially contact each of the two inner wall surfaces, and the built-in component is the first inner wall surface and the first of the gap portions between the inner wall surface and the built-in component. A filling step of filling a region that is not in contact with the inner wall surface of 2 and a lamination step of alternately forming insulating layers and conductor layers on at least one of the upper surface side and the lower surface side of the core substrate. That features It is. A counterbore part composed of one or a plurality of recesses may be formed on the first inner wall surface and the second inner wall surface of the core substrate.

  According to the method for manufacturing a component built-in wiring board of the present invention, when the component built-in wiring board of the present invention is manufactured, the above-described effects of the present invention can be enjoyed without going through complicated steps. That is, unlike the above-described conventional component built-in wiring board, there is no need to arrange the built-in component in the central portion by forming the housing portion in a tapered shape so as to go upward, and when placing the built-in component in the housing portion Can be positioned so that the side surfaces of the built-in components are in contact with the first and second inner wall surfaces, so that the manufacturing process can be simplified.

  According to the present invention, when a built-in component is housed in the housing portion of the component built-in wiring board, the built-in component is arranged so as to be in partial contact with the inner wall surface of the core substrate, and the side on which the built-in component is not in contact Since the resin filler is filled in the gap with the inner wall surface, the built-in component can be accurately positioned without requiring complicated processing, and the reliability of electrical connection can be improved. In addition, it is possible to absorb the deformation caused by the difference in thermal expansion coefficient by the resin filler filled in the region where the built-in component is not arranged in the housing portion, and to securely fix the built-in component in the housing portion.

1 is a schematic cross-sectional structure diagram of a component built-in wiring board according to an embodiment. FIG. 2 is a cross-sectional structure diagram of a capacitor 50 in FIG. 1. FIG. 2 is a schematic plan view of a range including a housing portion 21 in the wiring board 10 of FIG. 1. In FIG. 3, it is a figure which shows an example of the surface state of one inner wall surface 20y in which the spot facing part 20a was formed. It is a figure which shows one modification regarding the spot facing part 20a. FIG. 10 is a plan view showing a modified example regarding the arrangement of the capacitors 50 in the accommodating portion 21. FIG. 6 is a plan view showing a modified example related to the shape of the inner wall surface 20. It is a 1st sectional view explaining the manufacturing method of wiring board 10 of this embodiment. It is a 2nd sectional structure figure explaining a manufacturing method of wiring board 10 of this embodiment. It is a 3rd sectional view explaining the manufacturing method of wiring board 10 of this embodiment.

  Preferred embodiments of the present invention will be described below with reference to the drawings. However, the embodiment described below is an example of a form to which the technical idea of the present invention is applied, and the present invention is not limited by the content of the present embodiment.

  In the following embodiments, an example of a component built-in wiring board embodying the present invention will be described. FIG. 1 shows a schematic cross-sectional structure diagram of a component built-in wiring board 10 (hereinafter simply referred to as a wiring board 10) of the present embodiment. As shown in FIG. 1, the wiring board 10 of the present embodiment includes a core substrate 11 made of, for example, an epoxy resin containing glass fiber, a buildup layer 12 (wiring laminated portion) on the upper surface side of the core substrate 11, It has a structure including a buildup layer 13 (wiring laminated portion) on the lower surface side of the substrate 11. A semiconductor chip 100 that is a semiconductor element is placed on the upper part of the wiring substrate 10 of the present embodiment.

  The core substrate 11 is formed with a housing portion 21 penetrating the central region in a square shape in plan view, and the housing portion 21 houses a capacitor 50 as a built-in component. The planar shape of the accommodating portion 21 is defined by the inner wall surface 20 (FIG. 1) of the core substrate 11. In the present embodiment, as shown in FIG. 1, the capacitor 50 in the housing portion 21 is arranged in a state of being close to the inner wall surface 20 on one side of the inner wall surfaces 20 facing both sides. It will be described later. In the accommodating portion 21, a resin filler F is filled in a gap portion between the inner wall surface 20 of the core substrate 11 and the capacitor 50. The resin filler F is made of a polymer material such as a thermosetting resin, for example, and has an action of absorbing deformation caused by the difference in thermal expansion coefficient between the core substrate 11 and the capacitor 50 due to elastic deformation of the resin filler F. is there. On the other hand, the core substrate 11 is formed with a plurality of through-hole conductors 22 penetrating the outer peripheral region in the laminating direction, and the inside of the through-hole conductor 22 is filled with a closing body 23 made of, for example, glass epoxy.

  The capacitor 50 is a via array type multilayer ceramic capacitor that forms a predetermined capacity between the positive electrode and the negative electrode. The capacitor 50 is electrically connected to each of the conductor layers 31 and 41 of the upper and lower buildup layers 12 and 13 via external electrode layers 51 and 52 formed on both surfaces, respectively. Here, FIG. 2 shows a sectional structural view of the capacitor 50 of FIG. The capacitor 50 of the present embodiment is made of a sintered body of a high dielectric constant ceramic such as barium titanate, for example, and has a structure in which a plurality of ceramic dielectric layers 53 are laminated. As shown in FIG. 2, internal electrode layers 60 and internal electrode layers 61 are alternately formed between the ceramic dielectric layers 53. One internal electrode layer 60 functions as an electrode for a negative electrode, the other internal electrode layer 61 functions as an electrode for a positive electrode, and both electrodes face each other with each ceramic dielectric layer 53 interposed therebetween, thereby providing a predetermined capacity. It is formed.

  The capacitor 50 is formed with a plurality of via conductors 70 and 71 in which a conductor material is embedded in a large number of via holes penetrating all the ceramic dielectric layers 53 in the stacking direction. The negative electrode via conductor 70 is connected to the internal electrode layer 60, and the positive electrode via conductor 71 is connected to the internal electrode layer 61. The external electrode layer 51 on the surface of the capacitor 50 is formed with a plurality of negative external electrodes 80 and a plurality of positive external electrodes 81. The external electrode layer 52 on the back surface of the capacitor 50 is formed with a plurality of negative external electrodes 82 and a plurality of positive external electrodes 83. As a result, the plurality of via conductors 70 are electrically connected to the external electrode 80 on the upper end side and the external electrode 82 on the lower end side, respectively. The plurality of via conductors 71 are electrically connected to the external electrode 81 on the upper end side and the external electrode 83 on the lower end side, respectively. In the capacitor 50 of FIG. 2, the via conductors 70 and the external electrodes 80 and 82 for the negative electrode, and the via conductors 71 and the external electrodes 81 and 83 for the positive electrode are arranged in a grid pattern or a staggered pattern in plan view.

  Returning to FIG. 1, one build-up layer 12 includes a resin insulating layer 14 above the core substrate 11, a resin insulating layer 15 above the resin insulating layer 14, and a solder resist layer 16 above the resin insulating layer 15. Are laminated. A conductor layer 31 is formed on the upper surface of the resin insulating layer 14, and a plurality of terminal pads 33 are formed on the upper surface of the resin insulating layer 15. A plurality of via conductors 30 are provided at predetermined positions of the resin insulating layer 14 to connect and connect the upper electrode of the through-hole conductor 22 and the external electrode layer 51 of the capacitor 50 to the conductor layer 31 in the stacking direction. In addition, a plurality of via conductors 32 that connect and conduct the conductor layer 31 and the plurality of terminal pads 33 in the stacking direction are provided at predetermined positions of the resin insulating layer 15. The solder resist layer 16 is opened at a plurality of locations to expose a plurality of terminal pads 33, and a plurality of solder bumps 34 are formed there. Each solder bump 34 is connected to each pad 101 of the semiconductor chip 100 placed on the wiring substrate 10.

  The other buildup layer 13 is formed by laminating a resin insulation layer 17 below the core substrate 11, a resin insulation layer 18 below the resin insulation layer 17, and a solder resist layer 19 below the resin insulation layer 18. Being done. A conductor layer 41 is formed on the lower surface of the resin insulating layer 17, and a plurality of BGA pads 43 are formed on the lower surface of the resin insulating layer 18. A plurality of via conductors 40 are provided at predetermined positions of the resin insulating layer 17 to connect and connect the lower electrode of the through-hole conductor 22 and the external electrode layer 52 of the capacitor 50 to the conductor layer 41 in the stacking direction. A plurality of via conductors 42 are provided at predetermined positions of the resin insulating layer 18 to connect and connect the conductor layer 41 and the plurality of BGA pads 43 in the stacking direction. The solder resist layer 19 is opened at a plurality of locations to expose a plurality of BGA pads 43 to which a plurality of solder balls 44 are connected. The plurality of solder balls 44 have a structure that can be electrically connected to an external substrate (not shown).

  In the cross-sectional structure of FIG. 1, for example, among the power supply voltage and the ground potential supplied to the semiconductor chip 100, the power supply voltage is connected to the positive electrode of the capacitor 50 and the ground potential is connected to the negative electrode of the capacitor 50. Therefore, on the upper side of the capacitor 50, the ground potential pad 101 and the external electrode 80 of the semiconductor chip 100 are connected via the solder bump 34, the terminal pad 33, the via conductor 32, the conductor layer 31, and the via conductor 30 of FIG. And the power supply voltage pad 101 of the semiconductor chip 100 and the external electrode 81 are electrically connected to each other. Similarly, on the lower side of the capacitor 50, via the via conductor 40, the conductor layer 41, the via conductor 42, the BGA pad 43, and the solder ball 44 of FIG. The terminals and the external electrodes 83 and the power supply voltage terminals of the external base material are electrically connected.

  Next, in the wiring board 10 of the present embodiment, the structure of the inner wall surface 20 of the core substrate 11 and the arrangement of the capacitors 50 in the housing portion 21 will be specifically described. FIG. 3 shows a schematic plan view of a range including the accommodating portion 21 in the wiring board 10 of FIG. In the lower part of FIG. 3, coordinate axes in the X direction and the Y direction that are orthogonal to each other are shown for convenience. The X direction coincides with the horizontal direction in FIG. 1, and the Y direction coincides with the depth direction in FIG. In the plan view of FIG. 3, a rectangular accommodating portion 21 defined by the inner wall surface 20 of the core substrate 11, a capacitor 50 accommodated in the accommodating portion 21, and a gap between the inner wall surface 20 and the capacitor 50 are illustrated. A filled resin filler F is shown. In practice, the external electrode layer 51 exists on the surface of the capacitor 50 in FIG. 3, but the illustration is omitted.

  The inner wall surface 20 of FIG. 3 is formed in a square shape with one side having a length L1 in plan view, and two inner wall surfaces 20x along two sides extending in the X direction and two inner wall surfaces 20y along two sides extending in the Y direction. And four corners 20c. Further, a pair of inner wall surfaces 20x and 20y constituting the inner wall surface 20 are formed with counterbore portions 20a formed of a plurality of concave portions protruding toward the outer peripheral side of the housing portion 21 in plan view. The capacitor 50 is formed in a square shape with one side having a length L2 in plan view, and two side surfaces of two orthogonal sides of the square are two inner wall surfaces 20x and 20y on which counterbore portions 20a are formed. It is arranged in a state of touching. That is, the capacitor 50 is arranged at a position where one corner thereof matches one corner 20 c of the inner wall surface 20. And the resin filler F is filled in the inside of each recessed part of the spot facing part 20a formed in the inner wall surfaces 20x and 20y.

  Here, FIG. 4 shows an example of the surface state of one inner wall surface 20y in which the spot facing portion 20a is formed in FIG. In the example of FIG. 4, a counterbore 20 a made up of five groove-like recesses extending in the Z direction (stacking direction) is shown on one inner wall surface 20 y. Each groove-like recess constituting the spot facing 20a has a semicircular cross-sectional shape in the XY plane. Further, the five groove-like recesses of the spot facing portion 20a have the same shape and are arranged in parallel at equal intervals. Each groove-like recess is formed in a semicircular shape having a diameter of 100 μm, for example. The counterbore 20a on the side of the other inner wall surface 20x is also composed of the same five groove-like recesses. It should be noted that the number of groove-like recesses of the spot facing portion 20a may be increased within a processable range without being limited to the example of FIG.

  Returning to FIG. 3, the gap portion filled with the resin filler F in the accommodating portion 21 has a width W, and there is a relationship of L1 = L2 + W with respect to the sizes of the accommodating portion 21 and the capacitor 50. The width W of the gap is appropriately set according to the deformation absorbing action of the resin filler F and the overall size of the wiring board 10. When attention is paid to each side surface of the capacitor 50, the two side surfaces facing the gap are all in contact with the resin filler F, whereas the two side surfaces facing the inner wall surface 20 are partially seated. It is in contact with the resin filler F in the bore portion 20a. In this case, the ratio of the area in contact with the resin filler F in the counterbore 20a to the area of the two side surfaces facing the inner wall surface 20 of each side surface of the capacitor 50 is not particularly limited. The ratio is set such that it can be sufficiently fixed to the wall surface 20.

  In the present embodiment, by adopting the structure of FIG. 3, it is possible to increase the positioning accuracy when the capacitor 50 is arranged in the housing portion 21. That is, assuming that the capacitor 50 is not located at one side but at the central position of the housing portion 21, in the example of FIG. 3, the four side surfaces of the capacitor 50 are equally spaced from the inner wall surfaces 20 facing each other. It is necessary to arrange them apart by W / 2. However, as the capacitor 50 and the accommodating portion 21 are both downsized, higher positioning accuracy is required, and it is difficult to accurately place the capacitor 50 at the center position of the accommodating portion 21. As a result, there may be a problem in the electrical connection between the upper and lower external electrodes 80, 81, 82, 83 and the via conductors 30, 40 due to the displacement of the capacitor 50. On the other hand, in the structure of FIG. 3, the two side surfaces sandwiching one corner of the capacitor 50 may be arranged without being spaced from the two inner wall surfaces 20x and 20y. Inevitably, high positioning accuracy can be ensured, and the capacitor 50 can be arranged with substantially the same positional accuracy as the core substrate 11. Therefore, it is possible to effectively prevent a failure in electrical connection caused by the displacement of the capacitor 50.

  In the present embodiment, the case in which both the accommodating portion 21 and the capacitor 50 are square in plan view is shown, but the shape is not limited to a square and may be a more complex polygon. In other words, as long as at least two adjacent inner wall surfaces of the inner wall surface 20 defining the housing portion 21 are in contact with the side surface of the capacitor 50, the shapes of the housing portion 21 and the capacitor 50 are not limited. Further, the shape of the corner 20c of the inner wall surface 20 is not limited to the example of FIG. 3, and chamfering such as R chamfering or C chamfering may be performed in a plan view.

  In the present embodiment, the spot facing portion 20a formed on the inner wall surface 20 of the core substrate 11 is not limited to the structure shown in FIGS. 3 and 4, and various changes can be made. FIG. 5 is a diagram showing a modification of the spot facing portion 20a, and corresponds to the surface state of the inner wall surface 20y similar to FIG. 5 has a counterbore 20a including a plurality of groove-like recesses extending in the Y direction (horizontal direction) in addition to a plurality of groove-like recesses extending in the Z direction (stacking direction) similar to FIG. Is formed. That is, each recess extending in the Y direction has a semicircular cross-sectional shape in the XZ plane, and is orthogonal to each recess extending in the Z direction. In the example of FIG. 5, five groove-like recesses in the stacking direction and two groove-like recesses in the horizontal direction are combined, but the number and interval of each can be set as appropriate. By adopting the modification of FIG. 5, compared with FIG. 4, the groove-like recesses of the counterbore part 20 a are connected to each other, so that the resin filler F can be smoothly filled therein, and The area of the resin filler F can be easily increased, and the capacitor 50 facing the inner wall surface 20 can be reliably fixed.

  In the present embodiment, the arrangement of the capacitors 50 in the accommodating portion 21 provided on the core substrate 11 is not limited to the example of the plan view of FIG. 3, and various changes can be made. FIG. 6 is a plan view showing a modification regarding the arrangement of the capacitors 50 in the accommodating portion 21. In the modification of FIG. 6, four capacitors 50 are arranged in the accommodating portion 21. That is, one capacitor 50 is disposed in each of the four corners 20 c of the inner wall surface 20 of the core substrate 11. Then, using the same length L1 as in FIG. 3, the accommodating portion 21 has a square shape with one side length L1 in plan view, and each capacitor 50 has a square shape with one side length L3 in plan view. Further, the gap portion of each capacitor 50 has a width W, and the total area of the portion filled with the resin filler F is equal to that in FIG. In this case, since there is a relationship of L1 = 2 × L3 + W, the length L3 of one side of the capacitor 50 in FIG. 6 is half of the length L2 in FIG. By adopting the modified example of FIG. 6, it is possible to increase the positioning accuracy of each capacitor 50 while reducing the size of the plurality of capacitors 50 and efficiently disposing them in one accommodating portion 21. Note that the present invention is not limited to the case where the four capacitors 50 are disposed in the accommodating portion 21 of the core substrate 11, and two or three capacitors 50 may be disposed in the two or three corner portions 20 c in the accommodating portion 21. Good.

  Further, in the present embodiment, the sectional shape of the inner wall surface 20 of the core substrate 11 in plan view is not limited to the example of the semicircular sectional shape in FIG. 3, and various changes can be made. FIG. 7 shows a plurality of specific examples of the cross-sectional shape of the spot facing portion 20a of the inner wall surface 20. For example, as illustrated in FIG. 7A, a counterbore portion 20 a having a square cross-sectional shape may be formed on the inner wall surface 20. Further, for example, as illustrated in FIG. 7B, a counterbore portion 20 a having a triangular cross-sectional shape may be formed on the inner wall surface 20. Further, for example, as shown in FIG. 7C, a counterbore 20 a having a wavy cross-sectional shape may be formed on the inner wall surface 20. In the example of FIG. 7C, since the linear shape is not included in the cross-sectional shape of the inner wall surface 20, the contact area between the inner wall surface 20 and the capacitor 50 is reduced, but there is no hindrance to the positioning of the capacitor 50. . As described above, the cross-sectional shape of the inner wall surface 20 can be freely set as long as the capacitor 50 can be positioned and can be partially filled with the resin filler F.

  Next, an outline of a method for manufacturing the wiring board 10 of this embodiment will be described. First, the base material of the core substrate 11 used for the wiring substrate 10 is prepared. In general, a base material having a size capable of obtaining a plurality of wiring boards 10 is used, but only the components of one wiring board 10 are illustrated for simplicity. As shown in FIG. 8, a through-hole may be formed along the inner wall surface 20 that defines the accommodating portion 21 by, for example, performing processing using a router on the base material that becomes the core substrate 11. At this time, the counterbore 20 a can be formed on the inner wall surface 20 at the same time. For example, when the counterbore 20a shown in FIG. 3 is formed, a plurality of groove-shaped recesses are formed by processing the inner wall surfaces 20x and 20y along the two sides along a semicircular cross-sectional shape by a router. do it. Alternatively, drilling using a drilling machine is performed in advance at the position where the counterbore 20a is formed to form a plurality of groove-shaped recesses in the stacking direction, and thereafter punching is performed from above the core substrate 11 to accommodate the accommodating portion 21. May be formed. As shown in FIG. 5, when the counterbore 20a including the groove-shaped recess extending in the horizontal direction is formed, it is not possible to process the both ends of each groove-shaped recess. In this case, by using the core substrate 11 in which a plurality of glass fiber layers extending in the horizontal direction are arranged in a stripe pattern, the glass fiber layer exposed to the inner wall surface 20 is selectively melted by chemical treatment, thereby extending in the horizontal direction. A counterbore 20a including a plurality of groove-shaped recesses can be formed.

  On the other hand, the capacitor 50 shown in FIG. 2 is prepared. For example, after a laminated body having the internal electrode layers 60 and 61 is formed by a known method using a ceramic green sheet, the via conductors 70 and 71 and the external electrodes 80 to 83 are formed on the laminated body, and the laminated body The capacitor 50 is completed through the firing process. Moreover, as shown in FIG. 9, after forming a through-hole in the formation position of the through-hole conductor 22 of the core board | substrate 11 by the drilling process using a drill machine, electroless copper plating and electrolysis are carried out with respect to this through-hole. Through-hole conductors 22 are formed by performing copper plating. And after the paste which has an epoxy resin as a main component is printed in the cavity part of the through-hole conductor 22, the obstruction | occlusion body 23 is formed by hardening.

  Next, as shown in FIG. 9, a peelable adhesive tape 200 is placed in close contact with the bottom of the core substrate 11. The adhesive tape 200 is supported by a support table 201. In this state, the capacitor 50 is placed at a predetermined position in the housing portion 21 while being positioned from above the core substrate 11 using the mounting device. At this time, as shown in the plan view of FIG. 3, a slight pressing force is applied so that the capacitor 50 is partially in contact with one corner 20c and the two inner wall surfaces 20x and 20y. The bottom surface of the capacitor 50 can be attached to the adhesive tape 200 and temporarily fixed while maintaining this state. Instead of the mounting device, an operator of the process may directly place the capacitor 50 at a predetermined position in the housing portion 21.

  Next, the gap between the inner wall surface 20 of the core substrate 11 and the side surface of the capacitor 50 is filled with a resin filler F made of a thermosetting resin using a dispenser device. At this time, the resin filler F enters the inside of each recess that constitutes the counterbore 20a of the inner wall surface 20 with which the capacitor 50 contacts. And the capacitor | condenser 50 is fixed in the state which contacted the inner wall surface 20 in the inside of the accommodating part 21 by heat-processing and hardening the resin filler F. FIG. Thereafter, as shown in FIG. 10, the adhesive tape 200 is peeled after the capacitor 50 is fixed, and the adhesive material remaining on the lower surface of the core substrate 11 and the external electrode layer 52 on the back surface of the capacitor 50 is removed with a solvent.

  Here, in FIG. 8 to FIG. 10, the procedure for filling the resin filler F after the capacitor 50 is accommodated in the accommodating portion 21 has been described, but such a procedure may be reversed. That is, prior to housing the capacitor 50 at a predetermined position in the housing portion 21, the inside of the housing portion 21 may be filled with the resin filler F in advance. In this case, if the viscosity of the resin filler F is high, it is difficult to place the capacitor 50 in the housing portion 21. Therefore, it is desirable to use the resin filler F having a low viscosity. Similarly to the above, after the resin filler F is heated and cured, the capacitor 50 can be fixed to the inner wall surface 20.

  Next, referring back to FIG. 1, the upper and lower buildup layers 12 and 13 of the core substrate 11 containing the capacitor 50 are formed according to a known method. That is, the insulating resin material is cured by laminating a film-like insulating resin material containing epoxy resin as a main component and pressurizing and heating, and the resin insulating layers 14 and 17 are formed on the upper and lower surfaces of the core substrate 11. Next, laser processing is performed on the upper and lower resin insulating layers 14 and 17 to form a plurality of via holes, and after a desmear treatment, a plurality of via conductors 30 and 40 are formed in each via hole. Then, patterning is performed on the surfaces of the resin insulating layers 14 and 17 to form the conductor layers 31 and 41. Next, the film-like insulating resin material is further laminated on the surfaces of the resin insulating layers 14 and 17, and the insulating resin material is cured by pressurizing and heating to form the resin insulating layers 15 and 18. Then, a plurality of via conductors 32 and 42 are formed in the resin insulating layers 15 and 18 by the same method as the via conductors 30 and 40 described above.

  Next, as shown in FIG. 1, a plurality of terminal pads 33 are formed above the resin insulating layer 15, and a plurality of BGA pads 43 are formed below the resin insulating layer 18. Next, solder resist layers 16 and 19 are formed by applying and curing a photosensitive epoxy resin on the upper surface of the resin insulating layer 15 and the lower surface of the resin insulating layer 18, respectively. Thereafter, openings are patterned in the solder resist layer 16 to form a plurality of solder bumps 34 connected to the plurality of terminal pads 33. Also, the openings are patterned in the solder resist layer 19 to form a plurality of solder balls 44 connected to the plurality of BGA pads 43. The wiring board 10 of this embodiment is completed by the above procedure.

  The contents of the present invention have been specifically described above based on the present embodiment, but the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, in the present embodiment, the wiring board 10 in which the capacitor 50 as a built-in component is housed in the housing portion 21 provided in the core substrate 11 has been described. For example, a built-in component other than the capacitor 50 such as an inductor is included in the housing portion 21. The present invention is widely applied even when accommodated. In addition, the contents of the present invention are not limited by the above-described embodiment with respect to other points, and are appropriately modified without being limited to the contents disclosed in the above-described embodiment as long as the effects of the present invention can be obtained. Is possible.

DESCRIPTION OF SYMBOLS 10 ... Wiring board 11 ... Core board | substrate 12, 13 ... Buildup layer 14, 15, 17, 18 ... Resin insulation layer 16, 19 ... Solder resist layer 20 ... Inner wall surface 20a of core board | substrate ... Counterbore part 20c ... Corner | angular part 20x ... Inner wall surface (X direction)
20y ... Inner wall surface (Y direction)
21 ... Housing 22 ... Through-hole conductor 23 ... Closures 31, 41 ... Conductor layers 30, 32, 40, 42 ... Via conductor 33 ... Terminal pad 34 ... Solder bump 43 ... BGA pad 44 ... Solder ball 50 ... Capacitor 51 52 ... external electrode layer 53 ... ceramic dielectric layers 60, 61 ... internal electrode layers 70, 71 ... via conductors 80, 81, 82, 83 ... external electrode 100 ... semiconductor chip 101 ... pad F ... resin filler

Claims (10)

A core substrate, a housing portion penetrating the upper and lower surfaces of the core substrate, a built-in component housed in the housing portion, and an insulating layer and a conductor layer alternately on at least one of the upper surface side and the lower surface side of the core substrate In the wiring board with built-in components provided with the laminated wiring layer,
The accommodating portion is defined by an inner wall surface of the core substrate including a first inner wall surface and a second inner wall surface extending in different directions in plan view;
The built-in component is housed in the housing portion in a state of being in partial contact with each of the first inner wall surface and the second inner wall surface,
In the gap between the inner wall surface and the built-in component, a resin filler is filled in a region where the built-in component is not in contact with the first inner wall surface and the second inner wall surface.
A wiring board with a built-in component.   The first inner wall surface and the second inner wall surface that define the housing portion have a counterbore portion composed of one or a plurality of recesses, and the resin filler is placed in each recess of the counterbore portion. The component built-in wiring board according to claim 1, wherein the wiring board is filled.   3. The component built-in wiring board according to claim 2, wherein the counterbore part includes a plurality of groove-shaped recesses formed along a stacking direction.   3. The component built-in wiring according to claim 2, wherein the spot facing portion includes a plurality of groove-shaped recesses formed along the stacking direction and a plurality of groove-shaped recesses formed along the planar direction. substrate. The housing part and the built-in component are formed in a substantially rectangular shape in plan view, and the built-in component has a smaller outer shape than the housing part,
The accommodating portion is formed with at least one corner portion by the first inner wall surface and the second inner wall surface,
The built-in component is arranged at the corner so that the first side surface and the second side surface of the built-in component that intersect each other are in contact with the first inner wall surface and the second inner wall surface, respectively.
The component built-in wiring board according to any one of claims 1 to 4, wherein the wiring board has a built-in component.   The component built-in wiring board according to claim 5, wherein the housing portion houses four built-in components respectively disposed at four corners of a substantially rectangular shape.   The component built-in wiring board according to claim 1, wherein the built-in component is a capacitor. A housing portion that is prepared by an inner wall surface of the core substrate that includes a first inner wall surface and a second inner wall surface that prepare a core substrate and penetrate the upper and lower surfaces of the core substrate and extend in different directions in plan view An accommodating portion forming step for forming
A positioning step of preparing a built-in component and positioning the built-in component so as to partially contact each of the first inner wall surface and the second inner wall surface of the core substrate;
A filling step of filling a resin filler in a region where the built-in component is not in contact with the first inner wall surface and the second inner wall surface in the gap between the inner wall surface and the built-in component;
A laminating step of alternately laminating insulating layers and conductor layers on at least one of the upper surface side and the lower surface side of the core substrate;
The manufacturing method of the component built-in wiring board characterized by including. A housing portion that is prepared by an inner wall surface of the core substrate that includes a first inner wall surface and a second inner wall surface that prepare a core substrate and penetrate the upper and lower surfaces of the core substrate and extend in different directions in plan view An accommodating portion forming step for forming
A filling step of filling the container with a resin filler;
A built-in component is prepared, and the built-in component is positioned so as to be partially in contact with each of the first inner wall surface and the second inner wall surface of the core substrate in a state where the housing portion is filled with a resin filler. Then, a positioning step of curing the resin filler,
A laminating step of alternately laminating insulating layers and conductor layers on at least one of the upper surface side and the lower surface side of the core substrate;
The manufacturing method of the component built-in wiring board characterized by including these.   In the said accommodating part formation process, the counterbore part which consists of a 1 or several recessed part is formed in the said 1st inner wall surface and the said 2nd inner wall surface of the said core board | substrate, The Claim 8 or 9 characterized by the above-mentioned. The manufacturing method of the component built-in wiring board of description.