JP2013058530A - Multi-chip composite lead frame and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a new composite lead frame structure for a multi-chip intended to eliminate advanced processing required in advance when bonding leads of two types of support substrates, a metallic substrate and an organic material substrate, and a variety of inconvenience, in a composite lead frame structure having semiconductor chips mounted above and below the central portion of the lead frame.SOLUTION: A multi-chip composite lead frame 1 for mounting mutually different semiconductor chips above and below the central portion of the lead frame at least includes: an inner lead frame group 11 disposed toward the one semiconductor chip to deal with at least one semiconductor chip; an inner lead frame group 12 disposed toward another semiconductor chip to deal with the other semiconductor chip; and a semiconductor chip island composed of an insulative resin sheet 14 fixed to and supported by the end portion of any one of the inner lead frame groups.

Description

  The present invention relates to an inner lead structure of a composite lead frame on which a plurality of semiconductor chips can be mounted.

  Silicon semiconductors such as ICs and LSIs (hereinafter referred to as “semiconductor chips” or simply “chips”) have 100 to 1000 connection terminals on the upper and lower surfaces of the semiconductor chip, but this pitch is generally very narrow. (˜100 μm) Cannot be directly mounted on a printed circuit board. Therefore, a packaging process is performed in which the terminal pitch of the semiconductor as shown in FIG. 3 is mounted on an intermediate substrate that expands to an easily connectable pitch (˜1 mm), and then the shape is adjusted to be easy to handle. This packaging process includes a plurality of processes. In principle, one semiconductor chip is mounted on a lead frame 1 as an intermediate substrate.

  The lead frame 1 (hereinafter also referred to as LF) is manufactured by pressing or etching a metal plate having a certain rigidity made of aluminum or iron / nickel alloy, and includes a plurality of leads corresponding to the number of terminals of the chip and 1 It consists of 4 islands. The lead includes an inner lead 9 electrically connected to the terminal 2 of the semiconductor chip mounted on the island 4 and an outer lead 10 connected to a terminal for connecting to an external device. The inner leads 9 and the outer leads 10 are the same metal wiring, but the former has a narrow pitch toward the island 4, and the outer leads 10 are obtained by extending the inner leads 9 radially outward from the island 4.

  In a general LF, the terminals 2 and the inner leads 9 on the semiconductor chip mounted on the island 4 are connected by wire bonding with Au wires 3. In addition, the LF comes with a support frame 8, a suspension bar 6 and a dam bar 7 that keep the leads together so that the leads do not fluctuate. It is cut at a certain stage.

  As an intermediate substrate other than LF, there is a wiring substrate obtained by processing a copper foil radially for pitch expansion by a photolithography technique using a resin film with copper foil or a plastic substrate with copper foil. Although the wiring configuration and usage are the same as those of LF, the thickness of the metal portion can be reduced by virtue of the support made of resin, so that there is an advantage that fine processing can be performed as compared with the case of patterning leads by etching processing.

  In order to mount a multi-pin semiconductor chip, it is necessary to increase the number of leads. At that time, it is necessary to further reduce the line width of the inner lead 9. In order to reduce the size by etching, it is necessary to make the thickness of the metal composing the lead frame 1 thinner than the gap between the inner leads. However, if the thickness is too thin, the self-supporting property of the inner lead and the rigidity necessary for the outer lead as the external connection terminal cannot be maintained.

  Therefore, in order to increase the number of inner leads, a technique has been developed in which the island 4 of the lead frame 1 and the inner lead 9 portion facing the lead frame 1 are replaced with a wiring board that is provided with metal wiring on the film and is easy to finely process. TAB). Since the copper foil on the resin substrate such as a film is thinner than LF, fine processing is possible. The inner lead of the LF needs to be connected to an outer lead such as TAB, but this is done by overlapping and joining the outer lead portion to the inner lead (Patent Document 1).

Among those belonging to the same technical idea, there is one using a plastic wiring board instead of a film-like TAB (Patent Document 2). Based on the LF structure, the only difference is whether the center is a film or a more rigid plastic plate.
Both of these are integrated by connecting the leading end portion of the lead inside the lead frame and the outer lead of the wiring board, and are called a composite lead frame (Patent Document 2).

  Another direction in which the lead frame 1 is expanded is a multichip compatible LF in which a plurality of semiconductor chips can be mounted. Such a multi-chip type has an advantage that, when developing a new integrated circuit, the TAT (Turn Around Time) can be shortened rather than integrating a plurality of integrated circuit chips into one chip, so that development investment can be reduced. is there. Since existing semiconductor chips and their assembly lines and test processes can be used, it is easier to make custom ICs than hybrid ICs, and only LF is newly developed (Patent Document 3).

  As a multi-chip composite lead frame, there are a form in which a plurality of chips are arranged on a central wiring board, a form in which they are stacked vertically, and a combination thereof. As for the vertical direction, there are a form of overlapping one chip on the back, a form of placing IC chips on the front and back of the substrate, and a combination thereof. The connection terminals of the chip, the LF, and the leads of the wiring board are usually connected by wire bonding, and the LF and the leads of the wiring board (TAB or plastic substrate) at the center are overlapped and connected by metal bonding. .

However, the composite frame itself adds a TAB or plastic wiring board manufactured by another etching process to the LF manufactured by one etching or pressing process, and there is a problem that it becomes expensive compared to the LF. is there.
In particular, when a lead terminal on a plastic substrate or TAB tape is joined to a lead on the lead frame side, the former lead terminal needs to be plated with Au and joined at a high temperature in order to reduce the electrical resistance. In this respect, the composite lead frame becomes expensive.

  Furthermore, since a plastic substrate or a TAB tape base material, which is a composite material of an organic material and a metal, generally expands at a high temperature, it must be bonded to LF at the lowest possible temperature. On the other hand, stabilization of metal bonding requires high-temperature and short-time bonding. Thus, there is a trade-off relationship between the effects of conflicting thermal loads between the metal terminal on the organic wiring board and the metal lead frame. In addition to this, there is a large difference between the thermal expansion coefficients of both materials, and there is a problem that it is difficult to obtain a stable metal joint because peeling stress is generated from the thermal shrinkage difference after joining.

  When mounting a plurality of chips with a composite lead frame, it is necessary to form a metal wiring on the front and back of the central wiring board and simultaneously perform through-hole processing to guide the wiring on the back surface to the front surface. In order to join an Au-plated plastic substrate or TAB tape and an Ag-plated lead frame (LF), alignment accuracy between the leads is required, and workability is lowered. All of these have the problem of increasing costs.

Japanese Patent Application No. 3-154848 Japanese Patent Application No. 3-170242 Japanese Patent No. 2582013

Therefore, the present invention requires in advance when joining leads of two different types of support substrates, a metal substrate and an organic material substrate, in a multi-chip composite lead frame structure in which semiconductor chips are mounted above and below the center of the lead frame. The purpose of this invention is to provide a new composite lead frame structure compatible with multi-chip.

  The invention according to claim 1 for solving the above-mentioned problem is a lead frame for mounting different semiconductor chips above and below the central portion of the lead frame, and the semiconductor for accommodating at least one semiconductor chip. An inner lead group that faces the chip, an inner lead group that faces the semiconductor chip to correspond to another semiconductor chip, and an organic insulating resin sheet that is fixed and supported at an end of one of the inner lead groups A multi-chip composite lead frame comprising a semiconductor chip island.

  Next, according to a second aspect of the present invention, the tip of the inner lead group to which the organic insulating resin sheet is fixed is closer to the center than the tip of another inner lead group, and the resin sheet is accommodated. Thus, the multi-chip composite lead frame according to claim 1, wherein the multi-chip composite lead frame is thinner than the tip portion by being half-etched.

  Next, the invention according to claim 3 is a semiconductor device using the multi-chip composite lead frame according to claim 1 or 2, wherein the semiconductor is mounted on one surface of the semiconductor chip island. The chip is connected to one inner lead group by wire bonding, and another semiconductor chip mounted on the other surface is also connected to another inner lead group by wire bonding, followed by a predetermined packaging process. This is a semiconductor device.

  Next, the invention described in claim 4 is a semiconductor device using the multi-chip composite lead frame according to claim 1 or 2, wherein the semiconductor is mounted on one surface of the semiconductor chip island. The chip is connected to one inner lead group by wire bonding, and another semiconductor chip mounted on the other surface is flip-chip connected to another inner lead group, and then a predetermined packaging process is performed. This is a semiconductor device.

In the present invention, the inner leads of the lead frame are divided into two groups corresponding to the two semiconductor chips and the length is changed, and the organic insulating resin is fixed to the inner lead having the longer length. By using a flat organic insulating resin at the center of the lead frame as an island as a semiconductor chip mounting surface, a plurality of semiconductor chips can be mounted vertically.
It is important that there are a plurality of different semiconductor chips, and the same semiconductor chip may be used.

  Although semiconductor chips can be mounted on the front and back of the island, the substrate as an island is simply mounted with a semiconductor chip and does not require wiring processing or through-hole conduction unlike a conventional composite lead frame. Therefore, there is no wiring terminal itself, and surface treatment such as Au or Ag is unnecessary. Naturally, there is no metal bonding between the lead of the outer lead frame and the lead of the inner island substrate, and no alignment process is required. Further, since there is no bonding process at high temperature necessary for metal bonding between the leads, there is no decrease in strength of the metal bonding portion due to fixing a different material at high temperature.

An organic insulating resin is bonded and fixed to the long inner lead at the bottom of the island, and the terminals of the semiconductor chip mounted on the upper surface and the short inner lead are connected by wire bonding, but mounted on the back surface. For the connection between the semiconductor chip and the long inner lead fixed to the organic insulating resin, either wire bonding or flip chip connection can be selected. This choice will depend on the size of the chip mounted on the back side. Flip chip connection is preferable if the chip size is such that the inner lead penetrates into the lower side of the chip. If it does not enter, wire bonding is selected.
Therefore, there are few restrictions on the terminal connection method of the semiconductor chip, the selection range of the semiconductor chip is widened, and a highly functional and multifunctional semiconductor device can be easily manufactured.

  In the conventional composite lead frame, since another wiring board is bonded to the lead frame, the thickness of the base material becomes the total thickness of (lead frame + wiring board). On the other hand, if a half-etched portion is provided at the tip of the inner lead of the LF base and the organic insulating resin is accommodated on the half-etched portion, a thinner semiconductor device can be obtained.

  Furthermore, the processed TAB or plastic substrate used for the composite is expensive because it uses a processed one, but the composite lead frame according to the present invention simply cuts the insulating resin sheet provided on the inner lead, etc. Since there is no need for processing, an inexpensive composite lead frame can be provided.

It is drawing explaining the structure of the lead frame which becomes this invention, Comprising: (a) Top view, (b) Sectional drawing. (A)-(f) It is process drawing of the cross sectional view explaining the manufacturing process of the semiconductor device which becomes this invention. It is a figure of the bottom view explaining the state of the conventional lead frame structure and semiconductor chip mounting.

  The lead frame 1 according to the present invention includes an inner lead 9, an outer lead 10 and an island 4 included in a general lead frame (FIG. 3) as shown in FIGS. The inner lead 9 is divided into a first group and a second group having different lengths so as to correspond to two semiconductor chips, and the inner lead 11 belonging to the first group is an insulating resin sheet serving as an island. The length of the second group 12 is lengthened so as to support 14, and the length of the second group 12 is relatively shortened so that the tip is outside the insulating resin sheet 14, and the insulating resin sheet is used instead of the metal island. 14 is used.

Furthermore, for the tip of the inner lead that supports the insulating resin sheet 14 belonging to the first group, the thickness is reduced by half-etching, and if the insulating resin sheet 14 is laid so that it fits, Even if a semiconductor chip is mounted thereon, the overall thickness does not increase.
In FIG. 1A, the leads are shown in one lump without being subdivided, but the details of the arrangement of the leads are the same as in FIG. Also, in FIG. 1 (b), the lead is drawn in two steps, but the lead is shown in two steps to show that the lengths of the first group and the second group are different. There is something.

  The method of collecting the inner lead ends of the first group and the second group is not limited to the quadrangular shape or the substantially quadrangular shape shown in FIG. Although it may be in any shape, it is preferable that there is some kind of central symmetry (rotational symmetry). Although the lead group is divided into the first group and the second group, the leads themselves are on the same plane as described above, so how to divide into the first group and the second group is the end index of the mounted semiconductor chip. And their arrangement mode. It is not necessary to connect all the divided leads 11 and 12 to the corresponding semiconductor chip terminals.

  Hereinafter, the present invention will be described with reference to FIG. 2 and FIG. 1 in accordance with the manufacturing process of a composite lead frame having semiconductor chips above and below the center of the LF and a semiconductor device packaged with the composite lead frame. On the insulating resin sheet 14, you may arrange in parallel in the range which can electrically connect a semiconductor chip.

(Lead frame manufacturing process)
The lead frame is formed by simultaneously processing a lead or unit lead frame having a predetermined pattern on a sheet-like or strip-like metal plate in a state where the lead frame is arranged in a multi-sided manner in the vertical and horizontal directions. Then, a single lead frame is described. Finally, the other imposition is cut into pieces.

  First, a photoresist is applied to the surface of an alloy thin plate such as iron-nickel or a metal plate made of a metal alloy such as copper-nickel-tin to form a photoresist layer. Next, in order to form a resist pattern on the outer lead and inner lead having an electrical connection area at the end, a support frame connected to these leads, and a portion serving as a suspension bar and tie bar, an exposure photomask having a predetermined pattern is used. Then, the photoresist layer is irradiated with ultraviolet rays.

  Next, the photoresist layer is developed and, if necessary, hardened. As a result, the photoresist is developed and removed, leaving the lead portion other than the portion on which the insulating resin sheet at the tip of the inner lead is placed, and the portions that become the suspension bar and tie bar.

  Similarly, after a photoresist is applied to the back surface of the metal plate to form a photoresist layer, a series of processes such as pattern exposure and development are performed. In pattern exposure, the photoresist is developed and removed, leaving the entire inner lead and the portions serving as the suspension bar and tie bar, thereby forming a resist pattern.

  Next, an anti-corrosion-resistant resin film is attached to the back surface of the metal plate, and the photoresist non-formation portion on the surface from the surface side of the metal plate 1 to a predetermined depth (approximately ½ of the LF thickness). Etching process (half etching process) is performed using an etchant such as ferric chloride. The area where the insulating resin sheet 14 is placed is also half-etched. After cleaning, a corrosion-resistant resin film is attached to the surface.

  Next, the anti-corrosion resin film on the back surface of the metal plate is peeled off, and ferric chloride or the like from the back surface side of the metal plate to the non-photoresist-formed portion on the back surface to a predetermined depth (approximately ½ of the LF thickness) When the etching process is performed using this etchant, a penetrating portion is formed in a metal portion where the resist pattern on the front surface and the back surface is not formed. As a result, the lead frame 1 including the first group of inner leads 11, the second group of inner leads 12, and the like, although not shown in detail in the drawing, is formed (FIG. 2B).

  The back side of the half-etched portion at the tip of the inner lead 11 is protected by a resist so that it is not etched, so it does not penetrate and remains in a half-etched state. In FIG. 2, the half etching is omitted. The etching process for forming the lead frame 1 is performed once on each of the front and back surfaces for a total of two times. However, the metal plate 1 may be etched once from the front and back surfaces simultaneously.

(Attaching an insulating resin sheet)
Next, an insulating resin sheet 14 having a predetermined size is fixed to the half-etched portion of the first inner lead group with an adhesive at the opening of the second inner lead group (FIG. 2C). As shown in FIG. 1B, half-etching is not always necessary, but in this case, the thickness is increased accordingly. The insulating resin sheet 14 is preferably a sheet made of a thermosetting resin such as an epoxy resin, or a heat-resistant thermoplastic resin such as PPA or a liquid crystal polymer.

(Semiconductor chip mounting process)
The first semiconductor chip 15 is bonded (die-bonded) to the upper surface of the insulating resin sheet 14 of the lead frame 1 obtained in this way, for example, with an adhesive. Then, the semiconductor chip 15 and the inner lead 12 are connected by wire bonding the Au wire 16 to the terminal on the upper surface of the semiconductor chip and the electrical connection area on the upper surface of the second inner lead by a wire bonder. Thus, the semiconductor chip 15 was mounted on the upper surface of the lead frame 1.

Next, the second semiconductor chip 17 is bonded (die-bonded) to the lower surface of the insulating resin sheet 14 with an adhesive, and then the terminals on the upper surface of the semiconductor chip 17 and the upper surfaces of the longer lead group are bonded with a wire bonder. The second semiconductor chip and the inner lead are connected by wire bonding the Au wire 16 to the electrical connection area. Thus, the second semiconductor chip is mounted on the lower surface of the lead frame for the semiconductor light emitting device and electrically connected.
The second chip 17 may be flip-chip connected. Conductivity can be obtained by aligning the solder balls mounted on the back surface of the chip and the inner leads plated with Au and then passing them through a reflow furnace (the right side of FIG. 2 (d)).

(Plating treatment)
It is preferable to form an Ag plating layer after forming a clean surface by removing the oxide film on the surface of the electrical connection area at the end of the LF lead prior to wire bonding. The plating may be gold plating or palladium plating instead of silver plating. Further, prior to performing silver plating, gold plating, and palladium plating, base plating such as Ni (nickel) plating having excellent heat diffusion properties may be performed.

(Molding process)
Next, the metal plate and the semiconductor chip are covered with a mold resin in a predetermined shape by performing resin mold molding using a mold on the LF. Since the mold resin 18 generally has polar groups, these polar groups are combined with an oxide film on the surface of the LF, and there is an effect of improving the adhesion between the LF metal and the mold resin. That is, by bringing the mold resin into contact with the oxide film formed on the LF, the adhesiveness at the interface between the mold resin and the LF metal plate becomes excellent, and the lead frame 1 with high moisture resistance reliability can be obtained.

  As a mold used for resin molding, a mold in which a recess in which the lead frame 1 is accommodated and the injection resin has a desired shape is formed in advance. The mold generally has a set of a plate-shaped upper mold and a lower mold that serve as a lid. In the lower mold, an injection port for injecting a mold resin to be melted and a recess in which the lead frame 1 can be loaded are formed as an internal space.

  In resin molding, first, the lead frame 1 is loaded in the recess of the lower mold, and then the upper mold is covered with a lid on the lower mold and clamped. Next, a mold resin heated and melted is injected into the internal space from the injection port, and a mold resin 18 is molded into the loaded lead frame 1 to obtain a lead frame filled with the resin. Here, when the mold resin 18 is injected into the mold, the lead frame 1 is sequentially moved from one unit frame in the vicinity of the resin injection port to another one unit frame in a part away from the injection port. Resin flows and is molded with resin. If it is removed from the mold after cooling, a molded semiconductor device 19 is obtained (FIG. 2E).

Further, the depth of the recess of the lower mold (the height of the internal space) is formed to be substantially the same as the thickness of the lead frame 1 so that the mold resin 18 does not adhere to the front and back surfaces of the lead frame 1 during resin molding. . Thereby, when the lead frame 1 is loaded in the mold, the surface of the lead frame 1 is brought into close contact with the surface of the upper mold, and the back surface is brought into close contact with the surface of the lower mold.

  The mold resin used in this molding is desirably heat resistance, light resistance, and thermal conductivity, and a thermoplastic resin or a thermosetting resin can be used. For example, epoxy resin, modified epoxy resin, silsesquioxane resin, silicone resin, acrylic resin, polycarbonate resin, aromatic polyester resin (unsaturated polyester resin), polyamide resin (aromatic polyamide (PPA)), poly Organic polymer materials such as phthalamide (PPA), liquid crystal polymer (LCP), and cycloolefin resin are desirable, and one kind of resin or a mixed resin of a plurality of kinds of resins may be used.

(Metal plating process)
Next, as shown in FIG. 4 (e), the surface of the outer lead exposed from the mold resin 18 is made of a hard material such as a glossy or semi-glossy Ni (nickel) plating or a Co (cobalt) plating having excellent heat diffusion properties. The base plating layer 1c is formed to a thickness of 0.5 to 8 μm.

  In particular, when the metal plating layer is formed on the surface of the outer lead exposed from the mold resin after filling the gap of the metal plate with the mold resin, if the mold resin remains thin on a part of the surface of the lead, No metal plating layer is formed, and residual contamination on the lead surface is easily detected. If it responds quickly, there is an advantage that productivity is excellent as a result.

(Division into pieces)
Next, the semiconductor device on the other side is divided into pieces. The divided pieces become individual semiconductor devices. The tip portion is bent so that the outer lead is easily accommodated in the dedicated socket, or the resin mold is further covered with a dedicated case.
In this manner, a desired multichip-compatible semiconductor device is obtained (FIG. 2F).

1. Lead frame (or its base material)
2, connection terminal 3, Au wire (WB)
4, island 5, tie bar 7, dam bar 6, suspension bar 8, support frame 9, inner lead 10, outer lead 11, first inner lead 12. Second inner lead 13, outer lead (details omitted)
14. Insulating resin sheet 15, first semiconductor chip (upper side)
16, wire bond 17, second semiconductor chip (lower side)
18, mold resin 19, semiconductor device

Claims (4)

A lead frame for mounting different semiconductor chips above and below the center of the lead frame, at least,
An inner lead group directed to the semiconductor chip corresponding to one semiconductor chip, an inner lead group directed to the semiconductor chip corresponding to another semiconductor chip, and fixed to an end of one of the inner lead groups A multi-chip composite lead frame, comprising: an island for a semiconductor chip made of an organic insulating resin sheet that is supported.   The tip portion of the inner lead group to which the organic insulating resin sheet is fixed is closer to the center than the tip portion of another inner lead group, and the tip portion is half-etched so that the resin sheet is accommodated. The composite lead frame for multichip according to claim 1, wherein the thickness is thinner than the other.   3. A semiconductor device using the multi-chip composite lead frame according to claim 1 or 2, wherein the semiconductor chip mounted on one surface of the semiconductor chip island is connected to one inner lead group by wire bonding. The semiconductor device is characterized in that another semiconductor chip mounted on the other surface is also wire-bonded to another inner lead group and then subjected to a predetermined packaging process.   3. A semiconductor device using the multi-chip composite lead frame according to claim 1 or 2, wherein the semiconductor chip mounted on one surface of the semiconductor chip island is connected to one inner lead group by wire bonding. Another semiconductor chip mounted on the other surface is flip-chip connected to another inner lead group, and then subjected to a predetermined packaging process.