JP2013054372A5 - - Google Patents

Download PDF

Info

Publication number
JP2013054372A5
JP2013054372A5 JP2012237397A JP2012237397A JP2013054372A5 JP 2013054372 A5 JP2013054372 A5 JP 2013054372A5 JP 2012237397 A JP2012237397 A JP 2012237397A JP 2012237397 A JP2012237397 A JP 2012237397A JP 2013054372 A5 JP2013054372 A5 JP 2013054372A5
Authority
JP
Japan
Prior art keywords
wiring
unevenness
panel
difference
coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012237397A
Other languages
Japanese (ja)
Other versions
JP2013054372A (en
JP5594493B2 (en
Filing date
Publication date
Application filed filed Critical
Priority to JP2012237397A priority Critical patent/JP5594493B2/en
Priority claimed from JP2012237397A external-priority patent/JP5594493B2/en
Publication of JP2013054372A publication Critical patent/JP2013054372A/en
Publication of JP2013054372A5 publication Critical patent/JP2013054372A5/ja
Application granted granted Critical
Publication of JP5594493B2 publication Critical patent/JP5594493B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Description

本願発明者らは、塗布ムラ155の発生の法則性について調査した結果、スピンコータの回転軸からの放射方向、すなわち塗布液が遠心力で塗り広げられる方向と、ソースドライバ配線の屈曲部の配列方向(図2の矢印βA、βBで示す。)が一致または、その角度差がおおよそ15°未満の範囲にある場合に発生することを見出した。具体的には、一致した場合が最も明確に塗布ムラが発生し、角度差が増えるにしたがって薄くなってゆき、おおよそ8°以上で許容限界以下となり、さらにおおよそ15°以上ではムラとして認識できないレベルに低減することを見出した。 As a result of investigating the law of occurrence of coating unevenness 155, the inventors of the present application have found that the radiation direction from the rotation axis of the spin coater, that is, the direction in which the coating solution is spread by centrifugal force, and the arrangement direction of the bent portion of the source driver wiring It was found that this occurs when (indicated by arrows βA and βB in FIG. 2) match or the angular difference is in the range of less than about 15 ° . Specifically, the coating unevenness occurs most clearly when they match, and it becomes thinner as the angle difference increases, and is below the allowable limit at approximately 8 ° or more, and at a level that cannot be recognized as unevenness at approximately 15 ° or more. It has been found to be reduced.

すなわち、本発明が解決しようとする問題が発生する条件としては、複数の配線等段差のもとになる形状が並走した形状を持ち、かつ、それらの配線等が屈曲部を有し、屈曲部がマクロ的な配列形状を形成している状態で、かつ基板に垂直な軸での回転とそれによって生じる遠心力により、液状の物質を塗り広げるプロセスを行ったときに、液状の物質が塗り広げられる方向(回転中心から放射方向)と屈曲部の配列のなす角度差がおおよそ15°未満の範囲にあるということである。また、15°未満であっても、おおよそ8°以上であれば実質的には許容可能である。 That is, as a condition for causing the problem to be solved by the present invention, a plurality of wirings and the like have a shape in which the shape of the step is parallel, and the wirings and the like have a bent portion and are bent. The liquid material is applied when a process is performed in which the liquid material is applied by rotation with an axis perpendicular to the substrate and the resulting centrifugal force in a state where the parts form a macro array. This means that the angle difference between the direction of expansion (radial direction from the center of rotation) and the arrangement of the bent portions is in a range of less than about 15 ° . Further, even if it is less than 15 ° , it is practically acceptable if it is approximately 8 ° or more.

次に、画素形成部を平坦にするために、アクリル樹脂をスピン塗布、焼成する。塗布膜厚は画素領域の最大の高低差(1μm弱)を考慮し、凹凸のない平坦な基板上に塗布したときの膜厚で1〜2μmとなるように設定する。このとき、配線屈曲部の配列とスピン塗布の流動方向すなわち、回転中心からの放射方向が一致またはおおよそ15°未満の範囲にあると塗布ムラを生じ、特におおよそ8°未満の時には、表示上問題となるムラとなってしまう。 Next, acrylic resin is spin-coated and baked to flatten the pixel formation portion. In consideration of the maximum height difference (a little less than 1 μm) of the pixel region, the coating film thickness is set to be 1 to 2 μm when it is applied on a flat substrate without unevenness. At this time, the flow direction of the array and the spin coating of the wire bending portion that is, produce a coating nonuniformity in the range radiation direction is less than match or approximate 15 ° from the center of rotation, especially when roughly less than 8 °, the display problems It becomes uneven.

図2のパネル配置における塗布ムラ発生条件を定量的に確認する。図2の下半分は発生条件を満たさず、上半分は左右線対称であるので、右上領域に着目する。図5は、図2の右上領域を切り出して、各パネルの屈曲部配列交点161とスピン塗布の回転中心160を結んだ直線が基準線162となす角度δを数値で表示してある。角度δを小さい順に並べると、6.9、13.7、32.3、48.3、51.8、66.3となる。図5ではパネルの屈曲部配列の角度θ1は約31°で作図しており、右端上から2番目のδ=32.3°のパネルではδとθ1の差は1.3°となり塗布ムラが発生する。その前後のδでは発生条件に対して十分な差(約17°)を持っており、塗布ムラは発生しないことがわかる。角度δの並びでもっとも間隔の広いのは、13.7〜32.3°でその差18.6°である。両者の中間である23.0°にθ1を設定すれば、両者との差はそれぞれ9.3°となり、表示上問題となるムラ発生条件(角度差8°未満)を外れる。 The conditions for occurrence of coating unevenness in the panel arrangement of FIG. 2 are quantitatively confirmed. Since the lower half of FIG. 2 does not satisfy the generation condition and the upper half is symmetrical with respect to the left and right lines, attention is paid to the upper right region. 5 cuts out the upper right area of FIG. 2 and displays numerically the angle δ between the straight line 162 connecting the bent portion array intersection 161 of each panel and the spin coating rotation center 160 to the reference line 162. When the angles δ are arranged in ascending order, they are 6.9, 13.7, 32.3, 48.3, 51.8, and 66.3. In FIG. 5, the angle θ1 of the bent portion arrangement of the panel is plotted at about 31 ° , and the difference between δ and θ1 is 1.3 ° in the second panel from the upper right where δ = 32.3 ° , and uneven coating occurs. Occur. Before and after δ, there is a sufficient difference (about 17 ° ) with respect to the generation condition, and it can be seen that coating unevenness does not occur. The widest interval in the array of angles δ is 13.7 to 32.3 ° with a difference of 18.6 ° . If θ1 is set at 23.0 ° , which is between the two, the difference between the two is 9.3 ° , which is outside the unevenness occurrence condition (an angular difference of less than 8 ° ) that causes display problems.

次に、このときに配置可能な配線幅を求める。ソースドライバ配線の引き回し領域を図6のようにモデル化すると、Ppix:画素ピッチ、Pic:ドライバIC出力端子ピッチ、N:横方向画素数、L:引き回し領域幅として、θ1:屈曲部配列角度、θ2:画素側配線角度、Ps:画素側配線(傾斜部)ピッチとの関係が求まる。具体的な条件として、SOGでソースドライバ出力をRGB3ラインに切り替えるスイッチを搭載したパネルを例として、Ppix=141μm、Pic=60μm、N=240に設定したときの各パラメータの関係を図7に示す。このモデルにより、塗布ムラ解消のための条件(θ1)を、レイアウト上の必要領域(L)、配線配置の可能性(Ps)とともに考えることが出来る。本実施例の条件ではθ1≒23°になるのは、Ps=42μm、θ1=22.8°で、このときL=3.03mmとなる。配線ピッチが狭いほうの傾斜部でPs=42μmであるので、配線幅10μmで配線間隔は32μmとなり、余裕を持って引き回しができる。図8に配線引き回し領域のイメージ(a)と、配線屈曲部付近の配線形状の拡大図(b)を示す。 Next, the wiring width that can be arranged at this time is obtained. When the routing area of the source driver wiring is modeled as shown in FIG. 6, Ppix: pixel pitch, Pic: driver IC output terminal pitch, N: number of pixels in the horizontal direction, L: routing area width, θ1: bend arrangement angle, The relationship between θ2: pixel side wiring angle and Ps: pixel side wiring (inclined portion) pitch is obtained. As a specific condition, the relationship between each parameter when Ppix = 141 μm, Pic = 60 μm, and N = 240 is set as an example in a panel equipped with a switch that switches the source driver output to RGB 3 lines by SOG is shown in FIG. . With this model, the condition (θ1) for eliminating coating unevenness can be considered together with the necessary area (L) on the layout and the possibility of wiring arrangement (Ps). Become .theta.1 ≒ 23 ° in terms of the present embodiment, Ps = 42 .mu.m, with θ1 = 22.8 °, the this case L = 3.03 mm. Since Ps = 42 μm in the inclined portion where the wiring pitch is narrower, the wiring interval is 32 μm when the wiring width is 10 μm, and wiring can be performed with a margin. FIG. 8 shows an image (a) of the wiring routing area and an enlarged view (b) of the wiring shape near the wiring bent portion.

すべてのパネルの配線部を上述のように、各パネルのδと差を大きくとれ、角度差8°以上とできるθ1≒23°とすることで、表示上問題となる塗布ムラの発生を抑止することができる。 The wiring portions of all the panels as described above, made large and δ and difference of each panel, by a .theta.1 ≒ 23 ° possible to the angle difference 8 ° or more, to suppress the occurrence of uneven coating as a display problem be able to.

実施例2と同様に、図5のパネル配置をもとに配線を設計する。角度δを小さい順に並べると、6.9、13.7、32.3、48.3、51.8、66.3である。図5ではパネルの屈曲部配列の角度θ1は約31°で作図してあり、右端上から2番目のδ=32.3°のパネルではδとθ1の差は1.3°となり表示上問題となる塗布ムラが発生する。そこで、実施例3では、基本的な設計で、ムラ発生条件となるパネルの配線形状を変えて、ムラ発生条件を回避する。具体的には、δ:32.3°に対して、ムラ発生条件を回避する方法として、θ1=13°を選択する。δ:32.3°とは19.3°の差があり、ムラは解消できる条件(15°以上)である。このときの形状を図6、図7により確認すると、θ1≒13°になるのは、Ps=24μm、θ1=13.1°で、このときL=1.68mmとなる。配線ピッチが狭いほうの傾斜部でPs=24μmであるので、配線幅10μmが配線間隔14μmで引き回しができる。図9に配線引き回し領域のイメージ(a)と、配線屈曲部付近の配線形状の拡大図(b)を示す。 Similar to the second embodiment, wiring is designed based on the panel arrangement of FIG. When the angles δ are arranged in ascending order, they are 6.9, 13.7, 32.3, 48.3, 51.8, and 66.3. In FIG. 5, the angle θ1 of the bent portion arrangement of the panel is plotted at about 31 ° , and the difference between δ and θ1 is 1.3 ° in the second panel from the upper right where δ = 32.3 ° is 1.3 ° . Application unevenness occurs. Therefore, in the third embodiment, the uneven design condition is avoided by changing the wiring shape of the panel, which is the condition for generating the unevenness, in the basic design. Specifically, for δ: 32.3 ° , θ1 = 13 ° is selected as a method for avoiding the unevenness generation condition. [delta]: There is a difference of 19.3 ° and 32.3 °, unevenness is eliminated can condition (15 ° or more). 6 the shape of this time, if confirmed by FIG. 7, to become .theta.1 ≒ 13 ° is, Ps = 24 [mu] m, at .theta.1 = 13.1 °, the this case L = 1.68 mm. Since Ps = 24 μm at the inclined portion with the narrower wiring pitch, the wiring width of 10 μm can be routed with the wiring interval of 14 μm. FIG. 9 shows an image (a) of the wiring routing area and an enlarged view (b) of the wiring shape near the wiring bent portion.

θ1が31°のパネルP1と、θ1が13°のパネルP2を図10のように、δ:32.3°となる位置にP2となるように組み合わせて配置することで、塗布ムラが解消できる。 By disposing the panel P1 with θ1 of 31 ° and the panel P2 with θ1 of 13 ° in combination so as to be P2 at a position where δ is 32.3 ° as shown in FIG. .

本実施例では、基本パターンとしてP1を用い、P2を部分的に用いた組み合わせとしたが、P2を基本として、δ:13.7°となる位置にP1を配置してもよいし、δとθ1の関係を、塗布ムラを生じさせない関係にした他の配置を組み合わせとすることも可能であり、効果がある。さらに、本実施例では、P1、P2の二種類の設計のパネルを組み合わせたが、3種類以上の設計を組み合わせることも可能であり、δとθ1の関係を適切に設定することで、ムラ解消の効果が得られる。
In this embodiment, P1 is used as the basic pattern and P2 is partially used. However, P1 may be arranged at a position where δ is 13.7 ° based on P2, and δ It is possible to combine other arrangements in which the relationship of θ1 is a relationship that does not cause coating unevenness, which is effective. Furthermore, in this embodiment, two types of panels, P1 and P2, are combined, but it is possible to combine three or more types of designs, and unevenness can be eliminated by setting the relationship between δ and θ1 appropriately. The effect is obtained.

JP2012237397A 2012-10-29 2012-10-29 Flat panel display Active JP5594493B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012237397A JP5594493B2 (en) 2012-10-29 2012-10-29 Flat panel display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012237397A JP5594493B2 (en) 2012-10-29 2012-10-29 Flat panel display

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2008094006A Division JP5380726B2 (en) 2008-03-31 2008-03-31 Flat panel display, method for manufacturing the same, and method for designing lead wiring

Publications (3)

Publication Number Publication Date
JP2013054372A JP2013054372A (en) 2013-03-21
JP2013054372A5 true JP2013054372A5 (en) 2013-08-22
JP5594493B2 JP5594493B2 (en) 2014-09-24

Family

ID=48131358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012237397A Active JP5594493B2 (en) 2012-10-29 2012-10-29 Flat panel display

Country Status (1)

Country Link
JP (1) JP5594493B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102321635B1 (en) 2014-08-14 2021-11-08 삼성디스플레이 주식회사 Touch screen panel

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4202588B2 (en) * 2000-09-07 2008-12-24 共同印刷株式会社 Liquid crystal display device and electrode substrate for liquid crystal display device
JP2002214634A (en) * 2001-01-17 2002-07-31 Matsushita Electric Ind Co Ltd Transparent resin substrate for display element and liquid crystal display panel using the same
KR100859513B1 (en) * 2002-03-07 2008-09-22 삼성전자주식회사 A substrate of liquid crystal display

Similar Documents

Publication Publication Date Title
JP6960500B2 (en) Electronic components
US10529273B2 (en) Display device
WO2017193847A1 (en) Display screen and display device
KR102330882B1 (en) Display device
KR20160049469A (en) Display panel
US10978493B2 (en) Display substrate and manufacturing method thereof, and display device
US20160238868A1 (en) Liquid crystal display panel and fan-out area thereof
US20140184938A1 (en) Embedded touch display panel and touch display device
US9823505B2 (en) Color filter substrate, liquid crystal display panel, and display device
WO2015008696A1 (en) Display panel and display device
KR102649645B1 (en) Display device
CN102540560A (en) Display substrate, method of manufacturing the same, and display panel having the same
US11194186B2 (en) Display panel and display device comprising at least one restriction region formed by a conductive wiring pattern that restricts displacement between a first substrate and a second substrate
WO2019041718A1 (en) Display panel, manufacturing method thereof, and display device
JP2020527748A (en) Mask and display panel
JP7058319B2 (en) Array board, COF, display device and alignment method
TWI627879B (en) Flexible circuit board module
JP2013054372A5 (en)
JP3194107U (en) Display panel
US9524990B2 (en) Display device
US20170177126A1 (en) Metal mesh sensing module of touch panel and manufacturing method thereof
CN106293246A (en) A kind of touch screen, its manufacture method and display device
WO2016095456A1 (en) Perimeter wiring structure of display substrate, display substrate, display panel and display device
WO2015008697A1 (en) Display panel and display device
JP5380726B2 (en) Flat panel display, method for manufacturing the same, and method for designing lead wiring