JP2013042629A - Control circuit for switching power-supply, switching power-supply using the same, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve the high efficiency of a switching power-supply.SOLUTION: A comparator 12 generates a comparison signal S2 asserted when a detection voltage Vis lower than a threshold voltage V. A pulse modulator 10 generates a pulse modulation signal S1 in which a duty cycle is adjusted so that an output of a switching power-supply 2 is stabilized. A driver 20 changes a drive pulse signal S3 to a third level corresponding to on of a switching transistor M1 when the pulse modulation signal S1 changes to a second level corresponding to on of the switching transistor M1. Further, the driver 20 changes the drive pulse signal S3 to a fourth level corresponding to off of the switching transistor M1 at the later timing between a timing when the pulse modulation signal S1 changes to a first level and a timing when the comparison signal S2 is asserted.

Description

  The present invention relates to a switching power supply.

A switching power supply is used for the purpose of generating a voltage that is higher or lower than the input voltage, or for converting an AC voltage into a DC voltage, or for converting a DC voltage into an AC voltage. FIG. 1 is a circuit diagram showing a configuration example of the switching power supply 2r. The switching power supply 2r in FIG. 1 is a step-up DC / DC converter, which steps up the voltage _VIN at the input terminal P1 and supplies the voltage _VOUT to the load 4 connected to the output terminal P2. The switching power supply 2r includes an inductor L1, a rectifier diode D1, an output capacitor C1, and a control circuit 100r. The control circuit 100r includes a pulse modulator 10, a switching transistor M1, and a driver 20r.

The pulse modulator 10 generates a pulse modulation signal S1 whose duty ratio is adjusted so that the output voltage V _OUT or the output current I _OUT of the switching power supply 2 approaches a predetermined target value. The driver 20r outputs the pulse modulation signal S1 to the gate of the switching transistor M1.

JP-A-9-266664 JP-A-6-006969 JP-A-10-108457 JP 2008-172909 A JP 2005-261209 A JP-A-7-222438

The switching transistor M1 includes a parasitic parameters such as the gate resistor R _G and the gate capacitance C _G, especially since the gate capacitance of the power transistor large, the gate voltage V _G of the switching transistor M1 is not a complete pulse waveform, I'll be addicted.

FIG. 2A is a diagram showing a gate voltage-drain current (V _G -I _M1 ) characteristic of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and FIG. 2B shows a pulse modulation signal S1 and a gate voltage. it is a waveform diagram of V _G.

As shown in FIG. 2A, almost no current flows through the switching transistor M1 in a region where the gate voltage V _G is lower than the threshold voltage V _TH . Here, in a light load state where the output current I _OUT of the switching power supply 2r is small, the duty ratio (on time) of the pulse modulation signal S1 is small, and the pulse modulation signal S1 is transitioning to a high level. situation in which the gate voltage _{V G} does not exceed the threshold voltage _{V TH} can occur.

In order to change the gate voltage V _G is due to the gate capacitance C _G must be charged and discharged, while the power is consumed in the driver 20r, no current I _M1 flows through the switching transistor M1, the energy in the inductor L1 Cannot be stored. That is, the charge corresponding to the change in the gate voltage hatched in FIG. 2B is wasted, and the efficiency of the switching power supply is deteriorated. Such a problem may occur not only in a step-up DC / DC converter but also in another switching power supply such as a step-down DC / DC converter, an AC / DC converter, or a DC / AC converter.

  The present invention has been made in view of these problems, and one of the exemplary purposes of an aspect thereof is to increase the efficiency of a switching power supply.

  One embodiment of the present invention relates to a control circuit for a switching power supply. The control circuit compares the detection voltage across the switching transistor with a predetermined threshold voltage, generates a comparison signal that is asserted when the detection voltage is lower than the threshold voltage, and the output of the switching power supply is stable A pulse modulator that generates a pulse modulation signal in which the duty ratio is adjusted so as to generate a signal, and a driver that generates a drive pulse signal for the switching transistor based on the pulse modulation signal and the comparison signal. (1) When the pulse modulation signal transitions from the first level corresponding to the switching transistor off to the second level corresponding to the switching transistor on, the driver changes the driving pulse signal to the second level corresponding to the switching transistor on. Transition to level 3. The driver drives (2) at a later timing among the timing at which the pulse modulation signal transitions from the second level corresponding to turning on of the switching transistor to the first level corresponding to turning off and the timing at which the comparison signal is asserted. The pulse signal is shifted to a fourth level corresponding to the switching transistor being turned off.

  When the gate voltage of the switching transistor exceeds the threshold voltage of an FET (Field Effect Transistor), the detection voltage across the switching transistor decreases. According to this aspect, after detecting that the gate voltage of the switching transistor has exceeded the threshold voltage based on the detection voltage, the drive pulse signal is shifted to a level at which the switching transistor is turned off. Current can be passed through to store energy in the inductive element, so that unnecessary charge / discharge of the gate capacitance can be suppressed.

  When the pulse modulation signal transits from the first level corresponding to the switching transistor off to the second level corresponding to the on, the driver transits to the fifth level corresponding to the switching transistor on and the comparison signal is asserted. A first logic gate that generates an intermediate pulse signal that transitions to a sixth level corresponding to the switching transistor being turned off, and at least one of the pulse modulation signal and the intermediate pulse signal has a level that corresponds to the switching transistor being turned on, And a second logic gate having the drive pulse signal at the third level, and otherwise setting the drive pulse signal at the fourth level.

  The driver outputs, as a drive pulse signal, an SR flip-flop having a pulse modulation signal input to its set terminal and a comparison signal input to its reset terminal, and an OR of the output of the SR flip-flop and the pulse modulation signal. And a gate.

  The control circuit may be integrated on a single semiconductor substrate. “Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate.

  Another aspect of the present invention relates to a switching power supply. This switching power supply includes any of the control circuits described above.

  Another embodiment of the present invention relates to an electronic device. This electronic device includes the above-described switching power supply.

  It should be noted that any combination of the above-described constituent elements, and those in which constituent elements and expressions of the present invention are mutually replaced between methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  According to an aspect of the present invention, the efficiency of the switching power supply can be increased.

It is a circuit diagram which shows the structural example of a switching power supply. FIG. 2A is a diagram showing a gate voltage-drain current characteristic of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and FIG. 2B is a waveform diagram of a pulse modulation signal and a gate voltage. It is a circuit diagram which shows the structure of an electronic device provided with the switching power supply which concerns on embodiment. It is a wave form diagram which shows operation | movement of the switching power supply of FIG.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

  In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are electrically connected to each other in addition to the case where the member A and the member B are physically directly connected. It includes cases where the connection is indirectly made through other members that do not substantially affect the general connection state, or that do not impair the functions and effects achieved by their combination. In addition, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as their electrical Including the case of being indirectly connected through other members that do not substantially affect the state of connection, or do not impair the functions and effects achieved by the combination thereof.

FIG. 3 is a circuit diagram illustrating a configuration of the electronic device 1 including the switching power supply 2 according to the embodiment. The electronic device 1 is a battery-powered device such as a mobile phone terminal, a PDA (Personal Digital Assistants), a portable audio player, or a digital camera, and includes a switching power supply 2 and a load 4. The switching power supply 2 receives a DC input voltage _VIN from a battery or an AC adapter (not shown) at its input terminal P1, boosts it, and outputs the output voltage V _OUT to the load 4 connected to the output terminal P2. Is a step-up DC / DC converter (switching regulator).

  The switching power supply 2 includes a control circuit 100, a switching transistor M1, and an output circuit 102. The control circuit 100 is a functional IC integrated on a single semiconductor substrate, and the switching transistor M1 is also integrated on the control circuit 100.

The switching power supply 2 is a DC / DC converter that stabilizes its output by feedback. The feedback (FB) terminal of the control circuit 100, at least one, or both, of the output voltage _{V OUT} or the output current _{I OUT} is the output of the switching power supply 2 is fed back. In the present embodiment, a feedback voltage V _{FB obtained by} dividing the output voltage V _OUT is input to the FB terminal.

  The output circuit 102 includes an inductor L1, a rectifying element D1, and an output capacitor C1. Since the configuration of the output circuit 102 is a rectifying / smoothing circuit of a general step-up DC / DC converter, a detailed description thereof is omitted here. Instead of the rectifying element D1, a synchronous rectifying transistor may be provided.

The switching transistor M1 is provided between the switching terminal SW to which one end of the inductor L1 is connected and the ground terminal. The control circuit 100 switches the switching transistor M1 so that the feedback signal _VFB corresponding to the output voltage _VOUT that is one of the electrical states of the switching power supply 2 approaches a predetermined reference value. As a result, the output voltage _VOUT is stabilized regardless of the state of the input voltage _VIN and the load 4.

The control circuit 100 includes a switching transistor M1, a pulse modulator 10, a comparator 12, and a driver 20.
The pulse modulator 10 generates a pulse modulation signal S1 whose duty ratio is adjusted so that the feedback voltage V _FB matches a predetermined reference voltage. The configuration of the pulse modulator 10 is not particularly limited, and a known circuit such as a voltage mode modulator, a peak current mode or average current mode modulator, or a hysteresis control modulator may be used.

Comparator 12, the detection voltage _{V DS} across the switching transistor M1 with a predetermined threshold voltage _{V TH_DS,} is asserted (e.g., high level) when the detection voltage _{V DS} is less than the threshold voltage _{V TH_DS} A comparison signal S2 is generated. The comparator 12 may be a hysteresis comparator to prevent chattering. The threshold voltage V _{TH_DS} is set smaller than the drain-source voltage V _DS1 when the gate voltage V _G is equal to the threshold voltage V _TH .

  The driver 20 generates a drive pulse signal S3 for the switching transistor M1 based on the pulse modulation signal S1 and the comparison signal S2, and outputs it to the gate of the switching transistor M1.

Specifically, the driver 20 (1) the pulse modulation signal S1 is changed from a first level (for example, low level) corresponding to the switching transistor M1 to OFF to a second level (for example, high level) corresponding to the switching transistor M1 being turned on When the level is changed, the drive pulse signal S3 is changed to a third level (for example, high level) corresponding to the switching transistor M1 being turned on.
The driver 20 is driven at a later timing among (2) the timing at which the pulse modulation signal S1 changes from the second level (high level) to the first level (low level) and the timing at which the comparison signal S2 is asserted. The pulse signal S3 is shifted to a fourth level (for example, a low level) corresponding to the switching transistor M1 being turned off.

As an example, the driver 20 includes a first logic gate 22 and a second logic gate 24.
The first logic gate 22 generates an intermediate pulse signal S4. The first logic gate 22 switches the intermediate pulse signal S4 when the pulse modulation signal S1 transits from the first level (low level) corresponding to the switching transistor M1 to OFF to the second level (high level) corresponding to the ON. A transition is made to the fifth level (high level) corresponding to the on-state of the transistor M1. Further, when the comparison signal S2 is asserted, the first logic gate 22 changes the intermediate pulse signal S4 to the sixth level (low level) corresponding to the switching transistor M1 being turned off.

  When at least one of the pulse modulation signal S1 and the intermediate pulse signal S4 has a level corresponding to the on state of the switching transistor M1, the second logic gate 24 outputs the driving pulse signal S3 to the third state corresponding to the on state of the switching transistor M1. In other cases, the drive pulse signal S3 is set to a fourth level (low level) corresponding to the switching transistor M1 being turned off.

  For example, the first logic gate 22 may be an SR flip-flop in which the pulse modulation signal S1 is input to the set terminal (S) and the comparison signal S2 is input to the reset terminal (R). The second logic gate 24 may be an OR gate that generates a logical sum of the pulse modulation signal S1 and the intermediate pulse signal S4.

  The configuration of the driver 20 is not limited to that of FIG. 3, and those skilled in the art can design a circuit having a function equivalent to that of FIG. 3 by a digital logic operation circuit, and these are also within the scope of the present invention. included.

  The above is the configuration of the switching power supply 2. Next, the operation will be described. FIG. 4 is a waveform diagram showing the operation of the switching power supply 2 of FIG.

The duty ratio of the pulse modulation signal S1 is adjusted by the pulse modulator 10 so that the output voltage _VOUT of the switching power supply 2 is maintained at a constant level.

  When the pulse modulation signal S1 transitions from low level to high level at time t1, the SR flip-flop of the first logic gate 22 is set, and the intermediate pulse signal S4 becomes high level. At time t1, the drive pulse signal S3 output from the second logic gate 24 also becomes high level.

When the drive pulse signal S3 becomes high level, the gate voltage V _G of the switching transistor M1 starts to rise. At time t2, the pulse modulation signal S1 transitions to a low level, but the intermediate pulse signal S4 maintains a high level, so the drive pulse signal S3 maintains a high level.

With increasing gate voltage V _G, the detection voltage V _DS between the drain and source of the switching transistor M1 is reduced. At time t3, when the detection voltage _{V DS} becomes lower than the threshold voltage _{V TH_DS,} the comparison signal S2 is asserted, SR flip-flop of the first logic gate 22 is reset. As a result, the intermediate pulse signal S4 changes to the low level, and the drive pulse signal S3 also becomes the low level.

In the switching power supply 2, the high level of the drive pulse signal S _{<b> 3 continues} until the detection voltage V _DS decreases to the threshold voltage V _{TH_DS} even after the pulse modulation signal S _<b> 1 transitions to the low level. As described above, the threshold voltage V _{TH_DS} is set smaller than the drain-source voltage V _DS1 when the gate voltage V _G is equal to the threshold voltage V _TH . Therefore, it is ensured that the gate voltage V _G exceeds the threshold voltage V _TH in the process in which the detection voltage V _DS decreases to the threshold voltage V _{TH_DS} .

According to the switching power supply 2 according to the embodiment, the switching transistor M1 can be reliably turned on for each cycle of the pulse modulation signal S1, the drain current I _M1 can be generated, and energy can be stored in the inductor L1. As a result, the charge for charging and discharging the gate capacitance of the switching transistor M1 is not wasted, and the efficiency of the switching power supply 2 can be increased.

  Those skilled in the art will understand that the above-described embodiment is an exemplification, and that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  Although the embodiment has been described with respect to a step-up DC / DC converter, the present invention can also be applied to a step-down type and a step-up / step-down type DC / DC converter. In this modification, the switching transistor is connected to the input voltage side instead of the ground terminal side, but a comparator for comparing the voltage between both ends with the threshold voltage may be provided.

  Furthermore, the present invention can also be applied to an insulating switching power supply having a transformer instead of the inductor L1. Further, the present invention is not limited to the DC / DC converter, but can be applied to an AC / DC converter having a switching transistor or a DC / AC converter in the same manner, and such modifications are also included in the present invention.

  In the present embodiment, the relationship between the high-level and low-level logic values of each signal and the magnitude of the voltage signal is an example, and can be freely changed by appropriately inverting it with an inverter or the like.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are permitted without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 1 ... Electronic device, 2 ... Switching power supply, 4 ... Load, 100 ... Control circuit, 102 ... Output circuit, P1 ... Input terminal, P2 ... Output terminal, L1 ... Inductor, C1 ... Output capacitor, D1 ... Rectifier element, M1 ... Switching transistor, 10 ... Pulse modulator, 12 ... Comparator, 20 ... Driver, 22 ... First logic gate, 24 ... Second logic gate, S1 ... Pulse modulation signal, S2 ... Comparison signal, S3 ... Drive pulse signal, S4 ... Intermediate pulse signal.

Claims (6)

A switching power supply control circuit,
A comparator that compares a detection voltage across the switching transistor with a predetermined threshold voltage and generates a comparison signal that is asserted when the detection voltage is less than the threshold voltage;
A pulse modulator that generates a pulse modulation signal in which a duty ratio is adjusted so that an output of the switching power supply is stabilized;
A driver for generating a driving pulse signal for the switching transistor based on the pulse modulation signal and the comparison signal;
(1) When the pulse modulation signal transitions from a first level corresponding to turning off of the switching transistor to a second level corresponding to turning on of the switching transistor, the driving pulse signal corresponds to turning on of the switching transistor. To the third level,
(2) The drive pulse signal is turned off at a later timing among the timing at which the pulse modulation signal transitions from the second level to the first level and the timing at which the comparison signal is asserted. A driver to transition to the corresponding fourth level;
A control circuit comprising: The driver is
When the pulse modulation signal transits from the first level to the second level, the pulse modulation signal transits to a fifth level corresponding to turning on of the switching transistor, and when the comparison signal is asserted, the second level corresponding to turning off of the switching transistor. A first logic gate for generating an intermediate pulse signal transitioning to six levels;
When at least one of the pulse modulation signal and the intermediate pulse signal takes a level corresponding to ON of the switching transistor, the drive pulse signal is set to the third level, and otherwise, the drive pulse signal is set to the first level. A second logic gate with four levels;
The control circuit according to claim 1, comprising: The driver is
An SR flip-flop in which the pulse modulation signal is input to the set terminal and the comparison signal is input to the reset terminal;
An OR gate that outputs a logical sum of the output of the SR flip-flop and the pulse modulation signal as the drive pulse signal;
The control circuit according to claim 1, further comprising:   4. The control circuit according to claim 1, wherein the control circuit is integrated on a single semiconductor substrate.   A switching power supply comprising the control circuit according to claim 1.   An electronic apparatus comprising the switching power supply according to claim 5.

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