JP6253344B2 - STEP-UP / DOWN DC / DC CONVERTER, CONTROL CIRCUIT THEREOF, CONTROL METHOD, AND ELECTRONIC DEVICE USING SAME - Google Patents

Description

  The present invention relates to a step-up / step-down DC / DC converter.

A step-up / step-down DC / DC converter (switching regulator) is used to increase or decrease the DC voltage. FIG. 1 is a circuit diagram of a step-up / step-down DC / DC converter. The DC / DC converter 100r stabilizes the output voltage _VOUT at a predetermined target level (hereinafter referred to as a target voltage) _{VOUT_REF} by stepping up or down the input voltage _VIN .

The DC / DC converter 100r includes an output circuit 102 and a control circuit 200r thereof. The output circuit 102 includes switches M1 to M4, an inductor L1, and an output capacitor C1. The control circuit _200r switches the switches M1 to M4 so that the output voltage _VOUT approaches the target voltage _{VOUT_REF} .

The DC / DC converter 100r is configured to be able to switch between a step-down (Buck) mode and a step-up (Boost) mode. Specifically, the DC / DC converter 100r _{operates in} a step-down mode when V _IN > V _{OUT_REF and in} a step-up mode when V _IN <V _{OUT_REF} . In addition, the DC / DC converter 100r has a heavy load mode (also referred to as PWM mode) and a light load mode (PFM) according to the amount of load current _IOUT supplied to a load (not shown) connected to the output line 106. Mode) can be switched. That is, the DC / DC converter 100r operates in four modes: a heavy load step-down mode, a heavy load step-up mode, a light load step-down mode, and a light load step-up mode.

The control circuit 200r includes resistors R1 and R2, a PFM controller 210, a PWM controller 220, a pre-driver 230, and a mode selector 250.
The resistors R1 and R2 divide the output voltage _VOUT and generate a feedback voltage _VFB . The mode selector 250 switches between the light load mode and the heavy load mode according to the amount of the load current I _OUT . The mode selector 250 switches between the step-up mode and the step-down mode according to the magnitude relationship between the input voltage _VIN and the target voltage _{VOUT_REF} .

First, the heavy load mode will be described.
The PWM controller 220 is active in the heavy load mode, and generates a pulse signal S _PWM whose duty ratio is adjusted so that the feedback voltage V _FB approaches the reference voltage V _REF .

[Heavy load step-down mode]
Predriver 230 in the heavy load buck mode, the switch M4 ON, while fixing switched off M3, complementarily switching the switches M1 and M2 on the basis of the pulse signal S _PWM.

FIG. 2A is an operation waveform diagram of the heavy load step-down mode of the DC / DC converter 100r of FIG. In the heavy load step-down mode, a switching voltage V _LX1 corresponding to the pulse signal S _PWM is applied to one end LX1 of the inductor L1. Specifically, when the pulse signal S _PWM is at a high level, the switch M1 is turned on, the switch M2 is turned off, and V _LX1 = V _IN . When the pulse signal S _PWM is at a low level, the switch M1 is turned off and the switch M2 is turned on. Turns on and V _LX1 = V _GND . In the heavy load step-down mode, since the switch M4 is fixedly turned on, V _LX2 ≈V _OUT is _satisfied .

[Heavy load boost mode]
In the pre-driver 230 is heavy load boost mode, the switch M1 ON, while fixing switched off M2, complementarily switching the switches M3 and M4 based on the pulse signal S _PWM.
FIG. 2B is an operation waveform diagram of the heavy load boost mode of the DC / DC converter 100r of FIG. In the heavy load boost mode, since the switch M1 is fixedly turned on, the input voltage _VIN is applied to one end LX1 of the inductor L1. A switching voltage V _LX2 corresponding to the pulse signal S _PWM is applied to the other end LX2 of the inductor L1. Specifically, when the pulse signal S _PWM is at a high level, the switch M3 is turned on, the switch M4 is turned off, and V _LX2 = V _GND . When the pulse signal S _PWM is at a low level, the switch M3 is turned off and the switch M4 is turned on. Turns on and V _LX2 = V _OUT .

  Next, the light load mode will be described.

[Light load step-down mode]
The PFM controller 210 is active in the light load mode.
In the light load step-down mode, in a state where the switch M3 is off and the switch M4 is fixed on, (i) the first state φ1 in which the switch M1 is on and the switch M2 is off, (ii) the switch M1 is off, The second state φ2 in which M2 is on and (iii) the third state (high impedance state) φ3 in which both the switches M1 and M2 are off are repeated in order.

[Light load boost mode]
In the light load boosting mode, the switch M1 is on and the switch M2 is fixed off. (I) The first state φ1 in which the switch M3 is on and the switch M4 is off. (Ii) The switch M3 is off. The second state φ2 in which the switch M4 is on and (iii) the third state φ3 in which both the switches M3 and M4 are off are repeated in order.

  The PFM controller 210 includes a comparator 212 and a logic unit 214. The logic unit 214 switches between the first state φ1, the second state φ2, and the third state φ3 based on the output of the comparator 212 and a signal from a current detection circuit (not shown).

The comparator 212 compares the feedback voltage V _FB with the reference voltage V _REF in the third state φ3, and asserts the ON signal S1 when V _FB <V _REF . When the on signal S1 is asserted, the logic unit 214 causes the pre-driver 230 to transition to the first state φ1.

Coil current I _L flowing through the inductor L1 increases with time in the first state .phi.1. PFM controller 210, the coil current _{I L} reaches a predetermined peak value _{I PEAK,} shifts the pre-driver 230 to the second state .phi.2. In the second state .phi.2, the coil current I _L decreases both time. When the coil current _IL becomes substantially zero, the PFM controller 210 causes the pre-driver 230 to transition to the third state φ3. When the feedback voltage V _FB drops to the reference voltage V _REF in the third state φ3, the PFM controller 210 causes the pre-driver 230 to transition to the first state φ1.

  3A and 3B are operation waveform diagrams of the light load step-down mode and the light load step-up mode of the DC / DC converter 100r of FIG.

JP 2012-10579 A JP 2012-125107 A

  As a result of studying the DC / DC converter 100r of FIG. 1, the present inventor has come to recognize the following problems.

In the light load mode, as shown in FIGS. 3A and 3B, the output capacitor C1 is charged and the output voltage _VOUT rises, and the output capacitor C1 is discharged by the load current _{IOUT. An} intermittent operation of repeating the state in which _OUT decreases is performed. As a result, the switching frequency is lowered and the switching loss can be reduced, but the ripple voltage V _RIP is superimposed on the output voltage _VOUT .

FIG. 4 is a diagram showing the relationship between the difference between the target voltage V _{OUT_REF} and the input voltage V _IN and the ripple V _RIP of the output voltage V _OUT in the light load mode of the DC / DC converter 100r of FIG. When V _IN > V _{OUT_REF,} the step-down mode is _selected , and when V _IN <V _{OUT_REF} , the step-up mode is selected.

As shown in FIG. 4, the step-down mode, in either case up _mode, the difference between _{V OUT_REF} and _{V IN} is in accordance with approaches zero, the ripple voltage _{V RIP} is increased.

  This problem should not be regarded as a general recognition of those skilled in the art, but has been uniquely recognized by the present inventor. This problem can also occur in the PFM controller 210 in which the length of the first state φ1 is a fixed time.

  The present invention has been made in view of such a problem, and one of the exemplary purposes of an aspect thereof is to reduce the ripple of the output voltage in the step-up / step-down DC / DC converter.

  One embodiment of the present invention relates to a control circuit for a step-up / step-down DC / DC converter. The step-up / step-down DC / DC converter includes an inductor, an input line to which an input voltage is supplied, an output line to which a load is connected and generates an output voltage, and a first switch provided between one end of the inductor and the input line. A second switch provided between one end of the inductor and the ground line, a third switch provided between the other end of the inductor and the ground line, and provided between the other end of the inductor and the output line. A fourth switch and an output capacitor connected to the output line are included. The control circuit includes: a first controller that instructs a state of the fourth switch from the first switch in the light load state; and a state of the fourth switch from the first switch based on the instruction from the first controller in the light load state. And a pre-driver for controlling. The first controller can switch between (a) step-down mode, (b) step-up mode, and (c) step-up / step-down mode. In the step-up / step-down mode, (c-1) the first switch is turned on and the second switch is turned on Off, first state where third switch is on, fourth switch is off, (c-2) first state where first switch is off, second switch is on, third switch is off, fourth switch is on Two states, (c-3) a third switch in which the first switch is off, the second switch is off, the third switch is off, and the fourth switch is off are sequentially repeated.

  According to this aspect, the ripple superimposed on the output voltage can be reduced by operating in the step-up / step-down mode in a state where the target levels of the input voltage and the output voltage are close.

  The first controller is in the step-down mode when the input voltage is higher than the first threshold value set higher than the target level of the output voltage, and the input voltage is lower than the second threshold value set lower than the target level of the output voltage. In the boost mode, when the input voltage is higher than the second threshold value and lower than the first threshold value, the step-up / step-down mode may be set.

  The first controller compares a feedback voltage corresponding to the output voltage in a third state with a predetermined reference voltage, generates a ON signal that is asserted when the feedback voltage becomes lower than the reference voltage, and in the first state, an inductor A peak current detection circuit that generates a peak current detection signal that is asserted when the coil current flowing through the peak current reaches a peak current, and a zero that generates a zero current detection signal that is asserted when the coil current is substantially zero in the second state. When the peak current detection signal is asserted in the first state, the current detection circuit transits to the second state, transitions to the third state when the zero current detection signal is asserted in the second state, and turns on in the third state And a logic unit that transitions to a first state when the signal is asserted.

  The logic unit is at a first level when the ON signal is asserted, and a first flip-flop that generates a first control signal that is at the second level when the peak current detection signal is asserted, and the zero current detection signal is asserted. Then, a second flip-flop that generates a second control signal that becomes the first level and becomes the second level when the first control signal is asserted may be included.

The peak current detection circuit may be configured to compare the coil current with the peak current and assert a peak current detection signal based on the comparison result.
The peak current detection circuit may be configured to assert a peak current detection signal when the first state has elapsed for a predetermined time.

In the step-up / step-down mode, the first controller may insert (c-4) a fourth state in which substantially the same potential is applied to one end and the other end of the inductor between the first state and the second state. .
Thereby, the efficiency of the step-up / step-down mode can be improved.

  In the fourth state, the first switch may be on, the second switch may be off, the third switch may be off, and the fourth switch may be on.

  The first controller compares a feedback voltage corresponding to the output voltage in a third state with a predetermined reference voltage, generates a ON signal that is asserted when the feedback voltage becomes lower than the reference voltage, and in the first state, an inductor A peak current detection circuit that generates a peak current detection signal that is asserted when the coil current flowing through the peak current reaches a peak current, and a zero that generates a zero current detection signal that is asserted when the coil current is substantially zero in the second state. When the peak current detection signal is asserted in the first state, the current detection circuit transits to the fourth state, transitions to the second state when the ON signal is negated in the fourth state, and zero current detection in the second state When the signal is asserted, the state transits to the third state. When the ON signal is asserted in the third state, A logic unit for Transition to state may include.

  The logic unit is at a first level when the ON signal is asserted, and a first flip-flop that generates a first control signal that is at the second level when the peak current detection signal is asserted, and the zero current detection signal is asserted. Then, the second flip-flop generating the second control signal which becomes the first level and becomes the second level when the first control signal is asserted, and the first control signal is the first level, or the ON signal is asserted. And a logic gate that generates a third control signal that is at the first level and is at the second level at other times.

The peak current detection circuit may be configured to compare the coil current with the peak current and assert a peak current detection signal based on the comparison result.
The peak current detection circuit may be configured to assert a peak current detection signal when the first state has elapsed for a predetermined time.

  A second controller for instructing the state of the fourth switch from the first switch in the heavy load state may be further provided. The pre-driver may be configured to control the state of the first switch to the fourth switch based on an instruction from the second controller in a heavy load state.

  The second controller can switch between (d) step-down mode, (e) step-up mode, and (f) step-up / step-down mode. In the step-up / step-down mode, (f-1) the first switch is on and the second switch is on 5th state in which the third switch is turned off and the fourth switch is turned on, (f-2) the first switch is turned on, the second switch is turned off, the third switch is turned on, and the fourth switch is turned off. 6 states, (f-3) 7th state where the first switch is on, 2nd switch is off, 3rd switch is off, 4th switch is on, (f-4) 1st switch is off, 2nd The eighth state in which the switch is turned on, the third switch is turned off, and the fourth switch is turned on may be sequentially repeated.

The control circuit may be integrated on a single semiconductor substrate.
“Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate.

  Another aspect of the present invention relates to a step-up / step-down DC / DC converter. The step-up / step-down DC / DC converter includes an inductor, an input line to which an input voltage is supplied, an output line to which a load is connected and generates an output voltage, and a first switch provided between one end of the inductor and the input line. A second switch provided between one end of the inductor and the ground line, a third switch provided between the other end of the inductor and the ground line, and provided between the other end of the inductor and the output line. A fourth switch; an output capacitor connected to the output line; and any one of the control circuits described above for controlling the fourth switch from the first switch.

  Another embodiment of the present invention relates to an electronic device. The electronic device includes a battery and the above-described step-up / step-down DC / DC converter that receives the voltage of the battery in its input line.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  According to an aspect of the present invention, the ripple of the output voltage of the step-up / step-down DC / DC converter can be reduced.

It is a circuit diagram of a step-up / step-down DC / DC converter. 2A and 2B are operation waveform diagrams of the heavy load step-down mode and the heavy load step-up mode of the DC / DC converter of FIG. FIGS. 3A and 3B are operation waveform diagrams in the light load step-down mode and the light load step-up mode of the DC / DC converter of FIG. In DC / DC converters light load mode of FIG. 1 is a diagram illustrating the difference between the target voltage _{V OUT_REF} and the input voltage _{V IN,} the relationship between the ripple _{V RIP} of the output voltage _{V OUT.} It is a circuit diagram which shows the structure of the buck-boost DC / DC converter which concerns on 1st Embodiment. 6A and 6B are operation waveform diagrams of the light load buck-boost mode and the heavy load buck-boost mode of the DC / DC converter of FIG. In DC / DC converters light load mode of FIG. 5 is a diagram illustrating the difference between the target voltage _{V OUT_REF} and the input voltage _{V IN,} the relationship between the ripple _{V RIP} of the output voltage _{V OUT.} FIG. 6 is a circuit diagram illustrating a specific configuration example of the DC / DC converter of FIG. 5. FIG. 9 is an operation waveform diagram of the DC / DC converter of FIG. 8. It is an operation | movement waveform diagram of the light load buck-boost mode in 2nd Embodiment. It is a figure which shows the efficiency in each of 1st Embodiment and 2nd Embodiment. It is a circuit diagram which shows the specific structural example of the DC / DC converter which concerns on 2nd Embodiment. FIG. 13 is an operation waveform diagram of the DC / DC converter of FIG. 12. It is a figure which shows an example of the electronic device using a DC / DC converter.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are physically directly connected, or the member A and the member B are electrically connected. The case where it is indirectly connected through another member that does not affect the state is also included.
Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as an electrical condition. It includes the case of being indirectly connected through another member that does not affect the connection state.

FIG. 5 is a circuit diagram showing a configuration of a step-up / step-down DC / DC converter (hereinafter also simply referred to as a DC / DC converter) 100 according to the first embodiment. The DC / DC converter 100 steps down or boosts the input voltage _VIN input to the input line 104, and _loads the output voltage _VOUT stabilized at a predetermined target voltage _{VOUT_REF} to the output line 106 ( (Not shown).

  The DC / DC converter 100 includes an output circuit 102 and a control circuit 200. The output circuit 102 includes a first switch M1, a second switch M2, a third switch M3, a fourth switch M4, an inductor L1, and an output capacitor C1. The circuit topology of the output circuit 102 is the same as that of a general buck-boost switching regulator.

  The control circuit 200 has a feedback (FB) terminal, two switching terminals LX1, LX2, a ground (GND) terminal, an input (IN) terminal, and an output (OUT) terminal.

In the present embodiment, the first switch M1 to the fourth switch M4 are integrally integrated in the control circuit 200.
The IN terminal is connected to the input line 104 and supplied with the input voltage _VIN . The LX1 terminal is connected to one end of the inductor L1, and the LX2 terminal is connected to the other end of the inductor L1. The OUT terminal is connected to the output line 106. An output capacitor C1 is connected to the output line 106. The GND terminal is grounded via the ground line 108.

  The first switch M1 is provided between the IN terminal and the LX1 terminal. The second switch M2 is provided between the LX2 terminal and the GND terminal. The third switch M3 is provided between the LX2 terminal and the GND terminal. The fourth switch M4 is provided between the LX2 terminal and the OUT terminal.

  In addition to the first switch M1 to the fourth switch M4, the control circuit 200 includes a first controller (also referred to as a PFM controller) 210, a second controller (PWM controller) 220, a pre-driver 230, a mode selector 250, and a light load detection unit. 252 and a step-up / down selector 254 are provided.

The control circuit 200 can switch between a light load mode and a heavy load mode. The light load detector 252 detects a light load state in which the load current I _OUT is small. The structure of the light load detection part 252 is not specifically limited, What is necessary is just to use a well-known technique. For example, the light load detection unit 252 may detect the light load state by comparing the load current I _OUT with a predetermined threshold value. Or the light load detection part 252 may receive the notification signal which shows a light load state from the load connected to the output line 106, and may detect a light load state based on the said notification signal.

  Further, the control circuit 200 is configured to be able to switch between (a) step-down / step-up mode in addition to (a) step-down mode and (b) step-up mode. The (a) step-down mode and (b) step-up mode are as described with reference to FIGS.

The step-up / down selector 254 selects one of (a) step-down mode, (b) step-up mode, and (c) step-up / step-down mode based on the relationship between the input voltage _VIN and the target voltage _{VOUT_REF} .

For example, the buck-boost selector 254, the target voltage _{V OUT_REF} higher than the first threshold value _V TH1 _{= V OUT_REF} + _ΔV1, the target voltage _V lower than the _{OUT_REF} second threshold _V TH2 _{= V OUT_REF -ΔV2} is set. The step-up / down selector 254 selects the step-down mode when V _IN > V _TH1 , selects the step-up mode when V _IN <V _TH2 , and selects the step-up / step-down mode when V _TH2 <V _IN <V _TH1 .

  The mode selector 250 controls the PFM controller 210, the PWM controller 220, and the pre-driver 230 based on the mode set by the light load detection unit 252 and the step-up / down selector 254.

First, the light load mode will be described.
DC / DC converter 100 according to the present embodiment operates in one of the following three modes in a light load state.
・ Light load buck mode ・ Light load boost mode ・ Light load buck-boost mode

  The PFM controller 210 becomes active in the light load mode, and instructs the state of the first switch M1 to the fourth switch M4. The pre-driver 230 controls the state of the first switch M1 to the fourth switch M4 based on an instruction from the PFM controller 210 in the light load mode.

  The PFM controller 210 is configured to be able to switch between (a) the light load step-down mode and (b) the light load step-up / down mode in addition to the (b) light load step-up mode. The (a) light load step-down mode and (b) light load step-up mode are as described with reference to FIGS.

The PFM controller 210 is configured to sequentially repeat the following states φ1 to φ3 in (c) light load step-up / step-down mode. A so-called dead time may be inserted between the states.
(C-1) First state φ
First switch M1 = ON Second switch M2 = OFF Third switch M3 = ON Fourth switch M4 = OFF (c-2) Second state φ2
First switch M1 = off Second switch M2 = on Third switch M3 = off Fourth switch M4 = on (c-3) Third state φ3
First switch M1 = off Second switch M2 = off Third switch M3 = off Fourth switch M4 = off

Next, the heavy load mode will be described.
DC / DC converter 100 according to the present embodiment operates in one of the following three modes in a heavy load state.
-Heavy load buck mode-Heavy load boost mode-Heavy load buck-boost mode

  The PWM controller 220 becomes active in the heavy load mode, and instructs the state of the first switch M1 to the fourth switch M4. The pre-driver 230 controls the state of the first switch M1 to the fourth switch M4 based on an instruction from the PWM controller 220 in the heavy load mode.

  The PWM controller 220 is configured to be able to switch to (f) heavy load step-up / down mode in addition to (d) heavy load step-down mode and (e) heavy load step-up mode. (D) The heavy load step-down mode and (e) the heavy load step-up mode are as described with reference to FIGS.

The PWM controller 220 is configured to sequentially repeat the following states φ5 to φ8 in (f) heavy load step-up / step-down mode.
(F-1) Fifth state φ5
First switch M1 = ON Second switch M2 = OFF Third switch M3 = OFF Fourth switch M4 = ON (f-2) Sixth state φ6
First switch M1 = ON Second switch M2 = OFF Third switch M3 = ON Fourth switch M4 = OFF (f-3) Seventh state φ7
First switch M1 = ON Second switch M2 = OFF Third switch M3 = OFF Fourth switch M4 = ON (f-4) Eighth state φ8
First switch M1 = off Second switch M2 = on Third switch M3 = off Fourth switch M4 = on

The above is the configuration of the DC / DC converter 100 of FIG. Next, the operation will be described.
6A and 6B are operation waveform diagrams of the light load buck-boost mode and the heavy load buck-boost mode of the DC / DC converter 100 of FIG.

The terminal voltage _{V LX1} at light load buck-boost mode is the same as the buck mode of the terminal voltage _{V LX1} shown in FIG. 3 (a), the terminal voltage _{V LX2} in buck-boost mode, boost mode shown in FIG. 3 (b) _{Is the} same as the terminal voltage V _LX1 .

FIG. 7 is a diagram illustrating a relationship between the difference between the target voltage V _{OUT_REF} and the input voltage V _IN and the ripple V _RIP of the output voltage V _OUT in the light load mode of the DC / DC converter 100 of FIG. For comparison, FIG. 7 shows the ripple voltage V _{RIP of} FIG. 4 with a broken line. DC / DC converter 100, in StatusEqual input voltage _{V IN} and the target voltage _{V OUT_REF,} operating at light load buck-boost mode. The above is the operation of the DC / DC converter 100.

According to DC / DC converter 100 according to the embodiment, ripple V _RIP can be reduced by operating in the step-up / step-down mode in the state of V _{OUT_REF} ≈V _IN .

  Next, a specific configuration example of the DC / DC converter 100 will be described.

  FIG. 8 is a circuit diagram showing a specific configuration example of the DC / DC converter 100 of FIG. In FIG. 8, the PWM controller 220 is omitted.

The PFM controller 210 includes a comparator 212, a logic unit 214, a peak current detection circuit 240, and a zero current detection circuit 242. The comparator 212 compares the feedback voltage V _FB corresponding to the output voltage _VOUT in the third state φ3 with a predetermined reference voltage V _REF, and is asserted (for example, high level) when the feedback voltage V _FB becomes lower than the reference voltage V _REF. The on signal S1 is generated.

Peak current detection circuit 240, in the first state .phi.1, generates a peak current detection signal S2 is asserted (e.g., high level) when the coil current _{I L} reaches the peak current _{I PEAK} flowing through the inductor L1. For example the peak current detection circuit 240, by comparing the drain-source voltage of the first switch M1 (voltage drop) with a predetermined threshold voltage may be compared with I _L and I _PEAK.

Zero current detection circuit 242 generates the zero current detection signal S3 coil current I _L is asserted becomes substantially zero (e.g., high level) in the second state .phi.2. The zero current detection circuit 242 includes a step-down zero current detection circuit 242a that detects that the coil current _IL is substantially zero based on the voltage drop of the second switch M2, and a voltage drop of the third switch M3. including a zero current detection circuit 242b for boosting for detecting that the coil current I _L has become substantially zero on the basis of.

Note that the configurations of the peak current detection circuit 240 and the zero current detection circuit 242 are not particularly limited. For example to insert the known detection resistor in the path of the coil current I _L, it may be used the voltage drop across the sense resistor.

  The logic unit 214 transitions to the second state φ2 when the peak current detection signal S2 is asserted in the first state φ1, and transitions to the third state φ3 when the zero current detection signal S3 is asserted in the second state φ2. When the ON signal S1 is asserted in the third state φ3, the state transits to the first state φ1.

  The logic unit 214 includes a first flip-flop 216, an inverter 217, a second flip-flop 218, and an OR gate 219.

The first flip-flop 216 outputs a first control signal _SCNT1 that is at a first level (high level) when the ON signal S1 is asserted and is at a second level (low level) when the peak current detection signal S2 is asserted. Generate. For example, the first flip-flop 216 is a D flip-flop. The input D has a high level voltage V _H , the clock terminal CK has an on signal S 1, and the reset terminal (inverted logic) has an inverter 217. The inverted peak current detection signal S2 is input.

The OR gate 219 generates a logical sum S3 of the zero current detection signals S3a and S3b. The second flip-flop 218 becomes a first level (high level) when the zero current detection signal S3 is asserted, and becomes a second level (low level) when the first control signal _SCNT1 is asserted. _SCNT2 is generated. For example, the second flip-flop 218 is a D flip-flop, its input D has a high level voltage V _H , its clock terminal CK has a zero current detection signal S3, and its reset terminal (inverted logic) has a first 1 Control signal _SCNT1 is input.

The logic unit 214 instructs the state of the pre-driver 230 by a combination of two control signals S _CNT1 and S _CNT2 . The assignment of the states φ1 to φ3 and the control signals S _CNT1 and S _CNT2 is not limited, but an example is shown.
φ1: S _CNT1 = H, S _CNT2 = L
φ2: S _CNT1 = L, S _CNT2 = L
φ3: _SCNT1 = L, _SCNT2 = H

Predriver 230, based on the control signal _{S CNT1, S CNT2,} and controls the first switch M1~ fourth switch M4. The fourth switch M4 includes a P-channel MOSFET and an N-channel MOSFET connected in parallel.

For example, the pre-driver 230 includes a step-down pre-driver 232, a step-up pre-driver 234, and a step-up pre-driver 236. The step-down pre-driver 232 controls the first switch M1 and the second switch M2. The boosting pre-driver 234 controls the third switch M3 and the fourth switch M4a. The PFM controller 210 generates a control signal _SCNT4 that is high in the step-down mode and low in the step-up mode. Boosting pre-driver 236 receives a control signal _{S CNT4,} the fourth switch M4b fixedly turned on in the step-down mode, off fixedly fourth switch M4b in boost mode.

  The above is a specific configuration example of the DC / DC converter 100. Next, the operation will be described. FIG. 9 is an operation waveform diagram of the DC / DC converter 100 of FIG.

According to the DC / DC converter 100 in FIG. 8, in a light load buck-boost mode, while maintaining the peak of the coil current I _L, it is possible to control the respective states [phi] 1 through [phi].

(Second Embodiment)
According to the DC / DC converter 100 according to the first embodiment, the ripple of the output voltage _VOUT can be reduced by operating in the light load buck-boost mode in the state of V _IN ≈V _OUT. On the other hand, there arises a problem that efficiency is lowered. In the second embodiment, a DC / DC converter 100 capable of improving efficiency while reducing ripple will be described.

  The DC / DC converter 100 according to the second embodiment is configured similarly to FIG. In the second embodiment, the operation in the light load buck-boost mode is different from that in the first embodiment. Specifically, in the second embodiment, in the light load buck-boost mode, the PFM controller 210 (c-4) has one end LX1 and the other end of the inductor L1 between the first state φ1 and the second state φ2. A fourth state φ4 for applying substantially the same potential to LX2 is inserted, and the four states φ1 to φ4 are transitioned.

In the fourth state φ4, each switch may be in the following state.
(C-4) Fourth state φ4
1st switch M1 = on 2nd switch M2 = off 3rd switch M3 = off 4th switch M4 = on

FIG. 10 is an operation waveform diagram in the light load buck-boost mode according to the second embodiment. In the fourth state φ4, V _LX1 ≈V _IN and V _LX2 ≈V _OUT , and when V _IN ≈V _OUT , the voltages V _LX1 and V _LX2 across the inductor L1 are substantially equal.

  FIG. 11 is a diagram showing the efficiency in each of the first embodiment and the second embodiment. (I) shows the efficiency of the first embodiment, and (ii) shows the efficiency of the second embodiment. As shown in FIG. 11, the efficiency can be improved by adding the fourth state φ4 in the light load buck-boost mode.

  FIG. 12 is a circuit diagram illustrating a specific configuration example of the DC / DC converter 100a according to the second embodiment. The PWM controller 220 is omitted from the control circuit 200a of FIG.

  The logic unit 214a transitions to the fourth state φ4 when the peak current detection signal S2 is asserted in the first state φ1, and transitions to the second state φ2 when the on signal S1 is negated in the fourth state φ4. When the zero current detection signal S3 is asserted in the two state φ2, the state transitions to the third state φ3, and when the on signal S1 is asserted in the third state φ3, the state transitions to the first state φ1.

The logic unit 214a includes a logic gate 215 in addition to the logic unit 214 of FIG. The logic gate 215 is at the first level (high level) when the first control signal _SCNT1 is at the first level (high level) or the on signal S1 is asserted (high level), and at other times the first control signal _SCNT1 is asserted (high level). A third control signal _SCNT3 that becomes two levels (low level) is generated. For example, logic gate 215 may be an OR gate that generates a logical sum of _SCNT1 and S1.

The logic unit 214a instructs the state of the pre-driver 230 with a combination of three control signals _SCNT1 , _SCNT2 , and _SCNT3 . Note that each state .phi.1 to .phi.4, the allocation of the control signal _S CNT1 _{to S CNT3} without limitation, an example.
φ1: _SCNT1 = H, _SCNT2 = L, _SCNT3 = H
φ4: _SCNT1 = L, _SCNT2 = L, _SCNT3 = H
φ2: _SCNT1 = L, _SCNT2 = L, _SCNT3 = L
φ3: _SCNT1 = L, _SCNT2 = H, _SCNT3 = L

The step-down predriver 232 controls the first switch M1 and the second switch M2 based on _SCNT2 and _SCNT3 , and the step-up predriver 234 includes the third switch M3 and the fourth switch based on _SCNT1 and _SCNT2 . The switch M4 is controlled.

  The above is a specific configuration example of the DC / DC converter 100a according to the second embodiment. Next, the operation will be described. FIG. 13 is an operation waveform diagram of the DC / DC converter 100a of FIG.

As shown in FIG. 13, in the fourth state .phi.4, both ends of the inductor L1 by a substantially same potential during a fourth state .phi.4, the coil current I _L is kept constant. In the second embodiment, by inserting the fourth state φ4, the charge supplied to the output capacitor C1 by one switching operation is maintained while maintaining the peak current I _PEAK as compared with the first embodiment. The amount can be increased. Thereby, the third state φ3 can be made longer than in the first embodiment, the switching frequency can be lowered, and the efficiency can be increased.

Next, the application of the DC / DC converter 100 will be described. FIG. 14 is a diagram illustrating an example of an electronic device 700 using the DC / DC converter 100. The electronic device 700 is a battery-powered device such as a mobile phone terminal, a digital camera, a digital video camera, a PDA (Personal Digital Assistant), and a portable audio player. The electronic device 700 includes a housing 702, a battery 704, a microprocessor 706, and the DC / DC converter 100. The DC / DC converter 100 receives the battery voltage V _BAT from the battery 704 on its input line 104 and supplies the output voltage _VOUT to the microprocessor 706 connected to the output line 106.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are within the scope of the present invention. is there. Hereinafter, such modifications will be described.

(First modification)
In the embodiment, the peak current detection circuit 240, the current I _L flowing through the first switch M1 reaches a predetermined peak current I _PEAK, a case has been described to assert the peak current detection signal S2, a peak current detection circuit The function of 240 is not limited to this. For example, the peak current detection circuit 240 may be configured to assert the peak current detection signal S2 when the first state φ1 elapses for a predetermined time. In this case, the peak current detection circuit 240 can be constituted by an analog or digital timer circuit or a delay circuit, and a known technique may be used.

(Second modification)
In the second embodiment, a case has been described in which the transition from the fourth state φ4 to the second state φ2 is triggered by the negation of the ON signal S1, but the present invention is not limited thereto. For example, the length of the fourth state φ4 may be fixed at a predetermined time.

(Third Modification)
The load of the DC / DC converter 100 may be a liquid crystal driver, another power supply circuit, other analog circuit, or digital circuit in addition to the microprocessor. The DC / DC converter 100 can also be used in a charging circuit that charges a battery.

(Fourth modification)
The first switch M1 to the fourth switch M4 may be discrete elements or may be externally attached to the control circuit 200.

(Fifth modification)
The correspondence relationship between the assertion and negation of each signal and the high level and low level described in the embodiment is an example, and those skilled in the art can design any combination.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are permitted without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 100 ... DC / DC converter, 102 ... Output circuit, 104 ... Input line, 106 ... Output line, M1 ... 1st switch, M2 ... 2nd switch, M3 ... 3rd switch, M4 ... 4th switch, L1 ... Inductor, C1 ... Output capacitor, R1 ... first resistor, R2 ... second resistor, 200 ... control circuit, 210 ... PFM controller, 212 ... comparator, 214 ... logic unit, 216 ... first flip-flop, 217 ... inverter, 218 ... first 2 flip-flops, 219 ... OR gate, 220 ... PWM controller, 215 ... logic gate, 230 ... predriver, 232 ... step-down predriver, 234,236 ... step-up predriver, 240 ... peak current detection circuit, 242 ... zero Current detection circuit, 250... Mode selector, 252. ... buck selector, S1 ... ON signal, S2 ... peak current detection signal, S3 ... zero current detection signal, 700 ... electronic device, 702 ... housing, 704 ... battery, 706 ... microprocessor.

Claims (19)

A step-up / step-down DC / DC converter control circuit comprising:
The step-up / step-down DC / DC converter
An inductor;
An input line to which an input voltage is supplied;
An output line to which a load is connected and an output voltage is generated; and
A first switch provided between one end of the inductor and the input line;
A second switch provided between one end of the inductor and a ground line;
A third switch provided between the other end of the inductor and a ground line;
A fourth switch provided between the other end of the inductor and the output line;
An output capacitor connected to the output line,
The control circuit includes:
A first controller instructing a state of the fourth switch from the first switch in a light load state;
A pre-driver that controls the state of the fourth switch from the first switch based on an instruction from the first controller in the light load state;
With
The first controller can switch between (a) step-down mode, (b) step-up mode, and (c) step-up / step-down mode, and in the step-up / step-down mode,
(C-1) a first state in which the first switch is on, the second switch is off, the third switch is on, and the fourth switch is off;
(C-2) a second state in which the first switch is off, the second switch is on, the third switch is off, and the fourth switch is on;
(C-3) a third state in which the first switch is off, the second switch is off, the third switch is off, and the fourth switch is off;
Is configured to repeat in order ,
The first controller includes:
A comparator that compares a feedback voltage according to the output voltage with a predetermined reference voltage in the third state, and generates an ON signal that is asserted when the feedback voltage becomes lower than the reference voltage;
A peak current detection circuit that generates a peak current detection signal that is asserted when the coil current flowing through the inductor reaches a peak current in the first state;
A zero current detection circuit that generates a zero current detection signal that is asserted when the coil current is substantially zero in the second state;
When the peak current detection signal is asserted in the first state, the state transits to the second state, and when the zero current detection signal is asserted in the second state, the state transits to the third state. A logic unit that transitions to the first state when the on signal is asserted at
A control circuit comprising:   When the input voltage is higher than a first threshold value set higher than the target level of the output voltage, the first controller enters the step-down mode and the input voltage is set lower than the target level of the output voltage. 2. The step-up / step-down mode is set when the input voltage is higher than the second threshold value and lower than the first threshold value when the input voltage is lower than the first threshold value when the input voltage is lower than the second threshold value. The control circuit described. The logic part is
A first flip-flop that generates a first control signal that is at a first level when the on signal is asserted and at a second level when the peak current detection signal is asserted;
A second flip-flop that generates a second control signal that is at a first level when the zero current detection signal is asserted and at a second level when the first control signal is asserted;
The control circuit according to claim 1 , comprising: The peak current detection circuit, a control circuit according to claim 1 or 3 wherein the coil current compared to the peak current, characterized in that it is configured to assert the peak current detection signal based on the comparison result . The peak current detection circuit, the the first state has elapsed a predetermined time, the control circuit according to claim 1 or 3, characterized in that it is configured to assert the peak current detection signal. In the step-up / step-down mode, the first controller applies (c-4) substantially the same potential to the one end and the other end of the inductor between the first state and the second state. control circuit according to any one of claims 1 to 5, characterized in that the insertion state. In the step-up / step-down mode, the first controller (c-4) between the first state and the second state, the first switch is on, the second switch is off, and the third switch is off. a control circuit according to any one of claims 1 to 5, wherein said fourth switch to insert the fourth condition to be turned on. A step-up / step-down DC / DC converter control circuit comprising:
The step-up / step-down DC / DC converter
An inductor;
An input line to which an input voltage is supplied;
An output line to which a load is connected and an output voltage is generated; and
A first switch provided between one end of the inductor and the input line;
A second switch provided between one end of the inductor and a ground line;
A third switch provided between the other end of the inductor and a ground line;
A fourth switch provided between the other end of the inductor and the output line;
An output capacitor connected to the output line,
The control circuit includes:
A first controller instructing a state of the fourth switch from the first switch in a light load state;
A pre-driver that controls the state of the fourth switch from the first switch based on an instruction from the first controller in the light load state;
With
The first controller can switch between (a) step-down mode, (b) step-up mode, and (c) step-up / step-down mode, and in the step-up / step-down mode,
(C-1) a first state in which the first switch is on, the second switch is off, the third switch is on, and the fourth switch is off;
(C-2) a second state in which the first switch is off, the second switch is on, the third switch is off, and the fourth switch is on;
(C-3) a third state in which the first switch is off, the second switch is off, the third switch is off, and the fourth switch is off;
Is configured to repeat in order,
In the step-up / step-down mode, the first controller (c-4) inserts a fourth state between the first state and the second state, and the fourth state is (i) the one end of the inductor. Or (ii) the first switch is on, the second switch is off, the third switch is off, and the fourth switch is on. Either
The first controller includes:
A comparator that compares a feedback voltage according to the output voltage with a predetermined reference voltage in the third state, and generates an ON signal that is asserted when the feedback voltage becomes lower than the reference voltage;
A peak current detection circuit that generates a peak current detection signal that is asserted when the coil current flowing through the inductor reaches a peak current in the first state;
A zero current detection circuit that generates a zero current detection signal that is asserted when the coil current is substantially zero in the second state;
When the peak current detection signal is asserted in the first state, the state transits to the fourth state, and when the on signal is negated in the fourth state, the state transits to the second state, and in the second state, the state A logic unit that transitions to the third state when a zero current detection signal is asserted and transitions to the first state when the on signal is asserted in the third state;
A control circuit comprising: The logic part is
A first flip-flop that generates a first control signal that is at a first level when the on signal is asserted and at a second level when the peak current detection signal is asserted;
A second flip-flop that generates a second control signal that is at a first level when the zero current detection signal is asserted and at a second level when the first control signal is asserted;
A logic gate that generates a third control signal that is at the first level when the first control signal is at the first level or at which the on signal is asserted and that is at the second level otherwise;
The control circuit according to claim 8 , comprising: 10. The control circuit according to claim 8, wherein the peak current detection circuit is configured to compare the coil current with the peak current and to assert the peak current detection signal based on a comparison result. . The control circuit according to claim 8 , wherein the peak current detection circuit is configured to assert the peak current detection signal when the first state has elapsed for a predetermined time. A second controller for instructing a state of the fourth switch from the first switch in a heavy load state;
The pre-driver, said in the heavy load state, according to claim 1 to 11, characterized in that it is configured to control the state of the fourth switch from the first switch based on an instruction from the second controller The control circuit according to any one of the above. The second controller can switch between (d) step-down mode, (e) step-up mode, and (f) step-up / step-down mode, and in the step-up / step-down mode,
(F-1) a fifth state in which the first switch is on, the second switch is off, the third switch is off, and the fourth switch is on;
(F-2) a sixth state in which the first switch is on, the second switch is off, the third switch is on, and the fourth switch is off;
(F-3) a seventh state in which the first switch is on, the second switch is off, the third switch is off, and the fourth switch is on;
(F-4) an eighth state in which the first switch is off, the second switch is on, the third switch is off, and the fourth switch is on;
The control circuit according to claim 12 , wherein the control circuit is configured to repeat in order. Control circuit according to any one of claims 1 to 13, characterized in that it is integrated on a single semiconductor substrate. A step-up / step-down DC / DC converter,
An inductor;
An input line to which an input voltage is supplied;
An output line to which a load is connected and an output voltage is generated; and
A first switch provided between one end of the inductor and the input line;
A second switch provided between one end of the inductor and a ground line;
A third switch provided between the other end of the inductor and a ground line;
A fourth switch provided between the other end of the inductor and the output line;
An output capacitor connected to the output line;
The control circuit according to any one of claims 1 to 14 , which controls the fourth switch from the first switch;
A step-up / step-down DC / DC converter characterized by comprising: Battery,
The step-up / step-down DC / DC converter according to claim 15 , which receives the voltage of the battery on its input line.
An electronic device comprising: A control method for a step-up / step-down DC / DC converter,
The step-up / step-down DC / DC converter
An inductor;
An input line to which an input voltage is supplied;
An output line to which a load is connected and an output voltage is generated; and
A first switch provided between one end of the inductor and the input line;
A second switch provided between one end of the inductor and a ground line;
A third switch provided between the other end of the inductor and a ground line;
A fourth switch provided between the other end of the inductor and the output line;
An output capacitor connected to the output line,
The control method is repeatedly executed in order.
(C-1) a first step in which the first switch is on, the second switch is off, the third switch is on, and the fourth switch is off;
(C-2) a second step in which the first switch is off, the second switch is on, the third switch is off, and the fourth switch is on;
(C-3) a third step in which the first switch is off, the second switch is off, the third switch is off, and the fourth switch is off;
With
The control method is:
Comparing a feedback voltage according to the output voltage with a predetermined reference voltage in the third step, and generating an ON signal that is asserted when the feedback voltage becomes lower than the reference voltage;
Generating a peak current detection signal that is asserted when the coil current flowing through the inductor reaches a peak current in the first step;
Generating a zero current detection signal that is asserted when the coil current is substantially zero in the second step;
Further comprising
Transition to the second step when the peak current detection signal is asserted in the first step;
Transition to the third step when the zero current detection signal is asserted in the second step;
Transition to the first step when the ON signal is asserted in the third step;
Furthermore, that control how to be characterized in that it comprises a. The control method is:
18. The method of claim 17 , further comprising a fourth step of applying substantially the same potential to the one end and the other end of the inductor, which is inserted between the first step and the second step. Control method. A control method for a step-up / step-down DC / DC converter,
The step-up / step-down DC / DC converter
An inductor;
An input line to which an input voltage is supplied;
An output line to which a load is connected and an output voltage is generated; and
A first switch provided between one end of the inductor and the input line;
A second switch provided between one end of the inductor and a ground line;
A third switch provided between the other end of the inductor and a ground line;
A fourth switch provided between the other end of the inductor and the output line;
An output capacitor connected to the output line,
The control method is repeatedly executed in order.
(C-1) a first step in which the first switch is on, the second switch is off, the third switch is on, and the fourth switch is off;
(C-2) a second step in which the first switch is off, the second switch is on, the third switch is off, and the fourth switch is on;
(C-3) a third step in which the first switch is off, the second switch is off, the third switch is off, and the fourth switch is off;
A fourth step of applying substantially the same potential to the one end and the other end of the inductor, inserted between the first step and the second step;
With
The control method is:
Comparing a feedback voltage according to the output voltage with a predetermined reference voltage in the third step, and generating an ON signal that is asserted when the feedback voltage becomes lower than the reference voltage;
Generating a peak current detection signal that is asserted when the coil current flowing through the inductor reaches a peak current in the first step;
Generating a zero current detection signal that is asserted when the coil current is substantially zero in the second step;
Transition to the fourth step when the peak current detection signal is asserted in the first step;
Transitioning to the second step when the ON signal is negated in the fourth step;
Transition to the third step when the zero current detection signal is asserted in the second step;
Transition to the first step when the ON signal is asserted in the third step;
Furthermore, that control how to be characterized in that it comprises a.

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