JP2013024622A - Wiring board for electronic component inspection device and method for manufacturing the same - Google Patents

Wiring board for electronic component inspection device and method for manufacturing the same Download PDF

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JP2013024622A
JP2013024622A JP2011157419A JP2011157419A JP2013024622A JP 2013024622 A JP2013024622 A JP 2013024622A JP 2011157419 A JP2011157419 A JP 2011157419A JP 2011157419 A JP2011157419 A JP 2011157419A JP 2013024622 A JP2013024622 A JP 2013024622A
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wiring
probe
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electronic component
wiring layer
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JP5690678B2 (en
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Tomoyoshi Ono
友義 小野
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a wiring board for an electronic component inspection device capable of easily arranging a plurality of pieces of surface wiring for connecting a pad for a probe with an external connection terminal to the same surface of a board body, shortening design and manufacturing periods and being easily manufactured, and a method for manufacturing the same.SOLUTION: A wiring board 1 for an electronic component inspection device includes: a board body 2 which is constituted by laminating a plurality of ceramic layers s1, s2, and has a surface 3 and a rear surface 4 whose planar views are rectangle; a plurality of pads 5 for a probe which are formed on a center side 3a on the surface 3 of the board body 2 and on which a probe 16 is mounted; a plurality of external connection terminals 6 formed on a peripheral side 3b on the surface 3 of the board body 2 and outside the plurality of pads 5 for the probe; surface wiring 7 which individually connects between the pads 5 for the probe and the external connection terminals 6, and is formed on the surface 3 of the board body 2; and pieces of internal wiring 8, 9 formed between the ceramic layers s1, s2 of the board body 2, in which the pieces of internal wiring 8, 9 are at least one of a power source wiring layer 8 and a ground wiring layer 9.

Description

本発明は、電子部品の導通性や動作の可否などを検査するために用いる電子部品検査装置用配線基板およびその製造方法に関する。   The present invention relates to a wiring board for an electronic component inspection apparatus used for inspecting the continuity of an electronic component, the availability of operation, and the like, and a manufacturing method thereof.

ICチップやLSIなどの被検査電子部品の導通性や動作の可否などを検査するため、平面視が比較的幅広のプリント回路基板における一方の表面の周辺部にテスタと接続するための複数のテスタ接点を設け、上記回路基板における他方の表面の中心部に複数の接続部が位置するように当該回路基板の内部に電気トレースを配線すると共に、上記接続部を介して一方の表面が電気的に接続された比較的幅狭のプローブ・ヘッド(回路基板)内部のトレースを介して、該プローブ・ヘッドの他方の表面に被検査電子部品のテスト・ポイントに接触する複数のプローブを突設したプローブ・カード・アセンブリが提案されている(例えば、特許文献1参照)。   A plurality of testers for connecting a tester to a peripheral portion of one surface of a printed circuit board having a relatively wide plan view in order to inspect the continuity of the electronic components to be inspected such as an IC chip and an LSI and whether the operation is possible. A contact is provided, and an electrical trace is wired inside the circuit board so that a plurality of connection parts are located at the center of the other surface of the circuit board, and one surface is electrically connected via the connection part. A probe in which a plurality of probes that contact a test point of an electronic component to be inspected are projected on the other surface of the probe head via a trace inside the connected relatively narrow probe head (circuit board) A card assembly has been proposed (see, for example, Patent Document 1).

しかし、前記のような2個の基板を併用するプローブ・カード・アセンブリでは、被検査電子部品ごとにテスト・ポイントが異なるため、個々の基板における内部配線(トレース)のレイアウトを設計することが必要となり、配線設計と製造とに多大な時間を要し、比較的短い納期には対応し難くなる場合があった。
上記の問題を解決するため、プローブを実装するためのプローブ用パッドと、外部接続用パッド(端子)と、これらのパッド間を導通するための信号、電源、および接地用の配線とを、絶縁性基板の同じ表面に位置する表面配線として形成することも検討されている。しかし、この場合、上記絶縁性基板の同じ表面において、接続すべき複数組のパッド同士間に配線すべき表面配線の密度が過密となり、全ての配線を上記同じ表面に配設することが著しく困難になる場合があった。
However, in the probe card assembly using the two boards as described above, the test points differ for each electronic component to be inspected, so it is necessary to design the internal wiring (trace) layout on each board. Therefore, it takes a lot of time to design and manufacture the wiring, and it may be difficult to cope with a relatively short delivery time.
In order to solve the above problems, the probe pad for mounting the probe, the external connection pad (terminal), and the signal, power supply, and ground wiring for conducting between these pads are insulated. The formation of a surface wiring located on the same surface of a conductive substrate has also been studied. However, in this case, on the same surface of the insulating substrate, the density of the surface wiring to be wired between a plurality of sets of pads to be connected becomes excessively dense, and it is extremely difficult to arrange all the wiring on the same surface. There was a case.

特開2008−197118号公報(第1〜39頁、図2,3)JP 2008-197118 A (pages 1 to 39, FIGS. 2 and 3)

本発明は、背景技術において説明した問題点を解決し、プローブ用パッドと外部接続端子とを接続する複数の表面配線を基板本体の同じ表面に容易に配設できると共に、設計および製造期間を短縮でき且つ容易に製造できる電子部品検査装置用配線基板およびその製造方法を提供する、ことを課題とする。   The present invention solves the problems described in the background art, and can easily arrange a plurality of surface wirings for connecting probe pads and external connection terminals on the same surface of the substrate body, and shortens the design and manufacturing period. It is an object of the present invention to provide a wiring board for an electronic component inspection apparatus that can be manufactured easily and a manufacturing method thereof.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明は、前記課題を解決するため、複数のセラミック層を積層した基板本体の表面にプローブ用パッド、外部接続端子、およびこれらの間を導通する表面配線を形成し、且つ上記セラミック層間に電源配線層および接地配線層の少なくとも一方からなる内部配線を形成する、ことに着想して成されたものである。
即ち、本発明の電子部品検査装置用配線基板(請求項1)は、複数のセラミック層を積層してなり、平面視が矩形の表面および裏面を有する基板本体と、該基板本体の表面における中心側に形成され且つプローブが実装される複数のプローブ用パッドと、上記基板本体の表面における周辺側で且つ上記複数のプローブ用パッドの外側に形成された複数の外部接続端子と、上記プローブ用パッドと外部接続端子との間を個別に接続し且つ上記基板本体の表面に形成された表面配線、および基板本体の上記セラミック層間に形成された内部配線と、を含む電子部品検査装置用配線基板であって、上記内部配線は、電源配線層および接地配線層の少なくとも一方である、ことを特徴とする。
In order to solve the above-mentioned problem, the present invention forms a probe pad, an external connection terminal, and a surface wiring that conducts between them on the surface of a substrate body in which a plurality of ceramic layers are laminated, and a power source between the ceramic layers The idea is to form an internal wiring composed of at least one of a wiring layer and a ground wiring layer.
That is, a wiring board for an electronic component inspection apparatus according to the present invention (Claim 1) is formed by laminating a plurality of ceramic layers, and has a substrate body having a rectangular surface and a back surface in plan view, and a center on the surface of the substrate body. A plurality of probe pads which are formed on the side and on which the probe is mounted; a plurality of external connection terminals which are formed on the peripheral side of the surface of the substrate body and outside the plurality of probe pads; and the probe pad A wiring board for an electronic component inspection apparatus, comprising: a surface wiring formed on the surface of the substrate body, and an internal wiring formed between the ceramic layers of the substrate body. The internal wiring is at least one of a power wiring layer and a ground wiring layer.

これによれば、前記基板本体の表面における中心側に位置する複数のプローブ用パッドと、周辺側に位置する複数の外部接続端子との間には、複数の信号配線(層)などが個別に表面配線として形成され、且つ上記基板本体を構成する複数のセラミック層間には、平面視が比較的広い面積の電源配線層および接地配線層の少なくとも一方が内部配線として形成されている。そのため、基板本体における同じ表面において、中心側のプローブ用パッドと周辺側の外部接続端子との間を信号配線によって容易に接続できると共に、比較的広い面積を要する電源配線層および接地配線層の一方または双方を、基板本体を構成する複数のセラミック層間に形成し、これらの内部配線と上記パッドまたは端子との間を、上層側のセラミック層を貫通するビア導体を介して容易に接続することができる。従って、優れた検査精度を奏し、設計および製造期間を短縮でき、且つ容易に製造することも可能となる。   According to this, a plurality of signal wirings (layers) and the like are individually provided between the plurality of probe pads located on the center side on the surface of the substrate body and the plurality of external connection terminals located on the peripheral side. At least one of a power wiring layer and a ground wiring layer having a relatively large area in plan view is formed as an internal wiring between a plurality of ceramic layers formed as a surface wiring and constituting the substrate body. Therefore, on the same surface of the substrate body, the center side probe pad and the peripheral side external connection terminal can be easily connected by signal wiring, and one of the power wiring layer and the ground wiring layer which requires a relatively large area. Alternatively, both may be formed between a plurality of ceramic layers constituting the substrate body, and the internal wiring and the pads or terminals may be easily connected via via conductors penetrating the upper ceramic layer. it can. Therefore, excellent inspection accuracy can be achieved, design and manufacturing period can be shortened, and manufacturing can be easily performed.

尚、前記セラミック層は、アルミナやムライトなどの高温焼成セラミック、あるいは低温焼成セラミックの一種であるガラス−セラミックからなり、前者の場合には、前記電源配線層、接地配線層、あるいはこれらと表面側の前記プローブ用パッドや外部接続端子との間を導通するためのビア導体には、WまたはMoが同時焼成用に用いられ、後者の場合には、AgやCuが同時焼成用に用いられる。
また、前記内部配線の電源配線層や接地配線層は、平面視で平板状を呈する通称ベタ状であり、平面視で内側に隙間を有しないか、あるいは極く僅かの隙間を有する平板状を呈するものである。
更に、前記基板本体を構成する複数のセラミック層間には、電源配線層および接地配線層の一方あるいは双方が形成される。このうち、電源配線層の一部は、上記内部配線に限らず、表面配線の一部として形成することも可能である。
The ceramic layer is made of high-temperature fired ceramic such as alumina or mullite, or glass-ceramic which is a kind of low-temperature fired ceramic. In the former case, the power wiring layer, the ground wiring layer, or these and the surface side For the via conductor for conducting between the probe pad and the external connection terminal, W or Mo is used for simultaneous firing, and in the latter case, Ag or Cu is used for simultaneous firing.
Further, the power supply wiring layer and the ground wiring layer of the internal wiring have a so-called solid shape which has a flat plate shape in a plan view, and have a flat plate shape having no gap on the inside or a very slight gap in a plan view. It is presented.
Further, one or both of a power supply wiring layer and a ground wiring layer are formed between the plurality of ceramic layers constituting the substrate body. Among these, a part of the power supply wiring layer is not limited to the internal wiring but can be formed as a part of the surface wiring.

また、前記プローブ用パッドは、追って該パッドの上面に実装されるプローブの取り付けによる位置ズレに抵抗するため、平面視が円形あるいは四角形以上の正多角形を呈する形態が望ましい。
更に、前記外部接続端子は、本配線基板を搭載すべき中継基板または母基板側の接続端子との間に配置するボンディングワイヤの取り付け時の位置ズレを容易に吸収するため、平面視で上記ワイヤの配設方向に沿った方向に長辺または長径が平行となる平面視が長方形、長円形、あるいは楕円形を呈する形態が望ましい。
加えて、前記プローブ用パッドと外部接続端子との間を接続する表面配線は、主に信号配線(層)あるいは電源配線層が用いられ、電気抵抗を低減する上で、上記パッドおよび接続端子の幅(直径)と同じ線幅にすることが望ましい。
In addition, the probe pad preferably resists positional displacement due to the attachment of the probe mounted on the upper surface of the pad, and thus preferably has a form in which the plan view is a circle or a regular polygon having a square shape or more.
Further, the external connection terminal easily absorbs a positional deviation when a bonding wire disposed between the relay board on which the wiring board is to be mounted or the connection terminal on the mother board side is attached. It is desirable that the planar view in which the long sides or the long diameters are parallel to the direction along the arrangement direction of the above has a rectangular shape, an oval shape, or an elliptical shape.
In addition, the signal wiring (layer) or the power wiring layer is mainly used as the surface wiring for connecting between the probe pad and the external connection terminal. In order to reduce the electrical resistance, the pad and the connection terminal It is desirable to have the same line width as the width (diameter).

更に、本発明には、前記基板本体は、3層以上のセラミック層を積層してなり、該複数のセラミック層間ごとに前記電源配線層および接地配線層の少なくとも一方が形成されている、電子部品検査装置用配線基板(請求項2)も含まれる。
これによれば、複数のセラミック層間ごとに前記電源配線層および接地配線層の一方または双方が形成されているので、上記基板本体の表面における中心側に位置する複数のプローブ用パッドと、周辺側に位置する複数の外部接続端子との間に、例えば、全て表面配線を複数の信号配線として確実に形成することが可能となる。
尚、前記3層以上のセラミック層を積層して形成される2以上のセラミック層間ごとには、前記電源配線層および接地配線層の一方あるいは双方が形成される。但し、電源配線層の一部は、表面配線の一部として形成することも可能である。
Further, in the present invention, the substrate body is formed by laminating three or more ceramic layers, and at least one of the power wiring layer and the ground wiring layer is formed for each of the plurality of ceramic layers. A wiring board for an inspection apparatus (Claim 2) is also included.
According to this, since one or both of the power supply wiring layer and the ground wiring layer are formed for each of the plurality of ceramic layers, the plurality of probe pads positioned on the center side on the surface of the substrate body, and the peripheral side For example, it is possible to reliably form all the surface wirings as a plurality of signal wirings between the plurality of external connection terminals located at the same position.
One or both of the power supply wiring layer and the ground wiring layer are formed for every two or more ceramic layers formed by laminating the three or more ceramic layers. However, a part of the power supply wiring layer can be formed as a part of the surface wiring.

一方、本発明による電子部品検査装置用配線基板の製造方法(請求項3)は、追って、最上層、中層、あるいは最下層のうちの2層以上のセラミック層となる複数のグリーンシートの表面または裏面に導電性ペーストを印刷して、未焼成の配線層を形成する工程と、上記複数のグリーンシートを積層し且つ圧着してグリーンシート積層体を形成する工程と、該グリーンシート積層体を焼成してセラミック積層体を形成する工程と、該セラミック積層体に含まれる複数の基板本体ごとの表面において、該表面における中心側で且つプローブが実装される複数のプローブ用パッドを、該表面における周辺側で且つ上記複数のプローブ用パッドの外側に複数の外部接続端子を、上記プローブ用パッドと外部接続端子との間を個別に接続する複数の表面配線を、それぞれ形成する工程と、を備えた電子部品検査装置用配線基板の製造方法であって、上記配線層は、電源配線層および接地配線層の少なくとも一方として形成される、ことを特徴とする。   On the other hand, a method for manufacturing a wiring board for an electronic component inspection apparatus according to the present invention (claim 3) is a method for manufacturing the surface of a plurality of green sheets that become two or more ceramic layers of the uppermost layer, the middle layer, or the lowermost layer. A step of printing a conductive paste on the back surface to form an unfired wiring layer, a step of laminating and pressing the plurality of green sheets to form a green sheet laminate, and firing the green sheet laminate Forming a ceramic laminate, and on the surface of each of the plurality of substrate bodies included in the ceramic laminate, a plurality of probe pads on the center side of the surface and on which the probe is mounted are arranged around the surface. A plurality of external connection terminals on the side and outside the plurality of probe pads, and a plurality of tables individually connecting the probe pads and the external connection terminals A method of manufacturing a wiring board for an electronic component inspection apparatus, comprising the steps of forming wirings, wherein the wiring layer is formed as at least one of a power wiring layer and a ground wiring layer. To do.

これによれば、複数のグリーンシート間に平板状ないしベタ状を呈する未焼成の電源配線層および接地配線層の一方または双方を形成し、上記複数のグリーンシートを積層して得られたグリーンシート積層体を上記各配線層と共に同時に焼成することで、セラミック積層体が得られる。更に、該セラミック積層体の表面において、中心側のプローブ用パッド、周辺側の外部接続端子、これらの間を接続し且つ信号配線を主体とする表面配線を精度良く容易に形成することが可能となる。
尚、前記グリーンシートは、アルミナやムライトなどの高温焼成セラミックの粉末、あるいはガラス成分とセラミック粉末とを含む低温焼成セラミックに対し、所要量のバインダ樹脂や溶剤などを配合し、且つシート状に成形してものである。
また、前記未焼成の配線層を形成する工程と同時か、あるいは該工程の直前において、上層側のグリーンシートに予め開設したビアホールに導電性ペーストを充填して、ビア導体を形成する工程が行われる。
更に、前記プローブ用パッド、外部接続端子、および表面配線は、前記焼成工程後における前記セラミック積層体の表面に対し、例えば、スパッタリング、フォトリソグラフィー技術、および電解金属メッキを施すことによって形成される。
According to this, a green sheet obtained by forming one or both of an unfired power wiring layer and a ground wiring layer having a flat or solid shape between a plurality of green sheets, and laminating the plurality of green sheets. A ceramic laminate is obtained by firing the laminate together with the wiring layers. Furthermore, on the surface of the ceramic laminate, it is possible to easily and accurately form a center side probe pad, a peripheral side external connection terminal, and a surface wiring mainly connecting a signal wiring between them. Become.
The green sheet is formed into a sheet shape by blending a required amount of a binder resin, a solvent, or the like with a high-temperature fired ceramic powder such as alumina or mullite, or a low-temperature fired ceramic containing a glass component and ceramic powder. It is.
Also, at the same time as or before the step of forming the unfired wiring layer, a step of forming a via conductor by filling a via hole previously opened in the upper green sheet with a conductive paste is performed. Is called.
Further, the probe pad, the external connection terminal, and the surface wiring are formed by performing, for example, sputtering, a photolithography technique, and electrolytic metal plating on the surface of the ceramic laminate after the firing step.

更に、本発明には、前記各工程の後に、複数の前記基板本体を個片化する工程が行われる、電子部品検査装置用配線基板の製造方法(請求項4)も含まれる。
これによれば、前記のような電子部品検査装置用配線基板を多数個取りの形態によって効率良く製造できると共に、納期の短縮化を図かることも可能となる。
尚、前記複数のグリーンシートにおける個々の配線基板となる領域の周囲には、断面V字状の分割溝を平面視で格子状にして形成しても良い。
Furthermore, the present invention includes a method for manufacturing a wiring board for an electronic component inspection apparatus (Claim 4) in which a step of dividing the plurality of substrate bodies into individual pieces is performed after each step.
According to this, it is possible to efficiently manufacture the wiring board for an electronic component inspection apparatus as described above in a multi-cavity form, and it is also possible to shorten the delivery time.
Note that divided grooves having a V-shaped cross section may be formed in a lattice shape in a plan view around the areas to be the individual wiring boards in the plurality of green sheets.

本発明による一形態の電子部品検査装置用配線基板を示す平面図。The top view which shows the wiring board for electronic component inspection apparatuses of one form by this invention. 上記電子部品検査装置用配線基板の模式的な垂直断面図。The typical vertical sectional view of the said wiring board for electronic component inspection apparatuses. 上記配線基板の基板本体の表面における表面配線付近の拡大断面図。The expanded sectional view of the surface wiring vicinity in the surface of the board | substrate body of the said wiring board. 図2中のX−X線の矢視に沿った電源配線層を含む水平断面図。FIG. 3 is a horizontal sectional view including a power supply wiring layer taken along the line XX in FIG. 2. 図4と同様の位置で且つ異なる形態の電源配線層を示す水平断面図。The horizontal sectional view which shows the power wiring layer of the same position and a different form as FIG. 図4と同様の位置で且つ接地配線層を示す水平断面図。The horizontal sectional view which shows the ground wiring layer in the same position as FIG. 前記配線基板を中継基板に実装した状態を示す垂直断面図。FIG. 3 is a vertical sectional view showing a state where the wiring board is mounted on a relay board. 前記配線基板を異なる中継基板に実装した状態を示す垂直断面図。The vertical sectional view which shows the state which mounted the said wiring board in a different relay board | substrate. 前記配線基板の応用形態である配線基板を示す模式的な垂直断面図。The typical vertical sectional view which shows the wiring board which is an application form of the said wiring board. 前記配線基板を得るための一製造工程を示す概略の断面図。FIG. 5 is a schematic cross-sectional view showing one manufacturing process for obtaining the wiring board. 図10に続く製造工程を示す概略の断面図。FIG. 11 is a schematic cross-sectional view illustrating a manufacturing process subsequent to FIG. 10. 図11に続く製造工程を示す概略の断面図。FIG. 12 is a schematic cross-sectional view illustrating a manufacturing process subsequent to FIG. 11. 図12に続く製造工程を示す概略の断面図。FIG. 13 is a schematic cross-sectional view showing a manufacturing process following FIG. 12. 図13に続く製造工程を示す概略の拡大断面図。FIG. 14 is a schematic enlarged cross-sectional view showing a manufacturing process following FIG. 13. 図14に続く製造工程を示す概略の拡大断面図。FIG. 15 is a schematic enlarged cross-sectional view illustrating a manufacturing process subsequent to FIG. 14. 図15に続く製造工程を示す概略の拡大断面図。FIG. 16 is a schematic enlarged cross-sectional view illustrating a manufacturing process subsequent to FIG. 15. 図16に続く製造工程を示す概略の拡大断面図。FIG. 17 is a schematic enlarged cross-sectional view illustrating a manufacturing process subsequent to FIG. 16. 図17に続く製造工程を示す概略の拡大断面図。FIG. 18 is a schematic enlarged cross-sectional view illustrating a manufacturing process subsequent to FIG. 17. 図18に続く製造工程を示す概略の拡大断面図。FIG. 19 is a schematic enlarged cross-sectional view illustrating a manufacturing process subsequent to FIG. 18. 以上の工程により得られた多数個取り用配線基板を示す垂直断面図。The vertical sectional view which shows the wiring board for multi-cavity obtained by the above process.

以下において、本発明を実施するための形態について説明する。
図1は、本発明の一形態の電子部品検査装置用配線基板(以下、単に配線基板と称する)1を示す平面図、図2は、該配線基板1の模式的な垂直断面図である。
配線基板1は、図1,図2に示すように、上下2層(複数)のセラミック層s1,s2を積層してなり、平面視が正方形(矩形)の表面3および裏面4を有する基板本体2と、該基板本体2の表面3における中心側3aに形成され且つ追ってプローブが上面に実装される複数のプローブ用パッド5と、上記基板本体2の表面3における周辺側3bで且つ上記各プローブ用パッド5の外側に形成された複数の外部接続端子6と、該接続端子6と上記パッド5との間を個別に接続し且つ上記表面3に形成された表面配線7と、上記セラミック層s1,s2間に形成された内部配線8,9とを備えている。
尚、図1中の太い破線は、表面配線7と接続されずに独立している上記パッド5と上記接続端子6との間を導通する上記内部配線8,9の位置を示している。
Hereinafter, modes for carrying out the present invention will be described.
FIG. 1 is a plan view showing an electronic component inspection apparatus wiring board (hereinafter simply referred to as a wiring board) 1 according to an embodiment of the present invention, and FIG. 2 is a schematic vertical sectional view of the wiring board 1.
As shown in FIGS. 1 and 2, the wiring substrate 1 is formed by laminating upper and lower ceramic layers s <b> 1 and s <b> 2, and has a front surface 3 and a rear surface 4 that are square (rectangular) in plan view. 2, a plurality of probe pads 5 that are formed on the center side 3 a of the surface 3 of the substrate body 2, and the probe is mounted on the upper surface, and each of the probes on the peripheral side 3 b of the surface 3 of the substrate body 2. A plurality of external connection terminals 6 formed on the outer side of the pad 5, a surface wiring 7 individually connected between the connection terminal 6 and the pad 5 and formed on the surface 3, and the ceramic layer s 1. , S2 and internal wirings 8 and 9 are provided.
The thick broken lines in FIG. 1 indicate the positions of the internal wirings 8 and 9 that are electrically connected between the pad 5 and the connection terminal 6 that are not connected to the surface wiring 7 and independent.

前記基板本体2の表面3における中心側3aと周辺側3bとは、互いに重複せず且つ両者間に表面配線7が配線可能な間隔を置いた相対的な位置を指している。
また、前記セラミック層s1,s2は、例えば、アルミナまたはムライトを含む高温焼成セラミックであり、これらの間には、同時に焼成されたWまたはMoからなり、平面視がほぼベタ状または平板状を呈する電源配線層8および接地配線層9の少なくとも一方が形成されている。このうち、上層側のセラミック層s1には、上記配線層8,9と、独立した一部のプローブ用パッド5あるいは独立した一部の外部接続端子6との間を個別に接続するビア導体va,vbが貫通している。
更に、図1に示すように、前記プローブ用パッド5、外部接続端子6、およびこれらの間を接続する表面配線7は、平面視の幅ないし直径が同じであり、図3の拡大垂直断面図で示すように、基板本体2の表面3上に順次形成されたTi薄膜層10、Cu薄膜層11、およびCuメッキ層12と、これらの外周全体に順次被覆されたNiメッキ膜13および金メッキ膜14とからなる。
The center side 3a and the peripheral side 3b on the surface 3 of the substrate body 2 indicate relative positions that do not overlap each other and have a space where the surface wiring 7 can be wired therebetween.
The ceramic layers s1 and s2 are, for example, high-temperature fired ceramics containing alumina or mullite. Between these, the ceramic layers s1 and s2 are made of W or Mo fired at the same time, and have a substantially solid or flat shape in plan view. At least one of the power supply wiring layer 8 and the ground wiring layer 9 is formed. Among them, the upper ceramic layer s1 has via conductors va for individually connecting the wiring layers 8 and 9 and a part of independent probe pads 5 or a part of independent external connection terminals 6. , Vb penetrates.
Further, as shown in FIG. 1, the probe pad 5, the external connection terminal 6, and the surface wiring 7 connected between them have the same width or diameter in plan view, and are an enlarged vertical sectional view of FIG. 3. As shown in FIG. 1, the Ti thin film layer 10, the Cu thin film layer 11, and the Cu plating layer 12 that are sequentially formed on the surface 3 of the substrate body 2, and the Ni plating film 13 and the gold plating film that are sequentially coated on the entire outer periphery thereof. 14 and.

図1,図2に示すように、基板本体2の表面3における中心側3aと周辺側3bとに独立して形成された一部のプローブ用パッド5と一部の外部接続端子6とは、残部のプローブ用パッド5および残部の接続端子6を接続する表面配線7と当該表面3において交差しないように、セラミック層s1を貫通するビア導体va,vbと、セラミック層s1,s2間の電源配線層および接地配線層9の少なくとも一方からなる迂回経路を介して、導通可能とされている。
前記電源配線層8は、例えば、図4に示すように、前記セラミック層s1,s2間において、2つの対角線で4箇所に区分され、且つ中心側3aと周辺側3bとの間にまたがる平面視がほぼ直角三角形の電源配線層8aからなる。かかる電源配線層8aの中心側3aには、前記プローブ用パッド5と接続する1つのビア導体vaが接触し、且つ周辺側3bには、前記外部接続端子6と接続する2つのビア導体vbが接触している。
As shown in FIGS. 1 and 2, some probe pads 5 and some external connection terminals 6 formed independently on the center side 3 a and the peripheral side 3 b on the surface 3 of the substrate body 2 are: Power supply wiring between the ceramic layers s1 and s2 and the via conductors va and vb penetrating the ceramic layer s1 so as not to intersect the surface wiring 7 connecting the remaining probe pads 5 and the remaining connection terminals 6 with the surface 3. It is possible to conduct through a detour path including at least one of the layer and the ground wiring layer 9.
For example, as shown in FIG. 4, the power wiring layer 8 is divided into four locations by two diagonal lines between the ceramic layers s1 and s2, and the plan view spans between the central side 3a and the peripheral side 3b. Consists of a power wiring layer 8a having a substantially right triangle. One via conductor va connected to the probe pad 5 is in contact with the central side 3a of the power supply wiring layer 8a, and two via conductors vb connected to the external connection terminal 6 are provided on the peripheral side 3b. In contact.

また、前記電源配線層8は、例えば、図5に示すように、前記セラミックs1,s2間において、1つの水平線と2つの垂直線とにより6箇所区分され、且つ中心側3aと周辺側3bとの間にまたがる平面視が異なるサイズの長方形の電源配線層8b,8cとしても良い。かかる電源配線層8b,8cの中心側3aには、前記プローブ用パッド5と接続する1つのビア導体vaが接触し、且つ周辺側3bには、前記外部接続端子6と接続する1つのビア導体vbが接触している。
更に、前記電源配線層9は、例えば、図6に示すように、前記セラミックs1,s2間のほぼ全面に広がり、平面視がほぼ正方形を呈する単一の形態とし、その中心側3aには、前記図1で示した独立のプローブ用パッド5と接続する複数のビア導体vaが接続し、当該電源配線層9の周辺側3bには、前記図1で示した独立の外部接続端子6と接続する複数のビア導体vbが接続している。
Further, for example, as shown in FIG. 5, the power supply wiring layer 8 is divided into six portions by one horizontal line and two vertical lines between the ceramics s1 and s2, and the center side 3a and the peripheral side 3b. Rectangular power supply wiring layers 8b and 8c having different sizes in plan view extending between the two may be used. One via conductor va connected to the probe pad 5 is in contact with the central side 3a of the power supply wiring layers 8b and 8c, and one via conductor connected to the external connection terminal 6 is connected to the peripheral side 3b. vb is in contact.
Further, for example, as shown in FIG. 6, the power wiring layer 9 has a single form extending almost over the entire surface between the ceramics s <b> 1 and s <b> 2 and having a substantially square shape in plan view. A plurality of via conductors va connected to the independent probe pads 5 shown in FIG. 1 are connected, and the peripheral side 3b of the power supply wiring layer 9 is connected to the independent external connection terminals 6 shown in FIG. A plurality of via conductors vb are connected.

図7は、前記配線基板1を中継基板20における基板本体22の表面23における上方に実装した状態を示す垂直断面図である。
前記中継基板20は、図7に示すように、例えば、アルミナなどの高温焼成セラミック(絶縁材)からなり、平面視がほぼ正方形の表面23と裏面24とを有する基板本体22、該基板本体22の表面23と裏面24との間をほぼ等間隔で貫通する複数のビアホール内ごとに形成された複数のビア導体25、該ビア導体25ごとの表面23側の端部に接続された複数の接続端子26、および上記ビア導体25ごとの裏面24側の端部に接続され且つ外部との導通に用いる複数の外部端子27を備えている。
尚、前記ビア導体25、接続端子26、および外部端子27は、基板本体22がアルミナなどの場合には、主にWあるいはMoからなり、基板本体22が低温焼成セラミック(絶縁材)の一種のガラス−セラミックの場合には、CuあるいはAgからなる。
FIG. 7 is a vertical sectional view showing a state in which the wiring board 1 is mounted above the surface 23 of the board body 22 in the relay board 20.
As shown in FIG. 7, the relay substrate 20 is made of, for example, a high-temperature fired ceramic (insulating material) such as alumina, and has a substrate body 22 having a front surface 23 and a rear surface 24 that are substantially square in plan view, and the substrate body 22. A plurality of via conductors 25 formed in each of a plurality of via holes penetrating between the front surface 23 and the back surface 24 at substantially equal intervals, and a plurality of connections connected to end portions on the front surface 23 side of the respective via conductors 25. A terminal 26 and a plurality of external terminals 27 connected to the end of the via conductor 25 on the back surface 24 side and used for electrical continuity are provided.
The via conductor 25, the connection terminal 26, and the external terminal 27 are mainly made of W or Mo when the substrate body 22 is made of alumina or the like, and the substrate body 22 is a kind of low-temperature fired ceramic (insulating material). In the case of glass-ceramic, it is made of Cu or Ag.

図7に示すように、配線基板1のプローブ用パッド5ごとの上方には、例えば、Siウェハに併設された複数の被検査電子部品(何れも図示せず)と電気的に接触するためのプローブ16が立設して取り付けられる。また、中継基板20の表面23における中央部に、接着剤18を介して配線基板1の裏面4側を接着することで、該配線基板1が中継基板20の表面23上に実装される。更に、中継基板20の表面23における周辺に位置する接続端子26と、配線基板1の外部接続端子6との間を、ボンディングワイヤwを介して個別に接続することにより、プローブ16と外部端子27とが個別に導通可能とされる。その結果、複数の被検査電子部品の検査を連続的に実施することが可能となる。
尚、前記中継基板20は、一般的な形態のため、既存のものを流用し得る。
As shown in FIG. 7, for each of the probe pads 5 on the wiring board 1, for example, for making electrical contact with a plurality of electronic components to be inspected (all not shown) provided on the Si wafer. The probe 16 is installed upright. Further, the wiring substrate 1 is mounted on the front surface 23 of the relay substrate 20 by adhering the back surface 4 side of the wiring substrate 1 to the central portion of the front surface 23 of the relay substrate 20 via the adhesive 18. Furthermore, the probe 16 and the external terminal 27 are connected by individually connecting the connection terminals 26 located on the periphery of the surface 23 of the relay board 20 and the external connection terminals 6 of the wiring board 1 via bonding wires w. Can be conducted individually. As a result, it is possible to continuously inspect a plurality of electronic components to be inspected.
In addition, since the said relay board | substrate 20 is a general form, the existing thing can be diverted.

図8は、前記配線基板1を異なる形態の中継基板21の表面23側に実装した状態を示す垂直断面図である。かかる中継基板21は、図8に示すように、前記同様の基板本体22a、該基板本体22aの表面23と裏面24との周辺側のみを貫通する複数のビア導体25、該ビア導体25ごとの両端に個別に接続される表面23側の接続端子26と裏面24側の外部端子27、および表面23の中央部に上向きに開口する平面視が矩形の凹部23aを有する。
図5に示すように、配線基板1の裏面4側を、中継基板21の凹部23a内に挿入することで、該中継基板21の表面23側に配線基板1を実装した後、前記同様にプローブ用パッド5ごとの上方にプローブ16を立設し、更に中継基板21の表面23側の接続端子26と、配線基板1の外部接続端子6との間を、ボンディングワイヤwにより個別に接続することで、プローブ16と外部端子27とが個別に導通可能とされる。その結果、複数の被検査電子部品の検査を連続的に行うことが可能となる。
尚、前記中継基板21のみを予め製作しておくようにしても良い。
FIG. 8 is a vertical sectional view showing a state in which the wiring board 1 is mounted on the surface 23 side of the relay board 21 having a different form. As shown in FIG. 8, the relay substrate 21 includes a substrate body 22 a similar to the above, a plurality of via conductors 25 penetrating only the peripheral sides of the front surface 23 and the back surface 24 of the substrate body 22 a, and each via conductor 25. A connection terminal 26 on the front surface 23 side and an external terminal 27 on the back surface 24 side which are individually connected to both ends, and a concave portion 23a having a rectangular shape in a plan view opening upward at the center of the front surface 23.
As shown in FIG. 5, by inserting the back surface 4 side of the wiring board 1 into the recess 23a of the relay board 21, the wiring board 1 is mounted on the front surface 23 side of the relay board 21, and then the probe is used in the same manner as described above. The probe 16 is erected above each of the pads 5 and the connection terminals 26 on the surface 23 side of the relay board 21 and the external connection terminals 6 of the wiring board 1 are individually connected by bonding wires w. Thus, the probe 16 and the external terminal 27 can be individually conducted. As a result, it is possible to continuously inspect a plurality of electronic components to be inspected.
Only the relay substrate 21 may be manufactured in advance.

図9は、前記配線基板1の応用形態である配線基板1aを示す垂直断面図である。該配線基板1aは、上下3層(複数)のセラミック層s1〜s3を積層してなり、前記同様の表面3および裏面4を有する基板本体2と、該表面3に前記同様に形成したプローブ用パッド5、表面配線7、および外部接続端子6と、セラミック層s1〜s3間ごとに形成された内部配線層8,9と、上層および中層のセラミック層s2,s3の適所を貫通するビア導体va,vbとを備えている。上記内部配線層8,9は、前記同様の電源配線層8a〜8cおよびベタ状の接地配線層9の一方または双方である。
上記のような配線基板1aによれば、セラミック層s1〜s3間ごとに比較的多くの電源配線層8および接地配線層9が形成されているので、上記基板本体2の表面3における中心側3aに位置するプローブ用パッド5と、周辺側3bに位置する外部接続端子6との間に、例えば、全て表面配線7を複数の信号配線として確実に形成することが可能となる。
FIG. 9 is a vertical cross-sectional view showing a wiring board 1 a which is an application form of the wiring board 1. The wiring board 1a is formed by laminating upper and lower three (several) ceramic layers s1 to s3, a substrate body 2 having the same front surface 3 and rear surface 4, and a probe body formed on the front surface 3 in the same manner as described above. Via conductor va penetrating through the pad 5, the surface wiring 7, the external connection terminal 6, the internal wiring layers 8 and 9 formed between the ceramic layers s1 to s3, and the upper and middle ceramic layers s2 and s3. , Vb. The internal wiring layers 8 and 9 are one or both of the same power supply wiring layers 8a to 8c and the solid ground wiring layer 9 as described above.
According to the wiring board 1a as described above, since a relatively large number of power wiring layers 8 and ground wiring layers 9 are formed between the ceramic layers s1 to s3, the center side 3a on the surface 3 of the substrate body 2 is formed. For example, it is possible to reliably form all the surface wirings 7 as a plurality of signal wirings between the probe pad 5 located on the peripheral side and the external connection terminals 6 located on the peripheral side 3b.

以上のような配線基板1,1aによれば、前記基板本体2の表面3の中心側3aに複数のプローブ用パッド5が形成され、且つ当該同じ表面3の周辺側3bに複数の外部接続端子6が形成されている。そのため、上記プローブ用パッド5と外部接続端子6との間を接続するための表面配線7を基板本体2の表面3にだけ比較的高密度で形成し、該表面配線7と表面3で交差する位置にある独立した一部の前記プローブ用パッド5と独立した一部の外部接続端子6とのみを、ビア導体va,vbと電源配線層8あるいは接地配線層9とを介して導通させている。その結果、配線基板1,1aでは、内部配線8,9を必要最小限とし且つ主に表面3に形成した表面配線7により対応できるので、被検査電子部品ごとに応じた検査回路の設計および製造に要する時間を短縮できる。
従って、電子部品ごとに必要とされる所要の検査を正確に且つ迅速行え、短時間に設計でき且つ容易に製造できると共に、比較的安価な電子部品検査装置用配線基板1,1aを確実に提供することが可能となる。
According to the wiring boards 1 and 1a as described above, a plurality of probe pads 5 are formed on the center side 3a of the surface 3 of the substrate body 2, and a plurality of external connection terminals are provided on the peripheral side 3b of the same surface 3. 6 is formed. Therefore, surface wiring 7 for connecting between the probe pad 5 and the external connection terminal 6 is formed at a relatively high density only on the surface 3 of the substrate body 2, and intersects the surface wiring 7 and the surface 3. Only a part of the independent probe pads 5 and a part of the external connection terminals 6 independent of each other are electrically connected via the via conductors va and vb and the power supply wiring layer 8 or the ground wiring layer 9. . As a result, in the wiring boards 1 and 1a, the internal wirings 8 and 9 can be reduced to the minimum and can be dealt with mainly by the surface wiring 7 formed on the surface 3, so that the inspection circuit is designed and manufactured according to each electronic component to be inspected. Can be shortened.
Therefore, the required inspection required for each electronic component can be performed accurately and quickly, can be designed in a short time, and can be easily manufactured, and the wiring boards 1 and 1a for the electronic component inspection apparatus can be provided reliably. It becomes possible to do.

以下において、前記配線基板1の製造方法について説明する。
予め、アルミナ粉末に樹脂バインダおよび溶剤などを適量ずつ配合してセラミックスラリとし、該セラミックスラリをドクターブレード法によってシート化して、図10に示すように、上下2層のグリーンシートg1,g2を製作した。尚、図10中で示す一点鎖線は、平面視が格子状で仮想の切断予定面cfであり、これらの間に製品エリアpaが位置し、これらの外側には耳部maが位置している。
次に、上層側のグリーンシートg2の所定の位置を打ち抜いて、得られたビアホールhにWまたはMo粉末を含む導電性ペーストを充填し、図11に示すように、未焼成のビア導体va,vbを形成すると共に、下層側のグリーンシートg1の表面における所定の位置に上記同様の導電性ペーストを印刷により配設して、未焼成の内部配線層8,9を形成した。このうち、内部配線層8は、前記電源配線層8a〜8cの何れかであった。尚、図11中で示すように、前記各製品エリアpaは、前記基板本体2と対応している。
Below, the manufacturing method of the said wiring board 1 is demonstrated.
Preliminary amounts of resin binder and solvent are mixed with alumina powder to make a ceramic slurry, and the ceramic slurry is made into a sheet by the doctor blade method to produce two upper and lower green sheets g1 and g2 as shown in FIG. did. In addition, the dashed-dotted line shown in FIG. 10 is a virtual cutting plan surface cf having a lattice shape in plan view, the product area pa is located between these, and the ear part ma is located outside these. .
Next, a predetermined position of the upper green sheet g2 is punched out, and the obtained via hole h is filled with a conductive paste containing W or Mo powder. As shown in FIG. 11, unfired via conductors va, In addition to forming vb, a conductive paste similar to the above was disposed by printing at a predetermined position on the surface of the green sheet g1 on the lower layer side to form unfired internal wiring layers 8 and 9. Among these, the internal wiring layer 8 is one of the power supply wiring layers 8a to 8c. As shown in FIG. 11, each product area pa corresponds to the substrate body 2.

次いで、図11中の白抜き矢印で示すように、上記ビア導体va,vbと内部配線層8,9とを有する上下2層のグリーンシートg1,g2を、積層し且つ厚み方向に沿って圧着した。その結果、図12に示すように、グリーンシートg1,g2、内部配線層8,9、およびビア導体va,vbからなり、表面3および裏面4を有するグリーンシート積層体gsが得られた。この際、表面3および裏面4に露出する前記切断予定面cfの少なくとも一方に沿って、断面V字状の分割溝(図示せず)を更に形成するようにしても良い。
更に、上記グリーンシート積層体gsを所定の焼成温度にて焼成した。その結果、図13に示すように、前記グリーンシートg1,g2が焼成され且つ一体化したセラミック層s1,s2と、これらと同時に焼成された内部配線層8,9、およびビア導体va,vbとを備え、表面3および裏面4を有するセラミック積層体ssが得られた。
次いで、図14に示すように、上記セラミック積層体ssにおける前記製品エリアpaに対応する基板本体2ごとにおける表面3の全面に対し、スパッタリングを施して、厚みが約0.2μmのTi薄膜層10と厚みが約0.5μmのCu薄膜層11とを順次被覆した。
Next, as indicated by the white arrows in FIG. 11, two upper and lower green sheets g1 and g2 having the via conductors va and vb and the internal wiring layers 8 and 9 are laminated and pressure-bonded along the thickness direction. did. As a result, as shown in FIG. 12, a green sheet laminate gs having green sheets g1 and g2, internal wiring layers 8 and 9, and via conductors va and vb and having a front surface 3 and a back surface 4 was obtained. At this time, a dividing groove (not shown) having a V-shaped cross section may be further formed along at least one of the planned cutting surface cf exposed on the front surface 3 and the back surface 4.
Further, the green sheet laminate gs was fired at a predetermined firing temperature. As a result, as shown in FIG. 13, the green layers g1 and g2 are fired and integrated ceramic layers s1 and s2, the internal wiring layers 8 and 9 fired at the same time, and the via conductors va and vb. A ceramic laminate ss having a front surface 3 and a back surface 4 was obtained.
Next, as shown in FIG. 14, the entire surface 3 of the substrate body 2 corresponding to the product area pa in the ceramic laminate ss is sputtered to form a Ti thin film layer 10 having a thickness of about 0.2 μm. And a Cu thin film layer 11 having a thickness of about 0.5 μm were sequentially coated.

次に、上記Cu薄膜層11上の全面に感光性樹脂からなるレジスト層rを形成した後、該レジスト層rに対し所定パターンによるフォトリソグラフィー技術を施した。その結果、図15に示すように、前記ビア導体va,vbごとの上方に平面視が円形の貫通孔Hが上記レジスト層r内に複数個形成された。
更に、図16に示すように、上貫通孔H内ごとの底面に露出するCu薄膜層11の上に、電解Cuメッキを施して、厚みが約10μmのCuメッキ層12を形成した。この際、該Cuメッキ層12の上に、電解Niメッキにより所要厚さのNiメッキ層(図示せず)を更に形成しても良い。その後、図17に示すように、前記レジスト層rを現像液に接触させて、Cuメッキ層12の上から除去した。
引き続いて、図18に示すように、前記Cuメッキ層12に覆われていない部分のTi薄膜層10とCu薄膜層11とを、エッチング液に接触させて除去した。その結果、セラミック積層体ssの表面3に露出するビア導体va,vbごとの真上に、Ti薄膜層10、Cu薄膜層11、およびCuメッキ層12の3層が円柱形にして形成された。
Next, after a resist layer r made of a photosensitive resin was formed on the entire surface of the Cu thin film layer 11, a photolithography technique with a predetermined pattern was applied to the resist layer r. As a result, as shown in FIG. 15, a plurality of through holes H having a circular shape in plan view were formed in the resist layer r above the via conductors va and vb.
Further, as shown in FIG. 16, electrolytic Cu plating was performed on the Cu thin film layer 11 exposed on the bottom surface in each of the upper through holes H to form a Cu plating layer 12 having a thickness of about 10 μm. At this time, a Ni plating layer (not shown) having a required thickness may be further formed on the Cu plating layer 12 by electrolytic Ni plating. Thereafter, as shown in FIG. 17, the resist layer r was removed from the Cu plating layer 12 by contacting with the developer.
Subsequently, as shown in FIG. 18, the portions of the Ti thin film layer 10 and the Cu thin film layer 11 that are not covered with the Cu plating layer 12 were removed by contact with an etching solution. As a result, three layers of the Ti thin film layer 10, the Cu thin film layer 11, and the Cu plating layer 12 were formed in a cylindrical shape immediately above the via conductors va and vb exposed on the surface 3 of the ceramic laminate ss. .

そして、前記Ti薄膜層10、Cu薄膜層11、およびCuメッキ層12からなる3層の円柱体の全表面に対し、電解Niメッキおよび電解Auメッキを順次施した。その結果、図19に示すように、厚みが約5μmのNiメッキ膜13と厚みが約2μmのAuメッキ膜14とがほぼ均一に被覆され、前記表面3上における中心側3aと周辺側3bとにおける所定の位置ごとに、独立したプローブ用パッド5および外部接続端子6が形成された。
尚、この間において、上記同様のスパッタリング、フォトリソグラフィ技術、電解金属メッキ、現像液の接触を含むエッチングによって、上記と同様で且つ前記図3と同様の断面構造を有するプローブ用パッド5、外部接続端子6、およびこれらの間を接続する表面配線7が平行して所定の位置ごとに形成された。
Then, electrolytic Ni plating and electrolytic Au plating were sequentially performed on the entire surface of the three-layered cylinder including the Ti thin film layer 10, the Cu thin film layer 11, and the Cu plating layer 12. As a result, as shown in FIG. 19, the Ni plating film 13 having a thickness of about 5 μm and the Au plating film 14 having a thickness of about 2 μm are almost uniformly coated, and the central side 3a and the peripheral side 3b on the surface 3 are An independent probe pad 5 and external connection terminal 6 were formed at each predetermined position.
During this period, the probe pad 5 having the same cross-sectional structure as that shown in FIG. 3 and the external connection terminal are formed by the same sputtering, photolithography technique, electrolytic metal plating, and etching including contact with the developer. 6 and surface wiring 7 connecting them were formed in parallel at predetermined positions.

その結果、図20に示すように、複数の配線基板1を隣接して併有し、且つこれらの周囲に耳部maを有する多数個取り配線基板1uを得ることができた。最後に、一点鎖線で示す切断予定線cfに沿って、個々の配線基板1に分割して個片化する工程を行った。その結果、前記図1〜6に示した配線基板1を複数個精度良く容易に得ることができた。
以上のような配線基板1の製造方法によれば、グリーンシートg1,g2間に平板状ないしベタ状を呈する未焼成の電源配線層8および接地配線層9の少なくとも一方を形成し、上記グリーンシートg1,g2を積層して得られたグリーンシート積層体gsを上記配線層8,9と共に同時に焼成することで、セラミック積層体ssが得られた。更に、該セラミック積層体ssの表面3において、中心側3aのプローブ用パッド5、周辺側3bの外部接続端子6、これらの間を接続し且つ信号配線を主体とする表面配線7を精度良く形成した複数個の配線基板1を容易に製造することができた。尚、前記配線基板1aも前述した各工程を施すことによって、製造することが可能である。
As a result, as shown in FIG. 20, a multi-piece wiring board 1u having a plurality of wiring boards 1 adjacent to each other and having an ear portion ma around them can be obtained. Finally, along the planned cutting line cf indicated by a one-dot chain line, a process of dividing the circuit board 1 into individual pieces was performed. As a result, it was possible to easily obtain a plurality of wiring boards 1 shown in FIGS.
According to the method for manufacturing the wiring substrate 1 as described above, at least one of the unfired power wiring layer 8 and the ground wiring layer 9 having a flat or solid shape is formed between the green sheets g1 and g2, and the green sheet is formed. A ceramic laminate ss was obtained by firing the green sheet laminate gs obtained by laminating g1 and g2 together with the wiring layers 8 and 9 at the same time. Further, on the surface 3 of the ceramic laminate ss, the probe pad 5 on the central side 3a, the external connection terminal 6 on the peripheral side 3b, and the surface wiring 7 mainly connecting the signal wiring are formed with high accuracy. Thus, the plurality of wiring substrates 1 could be easily manufactured. The wiring board 1a can also be manufactured by performing the above-described steps.

本発明は、以上において説明した各形態に限定されるものではない。
例えば、前記セラミック層s1〜s3は、低温焼成セラミックの一種であるガラス−セラミックからなるものとしても良い。
また、前記配線基板1,1aの基板本体2における表面3および裏面4は、平面視が長方形を呈する形状であっても良い。
更に、前記基板本体2は、4層あるいは5層のセラミック層を積層したものとしても良い。
また、前記表面配線7は、信号用に限らず、その一部を電源用として良い。
更に、前記配線基板1,1aの外部接続端子6と前記中継基板20,21側の第1端子26とは、前記ボンディングワイヤwに替え、コネクタを介して導通するようにしても良い。
加えて、前記配線基板1,1aは、前記のように多数個取りの形態ではなく、個々に製造する方法によって製作しても良い。
The present invention is not limited to the embodiments described above.
For example, the ceramic layers s1 to s3 may be made of glass-ceramic which is a kind of low-temperature fired ceramic.
Further, the front surface 3 and the back surface 4 of the substrate body 2 of the wiring substrates 1 and 1a may have a rectangular shape in plan view.
Further, the substrate body 2 may be a laminate of four or five ceramic layers.
Further, the surface wiring 7 is not limited to a signal but a part thereof may be used for a power source.
Further, the external connection terminals 6 of the wiring boards 1 and 1a and the first terminals 26 on the side of the relay boards 20 and 21 may be made conductive through connectors instead of the bonding wires w.
In addition, the wiring boards 1 and 1a may be manufactured not by the multi-cavity form as described above but by an individual manufacturing method.

本発明によれば、プローブ用パッドと外部接続端子とを接続する複数の表面配線を基板本体の同じ表面に容易に配設でき、設計および製造期間を短縮でき且つ容易に製造できる電子部品検査装置用配線基板と、その製造方法を提供することが可能となる。   According to the present invention, an electronic component inspection apparatus that can easily arrange a plurality of surface wirings for connecting probe pads and external connection terminals on the same surface of the substrate body, can reduce the design and manufacturing period, and can be easily manufactured. It is possible to provide a wiring board for manufacturing and a manufacturing method thereof.

1,1a…………配線基板(電子部品検査装置用配線基板)
2…………………基板本体
3…………………表面
3a………………中心側
3b………………周辺側
4…………………裏面
5…………………プローブ用パッド
6…………………外部接続端子
7…………………表面配線
8,8a〜8c…内部配線/電源配線層
9…………………内部配線/接地配線層
16………………プローブ
s1〜s3………セラミック層
g1,g2………グリーンシート
gs………………グリーンシート積層体
ss………………セラミック積層体
1,1a ………… Wiring board (wiring board for electronic component inspection equipment)
2 ………………… Board body 3 …………………… Front side 3a ……………… Center side 3b ……………… Peripheral side 4 ………………… Back side 5 ……… ………… Pad pad 6 …………… External connection terminal 7 ………………… Surface wiring 8, 8a to 8c… Internal wiring / power supply wiring layer 9 ………………… Internal wiring / Ground wiring layer 16 ……………… Probe s1 to s3 ……… Ceramic layer g1, g2 ……… Green sheet gs ……………… Green sheet laminate ss ……………… Ceramic laminate

Claims (4)

複数のセラミック層を積層してなり、平面視が矩形の表面および裏面を有する基板本体と、
上記基板本体の表面における中心側に形成され且つプローブが実装される複数のプローブ用パッドと、
上記基板本体の表面における周辺側で且つ上記複数のプローブ用パッドの外側に形成された複数の外部接続端子と、
上記プローブ用パッドと外部接続端子との間を個別に接続し且つ上記基板本体の表面に形成された表面配線、および基板本体の上記セラミック層間に形成された内部配線と、を含む電子部品検査装置用配線基板であって、
上記内部配線は、電源配線層および接地配線層の少なくとも一方である、
ことを特徴とする電子部品検査装置用配線基板。
A substrate body that is formed by laminating a plurality of ceramic layers and has a front surface and a back surface that are rectangular in plan view;
A plurality of probe pads formed on the center side of the surface of the substrate body and mounted with probes;
A plurality of external connection terminals formed on the peripheral side of the surface of the substrate body and outside the plurality of probe pads;
An electronic component inspection apparatus including a surface wiring individually connected between the probe pad and the external connection terminal and formed on the surface of the substrate body, and an internal wiring formed between the ceramic layers of the substrate body Wiring board for
The internal wiring is at least one of a power wiring layer and a ground wiring layer,
A wiring board for an electronic component inspection apparatus.
前記基板本体は、3層以上のセラミック層を積層してなり、該複数のセラミック層間ごとに前記電源配線層および接地配線層の少なくとも一方が形成されている、
ことを特徴とする請求項1に記載の電子部品検査装置用配線基板。
The substrate body is formed by laminating three or more ceramic layers, and at least one of the power wiring layer and the ground wiring layer is formed for each of the plurality of ceramic layers.
The wiring board for an electronic component inspection apparatus according to claim 1.
追って、最上層、中層、あるいは最下層のうちの2層以上のセラミック層となる複数のグリーンシートの表面または裏面に導電性ペーストを印刷して、未焼成の配線層を形成する工程と、
上記複数のグリーンシートを積層し且つ圧着してグリーンシート積層体を形成する工程と、
上記グリーンシート積層体を焼成してセラミック積層体を形成する工程と、
上記セラミック積層体に含まれる複数の基板本体ごとの表面において、該表面における中心側で且つプローブが実装される複数のプローブ用パッドを、該表面における周辺側で且つ上記複数のプローブ用パッドの外側に複数の外部接続端子を、上記プローブ用パッドと外部接続端子との間を個別に接続する複数の表面配線を、それぞれ形成する工程と、を備えた電子部品検査装置用配線基板の製造方法であって、
上記配線層は、電源配線層および接地配線層の少なくとも一方として形成される、
ことを特徴とする電子部品検査装置用配線基板の製造方法。
A step of forming an unfired wiring layer by printing a conductive paste on the front surface or back surface of a plurality of green sheets to be two or more ceramic layers of the uppermost layer, the middle layer, or the lowermost layer,
Laminating the plurality of green sheets and pressing to form a green sheet laminate;
Firing the green sheet laminate to form a ceramic laminate;
On the surface of each of the plurality of substrate bodies included in the ceramic laminate, a plurality of probe pads on the center side of the surface and on which the probes are mounted are arranged on the peripheral side of the surface and outside the plurality of probe pads. Forming a plurality of external connection terminals and a plurality of surface wirings for individually connecting the probe pads and the external connection terminals, respectively, with a method of manufacturing a wiring board for an electronic component inspection apparatus There,
The wiring layer is formed as at least one of a power wiring layer and a ground wiring layer.
A method of manufacturing a wiring board for an electronic component inspection apparatus.
前記各工程の後に、複数の前記基板本体を個片化する工程が行われる、
ことを特徴とする請求項3に記載の電子部品検査装置用配線基板の製造方法。
After each step, a step of dividing the plurality of substrate bodies into individual pieces is performed.
The method for manufacturing a wiring board for an electronic component inspection apparatus according to claim 3.
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JP2019078658A (en) * 2017-10-25 2019-05-23 京セラ株式会社 Ceramic wiring board and probe substrate

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JP2009074823A (en) * 2007-09-19 2009-04-09 Ngk Spark Plug Co Ltd Wiring board for electronic component inspection device, and its manufacturing method
JP2009188009A (en) * 2008-02-04 2009-08-20 Ngk Spark Plug Co Ltd Wiring board for electronic component tester

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JP2019078658A (en) * 2017-10-25 2019-05-23 京セラ株式会社 Ceramic wiring board and probe substrate
JP7033884B2 (en) 2017-10-25 2022-03-11 京セラ株式会社 Ceramic wiring board and probe board
CN108242430A (en) * 2017-12-29 2018-07-03 通富微电子股份有限公司 A kind of preparation method of chip packing-body

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