JP2013008794A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of suppressing whiskers that occur in a W film.SOLUTION: There is provided a method of manufacturing a semiconductor device comprising: a step S108 of forming a silicon film on a semiconductor substrate; a step S109 of forming a tungsten film on the silicon film; a step S110 of forming an opening that penetrates through the tungsten film and the silicon film such that the tungsten film and the silicon film exist in a gate region; a step S114 of performing a nitriding process after the opening is formed, such that a greater amount of the tungsten film is nitrided than the silicon film; and a step S118 of forming a silicon oxide film at least on the tungsten film after the nitriding process.

Description

  Embodiments described herein relate generally to a method for manufacturing a semiconductor device.

  In the development of semiconductor devices, particularly semiconductor memory devices, miniaturization of memory cells has been promoted in order to achieve large capacity, low cost, and the like. For example, in a semiconductor memory device mounted with a floating gate structure such as a NAND flash memory device, the wiring pitch between word lines serving as control electrode layers in the gate portion is being miniaturized. A tungsten (W) film is used as a part of the control electrode layer.

  When a W oxide film is formed on the W film surface by direct heat treatment, or when an oxide film is formed on the W film surface by chemical vapor deposition (CVD) at a high temperature, the W surface In this case, needle-like projections called whiskers are generated at a high density. Further, it is generally known that the W film easily causes surface oxidation even at room temperature. Similarly, when a high-temperature heat treatment is performed after the natural oxide film is formed, whiskers are generated. In a semiconductor memory device, when W is used for a part of the control electrode layer on the floating gate, if this whisker is generated, the adjacent control electrodes are electrically short-circuited so that normal operation cannot be performed. appear. On the other hand, even when an oxide-based protective film is formed on the W film by a low-temperature CVD method that does not generate whiskers, high-density whiskers are similarly generated in the subsequent heat treatment. Therefore, when W is used for at least a part of the control electrode layer, similarly, there is a problem in that the adjacent control electrodes are electrically short-circuited and normal operation cannot be performed.

  However, such heat treatment is necessary for increasing the density of the CVD oxide film, eliminating the processing damage, activating the dopant, and the like. With the miniaturization of semiconductor memory devices, the possibility of whiskers causing a short circuit between electrodes is further increased, and the influence of whiskers on electrical reliability is increasing. Therefore, it is required to suppress whiskers generated at the time of forming an oxide film on the surface of the W film or by heat treatment after the formation.

JP 2010-087160 A

  An object of the present invention is to provide a method for manufacturing a semiconductor device that overcomes the above-described problems and can suppress whiskers that have conventionally occurred in W films.

The method of manufacturing a semiconductor device according to the embodiment includes a step of forming a silicon film on a semiconductor substrate, a step of forming a tungsten film on the silicon film, and the tungsten film and the silicon film remaining in a gate region. A step of forming an opening that penetrates the tungsten film and the silicon film, and a step of performing a nitridation process so that the tungsten film is nitrided more than the silicon film after the opening is formed. A step of forming a silicon oxide film on at least the tungsten film after the nitriding treatment;
Equipped with.

It is a flowchart figure which shows the principal part process of the manufacturing method of the semiconductor device in 1st Embodiment. It is process sectional drawing of the manufacturing method of the semiconductor device in 1st Embodiment. It is process sectional drawing of the manufacturing method of the semiconductor device in 1st Embodiment. It is process sectional drawing of the manufacturing method of the semiconductor device in 1st Embodiment. It is a conceptual diagram for demonstrating the effectiveness of the selective nitriding process in 1st Embodiment. It is a graph which shows the processing pressure dependence of the nitriding amount at the time of carrying out the nitriding process in the plasma atmosphere in the different base film in 1st Embodiment. It is process sectional drawing of the manufacturing method of the semiconductor device in 1st Embodiment. It is a figure for demonstrating the difference in the generation condition of the whisker by the presence or absence of the nitriding process in 1st Embodiment. It is a flowchart figure which shows the principal part process of the manufacturing method of the semiconductor device in 2nd Embodiment. It is process sectional drawing of the manufacturing method of the semiconductor device in 2nd Embodiment.

(First embodiment)
In the first embodiment, a method for manufacturing a nonvolatile NAND flash memory device will be described as an example of a semiconductor device. Note that a method for manufacturing a semiconductor device that suppresses the generation of whiskers from the W film described below is not limited to a NAND flash memory device, but other semiconductor memory devices using a silicon film and a W film for a gate portion ( This is also effective for a semiconductor device other than the memory device. The first embodiment will be described below with reference to the drawings.

FIG. 1 is a flowchart showing main steps of the semiconductor device manufacturing method according to the first embodiment. As shown in FIG. 1, in the method of manufacturing a semiconductor device according to the first embodiment, an insulating film forming step (S102), a polysilicon (Si) film forming step (S104), an insulating film forming step (S106), and polysilicon. Film formation step (S108), W film formation step (S109), opening formation step (S110), ion implantation step (S111), selective oxidation treatment step (S112), and selective nitridation treatment step (S114) Then, a series of processes such as an annealing process (S117) and a silicon oxide (SiO ₂ ) film forming process (S118) are performed.

  FIG. 2 shows a process cross-sectional view of the semiconductor device manufacturing method according to the first embodiment. FIG. 2 shows from the insulating film forming step (S102) to the polysilicon film forming step (S108) in FIG. Subsequent steps will be described later.

In FIG. 2A, as the insulating film forming step (S102), the insulating film 210 is formed on the semiconductor substrate 200 with a film thickness of, for example, 2 to 20 nm. The insulating film 210 functions as a tunnel insulating film. The forming method is preferably formed by, for example, heat treatment (thermal oxidation treatment) in an oxygen atmosphere. As the insulating film 210, for example, a silicon oxide (SiO ₂ ) film is used. As the semiconductor substrate 200, for example, a p-type silicon substrate made of a silicon wafer having a diameter of 300 mm is used.

  In FIG. 2B, as a polysilicon film forming step (S104), a polysilicon film 220 is formed with a film thickness of, for example, 50 nm on the insulating film 210 by using, for example, a CVD method. The polysilicon film 220 functions as a charge storage layer (FG: floating gate). After that, an opening is formed from the polysilicon film 220 to the middle of the semiconductor substrate 200, and the opening is filled with an insulating film, whereby element isolation is performed toward the back side in FIG.

  In FIG. 2C, as the insulating film forming step (S106), the insulating film 230 is formed with a film thickness of, for example, 2 to 20 nm on the polysilicon film 220 by using, for example, a CVD method. The insulating film 230 functions as an interelectrode insulating film.

  In FIG. 2D, as a polysilicon film forming step (S108), a polysilicon film 240 is formed with a film thickness of, for example, 50 nm on the insulating film 230 by using, for example, a CVD method. The polysilicon film 240 functions as a part of the control electrode (GC: control gate).

  FIG. 3 shows a process cross-sectional view of the semiconductor device manufacturing method according to the first embodiment. FIG. 3 shows the process from the W film formation step (S109) to the ion implantation step (S111) in FIG. Subsequent steps will be described later.

  In FIG. 3A, as a W film formation step (S109), a W film 250 is formed with a film thickness of, for example, 50 nm on the polysilicon film 240 by using, for example, a CVD method. The W film 250 functions as the remaining part of the control electrode (GC: control gate). That is, the control electrode has a laminated structure in which the polysilicon film 240 and the W film 250 are laminated. The laminated film of the polysilicon film 240 and the W film 250 functions as a word line in the memory device.

  Here, a laminated film of the polysilicon film 240 and the W film 250 is used as the control electrode, but the present invention is not limited to this. Instead of using the polysilicon film 240 as the control electrode, the W film 250 alone may be used as the control electrode. Alternatively, the control electrode may be a laminated film of the W film 250 and another conductive film.

  In FIG. 3B, as an opening forming step (S110), an opening 150 having a groove structure is formed on both sides of the gate portion in a lithography process and a dry etching process (not shown), a W film 250, a polysilicon film 240, and an insulating film 230. And formed in the polysilicon film 220. For example, openings 150 having a width of 25 nm are formed at intervals of a pitch of 50 nm. As a result, a 1: 1 gate pattern can be formed in which the width of the gate portion and the opening 150 are both 25 nm. With respect to the semiconductor substrate 200 on which the resist film is formed on the W film 250 through a lithography process such as a resist coating process and an exposure process (not shown), the exposed W film 250 and the polysilicon film 240 positioned therebelow By removing the insulating film 230 and the polysilicon film 220 by anisotropic etching, the opening 150 can be formed substantially perpendicular to the surface of the semiconductor substrate 200. For example, as an example, the opening 150 may be formed by a reactive ion etching method. In other words, the W film 250, the polysilicon film 240, the insulating film 230, and the polysilicon film are etched by etching so that the W film 250, the polysilicon film 240, the insulating film 230, and the polysilicon film 220 remain (exist) in the gate region. An opening 150 penetrating the silicon film 220 is formed. Each of the laminated films of the W film 250, the polysilicon film 240, the insulating film 230, and the polysilicon film 220 arranged through the opening 150 serves as a gate portion of each cell of the NAND flash memory.

  Next, as an ion implantation step (S111), an n-type impurity is ion-implanted to form an n-type semiconductor region on the surface of the p-type semiconductor substrate 200 on both sides of the gate portion. The n-type semiconductor region functions as a source / drain region (SD). The p-type semiconductor region sandwiched between the n-type semiconductor regions functions as a channel region in which the gate region (G) is formed. Therefore, a region where the insulating film 210 on the bottom surface of the opening 150 is exposed becomes a source portion or a drain portion. Here, a NAND string structure is formed in which a plurality of cells sharing one source portion and the other drain portion of adjacent cells are arranged.

  FIG. 4 shows a process sectional view of the semiconductor device manufacturing method according to the first embodiment. FIG. 4 shows from the selective oxidation treatment step (S112) to the annealing treatment step (S117) in FIG. Subsequent steps will be described later. The exposed side surfaces of the polysilicon film 240 and the polysilicon film 220 are damaged by the etching in the opening forming step (S110) described above. Therefore, the damage on the exposed side surfaces of the polysilicon film 240 and the polysilicon film 220 is repaired.

4A, as a selective oxidation treatment step (S112), an oxide film is not formed on the W film 250 as much as possible, and a silicon oxide film 242 is selectively formed on the side surface of the polysilicon film 240, and the polysilicon film 220 is formed. A silicon oxide film 222 is formed on each of the side surfaces. Hydrogen (H ₂ ) gas and oxygen (O ₂ ) gas are supplied in a hydrogen-rich manner, and the exposed surfaces (side surfaces) of the polysilicon films 220 and 240 are plasma oxidized in a plasma atmosphere. At that time, for the W film 250 having a small binding energy with oxygen relative to Si, oxidation with O ₂ gas and reduction with H ₂ gas are repeated. Thereby, formation of an oxide film on the surface (upper surface and side wall) of the W film 250 can be suppressed. As a result, the silicon oxide films 222 and 242 can be selectively formed with respect to the polysilicon films 220 and 240. By forming the silicon oxide films 222 and 242 on the polysilicon films 220 and 240, damage caused by etching can be repaired. In addition, by suppressing the formation of an oxide film on the surface (upper surface and side wall) of the W film 250, it is possible to reduce the generation of whiskers when heat treatment is performed in a subsequent process.

In FIG. 4B, as the selective nitridation process (S114), the W film 250 is nitrided to form a tungsten nitride (WN) film 252 on the upper surface and side walls (side surfaces) of the W film 250. Hereinafter, conditions for the selective nitriding step (S114) will be described. Nitrogen radicals or nitrogen ions are generated by generating plasma using microwaves in an atmosphere containing nitrogen such as ammonia gas or nitrogen gas. Thereby, the upper surface and the side wall (side surface) of the W film 250 can be nitrided to form the tungsten nitride film 252. In this case, it is preferable that the microwave intensity is 700 to 7000 mW / cm ² , the processing pressure in the chamber is 100 to 800 Pa, and the substrate temperature is room temperature to 800 ° C. The nitridation amount of the W film 250 depends on the processing time. Further, by applying a high-frequency RF bias of 0.1 to 2000 mW / cm ² to the stage on which the substrate is disposed, nitrogen ions can be effectively generated (short-time process). Then, the amount of nitridation on the side wall can be controlled by adjusting the RF intensity. In particular, if the nitriding process is not selectively performed on the W film 250, the processing pressure may be 10 to 800 Pa. However, as described below, in the first embodiment, a Si film other than the W film 250, Control is performed so that the SiO ₂ film is not further nitrided.

FIG. 5 shows a conceptual diagram for explaining the effectiveness of the selective nitriding treatment in the first embodiment. In order not to increase the relative dielectric constant k between the charge storage layers (FG-FG) in the adjacent gate portions indicated by arrows B in FIG. 5, the side surfaces of the polysilicon film 220 serving as the charge storage layers should not be nitrided. Is effective. This is because nitridation forms a silicon nitride film (SiN film) having a relative dielectric constant k higher than that of the silicon oxide film (SiO ₂ film) between the charge storage layers (FG-FG). In other words, it is effective to further suppress the formation of the silicon nitride film.

Similarly, in order not to increase the dielectric constant k between the control electrode and the charge storage layer (GC-FG) in the adjacent gate portion indicated by arrow A in FIG. 5, the polysilicon film 240 serving as a part of the control electrode. It is effective not to nitride the side surfaces of the polysilicon film 220 and the side surfaces of the polysilicon film 220 serving as the charge storage layer. This is because nitriding forms a silicon nitride film (SiN film) having a dielectric constant k higher than that of the silicon oxide film (SiO ₂ film) between the control electrode and the charge storage layer (GC-FG). In other words, it is effective to further suppress the formation of the silicon nitride film.

  In addition, when a silicon nitride film is continuously formed on the surface of the insulating film 210 between the charge storage layers adjacent to each other as indicated by an arrow C in FIG. 5, the silicon nitride film becomes a charge trap, and between the gates The charge storage layers on both sides of the insulating film 210 are electrically connected to each other. Therefore, it is effective to further suppress the formation of the silicon nitride film on the surface of the insulating film 210. In addition, it is more effective not to nitride the insulating film 230 in order not to increase the inter-wiring capacitance.

  Therefore, in the first embodiment, nitriding is performed so that the W film 250 is more nitrided than the polysilicon films 220 and 240 and the insulating films 210 and 230.

FIG. 6 shows a graph showing the processing pressure dependence of the nitriding amount when different underlying films in the first embodiment are nitrided in a plasma atmosphere. FIG. 6 shows the result of comparing three types of different underlayers: Si film, SiO ₂ film, and W film. The vertical axis represents the amount of nitriding, and the horizontal axis represents the processing pressure. The processing time at each processing pressure is the same time. When nitriding is performed under a pressure lower than 100 Pa, the nitridation amounts of the Si film, the SiO ₂ film, and the W film are equal as shown in FIG. On the other hand, the amount of nitriding of the Si film and the SiO ₂ film can be reduced as compared with the W film as the pressure increases. In particular, when nitriding is performed under a pressure of 100 Pa or more, as shown in FIG. 6, the nitriding amount of the Si film and the SiO ₂ film can be reduced as compared with the W film. On the other hand, the amount of nitriding on the W film is almost constant without depending on the processing pressure. Thus, selective nitridation of W can be enabled by controlling the processing pressure. By this treatment, the nitrogen amounts of the polysilicon films 220 and 240 and the insulating films 210 and 230 are reduced to 3 × 10 ¹⁵ at. / Cm ² or less.

  Next, as the annealing process (S117), after the nitriding process is performed, the annealing process is performed. For example, annealing (heating) is performed at a temperature of 800 ° C. or higher. By the heat treatment, it is possible to eliminate the processing damage and activate the dopant.

FIG. 7 shows a process cross-sectional view of the semiconductor device manufacturing method according to the first embodiment. FIG. 7 shows the SiO ₂ film formation step (S118) of FIG. In FIG. 7, as the SiO ₂ film formation step (S118), a silicon oxide (SiO ₂ ) film 260 is formed on at least the W film 250 by using the CVD method. The SiO ₂ film 260 becomes an inter-wiring insulating film. Here, when the SiO ₂ film 260 is formed in order to further reduce the relative dielectric constant k between the gates (in other words, between the word lines), the openings 150 are covered with the SiO ₂ film 260 to cover the openings 150. A cavity (air gap) 270 is formed in the substrate. As a formation method, the embedding property may be deteriorated in the CVD process. A thin SiO ₂ film 260 can be formed on the sidewalls of the W film 250, the polysilicon films 220 and 240, and the insulating films 210 and 230 by performing a CVD process with poor embeddability, but an air gap 270 is formed between adjacent gates. Can be formed. As a result, an air gap 270 can be formed between the word lines of the cells. Thereby, the capacity | capacitance between wiring can be reduced. In addition, since the nitriding of W in the selective nitriding treatment step (S114) described above generally involves an increase in volume, the entrance of the opening 150 can be narrowed. As a result, the air gap can be easily formed when the SiO ₂ film 260 is formed.

  By performing the above steps, a NAND flash memory having an air gap structure between wirings as shown in FIG. 7 can be formed.

FIG. 8 is a diagram for explaining the difference in whisker generation status depending on the presence or absence of the nitriding treatment in the first embodiment. When the nitriding treatment of the W film is not performed, whiskers are generated from the surface of the W film by the subsequent heat treatment, as shown in FIG. Conventionally, generation of whiskers has been confirmed in heat treatment at 800 ° C. or higher. Such a whisker grows to 1 μm or more when, for example, a heat treatment at 900 ° C. is performed for several tens of seconds in a nitrogen (N ₂ ) atmosphere in the presence of a SiO ₂ film including a natural oxide film on the surface of the W film. did. On the other hand, when the nitriding treatment of the W film was performed as in the first embodiment, no whisker was observed under the same conditions as shown in FIG. 8B. As described above, by performing nitriding treatment on the surface of the W film 250 after forming the opening 150, even in a state where the SiO ₂ film including the natural oxide film exists on the surface of the W film after nitriding treatment, Generation of whiskers due to heat treatment can be suppressed.

Here, in the above-described example, the annealing process (S117) is performed before the SiO ₂ film 260 is formed, but the present invention is not limited to this. An annealing process may be performed after the SiO ₂ film 260 is formed. As described above, conventionally, whiskers are generated in the same manner when a high-temperature heat treatment is performed on a W film on which a natural oxide film is formed. On the other hand, when the annealing process is performed before the SiO ₂ film 260 is formed as in the first embodiment, a natural oxide film or an oxide film formed by selective oxidation treatment is formed on the surface of the W film 250. Can exist. Even in such a case, these oxide films can be replaced with the WN film 252 by the nitriding process in the first embodiment, and the occurrence of whiskers can be suppressed even if the annealing process is performed. On the other hand, when the annealing process is performed after the SiO ₂ film 260 is formed, the SiO ₂ film 260 exists on the surface of the W film 250 (WN film 252). Even in such a case, the generation of whiskers can be suppressed by the nitriding treatment in the first embodiment.

In the above example, the air gap 270 is formed to further reduce the dielectric constant between the wirings. However, from the viewpoint of suppressing the generation of whiskers in the W film 250, the air gap 270 is formed. Instead, the opening 150 between the gates may be filled with the SiO ₂ film 260.

  In the example described above, the selective oxidation treatment step (S112) is performed before the selective nitridation treatment step (S114), but the present invention is not limited to this. Even if the selective oxidation treatment step (S112) is not performed, the selective oxidation treatment can be omitted as long as the etching damage can be sufficiently repaired in the subsequent annealing treatment step (S117). At this time, even when the surface of the W film 250 (upper surface and side wall) is oxidized thinly due to the influence of oxygen or the like in the atmosphere before nitriding, oxygen having a small binding energy with W is It replaces nitrogen with high binding energy. Therefore, the natural oxide film (WOx film) on the surface of the W film 250 is converted into a nitride film (WN film).

  As described above, in the first embodiment, the generation of whiskers can be suppressed by performing the nitriding treatment of the W film. Therefore, a short circuit between the control electrodes of adjacent gate portions can be prevented. Therefore, it is possible to overcome the problem that the normal operation due to the short circuit cannot be performed. In the first embodiment, the formation of a nitride film can be suppressed for the tunnel insulating film, the charge storage layer, the interelectrode insulating film, and a part of the control electrode using Si, thereby preventing an increase in inter-wiring capacitance. be able to. Furthermore, formation of charge traps can be prevented.

(Second Embodiment)
In the first embodiment, the case where the oxidation treatment is performed before the selective nitriding treatment step (S114) after the opening forming step (S110) and the ion implantation step (S111) has been described. This is not a limitation. In the second embodiment, a case where an oxidation process is performed after the selective nitriding process (S114) will be described.

FIG. 9 is a flowchart showing the main steps of the semiconductor device manufacturing method according to the second embodiment. In FIG. 9, in the semiconductor device manufacturing method according to the second embodiment, instead of the selective oxidation treatment step (S112), an oxidation is performed between the selective nitridation treatment step (S114) and the SiO ₂ film formation step (S118). It is the same as that of FIG. 1 except the point which added the process process (S116). In the following, the contents other than those specifically described are the same as those in the first embodiment.

  The contents of each process from the insulating film forming process (S102) to the ion implantation process (S111) are the same as those in the first embodiment.

  FIG. 10 shows a process cross-sectional view of the semiconductor device manufacturing method according to the second embodiment. FIG. 10 shows the selective nitriding step (S114) of FIG.

  In FIG. 10, as the selective nitridation process (S114), the W film 250 is nitrided from the state of FIG. 3B in which the opening 150 is formed and ions are implanted into the source / drain regions. A tungsten nitride (WN) film 252 is formed on the upper surface and side walls (side surfaces) of the film 250. Also in the second embodiment, nitriding is performed so that the W film 250 is nitrided more than the polysilicon films 220 and 240 and the insulating films 210 and 230 as in the first embodiment. The contents of the nitriding treatment are the same as those in the first embodiment. By forming the WN film 252, the generation of whiskers can be suppressed.

As an oxidation treatment step (S116), a silicon oxide film 242 is formed on the side surface of the polysilicon film 240, and a silicon oxide film 222 is formed on the side surface of the polysilicon film 220. Oxygen (O ₂ ) gas is supplied, and the exposed surfaces (side surfaces) of the polysilicon films 220 and 240 are plasma oxidized in a plasma atmosphere. By forming the silicon oxide films 222 and 242 on the polysilicon films 220 and 240, damage caused by etching in forming the opening 150 can be repaired. Here, the WN film 252 is formed on the surface (the upper surface and the side surface) of the W film 250 in the previous selective nitridation process (S114). Since W has a higher binding energy than W with respect to W, the WN film 252 is unlikely to be replaced with WOx. Therefore, in the oxidation treatment after the selective nitriding treatment step (S114), it is not necessary to supply the reducing hydrogen gas. In other words, normal oxidation treatment can be performed instead of selective oxidation treatment. As a result, hydrogen which is not preferable for the insulating film 210 to be a tunnel insulating film can be eliminated. By performing the oxidation treatment step (S116) as described above, the state shown in FIG. The subsequent steps are the same as those in the first embodiment.

  It goes without saying that the selective oxidation treatment shown in the first embodiment may be performed instead of the oxidation treatment step (S116).

  As described above, in the second embodiment, the oxidation process is performed after the nitridation process of the W film, thereby suppressing the generation of whiskers and, in addition, a special oxidation process for selecting Si and W, Si damage can be repaired by ordinary oxidation treatment.

  The embodiment has been described above with reference to specific examples. However, the present invention is not limited to these specific examples.

  In addition, the film thickness of each film and the size, shape, number, and the like of the opening can be appropriately selected from those required for semiconductor integrated circuits and various semiconductor elements.

  In addition, any semiconductor device manufacturing method that includes the elements of the present invention and whose design can be changed as appropriate by those skilled in the art is included in the scope of the present invention.

  Further, for the sake of simplicity of explanation, techniques usually used in the semiconductor industry, such as a photolithography process, cleaning before and after processing, are omitted, but it goes without saying that these techniques may be included.

150 opening, 200 semiconductor substrate, 210, 230 insulating film, 220, 240 polysilicon film, 250 W film, 260 SiO ₂ film

Claims (5)

Forming a first silicon film used as a charge storage layer on a semiconductor substrate;
Forming an insulating film on the first silicon film;
Forming a second silicon film used as a part of the control electrode on the insulating film;
Forming a tungsten film used as a part of the control electrode on the second silicon film;
The tungsten film, the second silicon film, the insulating film, and the first silicon so that the tungsten film, the second silicon film, the insulating film, and the first silicon film remain in the gate region. Forming an opening that penetrates the membrane;
Performing a nitriding process in a plasma atmosphere at a pressure of 100 Pa or more so that the tungsten film is nitrided more than the first silicon film and the second silicon film after the opening is formed; ,
After nitriding, forming a silicon oxide film on the tungsten film to cover the opening so that a cavity is formed in the opening;
A method for manufacturing a semiconductor device, comprising: Forming a silicon film on the semiconductor substrate;
Forming a tungsten film on the silicon film;
Forming an opening that penetrates the tungsten film and the silicon film so that the tungsten film and the silicon film remain in the gate region;
Nitriding so that the tungsten film is nitrided more than the silicon film after forming the opening; and
A step of forming a silicon oxide film on at least the tungsten film after the nitriding treatment;
A method for manufacturing a semiconductor device, comprising:   3. The method of manufacturing a semiconductor device according to claim 2, wherein the silicon film is used as a charge storage layer, and the tungsten film is used as a control electrode. Before forming the tungsten film, forming an insulating film on the silicon film;
Before forming the tungsten film, forming a silicon film different from the silicon film on the insulating film;
Further comprising
The opening is formed so as to penetrate the tungsten film, the other silicon film, the insulating film, and the silicon film,
In the nitriding process, a nitriding process is performed so that the tungsten film is more nitrided than the other silicon film,
4. The method of manufacturing a semiconductor device according to claim 2, wherein the laminated film of the tungsten film and the another silicon film is used as a control electrode.   The method of manufacturing a semiconductor device according to claim 2, wherein the nitriding treatment is performed in a plasma atmosphere at a pressure of 100 Pa or more.