JP2013004798A - Circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in a conventional circuit board that when resin is filled in a bump junction space between the component side and the surface of a board, the resin is not filled at an even permeation speed.SOLUTION: A circuit board 11 has a solder resist 16 formed in shape of a window frame in a plan view on the board surface around lands 15. The solder resist 16 has an opening region 16a shaped like a rectangle in a plan view on the board surface including the lands 15, in which no solder resist material is applied. The solder resist 16 is set in such a way that a region D overlapping a board component side 13a of a chip component 12 has a length of 0 mm to 0.1 mm, both ends inclusive, in the direction toward the opening region 16a. This length is set equally on four sides around the opening region 16a, and the opening region 16a is approximately the same in size as the board component side 13a of the chip component 12. Therefore, the speeds at which resin permeates into a minute gap S and into a space K become almost equal, so that the resin is evenly filled in spaces beneath the chip component 12.

Description

  The present invention relates to a circuit board in which resin is filled in a space between a substrate mounting surface of a chip component and a substrate surface facing the substrate mounting surface.

  Conventionally, as this type of circuit board, for example, there is one disclosed in Patent Document 1 in which a plan view is shown in FIG. 1A and a cross-sectional view is shown in FIG.

  The circuit board 1 is mounted with a ball grid array (BGA) 2 as a chip component by a solder reflow process. The BGA 2 has solder bumps 3 provided as connection terminals on the board mounting surface 2a in an array, and the circuit board 1 has pads 4 for mounting the BGA 2 and wirings 5 for connecting the pads 4 and external terminals. And the solder resist 6. The solder resist 6 has an opening 6a for exposing the pad 4 and the wiring 5 collectively. In the circuit board 1 where the BGA 2 is mounted, in order to effectively prevent the occurrence of an edge short circuit, the solder resist 6 or its end is located at a point of at least 0.1 mm from the outer periphery of the mounting region to the inner region. Exists. Further, if the solder resist 6 is excessively present from the outer periphery toward the inner region, the solder resist 6 or the end thereof is directed from the outer periphery toward the inner region because the pad 4 and the wiring 5 are excessively limited. It exists at a point of 0.1 mm to 1 mm.

JP 2004-134648 A

  However, the circuit board 1 disclosed in the above-mentioned conventional patent document 1 is a board mounting surface 2a in a component in which the connection terminal pitch is narrowed (low profile) corresponding to the high functionality, lightness, and shortening of the product. When the resin called the underfill is filled in the lower space of the BGA 2 between the circuit board 1 and the substrate surface facing the substrate mounting surface 2a, there is a problem that the resin is not filled at a uniform penetration rate. For example, as shown in FIG. 1A, when the resin is filled into the lower space of the BGA 2 from the direction of the white arrow A in the same figure, the space between the periphery of the substrate mounting surface 2a and the upper surface of the solder resist 6 The penetration speed of the resin indicated by the length of the long arrow a in the figure, which penetrates the narrow gap of the figure, is the length of the short arrow b in the figure that penetrates the wide space between the board mounting surface 2a and the board surface. It becomes faster than the penetration rate of the resin indicated by For this reason, the region where the board mounting surface 2a and the solder resist 6 overlap is filled with resin first, and the space between the board mounting surface 2a and the board surface is filled with resin later. As a result, the circuit board 1 disclosed in the above-described conventional patent document 1 has a resin or the like formed in a void or the like in the resin filled in the lower space of the BGA 2 having a narrow pitch (low profile). An unfilled portion is generated, resulting in a problem that the connection reliability of which performance is confirmed by a thermal cycle test or the like at the connection portion between the solder bump 3 and the pad 4 is lowered. In addition, when the solder bump 3 is remelted, a problem occurs.

The present invention has been made to solve such problems,
A plurality of lands formed on the substrate surface, which are solder-connected to connection terminal portions arranged on the substrate mounting surface of the chip component;
A solder resist having an opening region to which a solder resist material is not attached and formed on the substrate surface around the land and having an opening region approximately the same size as the substrate mounting surface of the chip component, for example, And a solder resist having a length in the direction toward the opening region of the region overlapping the substrate mounting surface of the chip component of 0 mm or more and 0.1 mm or less,
A circuit board was configured in which the resin was uniformly filled in the space between the substrate mounting surface of the chip component and the substrate surface facing the substrate mounting surface.

  According to this configuration, since the opening region of the solder resist formed on the substrate surface to which the solder resist material is not applied is substantially the same size as the substrate mounting surface of the chip component, the substrate mounting surface and the solder resist are The overlapping area is negligible. Resin filled in the space between the substrate mounting surface of the chip component and the substrate surface facing this substrate mounting surface penetrates into this space by capillary action, but the substrate mounting surface through which this space passes Since the gap between the solder resist and the solder resist becomes extremely small, the action of the capillary phenomenon due to this gap is weakened. For this reason, the speed at which the resin penetrates into a very small area where the board mounting surface and the solder resist overlap, and the speed at which the resin penetrates into the space between the board mounting surface and the board surface are substantially equal, and the uniform penetration. The resin penetrates at a speed, and the resin is evenly filled in the lower part of the chip part. As a result, unlike the conventional circuit board, the resin filled in the lower space of the chip component does not have an unfilled portion such as a void, and the connection reliability between the connection terminal portion and the land can be greatly improved. Become. In addition, it is possible to suppress problems caused when the connection terminal portion is remelted after the resin is filled and cured.

  Further, according to the present invention, the height of the substrate mounting surface from the substrate surface is such that the penetration rate of the resin filled in the space through the gap formed between the substrate mounting surface and the solder resist is The chip component is mounted at a predetermined value or less that causes a remarkable difference with the space.

  When a chip component is mounted with the height of the substrate mounting surface from the substrate surface below a predetermined value, the penetration rate of the resin filled in the lower space of the chip component is formed between the substrate mounting surface and the solder resist. There is a significant difference between the gap and the space between the board mounting surface and the board surface. However, according to the circuit board of this configuration in which the opening area of the solder resist is approximately the same size as the board mounting surface of the chip component, the gap between the board mounting surface and the solder resist is very small as described above. Therefore, the action of the capillary phenomenon due to this gap is weakened, and the resin penetrates at a substantially uniform penetration speed over the entire board mounting surface on the lower surface of the chip component, so that the resin is evenly filled in the lower part of the chip component. The above effect appears remarkably.

  In addition, the present invention is characterized by comprising a wiring formed in an opening region connected to at least one land, and a solder resist coating covering the wiring.

  According to this configuration, since the wiring connected to the land in the opening area of the solder resist is covered with the solder resist coating, only each land is exposed as the conductor to be soldered in the opening area of the solder resist. As a result, the area of each land is made uniform. For this reason, each connection terminal portion provided on the board mounting surface of the chip component with substantially the same solder volume is not solder-connected to the wiring, but is solder-connected only to each land formed on the board surface with substantially the same area. In each land, solder bonding is performed with a substantially uniform area. As a result, when the chip component is mounted on the circuit board surface, the solder joint shape between each connection terminal portion and each land is made uniform, and the stability of the solder joint between each connection terminal portion and each land is improved. In addition, the reliability of solder connection is improved.

  According to the circuit board of the present invention, as described above, an unfilled portion such as a void does not occur in the resin filled in the lower space of the chip component as in the conventional circuit board, and is arranged on the board mounting surface of the chip component. It is possible to greatly improve the connection reliability between the connected terminal portion and the land. In addition, it is possible to suppress problems even when the connection terminal portion is remelted.

(A) is a top view of the conventional circuit board, (b) is sectional drawing. (A) is a top view of the circuit board by one embodiment of the present invention, and (b) is a sectional view. (A) is a top view of the circuit board by one Embodiment in which the chip components are not mounted, (b) is sectional drawing for demonstrating the difference in a solder joint area.

  Next, the form for implementing the circuit board by this invention is demonstrated.

  2A is a plan view of the circuit board 11 according to the present embodiment, and FIG. 2B is a cross-sectional view.

  The circuit board 11 is made of an electrically insulating plate material such as glass epoxy resin, and a chip component 12 that requires resin filling is mounted on the lower part of the component. The chip component 12 has a BGA package structure in which flip chip bonding is performed, and ball-shaped solder bumps 14 are arranged on the substrate mounting surface 13a of the IC chip 13 in a grid pattern with a fine pitch. On the substrate surface of the circuit board 11, a plurality of lands 15 having a circular shape in plan view are arranged in the same arrangement as the array arrangement of the solder bumps 14. The solder bumps 14 constitute connection terminal portions arranged on the board mounting surface of the chip component 12 and are solder-connected to a plurality of lands 15 formed on the board surface.

  In the circuit board 11, a solder resist 16 is formed on the surface of the board around the lands 15 in a planar window frame shape. The solder resist 16 has an opening region 16a to which no solder resist material is applied on the surface of the substrate including the land 15 in a rectangular shape in plan view. The length of the solder resist 16 in the direction toward the opening region 16a, that is, the direction from the outer periphery to the inner side of the chip component 12, in the region D (see FIG. 2A) overlapping the substrate mounting surface 13a of the chip component 12 Is set to 0 mm or more and 0.1 mm or less. In the present embodiment, this length is set evenly on the four sides around the opening region 16a, and the opening region 16a has substantially the same size as the board mounting surface 13a of the chip component 12. .

  In addition, a linear wiring pattern 17 is connected to at least one of the lands 15. As shown in the plan view of FIG. 3A, the wiring pattern 17 leads the lands 15 to the outside of the opening region 16a or connects the lands 15 to each other, but is a portion formed inside the opening region 16a. Is covered with a solder resist coating 18.

  In such a configuration, the circuit board 11 has, for example, a spherical shape in a space K (see FIG. 2B) between the board mounting surface 13a of the chip component 12 and the board surface facing the board mounting surface 13a. An epoxy resin mixed with the silica material is filled as an underfill. In the present embodiment, the chip component 12 has a bonding height h from the substrate surface of the substrate mounting surface 13a (see FIG. 2B) that is a gap S formed between the substrate mounting surface 13a and the solder resist 16. (See FIG. 2 (b).) The resin K is mounted at a penetration rate of the resin filled in the space K below a predetermined value that causes a significant difference between the gap S and the space K, for example, 150 μm or less.

  According to the circuit board 11 according to the present embodiment, the opening region 16a of the solder resist 16 formed on the substrate surface to which the solder resist material is not applied is substantially the same size as the board mounting surface 13a of the chip component 12. Therefore, the region D where the board mounting surface 13a and the solder resist 16 overlap is very small. The resin filled in the space K between the substrate mounting surface 13a of the chip component 12 and the substrate surface facing the substrate mounting surface 13a penetrates into the space K by capillary action. Since the gap S between the board mounting surface 13a and the solder resist 16 that passes through is extremely small, the action of the capillary phenomenon due to the gap S is weakened. Therefore, for example, when the resin is filled into the space K from the direction of the white arrow A shown in FIG. 2A, the resin penetrates into a very small region D where the board mounting surface 13a and the solder resist 16 overlap. The speed and the speed at which the resin penetrates into the space K between the board mounting surface 13a and the board surface are substantially equal, as indicated by the arrow c having the same length. As a result, the resin permeates at a substantially uniform permeation rate, and the resin is evenly filled in the lower part of the chip part 12, so that the resin filled in the lower space of the chip part 12 is filled like a conventional circuit board. Unfilled portions such as voids do not occur, and there is no inconvenience that the connection reliability of which performance is confirmed by a thermal cycle test or the like at the connection portion between the solder bump 14 and the land 15 is lowered.

  In the conventional circuit board 1 as shown in FIG. 1, a user who has purchased the circuit board 1 on which the chip component 2 is mounted reflows the circuit board 1 so that the connection portion between the connection terminal portion 3 and the pad 4 is provided. When remelted, the solder metal expands by, for example, about 10% in an unfilled portion such as a void. And, due to the stress generated by this volume expansion, the adhesive interface between the connection terminal portion 3 and the pad 4 is peeled off to cause an open defect, or the adjacent solder joint location in the unfilled location such as a void is conducted, Cause short circuit. However, according to the circuit board 11 according to the present embodiment having the above-described configuration, a user who has purchased the circuit board 11 on which the chip component 12 is mounted reflows the circuit board 11 to perform the solder bump 14 and the land 15. Even if the joint portion is remelted, the resin is uniformly filled in the space K without generating an unfilled portion such as a void, so that the above-described connection failure does not occur. Therefore, the circuit board 11 according to the present embodiment can sufficiently satisfy predetermined humidity load environment test performance, temperature cycle environment test performance, and the like, maintain connection reliability, and satisfy product quality. I can do it.

  Further, the bonding height h of the substrate mounting surface 13a from the substrate surface is approximately 150 μm or less as in the present embodiment, the chip components 12 are mounted at a high density and a narrow pitch, and the area of the overlapping region D is the same as the conventional one. Is larger than the case where the chip component 2 is mounted with a joint height of 200 μm or more as in the conventional circuit board 1, the penetration rate of the resin filled in the lower space K of the chip component 12 is There is a significant difference between the gap S formed between the surface 13a and the solder resist 16 and the space K between the substrate mounting surface 13a and the substrate surface. However, according to the circuit board 11 according to the present embodiment in which the area of the overlapping region D is extremely small and the opening region 16a of the solder resist 16 is substantially the same size as the substrate mounting surface 13a of the chip component 12, as described above. In addition, since the gap S between the board mounting surface 13a and the solder resist 16 becomes extremely small, the action of the capillary phenomenon due to this gap S is weakened, and the substantially uniform penetration rate over the entire board mounting surface 13a on the lower surface of the chip component 12 The above-described effect of the present invention in which the resin penetrates and the resin is evenly filled in the lower part of the chip part 12 appears significantly.

  Further, according to the circuit board 11 according to the present embodiment, the wiring pattern 17 connected to the land 15 in the opening region 16a of the solder resist 16 is covered with the solder resist coating 18 as shown in FIG. Therefore, only the lands 15 are exposed in the conductor to be soldered in the opening region 16a of the solder resist 16. For this reason, the solder bumps 14 arranged on the board mounting surface 13a of the chip component 12 with substantially the same solder volume are not solder-connected to the wiring pattern 17, and each land 15 formed on the board surface with substantially the same area. Are soldered to each land 15 and solder-bonded in a substantially uniform area. As a result, when the chip component 12 is mounted on the surface of the circuit board, the solder joint shape between each solder bump 14 and each land 15 provided in an array is the joint J1 on the right side of the cross-sectional view of FIG. The solder bowls 14 and the lands 15 are made uniform in the same bowl-like shape as shown in FIG. 6 to improve the stability of solder joints between the solder bumps 14 and the lands 15 and improve the reliability of solder connection.

  On the other hand, the wiring pattern 17 is not covered with the solder resist coating 18 and is exposed to the substrate surface as a conductor to which the wiring pattern 17 and the land 15 are solder-connected, and the solder at the solder joint location between the solder bump 14 and the land 15 is exposed. When the bonding area is large, the solder bonding shape between the solder bump 14 and the land 15 becomes a drum shape with a thin drum as illustrated in the bonding portion J2 on the left side of the cross-sectional view of FIG. For this reason, the solder joint shape between each solder bump 14 and each land 15 provided in an array shape becomes non-uniform, which becomes one of the causes of open defects and the solder joint stability is lowered, and the reliability of solder connection Decreases. The difference in the solder joint area in each land 15 is that the portion where the wiring pattern 17 is formed on the land 15 and the portion where the land 15 is not formed as the area of the land 15 in the opening region 16a becomes smaller. ,growing. However, according to the circuit board 11 according to the present embodiment, the solder resist coating 18 covers the wiring pattern 17 so that the solder joint areas in the lands 15 are substantially equal, and the above-described effects are obtained.

  In the above embodiment, the case where the opening region 16a of the solder resist 16 is slightly narrower than the substrate mounting surface 13a of the chip component 12 and the substrate mounting surface 13a and the solder resist 16 overlap each other has been described. However, the opening region 16a of the solder resist 16 is slightly wider than the substrate mounting surface 13a of the chip component 12, and the substrate mounting surface 13a and the solder resist 16 do not overlap with each other, and there is a gap of about 200 to 300 μm between them. Thus, the opening region 16a may be configured to have substantially the same size as the substrate mounting surface 13a. Even with this configuration, the resin that fills the space K between the substrate mounting surface 13a of the chip component 12 and the substrate surface facing the substrate mounting surface 13a passes through the space K when it penetrates into the space K. Since the gap S between the surface 13a and the solder resist 16 becomes very small, the action of the capillary phenomenon due to the gap S is weakened. Accordingly, the resin penetrates into the lower part of the chip part 12 at a substantially uniform penetration speed, and the resin is evenly filled into the lower part of the chip part 12, and the same effects as those of the above-described embodiment are exhibited.

  In the above embodiment, the length of the region D where the solder resist 16 overlaps the substrate mounting surface 13a of the chip component 12 in the direction toward the opening region 16a is even on the four sides around the opening region 16a. The case where the setting is short has been described. However, this length does not necessarily need to be set to be uniformly short on the four sides around the opening region 16a, but may be short on the side in the resin filling direction, and long on the side facing the resin filling direction. It may be. For example, in the case where the space K is filled with resin from the direction of the white arrow A shown in FIG. 2A, the length of the overlapping region D on the left and right sides in FIG. It may be longer on the upper side of the figure opposite the direction. The resin filling may be performed simultaneously from two sides instead of from one side as shown in FIG. According to such a configuration, the air in the space K can be evenly driven from the lower part of the chip part 12, and the resin can be uniformly filled in the lower part of the chip part 12 at a uniform penetration rate.

  The above-described circuit board 11 according to the present invention is used in an electronic product that requires a resin filling with a bonding height h lower than that of a conventional one due to an increase in mounting density of electronic components on a circuit board accompanying the downsizing of the electronic product. Thus, it is possible to design more severely with respect to resin filling than in the prior art.

DESCRIPTION OF SYMBOLS 11 ... Circuit board 12 ... Chip component 13 ... IC chip 13a ... Board mounting surface of IC chip 13 14 ... Solder bump 15 ... Land 16 ... Solder resist 16a ... Opening area of solder resist 16 17 ... Wiring pattern 18 ... Solder resist coating A ... Filling direction of resin c ... Permeation speed of resin D ... Area where substrate mounting surface 13a and solder resist 16 overlap K ... Space S ... Gap

Claims (4)

  A plurality of lands formed on the substrate surface, which are solder-connected to the connection terminal portions arranged on the substrate mounting surface of the chip component, and an opening region to which the solder resist material is not attached is provided on the substrate surface including the lands. The opening region formed on the substrate surface around the land includes a solder resist having substantially the same size as the substrate mounting surface of the chip component, and faces the substrate mounting surface of the chip component and the substrate mounting surface. A circuit board in which resin is filled in the space between the substrate surface.   In the chip component, the height of the substrate mounting surface from the substrate surface is such that the penetration rate of the resin filled in the space through the gap formed between the substrate mounting surface and the solder resist is the gap and the The circuit board according to claim 1, wherein the circuit board is mounted at a predetermined value or less that causes a remarkable difference with the space.   3. The solder resist according to claim 1, wherein a length of a region overlapping the substrate mounting surface of the chip component in a direction toward the opening region is not less than 0 mm and not more than 0.1 mm. Circuit board as described.   The wiring according to claim 1, further comprising: a wiring formed in the opening region connected to at least one of the lands; and a solder resist coating that covers the wiring. Circuit board.

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