JP2012243866A - Semiconductor light-emitting device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor light-emitting device capable of controlling a position at which a semiconductor element is divided with high precision and a semiconductor light-emitting device in which a favorable oscillator surface is formed.SOLUTION: A first auxiliary groove 41 crossing a concave groove 40 and having a depth greater than that of the concave groove 40 is formed at a position Xa, at which a semiconductor device is to be divided, on the side of a main surface of a semiconductor wafer Wh1. A semiconductor wafer Wh, in which a second auxiliary groove 42 having a depth smaller than that of the concave groove 40 is formed at the position Xa, is cleaved at the position Xa.

Description

  The present invention relates to a structure of a semiconductor light emitting device such as a laser device and a method for manufacturing the semiconductor light emitting device.

  Conventionally, a nitride semiconductor laser element including a semiconductor layer in which a stripe-shaped optical waveguide is formed is used as a laser light source. As a method for manufacturing a semiconductor laser device including the nitride semiconductor layer with good reproducibility while maintaining the characteristics, a method of forming a resonator surface by cleavage is used. When the resonator surface is formed by cleavage, the flatness may be a problem because it depends on the crystallinity of the substrate.

  In order to solve such a problem of flatness, for example, in Patent Document 1, a first auxiliary groove having a depth reaching the middle of the element structure and a width wider than the first auxiliary groove reach the substrate. A method of forming two types of auxiliary grooves having different depths with the second auxiliary groove having a depth has been proposed. In this method, the length of the two auxiliary grooves is longer in the first auxiliary groove than in the second auxiliary groove.

  With this configuration, since the second auxiliary groove has a wide groove width, it is possible to deal with a wide range of divisions, inclinations in the cleavage direction, or deviations in their positions. Inclination in the direction of division, cleavage, or misalignment of those positions is introduced into a range that can be corrected by the first auxiliary groove by correction by the second auxiliary groove. And the 1st auxiliary groove makes it possible to correct the fine division, the inclination in the cleavage direction or the positional deviation thereof. Therefore, high-precision division can be realized.

  In Patent Document 2, a GaN-based semiconductor laser chip (semiconductor laser element) including a substrate made of n-type GaN and a nitride semiconductor layer formed on the substrate and having a ridge portion forming an optical waveguide is formed. The ridge portion is formed in a region extending from the central portion of the semiconductor layer to one side. In the region opposite to the ridge portion, a groove portion extending in parallel with the extending direction of the ridge portion is formed from the semiconductor layer side. Further, on the extension line of the end face of the ridge portion, a cleavage introduction step extending in a direction intersecting with the extending direction of the groove portion is formed from the semiconductor layer side. There has been proposed a technique of forming a groove in this way and cleaving using a step for cleaving introduction (for example, Patent Document 2).

  In general, in a semiconductor laser device, due to the difference between the lattice constant of the GaN layer and the lattice constant of the AlGaN layer at the time of forming the semiconductor layer, the optical waveguide is stretched in the direction extending and the direction orthogonal to this direction. Stress is generated. As a result, in the vicinity of the ridge portion, micro cracks may be formed in the width direction of the semiconductor laser while causing a step in the extending direction of the optical waveguide. In this case, since the cleavage starts from the microcrack, there is a problem that good cleavage cannot be performed. As in Patent Document 2, the thickness of the semiconductor layer in the first region (groove) formed so as to extend in parallel with the ridge portion is smaller than the thickness of the semiconductor layer in the region other than the first region. .

  Since the semiconductor layer is divided in a second direction (a width direction of the semiconductor laser element) that intersects the extending direction of the first region with the first region as a center, the semiconductor layer is formed between the substrate and the semiconductor layer when the semiconductor layer is formed. The tensile stress generated in the second direction (the width direction of the semiconductor laser device) can be made smaller than the tensile stress generated in the direction in which the optical waveguide extends due to the difference in lattice constant. As a result, it is possible to suppress the micro cracks spontaneously generated in the first region from being formed with a step in the direction in which the optical waveguide extends, and to perform satisfactory cleavage.

JP 2009-117494 A JP 2009-200688 A

  In a nitride semiconductor light emitting device, when a nitride semiconductor layer is grown on a nitride semiconductor substrate, the nitride semiconductor layer is nitrided due to a lattice constant difference or a thermal expansion coefficient difference between the nitride semiconductor substrate and the nitride semiconductor layer. A strain is generated in the nitride semiconductor layer, and a crack is generated in the nitride semiconductor layer due to the strain. When the nitride semiconductor light emitting device is divided, there is a problem that the dividing surface is pulled by the crack and deviates from the planned division position. Even if this is a configuration using two types of split auxiliary grooves as in Patent Document 1, the split surface is pulled by the crack, so that the split surface is prevented from coming off from the planned split position. It is difficult.

  Further, in Patent Document 2, in order to prevent the above-described crack, a digging region is formed in the nitride semiconductor substrate, and a depression is formed in the surface of the nitride semiconductor layer on the digging region. However, it is difficult to divide the nitride semiconductor substrate and the nitride semiconductor layer in which the crack preventing groove is formed at the planned dividing position by only one type of auxiliary groove. In Patent Document 2, there is an example in which the division auxiliary groove reaches the substrate and an example in which the division auxiliary groove does not reach the substrate. However, in both cases, the division auxiliary groove is formed deeper than the crack prevention groove. With this structure, cracks are likely to occur from various positions in the thickness direction of the nitride semiconductor element, and it is difficult to control the division position. There is a problem to become. In addition, the cleavage end face tends to be recessed in either direction, and it is difficult to form a good resonator mirror.

  In order to solve the above-described problems, the present invention provides a method for manufacturing a semiconductor light-emitting element capable of controlling the division position of the semiconductor element with high accuracy and a semiconductor light-emitting element having a good resonator surface. Objective.

  In order to achieve the above object, the present invention divides a semiconductor wafer having a semiconductor layer on one principal surface and having a groove formed in the one principal surface and extending in a first direction in the first direction. A manufacturing method for manufacturing a semiconductor light emitting device, wherein a first auxiliary groove that intersects the concave groove and is deeper than the concave groove is formed on a predetermined division position on the one main surface side of the semiconductor wafer. A first auxiliary groove forming step, and a second auxiliary groove that intersects the concave groove and is shallower than the concave groove on the one main surface side of the semiconductor wafer on the division planned position. It has a groove forming step and a dividing step of cleaving the semiconductor wafer at the planned dividing position.

  According to this configuration, it is possible to prevent a crack generated during cleavage from deviating from the planned division position. In addition, since the first auxiliary groove is formed deeper than the concave groove, it is possible to suppress a variation in stress due to the depression of the semiconductor layer formed in the concave groove and a shift of the crack. Furthermore, by using two types of auxiliary grooves having different depths, the bottom of the auxiliary groove can be made shallower in stages, thereby making it possible to stabilize the propagation of cracks.

  As described above, the semiconductor layer is formed on one main surface, and the dividing position of the semiconductor wafer provided with the concave groove can be controlled with high accuracy. Thereby, the semiconductor light-emitting device formed by division can obtain a good cleavage plane.

  The said structure WHEREIN: A 2nd auxiliary groove formation process can be performed after the said 1st auxiliary groove formation process. Thereby, it can suppress that a contact part with the 1st auxiliary groove of a 2nd auxiliary groove is melt | dissolved at the time of a 1st auxiliary groove formation process, and it deform | transforms and lose | disappears.

  In the above configuration, in the first auxiliary groove manufacturing step, a plurality of first auxiliary grooves are formed in the second direction, and the at least one first auxiliary groove intersects the concave groove. A first auxiliary groove may be formed.

  In the above configuration, in the first auxiliary groove forming step, the length of the first auxiliary groove intersecting the concave groove in the second direction is longer than the width of the concave groove in the second direction. The first auxiliary groove may be formed.

  The said structure WHEREIN: A said 1st auxiliary groove formation process may form both the front-end | tip parts of the said 2nd direction of the said 1st auxiliary groove in sharp shape in planar view. At this time, the first auxiliary groove is a hexagonal shape in plan view, and the vertexes of the hexagon facing each other are scheduled to be divided, or a trapezoidal shape in plan view, and the bottom base of the trapezoid is The thing which overlaps with the said division | segmentation scheduled position can be mentioned.

  In the above configuration, in the second auxiliary groove forming step, a second auxiliary groove longer than the first auxiliary groove may be formed on the first auxiliary groove.

  In the above configuration, after the second auxiliary groove forming step, a third auxiliary groove is formed on one main surface side of the semiconductor wafer, the end reaching the edge of the semiconductor wafer and shallower than the concave groove. There may be provided a third auxiliary groove forming step.

  In the above configuration, in the dividing step, the semiconductor wafer may be divided using a break blade inclined at an elevation angle from the third auxiliary groove toward the opposite direction.

  In the above configuration, the semiconductor light emitting device may be a semiconductor laser device including an optical waveguide extending in the first direction in the semiconductor layer. Furthermore, an LED element etc. can be mentioned as said semiconductor light emitting element.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor light-emitting device which can control the division | segmentation position of a semiconductor device with high precision can be provided. In particular, a nitride semiconductor light emitting element using a semipolar nitride semiconductor substrate such as {202-1}, {10-11}, {10-12}, {11-22} is divided with high accuracy. The manufacturing method of the semiconductor light-emitting device which can be provided can be provided. In addition, a semiconductor light emitting device having a good resonator surface can be provided.

1 is a schematic perspective view of a semiconductor laser device which is an example of a semiconductor light emitting device according to the present invention. It is a schematic plan view of the nitride semiconductor wafer used for the manufacturing method of the semiconductor light-emitting device concerning this invention. It is a schematic sectional drawing when the nitride semiconductor wafer shown to FIG. 2A is divided | segmented by the IIB-IIB line | wire. It is a schematic plan view of the nitride semiconductor wafer just before cleaving. It is an enlarged plan view of another example of a nitride semiconductor wafer. It is a schematic plan view of another example of a nitride semiconductor wafer. FIG. 6 is a cross-sectional view of the nitride semiconductor wafer shown in FIG. 5. It is a schematic plan view of another example of a nitride semiconductor wafer. FIG. 8 is an enlarged plan view of a first auxiliary groove of the nitride semiconductor wafer shown in FIG. 7. It is a schematic sectional drawing of the nitride semiconductor wafer shown in FIG. It is a figure which shows a mask pattern when performing etching. It is a figure which shows a mask pattern when performing etching. It is a schematic plan view of another example of a nitride semiconductor wafer. FIG. 12 is an enlarged view of a first auxiliary groove of the nitride semiconductor wafer shown in FIG. 11. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element. It is sectional drawing for demonstrating the manufacturing method of a nitride semiconductor laser element.

  Embodiments of the present invention will be described below with reference to the drawings. First, a semiconductor light emitting device and a method for manufacturing the same according to the present invention will be described.

(Configuration of semiconductor light emitting device)
FIG. 1 is a schematic perspective view of a semiconductor laser device which is an example of a semiconductor light emitting device according to the present invention. In the drawings described below, unless otherwise specified, the X direction (left and right direction in FIG. 1), Y direction (paper thickness direction in FIG. 1), Z direction (in FIG. 1) in the semiconductor light emitting device shown in FIG. In FIG. 1, description will be made with reference to the vertical direction). FIG. 1 shows the semiconductor laser element A divided in the X direction.

  The semiconductor light emitting device shown in FIG. 1 is a semiconductor laser device A in which the end surface in the Y direction is a resonator end surface. The semiconductor laser element A includes a nitride semiconductor substrate 1, an n-type nitride semiconductor layer 2a formed on the upper surface of the nitride semiconductor substrate 1, an active layer 23 formed on the upper surface of the n-type nitride semiconductor layer 2a, A p-type nitride semiconductor layer 2b formed on the upper surface of the active layer 23, and an insulating layer 30 formed on the upper surface of the p-type nitride semiconductor layer 2b. In the following description, the n-type nitride semiconductor layer 2b, the active layer 23, and the p-type nitride semiconductor layer 2a may be collectively referred to as a nitride semiconductor layer 2.

  The semiconductor laser device A includes a ridge portion 28 that protrudes from the upper surface of the p-type nitride semiconductor layer 2a and extends in the Y direction. A side surface in the X direction of the ridge portion 28 is covered with an insulating layer 30, and a p-type contact layer 27 is formed on the upper surface of the ridge portion 28. Further, a p-side electrode 31 is formed so as to cover the ridge portion 28. The p-side electrode 31 is formed so as to cover a part of the ridge portion 28 in the Y direction (longitudinal direction), but may be formed so as to cover the whole. An n-side electrode 32 is formed on the lower surface side of the semiconductor laser element A, that is, on the surface opposite to the p-side electrode 31. In the semiconductor laser device A, an optical waveguide is formed below the ridge portion 28.

  The semiconductor laser element A is formed by cleaving a flat wafer. As shown in FIG. 1, a stripe-shaped concave groove 40 formed in parallel with the ridge portion 28 is formed on the upper surface of the semiconductor laser element A. Further, the cleavage end surface is formed on the resonator end surface, and the first auxiliary groove 41 and the second auxiliary groove 42 for assisting the cleavage are formed on the cleavage end surface. Details of the striped concave grooves 40, the first auxiliary grooves 41, and the second auxiliary grooves 42 will be described later.

  Next, a manufacturing process of the nitride semiconductor wafer will be described with reference to the drawings. 13 to 24 are sectional views showing a procedure for forming a wafer. First, as shown in FIG. 13, SiO 2 having a thickness of about 1 μm is formed on the entire upper surface (growth main surface 1a) of an n-type nitride semiconductor substrate (here, n-type GaN substrate) 1 by sputtering or the like. Layer 11 is formed. In this embodiment, an n-type GaN substrate is used as the growth substrate for the semiconductor layer. However, an insulating substrate such as sapphire may be used, and lattice bonding is performed with Si, ZnS, ZnO, GaAs, and nitride semiconductor. Oxides such as lithium niobate and neodymium gallate may also be used.

  Next, as shown in FIG. 14, a resist layer 12 having an opening 12 a as a resist pattern is formed on the SiO 2 layer 11 using a photolithography technique. Then, as shown in FIG. 15, by using a dry etching technique such as RIE (Reactive Ion Etching), the SiO 2 layer 11 is etched using the resist layer 12 as a mask, so that a predetermined region of the SiO 2 layer 11 (the opening 12 a The lower area is selectively removed. Thereafter, the resist layer 12 is removed using a resist stripping solution or an organic solvent (for example, acetone, ethanol, etc.). Note that the next step may be performed as it is without removing the resist layer 12.

  Subsequently, as shown in FIG. 16, the n-type nitride semiconductor substrate 1 is etched using the SiO2 layer 11 as a mask by using an ICP (Inductively Coupled Plasma) method, an RIE method, or the like. Thus, a predetermined region (region below the opening 12a) of the n-type nitride semiconductor substrate 1 is selectively removed. At this time, the etching conditions are adjusted so that the etching depth of the n-type nitride semiconductor substrate 1 is about 5 μm. Thereby, the recess 10 described above is formed in the n-type nitride semiconductor substrate 1. The concave portion 10 is a concave groove extending in the Y direction.

  By adjusting the etching conditions and the like, the inner wall surface 10b of the recess 10 is formed at an angle (predetermined angle) where the inclination angle γ is greater than 90 degrees. Thereafter, the SiO 2 layer 11 is removed using an etchant such as HF (hydrogen fluoride) (see FIG. 17). In the following description, the n-type nitride semiconductor substrate 1 may be described as a portion where the recess 10 is formed as a digging region H1, and a portion other than the portion where the recess 10 is formed as a non-digging region H2. is there.

  Next, as shown in FIG. 18, an epitaxial growth method such as a MOCVD (Metal Organic Chemical Vapor Deposition) method is performed on the main growth surface 1a of the n-type nitride semiconductor substrate 1 (processed substrate) processed as described above. The nitride semiconductor layers 21 to 27 are grown by using them. Each layer is specifically as follows. An n-type cladding layer 21 made of n-type Al0.06Ga0.94N having a thickness of about 2.2 μm and an n-type GaN having a thickness of about 0.1 μm on the main growth surface 1 a of the n-type nitride semiconductor substrate 1. The n-type guide layer 22 and the active layer 23 are sequentially grown.

  When the active layer 23 is grown, as shown in FIG. 19, two well layers 23a made of Inx1Ga1-x1N and three barrier layers 23b made of Inx2Ga1-x2N (x1> x2) are formed. Grow alternately. Specifically, a first barrier layer 231b having a thickness of about 30 nm, a first well layer 231a having a thickness of about 3 nm to about 4 nm, and a thickness of about 16 nm on the n-type guide layer 22 from the lower layer to the upper layer. A second barrier layer 232b having a thickness, a second well layer 232a having a thickness of about 3 nm to about 4 nm, and a third barrier layer 233b having a thickness of about 60 nm are sequentially grown.

  As a result, an active layer 23 having a DQW (Double Quantum Well) structure composed of two well layers 23 a and three barrier layers 23 b is formed on the n-type guide layer 22. At this time, the well layer 23a is configured such that its In composition ratio x1 is not less than 0.15 and not more than 0.45 (for example, 0.2 to 0.25). On the other hand, the barrier layer 23b is configured such that its In composition ratio x2 is, for example, 0.04 to 0.05.

  Returning to FIG. 18, still another layer will be described. On the active layer 23, a carrier block layer 24 made of p-type AlyGa1-yN, a p-type guide layer 25 made of p-type GaN having a thickness of about 0.05 μm, and a p-type AlO.sub.0 having a thickness of about 0.5 μm. A p-type cladding layer 26 made of 06Ga0.94N and a p-type contact layer 27 made of p-type GaN having a thickness of about 0.1 μm are successively grown. At this time, the carrier block layer 24 is preferably formed so as to have a thickness of 40 nm or less (for example, about 12 nm). The carrier block layer 24 is configured such that the Al composition ratio y is 0.08 or more and 0.35 or less (for example, about 0.15).

  The n-type nitride semiconductor layer 2a (the n-type cladding layer 21 and the n-type guide layer 22) is doped with, for example, Si as an n-type impurity, and the p-type nitride semiconductor layer 2b (the carrier block layer 24, The p-type guide layer 25, the p-type cladding layer 26 and the p-type contact layer 27) are doped with, for example, Mg as a p-type impurity.

  The n-type nitride semiconductor layer 2a is formed at a growth temperature of 900 ° C. or higher and lower than 1300 ° C. (for example, 1075 ° C.). The well layer 23a of the active layer 23 is formed at a growth temperature (for example, 700 ° C.) of 600 ° C. or more and 770 ° C. or less. The barrier layer 23b in contact with the well layer 23a is formed at the same growth temperature (for example, 700 ° C.) as the well layer 23a. Further, the p-type nitride semiconductor layer 2b is formed at a growth temperature of 700 ° C. or higher and lower than 900 ° C. (for example, 880 ° C.). The growth temperature of n-type nitride semiconductor layer 2a is preferably 900 ° C. or higher and lower than 1300, and more preferably 1000 ° C. or higher and lower than 1300.

  The growth temperature of the well layer 23a of the active layer 23 is preferably 600 ° C. or higher and 830 ° C. or lower. When the In composition ratio x1 of the well layer 23a is 0.15 or higher, 600 ° C. or higher and 770 ° C. or lower is preferable. It is more preferable if it is 630 ° C. or higher and 740 ° C. or lower. The growth temperature of the barrier layer 23b of the active layer 23 is preferably the same temperature as the well layer 23a or higher than the well layer 23a. Furthermore, the growth temperature of the p-type nitride semiconductor layer 2b is preferably 700 ° C. or higher and lower than 900 ° C., more preferably 700 ° C. or higher and 880 ° C. or lower. Of course, even if the p-type nitride semiconductor layer 2b is formed at a temperature of 900 ° C. or higher, p-type conduction can be obtained. Therefore, the p-type nitride semiconductor layer 2b may be formed at a temperature of 900 ° C. or higher.

  As the growth raw material of these nitride semiconductors, for example, trimethylgallium ((CH3) 3Ga: TMGa) is used as a Ga raw material, trimethylaluminum ((CH3) 3Al: TMAl) is used as an Al raw material, and In raw material As trimethylindium ((CH3) 3In: TMIn) and NH3 as a raw material of N. As the carrier gas, for example, H2 can be used. As for the dopant, for example, monosilane (SiH4) can be used as the n-type dopant (n-type impurity), and for example, cyclopentadienyl magnesium (CP2Mg) is used as the p-type dopant (p-type impurity). be able to.

  Here, as shown in FIG. 20, when a nitride semiconductor layer is grown on the main growth surface 1 a of the n-type nitride semiconductor substrate 1 subjected to the groove processing, the inner wall surface 10 b of the recess 10 is embedded with the nitride semiconductor layer 2. It is hard to get it. Therefore, when the nitride semiconductor layer 2 is formed on the n-type nitride semiconductor substrate 1, the surface of the nitride semiconductor layer 2 on the recess 2 (digging region H1) (each layer constituting the nitride semiconductor layer 2) The surface 20 is in a state in which the depression 20 is formed. The recesses 20 alleviate strain (cracks) in the nitride semiconductor layer 2 caused by lattice mismatch with the n-type nitride semiconductor substrate 1.

  Further, the nitride semiconductor layer 2 is formed on the main growth surface 1a of the n-type nitride semiconductor substrate 1, so that in the nitride semiconductor layer 2 on the non-dig region H2, the recess 10 (dig region H1). A layer thickness gradient region is formed in which the layer thickness decreases in a gradient (gradually) as approaching. By this layer thickness gradient region, the distortion of nitride semiconductor layer 2 caused by lattice mismatch with n-type nitride semiconductor substrate 1 is alleviated.

  As described above, in the method for manufacturing the semiconductor laser device A according to the present invention, the thickness of the recess 200 formed on the surface of the nitride semiconductor layer 2 and the thickness of the nitride semiconductor layer 2 formed on the non-dig region H2. Due to the two strain relaxation effects by the inclined region 5, a very high crack suppression effect can be obtained.

  Therefore, even when an AlGaN layer having a high Al composition and having a large lattice constant difference from n-type nitride semiconductor substrate 1 is formed on growth main surface 1a, generation of cracks is suppressed. Therefore, nitride semiconductor layer 2 in which generation of cracks is suppressed is formed on growth main surface 1a of n-type nitride semiconductor substrate 1.

  Subsequently, as shown in FIG. 21, a width of about 1 μm to about 10 μm (for example, about 1.5 μm) is formed on the p-type contact layer 27 in a region immediately above where the light emitting portion is formed by using a photolithography technique. At the same time, a striped (elongated) resist 14 is formed. Then, as shown in FIG. 22, etching is performed to a depth in the middle of the p-type guide layer 25 using the resist 14 as a mask, using a RIE method using a chlorine-based gas such as SiCl 4 or Cl 2, or Ar gas. Thus, the ridge portion 28 is constituted by the convex portion of the p-type guide layer 25, the p-type cladding layer 26 and the p-type contact layer 27. The ridge portion 28 is formed in a stripe shape (elongated shape) extending parallel to the Y axis [0001] (see FIG. 22).

  Next, as shown in FIG. 23, the SiO 2 having a thickness of about 0.1 μm to about 0.3 μm (for example, about 0.15 μm) is formed by sputtering or the like with the resist 14 left on the ridge portion 28. An insulating layer 30 is formed, and the ridge portion 28 is embedded. Then, the resist 14 is removed by lift-off to expose the p-type contact layer 27 on the ridge portion 28. As a result, insulating layers 30 as shown in FIG. 23 are formed on both sides of the ridge portion 28.

  Next, as shown in FIG. 24, a Pd layer having a thickness of about 15 μm and an Au layer having a thickness of about 200 nm are sequentially formed from the substrate side (insulating layer 30 side) using a vacuum deposition method or the like. Thus, the p-side electrode 31 having a multilayer structure is formed on the insulating layer 30 (p-type contact layer 27).

  Next, in order to make it easy to divide the substrate, the back surface of the n-type nitride semiconductor substrate 1 is ground or polished to reduce the thickness of the n-type nitride semiconductor substrate 1 to about 100 μm. Thereafter, as shown in FIG. 20, an Hf layer having a thickness of about 5 nm from the back surface side of the n-type nitride semiconductor substrate 1 is formed on the back surface of the n-type nitride semiconductor substrate 1 using a vacuum deposition method or the like. By sequentially forming an Al layer having a thickness of about 150 nm, a Mo layer having a thickness of about 36 nm, a Pt layer having a thickness of about 18 nm, and an Au layer having a thickness of about 200 nm, the n-side electrode 32 having a multilayer structure is formed. Form. Note that before the n-side electrode 32 is formed, dry etching or wet etching may be performed for the purpose of adjusting electrical characteristics. Thus, nitride semiconductor wafer Wh1 is formed.

(First embodiment)
A method for manufacturing a semiconductor light emitting device according to the present invention will be described. In the method of manufacturing a semiconductor light emitting device according to the present invention, a semiconductor laser device which is a chip-shaped semiconductor light emitting device by cleaving a nitride semiconductor wafer, dividing the wafer into bar shapes, and then cleaving the bar shaped nitride semiconductor devices. Is made. 2A is a schematic plan view of a nitride semiconductor wafer used in the method for manufacturing a semiconductor light emitting device according to the present invention, and FIG. 2B is a schematic cross-sectional view when the nitride semiconductor wafer shown in FIG. 2A is divided along the line IIB-IIB. FIG. 3 is a schematic plan view of the nitride semiconductor wafer just before cleaving. The IIB-IIB line overlaps with one of the dividing lines Xa that are the planned dividing positions for dividing the nitride semiconductor wafer Wh1 by cleavage.

  As shown in FIG. 2A, the nitride semiconductor wafer Wh1 is divided by a dividing line Xa. The dividing line Xa is substantially perpendicular to the ridge portion 28 extending in the resonator direction. In the nitride semiconductor wafer Wh1, two ridges 28 and two pad electrodes 31 are formed in a region between the stripe-shaped concave grooves 40. However, one or three or more ridges 28 and / or pads are used. The structure in which the electrode 31 was formed may be sufficient. In addition, although the two dividing lines Xa are provided on the nitride proposed conductor wafer Wh1, it is not limited to this, and can be provided at a desired interval and number.

  In the nitride semiconductor wafer Wh1, a first auxiliary groove 41 and a second auxiliary groove 42 are formed on the dividing line Xa from the side where the nitride semiconductor layer 2 is formed. In the nitride semiconductor wafer Wh1, a plurality of dividing lines Xa are set side by side in the Y direction, and a first auxiliary groove 41 and a second auxiliary groove 42 are formed for each dividing line Xa.

  Cleavage is a dividing method that uses the ease of cracking of a crystal in a specific direction, generates a crack in a specific crystal plane, and propagates the crack. In the manufacturing process of the semiconductor light emitting device, it is preferable that the crack is generated from the surface layer to the crystal specific surface, and the crack is advanced toward the other surface to be divided. Therefore, in the method for manufacturing a semiconductor light emitting device according to this embodiment, two types of grooves (first auxiliary groove 41 and second auxiliary groove 42) having different depths are formed.

  As shown in FIG. 2A, the first auxiliary groove 41 is arranged at a portion overlapping the stripe-like groove 40 of the dividing line Xa so that the stripe-like groove 40 passes through the center thereof. As shown in FIG. 2B, the depth of the first auxiliary groove 41 is deeper than that of the stripe-shaped concave groove 40. Further, the length of the first auxiliary groove 41 in the extending direction of the dividing line Xa (X direction) is longer than the width of the striped concave groove 40 (X direction). By forming the first auxiliary groove 41, all of the nitride semiconductor layer formed on the striped concave groove 40 is removed, and the recess 20 of the nitride semiconductor layer 2 on the dividing line Xa is removed. .

  Further, the second auxiliary groove 42 is formed at a position overlapping the first auxiliary groove 41 at the planned division position. The length of the second auxiliary groove 42 in the extending direction of the dividing line Xa (X direction) is longer than that of the first auxiliary groove 41. The distance from the tip portion of the second auxiliary groove 42 to the ridge portion 28 is formed to be separated by a predetermined distance or more (for example, 5 μm or more). The second auxiliary groove 42 is shallower than the depth of the striped concave groove 40.

  That is, the nitride semiconductor wafer Wh1 includes a first auxiliary groove 41 deeper than the bottom of the stripe-shaped concave groove 40 and a second auxiliary groove 42 at the bottom shallower than the bottom of the stripe-shaped concave groove 40 on the dividing line Xa. It has.

  The bottom of the first auxiliary groove 41 is formed deep from the surface (upper surface) of the nitride semiconductor layer 2. Therefore, there is a large step in the height of the outermost surface of the region where the first auxiliary groove is formed at the planned division position and the other region. For this reason, at the time of cleavage, when the crack propagates, the large step difference causes the crack to be detached from the division position and easily cause deviation or chipping from the division planned position. As in the nitride semiconductor wafer Wh1 of the present invention, by forming the second auxiliary grooves 42 that are shallower than the stripe-shaped concave grooves 40, the outermost surfaces in the depth direction are the first auxiliary grooves 41 and the second auxiliary grooves 42. Since the two-stage structure, the level difference is reduced. As a result, cracks generated during the division propagate on the division position with high accuracy.

  Further, since the second auxiliary groove 42 is formed on the surface of the substrate as described above as described above, the second auxiliary groove 42 and the striped groove 40 are formed as shown in FIGS. 2A and 2B. Are completely separated from each other in both the vertical and horizontal directions (that is, the X and Y directions) and the depth direction (that is, the Z direction). For this reason, it is difficult to be affected by the recess 20 of the nitride semiconductor layer 2 formed in the stripe-shaped concave groove 40, and it is possible to generate a crack with high accuracy and induce cleavage.

  From the above, by forming the first auxiliary groove 41 and the second auxiliary groove 42, the nitride semiconductor wafer Wh1 generates a crack from the surface layer to the crystal specific surface (surface on the nitride semiconductor layer 2 side). Cracks can be propagated to the side surface. That is, by forming the second auxiliary groove 42 to be shallower than the depth of the bottom of the striped concave groove 40, it is possible to suppress the occurrence and development of cracks from the terminal portions of various depths of the auxiliary groove. A cleaved end face can be obtained.

  Further, the nitride semiconductor wafer Wh1 is connected to the third auxiliary groove from the upper surface on the nitride semiconductor layer 2 side to the end portion on one side of the nitride semiconductor wafer Wh1 on the dividing line Xa intersecting the stripe-shaped concave groove 40. 43 is formed. As shown in FIG. 3, the third auxiliary groove 43 is formed continuously with the second auxiliary groove 42, and is formed shallower than the striped concave groove 40.

  By forming the third auxiliary groove 43 that communicates with one side of the nitride semiconductor wafer Wh1, cracks are likely to occur from the surface layer at the end of the nitride semiconductor wafer Wh1 to the crystal specific surface. For this reason, the cleavage property of the crystal can be used more effectively, the dividing position can be controlled with high accuracy, and a good cleavage end face can be obtained. Further, as shown in FIG. 3, for cleaving the nitride semiconductor wafer Wh <b> 1, a break device provided with a break blade BL inclined at an elevation angle from the third auxiliary groove 43 toward the opposite direction is used. By performing cleavage and splitting using such a break blade BL, stress is applied to the third auxiliary groove 43 and cracks are likely to occur in the third auxiliary groove 43. For this reason, it can be divided by generating a crack in the crystal specific surface from the surface layer of the semiconductor layer. Therefore, the dividing position can be controlled with high accuracy, and a good cleavage end face can be obtained.

  Next, the process of forming the first auxiliary groove, the second auxiliary groove, and the third auxiliary groove will be described, and the subsequent processes, that is, the cleavage process and the post-processing process will be described in detail.

(First auxiliary groove forming step)
With a laser scribing device, the stripe-shaped concave groove 40 passes through the center from the upper surface of the nitride semiconductor wafer Wh1 on the nitride semiconductor layer 2 side so as to intersect the stripe-shaped concave groove 40 on the dividing line Xa. The first auxiliary groove 41 is formed by scanning the laser beam on the dividing line Xa of the nitride semiconductor wafer Wh1 in a broken line shape. As shown in FIG. 2A, the stripe-shaped concave grooves 40 are arranged in the X direction, and one first auxiliary groove 41 is formed corresponding to one stripe-shaped concave groove 40.

 The first auxiliary groove 41 is formed in order to prevent the metal element scattering (debris) constituting the nitride semiconductor layer from adhering to the surface inside the groove or the exposed surface around the groove due to the energy of the laser beam. It is preferable to form a resist or a protective film before.

  The first auxiliary grooves 41 are grooves formed by laser irradiation with a laser scribing device. For this reason, the side wall of the first auxiliary groove 41 is formed by melting. Therefore, as shown in FIGS. 2A and 2B, when the first auxiliary groove 41 and the second auxiliary groove 42 are formed in the nitride semiconductor wafer Wh1, the second auxiliary groove 42 is formed after the first auxiliary groove 41 is formed. Form. Thereby, it can suppress that the contact part with the 1st auxiliary groove 41 of the 2nd auxiliary groove 42 is melt | dissolved and deform | transforms and lose | disappears by the formation process of the 1st auxiliary groove 41. For this reason, the first auxiliary groove 41 and the second auxiliary groove 42 function more effectively during cleavage (division).

(Second auxiliary groove forming step)
Next, by a scribe such as diamond scribe, a stripe-shaped groove is formed at a portion intersecting with the stripe-shaped groove 40 on the dividing line Xa in a broken line shape from the upper surface of the nitride semiconductor wafer Wh1 on the nitride semiconductor layer 2 side. The second auxiliary groove 42 is formed so that 40 passes through the center and overlaps the first auxiliary groove 41. As described above, the second auxiliary groove 42 is formed so as to be shallower than the first auxiliary groove 41 and to have a longer length in the direction along the dividing line Xa.

(Process for forming the third auxiliary groove)
As shown in FIG. 3, a portion of the nitride semiconductor wafer Wh1 intersecting the stripe-shaped concave groove 40 on the dividing line Xa from the upper surface of the nitride semiconductor wafer Wh1 on the nitride semiconductor layer 2 side by diamond scribe is formed on the nitride semiconductor wafer Wh1. The third auxiliary groove 43 is formed so as to communicate the end portion on one side.

  The first auxiliary groove 41, the second auxiliary groove 42, and the third auxiliary groove 43 illustrated here are formed by diamond scribe, but are performed by dry etching such as RIE (reactive ion etching). Also good.

(Cleaving process)
The nitride semiconductor wafer Wh1 in which the first auxiliary groove 41, the second auxiliary groove 42, and the third auxiliary groove 43 are formed is formed in the nitride semiconductor wafer Wh1 along the dividing line Xa as shown in FIG. Then, the semiconductor light emitting element is divided using a break device provided with a break blade BL inclined at an elevation angle θ from the third auxiliary groove 43 toward the opposite direction. The inclination angle θ of the break blade BL is preferably 0.05 ° or less.

  Although the division | segmentation here employ | adopts a blade break, it can also be performed using methods, such as a roller break or press break, well known conventionally. As a result, a bar-shaped element is obtained in which the semiconductor laser element is divided into bars and the end surfaces thereof are the resonator surfaces.

(Post-processing process)
Next, a coating is applied to the end face (resonator face) of the bar-like element using a technique such as vapor deposition or sputtering. Specifically, an emission side coating film (not shown) made of, for example, an oxynitride film of aluminum is formed on one end face serving as a light emission surface. In addition, a reflection-side coating film (not shown) made of a multilayer film such as SiO 2 or TiO 2 is formed on the opposite end face serving as the light reflection surface.

  Finally, the bar-shaped element is divided into individual semiconductor laser elements. In this way, the semiconductor laser element A is manufactured. In the above manufacturing process, a semiconductor laser element is manufactured as a semiconductor light emitting element. However, the present invention is not limited to this, and it can also be used as a manufacturing process of a semiconductor light emitting element such as an LED.

  Using the above-described method for manufacturing a semiconductor light emitting device of the present invention, a semiconductor laser device A, which is an example of a semiconductor light emitting device, was produced, and its cleavage plane was observed. The dimensions of the striped concave groove 40, the first auxiliary groove 41, the second auxiliary groove 42, and the third auxiliary groove of the semiconductor laser device A according to the present invention will be described with reference to the drawings. As shown in FIG. 1, the dimensions in Example 1 are as follows. The length of the resonator (the distance between the resonator surface and the resonator surface) is about 600 μm, and the width Ws11 of the striped groove 40 is about 5. 0.0 .mu.m, depth D21 is 5 .mu.m, and the distance between adjacent stripe-shaped concave grooves 40 is about 400 .mu.m.

  As shown in FIG. 2B, the depth D11 of the bottom portion of the first auxiliary groove 41 is formed deeper than the depth D21 of the bottom portion of the striped concave groove 40, and here, 5 μm <D11 ≦ 80 μm. If the first auxiliary groove 41 is formed too deep, subsequent handling becomes difficult. Therefore, the film thickness of the n-type nitride semiconductor substrate 1 after forming the first auxiliary groove 41 is 30 μm or more. Is preferred.

  The length Ws21 of the first auxiliary groove 41 in the dividing line direction (X direction) is preferably longer than the width of the stripe-shaped concave groove 40, specifically 5 μm <Ws21 <250 μm. . Cleavage utilizes the ease of cracking of a crystal in a specific direction, and splits by generating a crack in a specific crystal plane. Therefore, in the manufacture of the semiconductor light emitting device, a crack is generated from the surface layer to the crystal specific surface, and the crack is propagated and divided. When the first auxiliary groove 41 formed deeper than the stripe-shaped concave groove 40 is arranged in the immediate vicinity of the ridge portion 28, cracks run from the end portions of various depths of the first auxiliary groove 41, and a good cleavage surface is obtained. I can't. For this reason, the length Ws51 from the first auxiliary groove 41 to the ridge portion 28 is preferably separated by 50 μm or more (Ws51> 50 μm).

  From the above, the dimensions in Example 1 are 40 μm for the length Ws21 in the dividing line direction (X direction) of the first auxiliary groove 41 and 80 μm for the depth D11. In the manufacturing process of the first auxiliary groove 41, the operating conditions of the laser scribing apparatus are controlled so that the length Ws21 in the dividing line direction is about 40 μm and the scribe depth D11 is about 80 μm.

  As shown in FIG. 2B, each dimension in the present embodiment is preferably such that the depth D01 of the bottom of the second auxiliary groove 42 is shallower than the bottom of the striped concave groove 40, specifically 0. .1 μm ≦ D01 ≦ 5 μm. The length Ws31 in the dividing line direction of the second auxiliary groove 42 is longer than the length Ws21 in the dividing line direction of the first auxiliary groove 41, that is, Ws21 <Ws31. The length Ws41 from the tip of the second auxiliary groove 42 in the dividing line direction to the tip of the ridge 28 is preferably 5 μm or more. The length Ws41 of the second auxiliary groove 42 in the dividing line direction is Ws41 ≧ 5 μm. It becomes. The length Ws31 of the second auxiliary groove 42 is Ws21 <Ws31 <360 μm. In Example 1, the length Ws31 of the second auxiliary groove 42 in the dividing line direction (X direction) is about 140 μm, and the depth D01 is about 1 μm.

  The depth Dp (not shown) of the bottom of the third auxiliary groove 43 is shallower than the depth D21 of the stripe-shaped concave groove 40 and is 0.1 μm ≦ Dp ≦ 5 μm. The length is configured to be 100 μm or more. In the dimensions of the present embodiment, the length of the third auxiliary groove 43 in the dividing line direction (X direction) is about 1000 μm and the depth Dp is about 1 μm.

  A nitride semiconductor wafer in which a nitride semiconductor layer is formed on the upper surface of a conventional nitride semiconductor substrate (in this case, applied to a {202-1} semipolar plane substrate) having a stripe-shaped concave groove is When cleaving with a type of divisional auxiliary groove formed, the probability that the deviation from the dividing line of the cleavage plane was within 40 μm was about 58%, and the probability that the deviation was within the range of 5 μm or less was also 44%. .

  On the other hand, when the nitride semiconductor wafer Wh1 having the configuration of Example 1 is cleaved, the probability that the deviation of the cleavage plane falls within 40 μm or less from the dividing line Xa is 84%, and the probability that the deviation falls within the range of 5 μm or less is 79%. It became.

  As described above, the cleavage surface can be controlled with high accuracy by cleaving the nitride semiconductor wafer Wh1 in which the first auxiliary groove 41 and the second auxiliary groove 42 are formed as in the first embodiment, and a good cleavage end surface is obtained. It can be seen that can be obtained. From this, it is possible to increase the number (ratio) of non-defective semiconductor light emitting devices obtained from one semiconductor wafer (nitride semiconductor wafer) by using the method for manufacturing a semiconductor light emitting device according to the present invention, Yield can be improved.

  The cavity length of the laser and the shape of the nitride semiconductor wafer Wh2 are not limited to the dimensions exemplified here, and the dimensions of the auxiliary grooves can be changed as appropriate.

(Modification of the first embodiment)
FIG. 4 is an enlarged plan view of another example of the nitride semiconductor wafer. As shown in FIG. 2A, the first auxiliary groove and the second auxiliary groove are not limited to the configuration in which the stripe-shaped concave grooves 40 are orthogonal to each other at the center of the first auxiliary groove 41 and the second auxiliary groove 42. . As shown in FIG. 4, the first auxiliary groove 41 has a striped groove 40 extending in the Y direction of the nitride semiconductor wafer Wh <b> 1 so that a part of the first auxiliary groove 41 is hooked on the striped groove 40 at the orthogonal position. You may arrange | position (refer FIG. 4). In addition, it is preferable that the inclination of the break blade BL in the division is configured by an elevation angle on the side where the first auxiliary groove 41 is offset. Note that the dimensions, manufacturing method, and effects of each auxiliary groove, such as the length, width, and depth, are the same as in the above-described embodiment.

  It can be seen that even with such a configuration, the cleavage plane can be controlled with high accuracy and a good cleavage end face can be obtained. From this, it is possible to increase the number (ratio) of non-defective semiconductor light emitting devices obtained from one semiconductor wafer (nitride semiconductor wafer) by using the method for manufacturing a semiconductor light emitting device according to the present invention, Yield can be improved.

(Second Embodiment)
Another example of the method for manufacturing a semiconductor light emitting device of the present invention will be described with reference to the drawings. FIG. 5 is a schematic plan view of another example of the nitride semiconductor wafer, and FIG. 6 is a cross-sectional view of the nitride semiconductor wafer shown in FIG. As shown in FIG. 5, the dividing line Xa of the nitride semiconductor wafer Wh2 is the same as that of the nitride semiconductor wafer Wh1 shown in FIG. The nitride semiconductor wafer Wh2 is the same as the nitride semiconductor wafer Wh1 except that the first auxiliary grooves 51 and the second auxiliary grooves 42 are different, and description of substantially the same parts is omitted.

  As shown in FIGS. 5 and 6, in the nitride semiconductor wafer Wh2, three first auxiliary grooves 41a, 41b, and 41c are formed on the dividing line Xa. The first auxiliary groove 41a is arranged at a portion overlapping the stripe-shaped concave groove 40 of the dividing line Xa so that the stripe-shaped concave groove 40 passes through the center thereof. Further, the first auxiliary grooves 41b and 41c, which are the same as the first auxiliary grooves 41a, are formed at positions symmetrical with respect to the stripe-shaped grooves at a predetermined distance (for example, 50 μm) from the first auxiliary grooves 41a. ing. That is, the three first auxiliary grooves 41a, 41b, and 41c are arranged linearly in the dividing line direction (X direction) of the dividing line Xa with the first auxiliary groove 41a as the center.

  As shown in FIGS. 5 and 6, three first auxiliary grooves 41a, 41b, 41c are arranged in a broken line shape (intermittently) on the dividing line Xa in a region sandwiched between two spaced ridge portions 28. Has been. In the present embodiment, the three first auxiliary grooves 41a, 41b, 41c formed in a broken line shape are collectively referred to as a first auxiliary groove 41. Next, in the dividing line direction of the dividing line Xa of the nitride semiconductor wafer Wh2, it is shallower than the striped concave groove 40 so as to overlap with the first auxiliary grooves 41, and the striped concave groove 40 passes through the center. A second auxiliary groove is formed in the first.

  In the nitride semiconductor wafer Wh2 shown in FIGS. 5 and 6, the length in the dividing line direction of the first auxiliary groove 41a at the center of the first auxiliary groove 41 is formed on the inner wall surface of the striped groove 40. The striped grooves 40 are formed longer than the width in the dividing line direction so that the entire nitride semiconductor layer 2 can be removed. The length of the second auxiliary groove 42 in the dividing line direction is the length of the first auxiliary groove 41 (the length of the region where the three first auxiliary grooves 41a, 41b, 41c are arranged in a series of broken lines. ) Longer and both end portions are formed at a predetermined distance (for example, 5 μm or more) away from the ridge portion 28.

  Further, as shown in FIG. 5, from the upper surface of the nitride semiconductor wafer Wh2 on the nitride semiconductor layer 2 side, the end of one side of the nitride semiconductor wafer Wh2 on the dividing line Xa intersecting with the striped groove 40 A third auxiliary groove 43 is formed so as to communicate with. The depth of the third auxiliary groove 43 is formed to be shallower than the depth of the bottom of the striped concave groove 40. The length of the third auxiliary groove 43 is preferably 100 μm or more. Since the third auxiliary groove 43 is the same as the third auxiliary groove 43 formed in the nitride semiconductor wafer Wh1, details thereof are omitted.

  As shown in FIGS. 5 and 6, the stripe-shaped concave groove 40 is centered at a portion intersecting with the stripe-shaped concave groove 40 of the dividing line Xa from the nitride semiconductor layer 2 side of the nitride semiconductor wafer Wh2. The first auxiliary groove 41 (41a, 41b, 41c) is formed by scanning the laser irradiation on the divided Xa of the wafer in a broken line with a laser scribing device so as to pass. The first auxiliary groove 41a and the first auxiliary groove 41b and the first auxiliary groove 41a and the first auxiliary groove 41c are preferably formed, for example, separated by 50 μm or more. The first auxiliary grooves 41a, 41b, and 41c may be formed simultaneously by intermittently irradiating with laser light, or may be formed separately.

  As shown in FIGS. 5 and 6, the dimensions of the nitride semiconductor wafer Wh2 are such that the length of the resonator is about 600 μm, the width Ws02 of the striped groove 40 is about 5 μm, the depth D22 is about 5 μm, and adjacent to each other. The interval between the striped concave grooves 40 is about 400 μm.

The first auxiliary grooves 41a, 41b, and 41c are configured to have the same depth D12. The depth D12 of the first auxiliary groove 41 is deeper than the depth D22 (5 μm) of the striped concave groove 40, and here, 5 μm <D12 ≦ 80 μm. If the first auxiliary groove 41 is formed too deeply, subsequent handling becomes very difficult. Therefore, it is preferable to form the first auxiliary groove 53 so that the film thickness after forming the first auxiliary groove 53 is 30 μm or more.

  The length Ws22 in the dividing line direction of the first auxiliary groove 41a is longer than the width in the dividing line direction of the striped concave groove 40, and 5 μm <Ws22 <65 μm. When the first auxiliary groove 41 formed deeper than the stripe-shaped concave groove 40 is disposed in the immediate vicinity of the ridge portion 28, cracks are generated from the terminal portions of various depths of the first auxiliary groove 41, and a good cleavage surface is obtained. I can't get it. For this reason, it is preferable to form the first auxiliary groove 41 (41b or 41c) with a length separated from the ridge portion 28 by 50 μm or more.

  In the dimensions in the present embodiment, the length Ws22 in the dividing line direction of the first auxiliary grooves 41a, 41b, and 41c is about 60 μm, and the depth D12 is about 80 μm. In other words, the laser scribing conditions are adjusted so that the depth D12 is about 80 μm when the nitride semiconductor wafer Wh2 is scribed. The first auxiliary groove 41 is formed in order to prevent the metal element scattering (debris) constituting the nitride semiconductor layer from adhering to the surface inside the groove or the exposed surface around the groove due to the energy of the laser beam. It is preferable to form a resist or a protective film before.

  As shown in FIGS. 5 and 6, stripes are formed on the dividing lines Xa intersecting the stripe-shaped concave grooves 40 from the upper surface of the nitride semiconductor wafer Wh2 on the nitride semiconductor layer 2 side by scribe such as diamond scribe. The second auxiliary groove 42 is formed so that the concave groove 40 passes through the center and overlaps the first auxiliary groove 41. In this embodiment, the length Ws32 of the second auxiliary groove 42 in the direction of the dividing line is longer than the length of the first auxiliary groove 41 in the direction of the dividing line, that is, 180 μm <Ws32. The length Ws41 from the tip of the second auxiliary groove 42 in the dividing line direction to the tip of the ridge 28 is preferably 5 μm or more. The length Ws41 of the second auxiliary groove 42 in the dividing line direction is Ws41 ≧ 5 μm. It becomes. The length Ws32 of the second auxiliary groove 42 is 180 μm <Ws32 <360 μm. In Example 1, the length Ws31 of the second auxiliary groove 42 in the dividing line direction (X direction) is about 220 μm, and the depth D01 is about 1 μm.

  The depth of the third auxiliary groove 43 is formed to be shallower than the depth of the stripe-shaped concave groove 40. In addition, it is preferable that the length of the 3rd auxiliary groove 43 is 100 micrometers or more.

  Further, the cavity length of the laser and the shape of the nitride semiconductor wafer Wh2 are not limited to the dimensions exemplified here, and the dimensions of the auxiliary grooves can be appropriately changed accordingly.

  By configuring the first auxiliary groove 41 like the nitride semiconductor wafer Wh2 shown in FIGS. 5 and 6, the same effect as the first embodiment can be obtained. Thereby, the division position can be controlled with high accuracy, a good cleavage end face can be obtained, and the yield can be increased.

(Third embodiment)
Another example of the method for manufacturing a semiconductor light emitting device of the present invention will be described with reference to the drawings. 7 is a schematic plan view of another example of the nitride semiconductor wafer, FIG. 8 is an enlarged plan view of the first auxiliary groove of the nitride semiconductor wafer shown in FIG. 7, and FIG. 9 is the nitride shown in FIG. It is a schematic sectional drawing of a semiconductor wafer. The nitride semiconductor wafer Wh3 shown in FIG. 7 has the same configuration as the nitride semiconductor wafer Wh1 shown in the first embodiment except that the first auxiliary groove 51 and the second auxiliary groove 52 are different, and is substantially the same. The same parts are denoted by the same reference numerals, and description of substantially the same parts is omitted.

  As shown in FIG. 7, the nitride semiconductor wafer Wh3 includes hexagonal first auxiliary grooves with sharp tips at both ends in the dividing line direction (X direction) at portions intersecting with the striped grooves 40 of the dividing line Xa. 51 is provided. The first auxiliary groove 51 is formed on the dividing line Xa so that the hexagonal tip portion overlaps. The second auxiliary groove 52 is formed at a position overlapping the center of the first auxiliary groove 51 on the dividing line Xa. The first auxiliary groove 51 and the second auxiliary groove 52 are arranged on the dividing line Xa.

  The nitride semiconductor wafer Wh3 includes a plurality of at least two types of auxiliary grooves, that is, a first auxiliary groove 51 deeper than the stripe-shaped concave groove 40 and a second auxiliary groove 52 shallower than the stripe-shaped concave groove 40 along the dividing line Xa. Place and cleave along. Further, the length of the first auxiliary groove 51 in the dividing line direction is shorter than the length of the second auxiliary groove 52 in the dividing line direction. Moreover, since the 3rd auxiliary groove 43 is the same structure as the above-mentioned 1st Embodiment and 2nd Embodiment, it abbreviate | omits for details.

(Production method)
A method for manufacturing a nitride semiconductor laser device shown in the third embodiment of the present invention will be described with reference to FIGS. 7 to 10A, 10B, and 16. FIG. 10A is a diagram showing a mask pattern when the etching shown in FIG. 16 is performed, and FIG. 10B is a diagram showing a mask pattern leaving a region other than the hexagon forming the first auxiliary groove. As shown in FIG. 10A, a resist layer 12 is formed in a region other than the portion that becomes the stripe-like groove 40, and a stripe-like groove as shown in FIG. 16 is formed using a dry etching method such as the RIE method. A recess 10 for forming 40 is formed. Further, the nitride semiconductor layer 2 is grown on the main growth surface 1a of the n-type nitride semiconductor substrate 1 that has been grooved (formed with a recess). Thereby, the stripe-shaped concave groove 40 is formed.

  Next, a resist film such as a SiO 2 film is formed on the nitride semiconductor layer 2, and a hexagonal first auxiliary groove 51 as shown in FIG. 9 is formed on the dividing line Xa using a photolithography technique. A mask pattern is formed using a SiO2 film or the like in a region other than the hexagon 511 in FIG. 10B so as to be formed so as to be orthogonal to the central portion of the groove 40. Subsequently, the first auxiliary groove 51 is formed using dry etching such as ICP or RIE. The film used for the mask pattern may be a nitride film such as SiN.

  As illustrated in FIG. 9, the dimensions exemplified here are about 600 μm in the length of the resonator, the width Ws13 (Ws03 is 2.5 μm) of the stripe-shaped concave groove 40 on the substrate, and the depth. D03 is 5 μm, and the distance between adjacent stripe-shaped concave grooves 40 is about 400 μm.

  The shape of the first auxiliary groove 51 illustrated in FIGS. 7 and 8 is a hexagonal shape that is elongated in the direction of the dividing line, and each dimension is such that the depth D13 of the first auxiliary groove 51 is a striped concave groove. It is deeper than the depth D03 of 4, which is 5 μm <D13 ≦ 80 μm. If the first auxiliary groove 51 is formed too deeply, subsequent handling becomes very difficult. Therefore, it is preferable to form the first auxiliary groove 51 so that the film thickness after forming the first auxiliary groove 51 is 30 μm or more. Note that when the first auxiliary groove 51 is formed by dry etching such as ICP or RIE, the first auxiliary groove 51 is etched from the original surface shape. Therefore, as shown in FIG. It is formed one step deeper at the portion where it intersects with the concave groove 40.

  The length of the first auxiliary groove 51 in the dividing line direction is longer than the width Ws11 of the stripe-shaped concave groove 40 and is formed with 5 μm <Wr1 <250 μm. Further, it is formed at a distance of 50 μm or more from the ridge portion 28. The angle of the tip of the first auxiliary groove 51 in the dividing line direction is preferably 10 ° ≦ θb <90 °, and the width Wr2 of the first auxiliary groove is preferably Wr2 ≦ 50.

  In the present embodiment, the first auxiliary groove 51 has dimensions of a length Wr1 in the length dividing line direction of the first auxiliary groove 51 of 100 μm, a width Wr2 of 10 μm, and a depth D13 of 10 μm. At this time, the etching conditions are adjusted so that the dry etching depth D13 of the nitride semiconductor wafer Wh3 is about 10 μm.

  Thereafter, the SiO 2 layer is removed using an etchant such as HF (hydrogen fluoride). Subsequently, a striped (elongated) ridge portion 28 (see FIGS. 21 to 23) is formed by using a photolithography technique. Thereafter, the p-side electrode 31 is formed by the same method as described above, and grinding and polishing are performed to reduce the thickness of the n-type nitride semiconductor substrate 1 to about 100 μm. Next, the n-side electrode 32 is formed, and the nitride semiconductor wafer Wh3 according to the present embodiment is formed.

  Next, the stripe-shaped groove 40 passes through the center at a position intersecting with the stripe-shaped groove 40 on the dividing line Xa from the upper surface of the nitride semiconductor wafer on the nitride semiconductor layer side by scribe such as diamond scribe. The second auxiliary groove 52 is formed so as to overlap the first auxiliary groove 51. In addition, each dimension of the 2nd auxiliary groove 52 in this embodiment is the same as that of the said 1st Embodiment, and abbreviate | omits the detail.

Next, from the nitride semiconductor layer 2 side of the nitride semiconductor wafer Wh3 by the diamond scribing method or the like, the portion that intersects the stripe-shaped concave groove 40 on the dividing line Xa communicates with the end portion on one side of the nitride semiconductor wafer wh3. Thus, the third auxiliary groove 53 is formed. The third auxiliary groove 53 has the same configuration as that of the nitride semiconductor wafer Wh1 of the first embodiment described above, and details thereof are omitted. Further, the cleavage is the same as that in the first embodiment described above, and the details are omitted.

  In the method for manufacturing a semiconductor light emitting device according to the third embodiment, the above-described two types of auxiliary grooves (first auxiliary groove 51 and second auxiliary groove 52) are formed at the planned cleavage position (on the dividing line). This is used for division. As a result, the same effect as in the first embodiment can be obtained, so that the division position can be controlled with high accuracy, and a good cleavage end face can be obtained.

  Further, the first auxiliary groove 51 having an accurate shape can be formed by forming the first auxiliary groove 51 by dry etching. Therefore, the division position can be controlled with high accuracy with high yield. In addition, by forming the first auxiliary groove 51 with a sharp tip as shown in FIG. 8, the position where the cleavage crack is generated can be set to a pointed portion of the first auxiliary groove 51 with a high probability. As a result, the dividing position can be controlled with high accuracy, a good cleavage end face can be obtained, and the yield can be improved.

(Fourth embodiment)
Another example of the method for manufacturing a semiconductor light emitting device of the present invention will be described with reference to the drawings. 11 is a schematic plan view of another example of the nitride semiconductor wafer, and FIG. 12 is an enlarged plan view of the first auxiliary groove of the nitride semiconductor wafer shown in FIG. A nitride semiconductor wafer Wh4 shown in FIG. 11 has the same configuration as that of the nitride semiconductor wafer Wh1 shown in the first embodiment except that the first auxiliary groove 61 and the second auxiliary groove 62 are different. The same parts are denoted by the same reference numerals, and description of substantially the same parts is omitted.

  As shown in FIG. 11, the nitride semiconductor wafer Wh4 has a trapezoidal first auxiliary groove 61 formed at a portion intersecting the stripe-shaped concave groove 40 on the dividing line Xa. As shown in FIGS. 11 and 12, the shape of the first auxiliary groove 61 is a trapezoidal shape in which the lower base overlaps the dividing line Xa. Each of the dimensions is such that the depth D14 of the first auxiliary groove 61 is deeper than the depth of the striped concave groove 40, and here, 5 μm <D14 ≦ 70 μm. If the first auxiliary groove 61 is formed too deep, subsequent handling becomes very difficult. Therefore, it is preferable to form the first auxiliary groove 61 so that the film thickness after forming the first auxiliary groove 61 is 30 μm or more. When the first auxiliary groove 61 is formed by dry etching such as ICP or RIE, the first auxiliary groove 61 is etched from the original surface shape, so that the depth of the first auxiliary groove 61 intersects with the stripe-shaped concave groove 40. It is formed one step deeper.

  The dividing line direction (X direction) length Wr3 of the first auxiliary groove 61 is longer than the width Ws14 of the stripe-shaped concave groove 40, and is formed with 5 μm <Wr3 <250 μm. The first auxiliary groove 61 is preferably formed with a length separated from the ridge portion 28 by 50 μm or more. The tip angle θc of the first auxiliary groove 61 in the dividing line direction is 10 ° ≦ θc <60 °, and the width Wr4 of the first auxiliary groove 61 in the dividing direction (Y direction) is Wr4 ≦ 50. preferable.

  Specifically, in the nitride semiconductor wafer Wh4, the length Wr3 in the dividing line direction of the first auxiliary groove 61 is 100 μm, the width Wr4 is 20 μm, and the depth D14 is 10 μm. At this time, the etching conditions are adjusted so that the dry etching h depth D14 of the nitride semiconductor wafer wh4 is about 10 μm.

(Production method)
In this example, it can be manufactured by the same manufacturing method as in the third embodiment. In the manufacturing method of the fourth embodiment described above, a crack occurs from the tip portion of the first auxiliary groove 61. As a result, the same effect as in the third embodiment can be obtained. That is, the cleavage position can be controlled with high accuracy, and a good cleavage end face can be obtained. Therefore, the number of good products obtained from one wafer can be increased, and the yield can be improved.

  In each of the embodiments described above, the semiconductor laser element is described as an example of the semiconductor light emitting element. However, the present invention is not limited to this. can do.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to this content. The embodiments of the present invention can be variously modified without departing from the spirit of the invention.

  The present invention is not limited to nitride semiconductors, and can be used for devices of other semiconductor materials such as AlGaAs-based and AlInGaP-based materials. In addition to laser elements and light-emitting elements, semiconductor elements can be used for electronic elements such as FETs and HEMTs.

1 n-type nitride semiconductor substrate 2 nitride semiconductor layer 21 n-type cladding layer 22 n-type guide layer 23 active layer 231a first well layer 231b first barrier layer 232a second well layer 232b second barrier layer 233b third barrier layer 24 carrier block layer 25 p-type guide layer 26 p-type cladding layer 27 p-type contact layer 28 ridge portion 30 insulating layer 31 p-side electrode 32 n-side electrode 40 striped concave groove 41 first auxiliary groove 42 second auxiliary groove 43 Third auxiliary groove 51 First auxiliary groove 52 Second auxiliary groove 61 First auxiliary groove 62 Second auxiliary grooves Wh1 to Wh4 Nitride semiconductor wafer

Claims (13)

A manufacturing method for manufacturing a semiconductor light emitting element by dividing a semiconductor wafer having a semiconductor layer on one main surface and having a groove formed in the one main surface and extending in a first direction in the first direction. There,
A first auxiliary groove forming step of forming a first auxiliary groove that intersects the groove and is deeper than the groove on the one principal surface side of the semiconductor wafer;
A second auxiliary groove forming step for forming a second auxiliary groove that intersects the concave groove and is shallower than the concave groove on the one main surface side of the semiconductor wafer on the planned division position;
A semiconductor light emitting device manufacturing method comprising: a splitting step of cleaving the semiconductor wafer at the splitting position. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein a second auxiliary groove forming step is performed after the first auxiliary groove forming step.   In the first auxiliary groove manufacturing step, a plurality of first auxiliary grooves are formed in the second direction, and the first auxiliary grooves are formed such that at least one of the first auxiliary grooves intersects the concave groove. The manufacturing method of the semiconductor light-emitting device of Claim 1 or Claim 2 which forms.   In the first auxiliary groove forming step, the length of the first auxiliary groove intersecting the concave groove in the second direction is longer than the width of the concave groove in the second direction. The method for manufacturing a semiconductor light-emitting element according to claim 1, wherein a groove is formed.   5. The semiconductor light emitting element according to claim 1, wherein, in the first auxiliary groove forming step, both tip portions of the first auxiliary groove in the second direction are formed in a sharp shape in a plan view. Manufacturing method   6. The method of manufacturing a semiconductor light emitting element according to claim 5, wherein the first auxiliary groove has a hexagonal shape in a plan view, and the vertexes of the hexagon facing each other overlap with the scheduled division position.   The method of manufacturing a semiconductor light emitting element according to claim 5, wherein the first auxiliary groove has a trapezoidal shape in a plan view, and a lower base of the trapezoid overlaps with the scheduled division position. The semiconductor light emitting device manufacturing method according to claim 2, wherein in the second auxiliary groove forming step, a second auxiliary groove longer than the first auxiliary groove is formed on the first auxiliary groove. Method.   After the second auxiliary groove forming step, on the main surface side of the semiconductor wafer, a third auxiliary groove that forms a third auxiliary groove whose end reaches the edge of the semiconductor wafer and is shallower than the concave groove. The manufacturing method of the semiconductor light-emitting device according to claim 1, comprising a groove forming step.   10. The method of manufacturing a semiconductor light emitting element according to claim 9, wherein in the dividing step, the semiconductor wafer is divided using a break blade inclined at an elevation angle from the third auxiliary groove toward the opposite direction.   A semiconductor light emitting device manufactured by the manufacturing method according to claim 1.   The semiconductor light emitting device according to claim 11, wherein the semiconductor light emitting device is a semiconductor laser device including an optical waveguide extending in the first direction in the semiconductor layer.   The semiconductor light emitting device according to claim 11 or 12, wherein the semiconductor light emitting device is a nitride semiconductor light emitting device in which a nitride semiconductor layer is formed on a nitride semiconductor substrate.

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