JP5471256B2 - Semiconductor device, semiconductor wafer, semiconductor wafer manufacturing method, semiconductor device manufacturing method - Google Patents

Description

  The present invention relates to a semiconductor device, a semiconductor wafer, a semiconductor wafer manufacturing method, and a semiconductor device manufacturing method.

  Semiconductor elements such as transistors, diodes, and lasers are important members of various electronic devices. In particular, semiconductor light emitting devices such as semiconductor lasers are useful for image display devices, information recording / reproducing devices, and the like.

  The semiconductor element is manufactured, for example, by cleaving a semiconductor wafer. In a general cleavage process of a semiconductor element such as an edge-emitting semiconductor laser, a diamond cutter or a high-power laser beam may be used. Specifically, for example, a cleavage guide groove is formed by scribe on a part of the semiconductor wafer surface on the planned dividing line, and then a blade (blade) is pressed from the back surface of the wafer directly below the planned dividing line.

  In particular, nitride-based crystals have high crystal hardness and are prone to cracking, making it difficult to control the cleavage process compared to other compound material systems such as InP and GaAs. For example, when the scribe groove is formed, there are problems that a defect or a crack is generated due to the impact, or that the cleavage line does not go straight corresponding to the step of the wafer and the end surface flatness and yield are deteriorated. In order to avoid this, for example, as disclosed in Patent Document 1, a method of providing the number of guide grooves for each stripe has been proposed.

  FIG. 17 shows the method of Patent Document 1. FIG. 17 is a plan view of the arrangement of the guide grooves. As shown in the drawing, this wafer has a plurality of stripes 171, and guide grooves 172 are provided between the stripes by scribing with a diamond blade with respect to the planned cleavage line.

  On the other hand, for example, in a semiconductor laser using an InP-based or GaAs-based material, a method disclosed in Patent Document 2 is used. In the method of Patent Document 2, as in Patent Document 1, guide grooves for cleavage are formed in a broken line shape, avoiding periodically arranged active layer stripes. When this guide groove is produced by wet etching, a guide groove having a V-shaped cross section is obtained due to anisotropy of the etching rate.

JP 2003-17791 A JP 56-71989

  However, the methods described in Patent Documents 1 and 2 still have problems in efficiently forming guide grooves for accurate cleavage in a semiconductor wafer.

  For example, the method of Patent Document 1 has problems such as a decrease in yield accompanying an increase in the number of scribes and an increase in scribble scraps. Scribing scraps generated during scribing may cause deterioration of the quality of the semiconductor element. Further, the probability of occurrence of defects and cracks due to impact during scribing increases, and there is a concern that the cleavage yield will be reduced and the device reliability will be affected. The same problem occurs in the process of dividing the semiconductor wafer in a direction parallel to the active layer stripe (laser stripe) after forming the resonator surface by bar cleavage (hereinafter, this may be referred to as “element division”). It can happen.

  On the other hand, in the method of Patent Document 2, when cleaving using the guide groove, cleavage occurs at the V-shaped apex position regardless of the position where the blade is applied, so that division at an accurate position is possible. In addition, since no scribe is required, it is possible to avoid the influence of the impact at the time of scribe. However, for example, with a nitride-based material, it is difficult to form a V-shaped guide groove as described in Patent Document 2 by wet etching. This is because there is no suitable etching solution capable of forming the V-shaped guide groove because the chemical resistance of the GaN-based material is high. On the other hand, guide grooves can be formed by dry etching, but dry etching applicable to GaN-based materials is generally an etching method with high physical properties. For this reason, the cross-sectional shape of the groove is not a V-shape, but a rectangular or U-shape having substantially the same width at the lower end and the upper end of the groove. With such a shape, the cleavage line is not uniquely determined when a force is applied to the guide groove, and it is difficult to ensure controllability.

  On the other hand, in the InP or GaAs material system, for example, the method of Patent Document 1 is not necessarily applicable to a substrate having a thickness of 200 μm or more, a substrate having a large step structure on the surface, and the like. In order to realize stable cleavage characteristics in such a substrate, a V-shaped guide groove having a depth of a certain level or a shape close thereto is required. However, when a V-shaped groove or a shape close thereto is formed by wet etching, there is a possibility that a guide groove having a sufficient depth cannot be obtained due to a decrease in the etching rate or a limitation on the width of the guide groove.

  As described above, it is difficult to efficiently form a guide groove for accurate cleavage without generation of scribble dust in a semiconductor wafer.

  Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor wafer, in which a guide groove for accurate cleavage can be efficiently formed in a semiconductor wafer without generation of scribble dust.

  The present invention also provides a semiconductor element manufacturing method using the semiconductor wafer manufacturing method of the present invention. Furthermore, the present invention also provides a semiconductor wafer and a semiconductor element. Furthermore, the present invention also provides an image display device, an information recording / reproducing device, and an optical communication device using a semiconductor element.

In order to achieve the above object, a method for producing a semiconductor wafer of the present invention comprises:
A first groove forming step of forming a first groove on the upper part of the substrate formed of crystals;
A functional semiconductor crystal layer forming step of forming a functional semiconductor crystal layer by growing a semiconductor crystal in a portion other than the first groove forming portion on the substrate after the first groove forming step;
After the functional semiconductor crystal layer formation step, the functional semiconductor crystal layer and the substrate around the first groove formation site are dry-etched to enlarge the first groove, and from the upper surface of the functional semiconductor crystal layer And a second groove forming step for forming a second groove reaching the inside of the substrate.

A semiconductor device manufacturing method of the present invention includes a semiconductor wafer manufacturing process for manufacturing the semiconductor wafer by the manufacturing method of the present invention,
A dividing step of dividing the semiconductor wafer in at least a direction along a lower end of the groove.

Further, the semiconductor wafer of the present invention is
Including a crystal laminate,
The crystal laminate includes a substrate formed from a wet etching resistant crystal, and a functional semiconductor crystal layer formed thereon,
A groove extending from the upper surface of the functional semiconductor crystal layer to the inside of the substrate is formed, and at least a lower part of the groove has a shape in which the groove width decreases toward the bottom.

The semiconductor element of the present invention includes a crystal laminate, and the crystal laminate includes a substrate formed from a wet etching resistant crystal, and a functional semiconductor crystal layer formed thereon,
In at least one side surface of the crystal laminate, the upper portion of the substrate includes a surface that is inclined with respect to a normal to the main surface of the substrate, and the lower portion of the substrate and the functional semiconductor crystal layer are respectively the main surface of the substrate. Including planes that are substantially parallel to the perpendicular to each other, and these planes are connected by the inclined planes.

  The image display apparatus of the present invention includes a light source, the light source includes a semiconductor light emitting element, and the semiconductor light emitting element is manufactured by the method for manufacturing a semiconductor element of the present invention, or the semiconductor of the present invention. It is an element.

  An information recording / reproducing apparatus of the present invention includes a light source, the light source includes a semiconductor light emitting element, and the semiconductor light emitting element is manufactured by the method for manufacturing a semiconductor element of the present invention, or of the present invention. It is a semiconductor element.

  The optical communication apparatus of the present invention includes a light source, the light source includes a semiconductor light emitting element, and the semiconductor light emitting element is manufactured by the method for manufacturing a semiconductor element of the present invention, or the semiconductor of the present invention. It is an element.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor wafer which can form efficiently the guide groove for exact cleaving without generation | occurrence | production of scribble waste in a semiconductor wafer can be provided.

It is a top view which shows an example of the structure of the semiconductor wafer of this invention. It is sectional drawing of the semiconductor wafer of FIG. FIG. 2 is a cross-sectional view of the semiconductor wafer of FIG. 1 viewed in another direction. It is a part of process drawing which illustrates the manufacturing method of the semiconductor wafer of this invention. It is process sectional drawing which shows the process following FIG. 4A. It is process sectional drawing which shows an example of the process following FIG. 4B. It is sectional drawing which illustrates 1 process of the manufacturing method of the semiconductor element of this invention. It is a top view which shows another example of the structure of the semiconductor wafer of this invention. It is sectional drawing of the semiconductor wafer of FIG. FIG. 9 is a plan view illustrating a step of the method for manufacturing the semiconductor wafer of FIGS. It is sectional drawing which shows 1 process in another example of the manufacturing method of the semiconductor element of this invention. It is a top view which shows 1 process in another example of the manufacturing method of the semiconductor wafer of this invention. It is a top view which shows one process in another example of the manufacturing method of the semiconductor wafer of this invention. It is a top view which shows one process in another example of the manufacturing method of the semiconductor wafer of this invention. FIG. 14 is a cross-sectional view illustrating a process following the process of FIG. 13. FIG. 15 is a cross-sectional view illustrating a step following the step of FIG. 14 as seen in a different direction from FIG. 14. It is sectional drawing which illustrates the laminated structure of the crystal layer in a semiconductor wafer or a semiconductor element. It is a top view which illustrates typically one process of the manufacturing method of the semiconductor wafer for nitride type semiconductor laser element manufacture.

  In the method for producing a semiconductor wafer of the present invention, it is preferable that the first groove is formed in a regular pattern composed of a plurality of grooves in the first groove forming step.

  In the method for manufacturing a semiconductor wafer according to the present invention, the functional semiconductor crystal layer is preferably formed of a nitride semiconductor.

  In the method for manufacturing a semiconductor wafer according to the present invention, the substrate is preferably formed of a nitride semiconductor crystal. The nitride semiconductor crystal is more preferably a group III nitride semiconductor crystal, and further preferably a GaN crystal.

  In the method for producing a semiconductor wafer of the present invention, when the substrate is a GaN substrate (the nitride semiconductor crystal layer is a GaN crystal), the main surface of the GaN substrate is a {0001} plane and a {1-100} plane Alternatively, the {11-22} plane is preferable. When the main surface of the GaN substrate is a {0001} plane, the longitudinal center line of the first groove is substantially parallel to the <11-20> direction or in the <1-100> direction. More preferably, they are substantially parallel. When the main surface of the GaN substrate is a {1-100} plane, the longitudinal center line of the first groove is substantially parallel to the <0001> direction or substantially to the <11-20> direction. More preferably, they are parallel. When the main surface of the GaN substrate is a {11-22} plane, the longitudinal center line of the first groove is substantially parallel to the <-1-123> direction, or <1-100> More preferably, it is substantially parallel to the direction.

  In the method for producing a semiconductor wafer of the present invention, the substrate is preferably formed of a group IV semiconductor crystal, and is formed of at least one crystal selected from the group consisting of Si, SiC, and SiGe. More preferably.

  In the method for producing a semiconductor wafer of the present invention, as the material for forming the substrate, for example, a zinc blende type III-V group compound semiconductor crystal or a group III-V nitride semiconductor crystal is also preferable. As the substrate, an InP substrate or a sapphire substrate is also preferable. In the present invention, “nitride semiconductor” refers to all semiconductors containing nitrogen, and includes the following “III-V nitride semiconductors” and “Group III nitride semiconductors”. The “III-V compound semiconductor” refers to all semiconductors containing a group III element and a group V element, and examples thereof include GaAs and InP. Further, since nitrogen is a group V element, the “III-V group compound semiconductor” includes the following “III-V group nitride semiconductor” and “group III nitride semiconductor”. “Group III-V nitride semiconductor” refers to all semiconductors containing Group III elements and Group V elements, such as GaAsN, and also includes the following “Group III nitride semiconductors”. “Group III nitride semiconductor” refers to all semiconductors containing Group III elements and nitrogen, and examples thereof include AlN, GaN, AlGaN, InGaN, InAlGaN, and the like.

  In the method for producing a semiconductor wafer according to the present invention, the substrate is preferably a wet etching resistant substrate. This is because the semiconductor wafer manufacturing method of the present invention can efficiently form guide grooves for accurate cleavage on a wet etching resistant substrate. Examples of the wet etching resistant substrate include a substrate formed of a group III nitride semiconductor crystal, a group III-V nitride semiconductor crystal, a SiC crystal, or a sapphire crystal.

  In the semiconductor wafer manufacturing method of the present invention, as described above, in the functional semiconductor crystal layer forming step, a semiconductor crystal is grown on a portion other than the first groove forming portion on the substrate. Hereinafter, such growth of the semiconductor crystal may be simply referred to as “selective growth”. However, the selective growth does not have to be selective growth only in a part other than the first groove forming part, and the semiconductor crystal may be somewhat grown in the groove or the like. Further, for example, the semiconductor crystal grown on the substrate in the vicinity of the groove may grow slightly extending in the lateral direction and slightly protrude above the groove.

  As described above, the semiconductor element manufacturing method of the present invention includes a semiconductor wafer manufacturing process for manufacturing the semiconductor wafer by the semiconductor wafer manufacturing method of the present invention, and the semiconductor wafer along at least the lower end of the second groove. And a dividing step of dividing in a different direction. The dividing step may include only a step of dividing the semiconductor wafer in a direction along the lower end of the second groove, and further, the semiconductor wafer may be cut along the lower end of the second groove. A step of dividing in a direction other than the direction may be included. In the semiconductor device manufacturing method of the present invention, the semiconductor device to be manufactured is a semiconductor laser, and the dividing step cleaves the wafer in a direction along the lower end of the second groove to form a resonator surface. It is preferable to include a resonator surface forming step. Further, in the method of manufacturing a semiconductor device of the present invention, the semiconductor device to be manufactured is a semiconductor laser, and the dividing step includes a laser bar manufacturing step of cleaving the wafer to obtain a laser bar, and the laser bar It is preferable to include a laser bar dividing step of dividing the second groove in a direction along the lower end of the second groove to obtain a semiconductor laser. In the present invention, “cleavage” means that a crystal is easily broken in a certain direction to form a smooth surface, that is, a cleavage surface. Further, in the present invention, “dividing” a crystal means that the crystal is broken or broken. The “cleavage” is included in the “division” of the crystal. Further, “dividing” the crystal includes dividing the crystal along a direction different from the cleavage direction. In the dividing step in the method for manufacturing a semiconductor device of the present invention, only cleavage may be performed, only division along a direction different from the cleavage direction may be performed, or both of them may be performed. The cleaved surface can be used, for example, as a resonator surface of a semiconductor laser. The cleavage plane and the cleavage direction are determined by the crystal structure. Depending on the structure of the crystal, it may not have a cleavage plane and a cleavage direction. In the present invention, the crystal preferably has at least one cleavage direction and can be cleaved. Further, when the crystal is cleaved for the purpose of forming the cavity surface of the semiconductor laser, the crystal needs to have a cleavage direction. Further, in the present invention, dividing a semiconductor wafer includes dividing a manufacturing intermediate when a semiconductor element is manufactured from the semiconductor wafer. Examples of the production intermediate include a laser bar obtained by dividing a semiconductor wafer.

The semiconductor wafer of the present invention is as described above.
Including a crystal laminate,
The crystal laminate includes a substrate formed from a wet etching resistant crystal, and a functional semiconductor crystal layer formed thereon,
A groove extending from the upper surface of the functional semiconductor crystal layer to the inside of the substrate is formed, and at least a lower part of the groove has a shape in which the groove width decreases toward the bottom. In the semiconductor wafer of the present invention, at least the lower part of the groove has a shape in which the groove width becomes smaller toward the bottom, so that it can be easily divided in the direction along the lower end of the groove, for example, a cleavage surface of a semiconductor element, The element length is difficult to vary. The wet etching resistant semiconductor crystal is preferably a nitride semiconductor crystal, a SiC crystal, or a sapphire crystal. The nitride semiconductor crystal is preferably a group III nitride semiconductor crystal or a group III-V nitride semiconductor crystal, and particularly preferably a GaN crystal.

  In the present invention, the “shape in which the groove width decreases toward the bottom” is particularly preferably a shape in which the width of the groove lower end is zero or close to zero. Specifically, for example, a so-called “V-shaped” or “V-shaped” shape is used. Alternatively, the “shape in which the groove width decreases toward the bottom” may be a shape close to an inverted trapezoidal shape, U shape, or the like, with the lower end of the groove having a certain width. However, it is preferable that the width of the lower end of the groove is as small as possible from the viewpoint of accurate cleavage. The width of the lower end of the groove is, for example, 10 μm or less, preferably 5 μm or less, more preferably 1 μm or less. Particularly preferably, as described above, the width of the lower end of the groove is zero or close to zero. Further, the “shape in which the groove width decreases toward the bottom” may be bilaterally symmetric, or may have a bilaterally asymmetric shape in which the slopes of the left and right surfaces are different.

  In the present invention, when there is a component called X and a component called Y, the positional relationship between X and Y is as follows. First, “Y on one side of X” may be in a state in which Y is in direct contact with one side of X unless otherwise specified, and other components or the like may exist between one side of X and Y. It may be in a state where one side of X and Y are not in direct contact. The same applies to “Y on both sides of X”. “Y on one side of X” indicates a state where Y is in direct contact with one side of X. The same applies to “Y on both sides of X”. “Y on X” may be in a state where Y is in direct contact with the upper surface of X, unless otherwise specified, and other components exist between the upper surface of X and Y. The upper surface and Y may not be in direct contact. Similarly, “Y under X” may be in a state where Y is in direct contact with the lower surface of X unless otherwise specified, and there are other components or the like between the lower surface of X and Y. The lower surface of X and Y may not be in direct contact. Further, “Y on the upper surface of X” indicates a state where Y is in direct contact with the upper surface of X. Similarly, “Y on the lower surface of X” indicates a state where Y is in direct contact with the lower surface of X.

The semiconductor wafer of the present invention is
A semiconductor wafer for manufacturing a semiconductor light emitting device,
The functional semiconductor crystal layer includes an active layer stripe,
It is preferable that the groove is formed in a part of the portion other than the active layer stripe and is substantially parallel to the cleavage plane of the substrate. If the groove is substantially parallel to the cleavage plane of the substrate, the semiconductor wafer of the present invention can be easily divided in a direction along the lower end of the groove. The groove may be substantially perpendicular or substantially parallel to the longitudinal direction of the active layer stripe, or may be inclined with respect to the longitudinal direction of the active layer stripe. For example, if the groove is substantially parallel to the cleavage plane of the substrate and is substantially perpendicular or inclined with respect to the longitudinal direction of the active layer stripe, the light is emitted from the surface cleaved along the groove. It is easy to obtain an orderly light emitting end face as an end face. In this case, for example, the element lengths of the semiconductor light emitting elements are unlikely to vary. The light emitting end face may be substantially perpendicular to the longitudinal direction of the active layer stripe, or may be inclined from a direction perpendicular to the longitudinal direction of the active layer stripe.

  In the semiconductor wafer of the present invention, the groove width in the groove is reduced toward the bottom from the viewpoint of easiness of cleaving or dividing at the time of manufacturing a semiconductor element, a groove width with respect to a required groove depth, and a request for area reduction. It is preferable that the surface of the portion to be inclined is 5 to 45 ° with respect to the normal of the substrate main surface. From the viewpoint of making the width and area of the groove as small as possible, it is preferable to make the inclination angle as small as possible. However, it is preferable that the groove is sufficiently deep and the width of the lower end of the groove is sufficiently small from the viewpoint of easiness of cleavage or division during semiconductor element manufacture. From the viewpoint of easily forming such a groove, the inclination angle is preferably within the above range. For example, when the semiconductor wafer of the present invention is manufactured by the method of manufacturing a semiconductor wafer of the present invention, the angle can be adjusted according to the growth conditions in the functional semiconductor crystal layer forming step. As an example, a main surface of the substrate is a {0001} plane, a {1-101} plane is developed in the functional semiconductor crystal layer forming step, and the {1} is formed by dry etching in the second groove forming step. The −101} surface can be transferred to the substrate to form the inclined surface. In this case, the surface of the portion where the groove width decreases toward the bottom (that is, the inclined surface, {1-101} surface) is inclined by about 28 ° with respect to the normal of the substrate main surface ({0001} surface). ing.

  In the semiconductor wafer of the present invention, it is preferable that the upper portion of the groove has a surface parallel to the normal of the substrate.

  In the semiconductor wafer of the present invention, the functional semiconductor crystal layer is preferably formed of a nitride semiconductor crystal.

  In the semiconductor wafer of the present invention, the substrate is preferably formed of a group III nitride semiconductor crystal, and more preferably the substrate is a GaN substrate. The main surface of the GaN substrate is preferably a {0001} plane or a {11-22} plane. When the GaN substrate main surface is a {0001} plane, the surface of the portion where the groove width decreases toward the bottom is, for example, the {1-101} plane. When the GaN substrate main surface is a {11-22} plane, the surface of the portion where the groove width decreases toward the bottom is, for example, a {1-100} plane, a {0001} plane, or a {1-10n} plane is there.

  As described above, the semiconductor element of the present invention includes a crystal stack, and the crystal stack includes a substrate formed from a wet etching resistant crystal, and a functional semiconductor crystal layer formed thereon, In at least one side surface of the crystal stack, the upper portion of the substrate includes a surface that is inclined with respect to a normal to the main surface of the substrate, and the lower portion of the substrate and the functional semiconductor crystal layer are formed on the main surface of the substrate. It is characterized by including planes substantially parallel to the perpendicular line, and these planes are connected by the inclined planes. For example, when manufacturing the semiconductor element of the present invention by dividing the semiconductor wafer of the present invention at least in the direction along the lower end of the groove, the surface of the portion where the groove width of the groove decreases toward the bottom, It becomes the said inclined surface. That is, the semiconductor element of the present invention has an advantage that it is easy to manufacture by including the inclined surface. However, the manufacturing method of the semiconductor element of the present invention is not limited, and any manufacturing method may be used.

The semiconductor element of the present invention is
A semiconductor light emitting device,
The functional semiconductor crystal layer includes an active layer stripe,
At least one of the side surfaces of the functional semiconductor crystal layer is a cleavage plane including a cross section of the active layer stripe, and the cleavage plane includes a light emission region at least in part,
It is preferable that the inclined surface is formed outside the light emitting region.

The semiconductor element of the present invention is
A semiconductor laser,
The active layer stripe is a laser stripe;
At least one of the side surfaces of the crystal laminate includes a resonator surface including the cleavage plane,
More preferably, the inclined surface is included in a region other than the resonator surface on the side surface of the semiconductor crystal laminate. In this case, the substrate is a GaN substrate, the main surface of the GaN substrate is a {0001} plane, and the resonator surface on the side surface of the GaN substrate is a {1-100} plane. Further preferred.

  In the semiconductor element of the present invention, the inclined surface is preferably inclined by 5 to 45 ° with respect to the normal of the substrate.

  The semiconductor element of the present invention is, for example, a semiconductor wafer manufactured by the semiconductor wafer manufacturing method of the present invention, or the semiconductor wafer of the present invention at least in the direction along the lower end of the groove (second groove). It can be manufactured by dividing. The division may include only division in a direction along the lower end of the groove (second groove), and may be performed in a direction other than the direction along the lower end of the groove (second groove). Division may be included. The division may be, for example, division along the cleavage direction of the crystal (that is, cleavage), division along a direction different from the cleavage direction of the crystal, or both. In the division, for example, the substrate may be divided in a direction substantially parallel to the normal of the substrate, or may be divided in a direction inclined from the normal of the substrate. The substrate used in the semiconductor element of the present invention, the semiconductor wafer of the present invention, the method of manufacturing the semiconductor element of the present invention, or the method of manufacturing the semiconductor wafer of the present invention may be a semiconductor substrate as described above, for example. A non-semiconductor substrate (for example, the sapphire substrate) may be used.

  The semiconductor wafer of the present invention may be manufactured by any method, but is preferably manufactured by the manufacturing method of the present invention. The semiconductor element of the present invention may be manufactured by any manufacturing method, but is preferably manufactured by the manufacturing method of the present invention. The semiconductor wafer or the semiconductor element manufactured by the manufacturing method of the present invention can be efficiently manufactured, for example, and has an advantage that there is no scribble scraps derived from the substrate scribing. The manufacturing method of the present invention can be used for manufacturing any semiconductor wafer or semiconductor element, but is preferably used for manufacturing the semiconductor element or semiconductor wafer of the present invention.

  The present invention may be applied to any kind of semiconductor element, semiconductor element wafer, or manufacturing method thereof, and is not particularly limited. The present invention is preferably applied to a semiconductor light emitting device, a semiconductor wafer for manufacturing a semiconductor light emitting device, or a manufacturing method thereof, and the semiconductor light emitting device is particularly preferably a semiconductor laser. In the following, a semiconductor laser, a semiconductor wafer for manufacturing a semiconductor laser, and a manufacturing method thereof will be mainly described.

  In the present invention, for example, in the manufacture of a nitride semiconductor laser, it is possible to provide a manufacturing method capable of forming a highly flat resonator surface and forming an accurate resonator length with a high yield.

  The nitride semiconductor laser according to the present invention has, for example, a GaN substrate, a nitride semiconductor layer stacked on the substrate, a laser stripe, and a depth that reaches at least the substrate, and the cross-sectional shape of the bottom is substantially V-shaped. A V-groove is provided. For example, at least one of the surfaces constituting the V-groove is a surface close to the low index surface of the substrate, and the center line of the V-groove is substantially parallel to the resonator surface. The semiconductor element of the present invention is preferably a nitride semiconductor element, more preferably a group III nitride semiconductor element, but is not limited thereto.

  In general, since an edge-emitting semiconductor laser uses a cleavage plane as a resonator surface, it is important to stabilize the element characteristics to produce a cleavage plane with high flatness. Moreover, in order to realize the performance as designed, it is necessary to cleave at an accurate position in accordance with the element pattern formed on the wafer in each process step. Therefore, in order to reduce the cost of the semiconductor laser, it is necessary to control the cleavage process so that a reflective surface with high yield and high flatness can be obtained and the element is divided at an accurate position. In the present invention, for example, even in the production of a semiconductor laser using a nitride material substrate having high corrosion resistance (wet etching resistance) by the above-described configuration and method, a V-shaped cleavage guide groove is formed on the substrate. Can be formed. For this reason, according to the present invention, for example, it is also possible to provide a manufacturing method in which an element having a highly flat resonator surface and an accurate resonator length is formed with a high yield.

  Hereinafter, embodiments of the present invention will be described. However, the following embodiment is an illustration and does not limit the present invention. Since the drawings described below are schematic diagrams, the dimensional ratios and the like of each part are exaggerated as appropriate for the sake of clarity, and may differ from the actual dimensional ratios. In addition, illustration, description, and the like of the detailed structure may be omitted as appropriate for simplification and clarification. In particular, in the cross-sectional view, the illustration of the structure other than the cross-sectional portion (the structure at the back of the cross-section) is omitted for simplification and clarification.

(Embodiment 1)
FIG. 1 is a plan view showing the semiconductor wafer according to the present embodiment. This semiconductor wafer can be divided to produce a nitride semiconductor laser. 2 and 3 are cross-sectional views taken along the II and II-II directions in FIG. 1, respectively. In the present embodiment, a ridge stripe type semiconductor laser is exemplified.

  This semiconductor laser manufacturing semiconductor wafer includes, in the planar structure shown in FIG. 1, a laser stripe 101 that functions as a laser active region, and a guide groove 102 that is used when the element is cleaved. The laser stripes 101 are periodically aligned at equal intervals. The guide groove 102 has a rectangular shape, is periodically provided in a part of the portion other than the portion where the laser stripe 101 is formed, and is substantially perpendicular to the laser stripe 101. The inside of the frame line 110 in the drawing is a semiconductor laser forming region, and shows that a semiconductor laser can be obtained by dividing this semiconductor wafer vertically and horizontally along the frame line 110. The frame line 110 has a rectangular shape as shown in the figure, and the vertical side is along the longitudinal center line of the guide groove (second groove) 102, and the vertical side is each guide groove ( The second groove) 102 passes through substantially the center of the guide groove (second groove) 102 so as to be orthogonal to the longitudinal direction.

  In addition, the semiconductor laser includes an n-type GaN substrate 103 having a c-plane ((0001) plane) as a main surface in the cross-sectional structure shown in FIG. 2 and a nitride semiconductor provided on the upper surface of the substrate 103 by crystal growth. A laser functional layer 104 (functional semiconductor crystal layer). The laser functional layer 104 includes a first cladding layer made of n-type AlGaN, a GaN lower optical waveguide layer, an InGaN quantum well active layer, a GaN upper optical waveguide layer, and an InGaN upper optical layer provided in this order on the first cladding layer. And a second cladding layer made of p-type AlGaN provided on the waveguide layer. The InGaN quantum well active layer includes two periods of quantum wells, and each quantum well is composed of an InGaN quantum well layer having an indium composition of 9% and a thickness of 3 nm and an InGaN barrier layer sandwiching the InGaN quantum well layer.

  As shown in FIG. 3, the second cladding layer and the p-type GaN contact layer provided thereon are processed into a ridge stripe shape, and this ridge stripe functions as a current confinement portion. The ridge stripe also functions as a horizontal refractive index waveguide mechanism. The width of the ridge stripe is 2 μm, for example. A p-type electrode 121 is provided on the contact layer, and an n-type electrode 120 is provided on the lower portion of the GaN substrate. Further, the surface of the element is covered with an insulating film except for a portion where a ridge stripe or an electrode is provided.

  In this structure, the lower part (bottom part) of the guide groove reaches a depth of 3 μm or more from the surface of the GaN substrate, and the cross-sectional shape of the lower part (bottom part) of the guide groove in FIG. An oblique surface (surface inclined with respect to the normal of the substrate) 105 constituting the shape is a surface close to the {1-101} plane. In this structure, since the guide groove has a V-shaped cross-section, it can be cleaved (divided) accurately and easily at the groove position without causing defects and cracks, and is flat. A highly efficient resonator surface is obtained, and cleavage at the designed position is possible.

  Next, a method for manufacturing a semiconductor wafer and a method for manufacturing a semiconductor laser according to this embodiment will be described with reference to FIGS. FIG. 4A is a plan view schematically showing one process of the manufacturing method, and FIGS. 4B to 4E are process cross-sectional views as seen in the II direction of FIG.

(Process 1)
First, a dielectric film such as a silicon oxide film is formed on the n-type GaN substrate 103 using a CVD method or the like, and a dielectric film mask is formed in a pattern using a normal photolithography process. As shown in FIG. 4A, the opening 402 of the dielectric film mask pattern is provided along the end face cleavage planned line 403 in a broken line shape so as to avoid the laser stripe formation region 401. Here, the cleavage lines 403 are parallel to the <11-20> direction of the substrate 103, and the laser stripes are provided at intervals of 200 μm in parallel to the <1-100> direction perpendicular thereto. Therefore, a mask pattern is also provided every 200 μm. On the other hand, since the laser resonator length is 650 μm, for example, a mask pattern is provided every 650 μm in the stripe direction. Each mask pattern has, for example, a width of 4 μm, a length of 100 μm, and a long strip shape extending in a direction parallel to the planned cleavage line. Thereafter, etching is performed to a depth of about 3 μm, for example, by dry etching using a chlorine-based gas, and then the mask pattern is removed. As a result, as shown in FIG. 4B, a substrate having a concave portion (the “first groove”) 404 having a substantially rectangular cross section on the planned cleavage line (the “first groove forming step”) can be obtained.

(Process 2)
Next, the first clad layer, the optical waveguide layer, the InGaN quantum well active layer, the optical waveguide layer, the second clad layer, and the contact layer are formed on the pattern substrate by using a metal organic chemical vapor deposition method (MOVPE method) or the like. Are sequentially laminated to produce a laser functional layer (functional semiconductor crystal layer) structure necessary for a semiconductor laser. The total growth layer thickness is about 3 μm in total, for example. The semiconductor crystal forming the functional semiconductor crystal layer is grown (selectively grown) on a portion other than the first groove forming portion on the substrate. At this time, as shown in FIG. 4C, on both sides of the recess (first groove), the growth layer (functional semiconductor crystal layer) 104 is divided with the recess (first groove) as a boundary. . In the growth layer (functional semiconductor crystal layer) 104, diagonal facets composed of {1-101} planes appear at both ends of the concave portion (first groove). On the other hand, in the inside of the recess (first groove), the groove of the recess (first groove) is gradually narrowed because it grows in a horizontal {0001} plane and a vertical {1-100} plane, It becomes shallower. However, the growth rate is slower than the outside of the recess (first groove) because the raw material supply is relatively small. In the present embodiment, by appropriately selecting the shape of the recess (first groove) and the growth conditions, an oblique facet is formed on the upper surface of the substrate 103 while the recess (first groove) is substantially buried. Thus, a groove having a substantially V shape on the planned cleavage line is formed by selective growth (the aforementioned “functional semiconductor crystal layer forming step”).

(Process 3)
Next, as shown in FIG. 4 (d), the upper surface of the semiconductor layer (functional semiconductor crystal layer) 104 is formed on the upper surface of the recess (first groove) by using a normal photolithography process. The etching mask 105 is formed so that a slightly wider area is exposed. The pattern of the mask opening is, for example, 14 μm wide and 110 μm long by adding a 10 μm margin to the pattern size used in step 1.

(Process 4)
Thereafter, etching is performed to a depth of about 4 μm from the upper surface of the GaN substrate 103 by, for example, dry etching using a chlorine-based gas (the “second groove forming step”). In dry etching, the verticality of etching is high and the selectivity for each layer is also small. Therefore, the V-shaped cross-sectional shape formed in Step 2 is transferred to the GaN substrate 103, and the bottom has a substantially V-shaped cross-sectional shape. A guide groove (second groove) is formed. In this way, a semiconductor wafer can be manufactured. As shown in FIG. 4E, the guide groove (second groove) 102 has a depth reaching the inside of the substrate on the planned cleavage line of the semiconductor wafer, and has a substantially V-shaped cross-sectional shape at the bottom. It is formed to have. It is desirable that the etching depth be selected so that it can be easily cleaved by the cleaving step and that no cleaving occurs during the process steps performed so far. Further, as shown in FIG. 4E, it is preferable to remove the mask 105 after the etching.

  The semiconductor wafer manufactured as described above preferably further forms a laser stripe (active layer stripe). That is, as shown in FIGS. 5A and 5B, a laser stripe (active layer stripe) structure is produced in the same manner as a normal semiconductor laser element. Note that FIG. 5 corresponds to a cross-sectional view seen in the III-III direction of FIG.

(Process 5)
First, a stripe-shaped etching mask having a width of about 2 microns is formed on a laser stripe (active layer stripe) formation region using a normal photolithography process. Next, etching is performed halfway through the p-type AlGaN cladding layer, for example, by dry etching using a chlorine-based gas. As a result, as shown in FIG. 5A, a ridge stripe (laser stripe or active layer stripe) 101 having a width of about 2 μm is formed. The value of the ridge width and the etching depth of the p-type AlGaN cladding layer are not particularly limited, but they are required because they affect the current-light output characteristics and current-voltage characteristics including the horizontal transverse mode characteristics of the laser device. It is preferable to select an optimum value in consideration of device characteristics and the like.

(Step 6)
Next, it is preferable to further form an electrode on the semiconductor wafer. That is, an insulating film such as a silicon oxide film is formed on the entire upper surface of the semiconductor wafer by using a CVD method or the like. Further, the insulating film in the p-type electrode formation portion (ridge stripe 101 and its upper surface) is removed using a normal photolithography process. Thereafter, nickel and gold are vapor-deposited and heated under appropriate conditions to perform an alloy process, thereby forming a p-type electrode 121 as shown in FIG. Furthermore, the substrate is thinned to a thickness of about 120 μm by polishing the back surface of the substrate 103. Then, titanium and gold are vapor-deposited on the lower surface of the substrate 103 and heated under appropriate conditions to perform an alloy process, thereby forming an n-type electrode 120 as shown in FIG.

(Step 7)
Furthermore, the semiconductor wafer manufactured by the method for manufacturing a semiconductor wafer of the present invention is divided vertically and horizontally to manufacture a semiconductor laser (the “dividing step”). That is, as shown in FIG. 6, the blade 106 is pressed against the lower surface of the GaN substrate 103 at a position substantially corresponding to the lower end of the guide groove (second groove) 102 formed in the step 3, and a load is applied. As a result, the GaN substrate 103 is cleaved (divided) along the center line of the bottom (lower end) of the guide groove (second groove) 102, and a laser mirror end face (resonator face) is formed in the stripe formation region. A bar is obtained. In this embodiment, since the guide groove (second groove) having a V-shaped cross section is formed in parallel with the cleavage line, the cleavage can be performed with a small force and at an accurate position. According to the method for manufacturing a semiconductor wafer and the method for manufacturing a semiconductor element of the present invention, a scribing process is not required and an extra force is not applied, so that a laser resonator surface with high flatness can be obtained. Further, after forming the resonator surface, each element is cut out (divided) from the laser bar, whereby a semiconductor laser element can be obtained.

  In steps 1 to 7 of the present embodiment, an example in which a guide groove (second groove) is formed first and then a laser stripe is formed is shown. However, in the present invention, the order of these steps may be reversed and may be appropriately determined in consideration of the mutual interference of the processes. In the above-described steps 1 to 7, the example in which the guide grooves (second grooves) are arranged at all locations between the laser stripes has been shown. You can reduce it. In the steps 1 to 7, the guide groove has a width of 14 μm and a length of 110 μm. However, the present invention is not limited to this, and the guide groove may be appropriately determined in consideration of the arrangement of the semiconductor laser element pattern. good. Note that the length of the guide groove (second groove) is preferably a certain length or more in order to improve the cleavage, but if the distance from the side of the laser stripe is too short, selective growth will occur. May affect structure. Therefore, it is desirable to set the distance between the laser stripe and the guide groove (second groove) and the length of the guide groove (second groove) to such an extent that the influence is not exerted. .

  On the other hand, for the width of the guide groove (second groove), the depth of the groove to be produced, the crystal growth layer thickness of the entire laser functional layer (functional semiconductor crystal layer), and the pattern size required for the semiconductor laser element are taken into consideration. It is desirable to decide. In Steps 1 to 7, the total crystal growth layer thickness of the laser functional layer (functional semiconductor crystal layer) was about 3 μm. Therefore, an example in which, for example, 3 μm and 4 μm are selected as the etching depth and width in the substrate recess (first groove) processing step (the “first groove forming step”) is shown. This corresponds to the total crystal growth layer thickness, and the depth of the first groove so that an appropriate V shape can be formed after crystal growth in the step 2 (the “functional semiconductor crystal layer formation step”).・ This is because the width was selected. However, the shape of the functional semiconductor crystal layer after crystal growth is influenced not only by the total thickness of the growth layer, but also by the formation direction of the guide groove (second groove), the crystal growth conditions, the material and composition of the growth layer, and the like. The For this reason, the depth and width of the first groove are not limited to the above values, and it is desirable to appropriately select the ideal groove shape as much as possible. The ideal V-groove shape is, for example, a V-shape with a sharp bottom surface. More specifically, for example, the inside of the substrate recess (first groove) is substantially filled during growth, and the growth of the growth layers on both sides of the recess (first groove) proceeds too much, so that the V-groove depth becomes shallow. It is desirable not to pass too much. As a guideline for maintaining the separation groove with the concave portion (first groove) as a boundary, for example, it is desirable to make the width wider than the depth of the concave portion (first groove) of the substrate. Moreover, it is desirable that the depth of the recess (first groove) is not too shallow with respect to the total growth thickness of the functional semiconductor crystal layer.

  Further, the shape of the periphery of the recess (first groove) after the crystal growth in the step 2 (functional semiconductor crystal layer forming step) is in accordance with various crystal growth conditions such as substrate temperature, growth rate, growth pressure, and growth rate. It depends heavily. Therefore, it is desirable to appropriately select the conditions under which sufficient crystal quality can be obtained and oblique facets are easily formed in consideration of the plane orientation / properties of the substrate, the design thickness, and the like. Further, the groove side surface formed by the step 2 (functional semiconductor crystal layer forming step) and the step 4 (second groove forming step) is described as the {1-101} plane in the above description. . However, the {1-101} plane is merely an example of a plane that is easily formed. For example, a plane having a different inclination angle can be obtained by appropriately selecting the shape of the first groove and the conditions for the selective growth. It is also possible to form The same applies to the following embodiments.

  Moreover, in the said process 1-7, although the example using dry etching was selected as a board | substrate recessed part processing method in the process 1, methods, such as wet etching, may be used. However, dry etching is preferably used from the viewpoints of shape controllability and crystal growth shape control in step 2 (functional semiconductor crystal layer forming step).

  In the above description, some specific plane index expressions are used to represent the planes forming the V-shaped grooves. However, in the present invention, the completeness of the crystal plane is not a big problem, and the cross-sectional shape is almost the same. It is important that the shape is V-shaped or close to it. Therefore, the facets of the oblique surface and the vertical surface may not be a complete crystal surface.

  In the semiconductor wafer manufacturing method of the present invention or the semiconductor wafer of the present invention, the shape of the groove (or the second groove) reaching from the upper surface of the functional semiconductor crystal layer to the inside of the substrate is not particularly limited. For example, the groove (or the second groove) may have a strip shape, a rectangular shape, or the like, and the vertical / horizontal dimension ratio is not particularly limited. From the viewpoint of easy cleavage along the groove (or the second groove), it is preferable that the width of the lower end of the groove (or the second groove) is as small as possible. Further, the groove (or the second groove) may be continuous or intermittent. For example, the groove having a strip shape, a rectangular shape, or the like may be a single continuous groove like the groove 101 in FIG. In addition, for example, the groove may be an aggregate of a plurality of holes in which a plurality of holes are intermittently formed in a dot shape or a broken line shape, for example, the aggregate is a strip shape or a rectangular shape. Or the like. In the method for manufacturing a semiconductor wafer according to the present invention, the shape of the first groove is not particularly limited except for that. For example, the first groove may have a rectangular shape, a belt shape, an elongated elliptical shape, or a shape close thereto. From the viewpoint of reducing the width of the lower end of the second groove as much as possible, the width of the first groove is preferably as narrow as possible. However, as described above, it is not preferable that the groove is filled with the semiconductor crystal during the selective growth, so that the growth layers (functional semiconductor crystal layers) on both sides advance too much. From this viewpoint, it is preferable not to make the width of the first groove too narrow. The first groove may have a band shape alone, or an assembly of a plurality of dielectric films intermittently formed in a dot shape, a broken line shape, or the like is rectangular, It may be formed in a shape such as a band shape or an elongated elliptical shape.

  In the above description, an example of a nitride semiconductor laser is used, but the present invention can naturally be applied to other general material systems such as GaAs and InP. For example, according to the present invention, it is possible to form a groove having a narrow width and a V-shaped lower end, so that it can be applied to a thick film substrate that is difficult to cleave. However, it is particularly significant to apply the present invention to a nitride semiconductor laser in which it is difficult to form a V-shaped groove by wet etching.

(Embodiment 2)
Next, Embodiment 2 of the present invention will be described with reference to FIGS. FIG. 7 is a plan view showing a semiconductor wafer for manufacturing a nitride semiconductor laser according to Embodiment 2 of the present invention. FIG. 8 is a cross-sectional view seen in the IV-IV direction of FIG. In the present embodiment, the difference from the first embodiment is that the V-shaped guide groove is used for division in the step of dividing the individual elements from the laser bar, not at the time of forming the resonator surface. is there. That is, as shown in FIGS. 7 and 8, the guide groove (second groove) 212 has a rectangular shape, and is formed in the gap between the active layer stripes 201 substantially in parallel with the active layer stripes 201. The inside of the frame line 210 in the figure is a semiconductor laser forming region, and it is shown that a semiconductor laser can be obtained by dividing this semiconductor wafer vertically and horizontally along the frame line 210. The frame line 210 has a rectangular shape as shown in the figure, the side in the horizontal direction is along the center line in the longitudinal direction of the guide groove (second groove) 212, and the side in the vertical direction is the adjacent guide. It passes through approximately the midpoint of the groove (second groove) 212. In FIG. 8, 203 is a GaN substrate, 204 is a laser functional layer (functional semiconductor crystal layer), 201 is a laser stripe, and 220 and 221 are electrodes. The positional relationship of each component is the same as that of the first embodiment (FIGS. 1 and 3) except for the direction of the guide groove (second groove) 212.

  Next, the manufacturing method of this embodiment is demonstrated with reference to FIG. 9, FIG. FIG. 9 is a plan view schematically showing one step of the manufacturing method. 10 is a cross-sectional view seen in the same direction as FIG. The details of the manufacturing method are almost the same as those in the first embodiment.

(Process 1)
First, as shown in FIG. 9, by using a normal photolithography process and dry etching on an n-type GaN substrate, a recess (first groove) is formed on an element dividing line parallel to the laser stripe formation scheduled region 901. A dielectric mask pattern is formed. For example, as shown in FIG. 9, the pattern is arranged in a dielectric having an opening 902 for forming a rectangular recess (first groove) substantially parallel to the active layer stripe 201 in the gap between the active layer stripes 201. The masks are arranged so that the openings 902 are arranged in columns at regular intervals. When the laser resonator surface is formed by cleavage, it is desirable that there is no step on the cleavage line from the viewpoint of maintaining the straightness of cleavage and the flatness of the cleavage surface. Therefore, it is desirable to form the pattern of the opening 902 while avoiding the planned cleavage line 903. The pattern of each opening 902 is, for example, 4 μm wide and about 50 μm long from the planned cleavage line. For example, when the resonator length is 650 μm, the length of the opening 902 is 550 μm. The etching depth and the like are the same as those in the first embodiment.

  Thereafter, the same processes as the processes 2 to 7 of the first embodiment are performed. Other than that the oblique facet plane formed in the step 2 (functional semiconductor crystal layer forming step) is not the {1-101} plane but the {11-22} plane, and the pattern shape / arrangement of the guide grooves 212 is different. Is the same as in the first embodiment. Thus, a semiconductor wafer can be manufactured by the semiconductor wafer manufacturing method of the present invention.

(Process 8)
Further, a resonator surface is formed by cleavage using a general method to form a laser bar. Then, as shown in FIG. 10, a blade (blade) 206 is pressed against the back surface of the substrate 203 at a position substantially corresponding to the lowermost part of the guide groove (second groove) formed in step 3 of the laser bar. As a result, the GaN substrate 203 is divided along the guide groove (second groove) 202, and the laser bar is divided into chips to form a semiconductor laser element.

  When a semiconductor wafer is divided (element division) in a direction parallel to the active layer stripe (laser stripe), the planned division plane may be different from the cleavage plane (fracture plane) of the substrate crystal. Specifically, for example, as in the present embodiment, the cleavage plane of the substrate crystal is perpendicular to the laser stripe (that is, the direction along the resonator plane). In such a case, if a V-shaped guide groove (second groove) is formed along the element division planned surface as in this embodiment, the blade is pushed even if the division surface is different from the cleavage plane. When hitting, it is easy to split with a smaller force, and the split surface is not easily disturbed. In addition, according to the present invention, it is more effective because a groove deeper than scribe can be formed by dry etching the substrate. In addition, according to the present invention, no scribing is required, so there is no problem such as generation of scribble scraps.

  In the above description, the example in which the guide groove (second groove) is formed only in the element dividing line (direction parallel to the laser stripe) has been described. Further, as in the first embodiment, the guide groove (second groove) is perpendicular to the laser stripe. A guide groove (second groove) may be used in combination. Specifically, for example, as shown in FIG. 11, a guide groove (second groove) 302 along a planned division line 313 in a direction perpendicular to the laser stripe 301 and a planned division line in a direction parallel to the laser stripe 301. Both guide grooves (second grooves) 312 along 314 are provided. In this case, the method for manufacturing a semiconductor wafer and the method for manufacturing a semiconductor element according to the present invention include, for example, a pattern arrangement at the time of substrate processing (first groove forming step) in the first and second embodiments. What is necessary is just to change into the form which combined 1 and Embodiment 2. FIG.

(Embodiment 3)
Next, still another embodiment of the present invention will be described. In this embodiment, the difference from the first and second embodiments is not a c-plane GaN substrate (a substrate whose principal surface is a c-plane) but an m-plane ((1-100) plane) substrate (a principal surface is an m-plane). Is a substrate). When an m-plane substrate is used, the internal electric field that is characteristic of nitride crystals is not applied to the quantum well, so that the light emission efficiency of the semiconductor laser can be improved and the gain (ratio of laser light amplification) can be improved. . The effect of the internal electric field increases with increasing lattice strain, and the influence thereof becomes significant. This is particularly advantageous when an InGaN quantum well having a large indium composition or a large layer thickness is used for the active layer. The present embodiment is particularly suitable for a green wavelength band laser that is difficult to realize on a c-plane substrate, for example. This is because if the m-plane substrate is used, the influence of the piezoelectric field can be reduced, and the laser beam can be easily elongated.

  FIG. 12 is a plan view showing an example of the structure of a semiconductor wafer for manufacturing a semiconductor laser in the present embodiment. As shown in the figure, this semiconductor wafer differs from the lasers on the c-plane substrate of the first and second embodiments in the plane orientation and the direction of the laser stripe 401. In addition, the semiconductor wafer has a cleavage guide groove (second groove) 402 along a division line 413 in a direction perpendicular to the laser stripe 401 and a division line 414 in a direction parallel to the laser stripe 401. Both element dividing guide grooves (second grooves) 412 are provided. Only one of the cleavage guide groove (second groove) 402 and the element dividing guide groove (second groove) 412 may be provided, but it is preferable to provide both as shown in FIG. . In particular, in this embodiment, since the element dividing surface is different from the cleavage plane of the substrate crystal as in the second embodiment, an element dividing guide groove (second groove) 412 is provided for the same reason as in the second embodiment. It is preferable.

  On the m-plane substrate, either the <0001> direction or the <11-20> direction can be selected as the laser stripe direction. In the present invention, any laser stripe direction may be selected, but in a normally used active layer structure, a <0001> direction stripe is preferable because a high active layer gain is obtained. When the laser stripe direction is the <0001> direction, in the step 2 (functional semiconductor crystal layer forming step), an oblique to the cleavage guide groove (second groove) 402 formed in the step 2 of the first embodiment. The facet plane is the {11-22} plane. On the other hand, an oblique facet surface with respect to the element dividing guide groove (second groove) 412 is a {1-100} plane.

(Embodiment 4)
Next, still another embodiment of the present invention will be described. In the present embodiment, the difference from the first and second embodiments is not a c-plane GaN substrate (a GaN substrate whose main surface is a c-plane) but a (11-22) plane GaN substrate (a main surface is (11-22). GaN substrate). When the (11-22) plane substrate is used, the internal electric field perpendicular to the quantum well can be reduced, as in the case of the m-plane substrate, so that the light emission efficiency of the semiconductor laser can be improved and the gain can be improved. . The internal electric field increases with the increase in lattice strain and increases the piezo electric field, so that the effect becomes remarkable. Therefore, it is advantageous when an InGaN quantum well having a large indium composition or a large layer thickness is used for the active layer. Further, it is known that an InGaN crystal having a high indium composition is relatively easy to produce on a (11-22) plane substrate, which is advantageous for realizing a green semiconductor laser that is difficult on a c-plane.

  FIG. 13 is a plan view showing an example of the structure of a semiconductor wafer for manufacturing a semiconductor laser in the present embodiment. As shown in the figure, this semiconductor wafer differs from the lasers on the c-plane substrate of the first and second embodiments in the plane orientation and the direction of the laser stripe 501. In addition, the semiconductor wafer has a cleavage guide groove (second groove) 502 along a planned division line 513 in a direction perpendicular to the laser stripe 501 and a planned division line 514 in a direction parallel to the laser stripe 501. Both element dividing guide grooves (second grooves) 412 are provided. Only one of the cleavage guide groove (second groove) 502 and the element dividing guide groove (second groove) 512 may be provided, but it is preferable to provide both as shown in FIG. . In particular, in the present embodiment, the element dividing surface is different from the cleavage plane of the substrate crystal as in the second and third embodiments. Therefore, for the same reason as in the second and third embodiments, the element dividing guide groove (second groove) is used. ) 512 is preferably provided.

  On the (11-22) plane substrate, either the <1-100> direction or the <-1-123> direction can be selected as the stripe direction (longitudinal direction of the laser stripe). In the present invention, any stripe direction may be selected. However, in a normally used active layer structure, selecting a stripe in the <1-100> direction means that the {1-100} plane that can be cleaved is the resonator plane. Since it can be used as, it is desirable. In this case, the oblique facet surface formed in the functional semiconductor crystal layer forming step (corresponding to step 2 of the first embodiment) has, for example, an asymmetric shape as shown in FIG. 11-20} plane. 14A is a view corresponding to step 3 (after the formation of the etching mask) in the first embodiment, and FIG. 14B is a view corresponding to step 4 (after the “second groove forming step”). FIG. Both figures are viewed in a direction perpendicular to the longitudinal direction of a groove (first groove) 512 formed by selective growth of the functional semiconductor crystal layer 504 or a guide groove (second groove) 512 formed by dry etching. FIG. 5 is an enlarged cross-sectional view showing a groove portion. As illustrated, when the first groove and the second groove (guide groove) are formed in the present embodiment using the same method as in each of the above embodiments, the V-shaped angle of each groove is, for example, As shown in the figure, it is a little wider and about 90 degrees. As shown in the drawing, the {0001} plane and the {11-20} plane formed in the functional semiconductor crystal layer forming step are transferred as they are to the V-shaped portion below the second groove (guide groove) 512. ing. The {0001} plane and the {11-20} plane are both inclined with respect to the normal to the main surface of the GaN substrate 503. Comparing the two, the {0001} plane is closer to the main surface of the substrate 503 and the {11-20} plane is closer to the main surface of the substrate 503. When the above-described stripe direction is employed in the (11-22) plane laser, the cleavage plane of the GaN substrate crystal is the {0001} plane in the figure, which is parallel to the stripe direction and perpendicular to the main surface of the GaN substrate. Does not exist. For this reason, even if the blade is applied perpendicularly to the main surface of the GaN substrate, the cleavage surface and the direction in which the blade is applied are different, so that it is difficult to divide as compared with the element on the c-plane GaN substrate. However, according to the semiconductor wafer of the present invention or the method for producing a semiconductor wafer of the present invention, the guide groove (second groove) is formed on the substrate (GaN substrate), and therefore, it is easier to divide. For example, when the guide groove (second groove) has the shape shown in FIG. 14B, it is easy to cleave along the cleavage plane, that is, the {0001} plane. Further, for example, the guide groove (second groove) can be easily divided into a direction substantially parallel to the perpendicular of the substrate (a direction different from the cleavage plane) by forming a sharp V-shape.

  On the other hand, for the cleavage guide groove (second groove) 502, there is no low index plane parallel to the cleavage line 513 and inclined from the substrate (GaN substrate) main surface perpendicular. For this reason, when the first groove formed in the substrate is rectangular, in the functional semiconductor crystal layer forming step (corresponding to step 2 of Embodiment 1), a single oblique facet plane ( The surface inclined from the normal of the substrate main surface) hardly appears. For this reason, the cross-sectional shapes of the first groove and the second groove (guide groove) may be rectangular as shown in FIG. 15 rather than being V-shaped. FIG. 15A is a view corresponding to step 3 (after the formation of the etching mask) in the first embodiment, and FIG. 15B is a view corresponding to step 4 (after the “second groove forming step”). FIG. Both figures are viewed in a direction perpendicular to the longitudinal direction of a groove (first groove) 502 formed by selective growth of the functional semiconductor crystal layer 504 or a guide groove (second groove) 502 formed by dry etching. FIG. 5 is an enlarged cross-sectional view showing a groove portion. As shown in FIG. 15A, the surface of the groove formed in the functional semiconductor crystal layer stands up substantially parallel to the perpendicular of the GaN substrate 503, and the groove is not V-shaped. Further, as shown in FIG. 15B, the upper and lower portions of the guide groove (second groove) 502 formed after the second groove forming step each have a surface substantially parallel to the perpendicular of the substrate 503. The upper portion of the guide groove (second groove) 502 is wider than the lower portion of the guide groove (second groove) 502. The upper part of the guide groove (second groove) 502 and the lower part of the guide groove (second groove) 502 are connected to the main surface of the substrate 503 by a plane substantially parallel to the main surface. The lower part of the guide groove (second groove) 502 has a shape in which the shape of the first groove (FIG. 15A) before the second groove forming step is transferred. In FIG. 15B, the lower part of the guide groove (second groove) 502 is not V-shaped. However, since the guide groove (second groove) 502 has a shape close to a V shape in which the lower part (bottom part) has a narrower width due to the combination of selective growth on the substrate and dry etching of the substrate, the cleavage step Is advantageous.

  In the functional semiconductor crystal layer forming step (corresponding to step 2 of the first embodiment), depending on the crystal growth (selective growth) conditions, unlike FIG. Mixed oblique surfaces can also be produced. Specifically, for example, when the main surface of the substrate is a (11-22) plane, a {1-100} plane and a {0001} plane that are not parallel to the stripe direction are mixed. An oblique surface represented as {1-10n} (n is an integer) can also be produced. In this case, the oblique surface is not a low index surface and is not microscopically flat, but there is no problem in using it as a guide groove in combination with a dry etching process (second groove forming process). A V-shaped guide groove similar to that of the above embodiment can be formed.

  Although the first to fourth embodiments have been described above, the present invention is not limited to the configurations and methods specifically shown in these embodiments, and various modifications can be made. For example, the substrate main surface is not limited to the above example, and may be a polar surface or a nonpolar surface, and in the case of a nonpolar surface, it may be a nonpolar surface or a semipolar surface. In the first to fourth embodiments, some specific examples of the substrate main surface which is a nonpolar surface or a semipolar surface have been described. However, other nonpolar surfaces or semipolar surfaces may be used. For example, for green semiconductor laser production Examples include the (20-21) plane of a GaN substrate, which is known to be a preferable plane.

  In addition, according to the above description, the functional semiconductor crystal layer is composed of the first cladding layer, the optical waveguide layer, the InGaN quantum well active layer, the optical waveguide layer, the second cladding layer, and the contact layer stacked in the order described above. However, it is not limited to this configuration. According to the above description, for example, as shown in the cross-sectional view of FIG. 16A, the first cladding layer 10101, the optical waveguide layer 10102, the InGaN quantum well active layer 10103, the optical waveguide layer 10104, A functional semiconductor crystal layer 104 is formed by laminating the second cladding layer 10105 and the contact layer 10106 in this order. However, the present invention is not limited to this. For example, as shown in FIG. 16B, an n-GaN layer 16101, an n-GaAlN layer 16102 serving as a cladding layer, an n-GaN 16103 serving as a light guide layer, An InGaN quantum well 16104 as an active layer, p-GaN 16105 as a light guide layer, a p-GaN / GaAlN superlattice layer 16106 as a cladding layer, and a p-GaN layer 16107 as a contact layer are grown in the above order to form a functional semiconductor. A crystal layer 1604 may be formed. In the present invention, the configuration of the functional semiconductor crystal layer is not limited to FIGS. 16A and 16B, and any configuration is possible. In FIGS. 16A and 16B, the symbols representing the plane orientation are merely examples, and the present invention is not limited to these.

  Furthermore, in the above embodiment, the semiconductor laser device on the n-type GaN substrate is taken as an example, but a semiconductor laser device on a substrate other than the GaN substrate such as a sapphire substrate or a silicon substrate may be used.

In the above-described embodiments, the ridge stripe type semiconductor laser structure has been described. However, the present invention is not particularly limited to such a structure, and other than the inner stripe type and other semiconductor laser devices or lasers. Even if it is applied to this waveguide device, the effect can be obtained.
In addition, other semiconductor elements such as surface-emitting laser elements, light-emitting diodes, light-receiving elements, and semiconductor modulators require precise division size control, or element division that does not cause cracks or damage to the crystal. As long as the semiconductor device is applied to any device, the effect can be obtained.

  As described above, according to the present invention, it is possible to provide a semiconductor wafer manufacturing method capable of efficiently forming guide grooves for accurate cleavage in a semiconductor wafer without generation of scribble scraps. According to the present invention, for example, a V-shaped guide groove can be formed even in the manufacture of a semiconductor laser using a nitride material having high corrosion resistance (vs. wet etching resistance). For this reason, for example, it is possible to provide a manufacturing method for forming an element having a highly flat resonator surface and an accurate resonator length with a high yield. The nitride semiconductor laser device manufactured by using the manufacturing method according to the present invention can be used for an optical disk light source advantageous for high-density recording, a light source for video equipment such as a next-generation laser display, and the like.

  Furthermore, the semiconductor element of the present invention is not limited to the above, and can be used for any application. For example, III-V nitride semiconductor light emitting devices based on gallium nitride (GaN), especially semiconductor lasers emitting blue-violet light, have been put to practical use as next-generation high-density optical disk light sources, and the market will expand further in the future. It is expected to continue. On the other hand, in this material system, light emission in the visible wavelength region from blue to red is possible by controlling the indium composition of the indium gallium nitrogen (InGaN) active layer. ing. In recent years, there has been an increasing demand for semiconductor lasers that oscillate with visible light for application to high-performance displays and the like. In addition, there is a possibility that an ultraviolet laser with a shorter wavelength for the purpose of germicidal lamps and medical field applications can be realized using a nitride material. The present invention is also useful for a semiconductor laser having an oscillation wavelength of 1.3 to 1.55 μm based on a group III-V compound InP, which is an indispensable element for optical communication equipment.

101, 201, 301, 401, 501 Laser stripe (active layer stripe)
102, 302, 402, 502 Cleaving guide groove (second groove)
212, 312, 412, 512 Element division guide grooves 311, 413, 513, 903 Planned cleavage lines 314, 414, 514 Planned element division lines 103, 203, 503, 1601 GaN substrate (substrate)
104, 204, 504 Laser functional layer (functional semiconductor crystal layer)
105, 505 Etching mask 106, 206 Blade 220, 221 Electrode 901 Laser stripe (active layer stripe) formation planned region 902 Dielectric film opening 10101 First clad layer 10102 Optical waveguide layer 10103 InGaN quantum well active layer 10104 Optical waveguide layer 10105 Second cladding layer 10106 Contact layer 16101 n-GaN layer 16102 n-GaAlN layer 16103 n-GaN layer 16104 InGaN quantum well 16105 p-GaN layer 16106 p-GaN / GaAlN superlattice layer 16107 p-GaN layer

Claims (12)

A first groove forming step of forming a first groove on the upper part of the substrate formed of crystals;
A functional semiconductor crystal layer forming step of forming a functional semiconductor crystal layer by growing a semiconductor crystal in a portion other than the first groove forming portion on the substrate after the first groove forming step;
After the functional semiconductor crystal layer formation step, the functional semiconductor crystal layer and the substrate around the first groove formation site are dry-etched to enlarge the first groove, and from the upper surface of the functional semiconductor crystal layer And a second groove forming step of forming a second groove reaching the inside of the substrate.   2. The method of manufacturing a semiconductor wafer according to claim 1, wherein, in the first groove forming step, the first groove is formed in a regular pattern including a plurality of grooves.   3. The method of manufacturing a semiconductor wafer according to claim 1, wherein the functional semiconductor crystal layer is formed of a nitride semiconductor.   4. The method for manufacturing a semiconductor wafer according to claim 1, wherein the substrate is formed of a nitride semiconductor crystal.   5. The method of manufacturing a semiconductor wafer according to claim 4, wherein the substrate is a GaN substrate, and a main surface thereof is a {0001} plane, a {1-100} plane, or a {11-22} plane.   4. The method of manufacturing a semiconductor wafer according to claim 1, wherein the substrate is made of at least one crystal selected from the group consisting of Si, SiC, and SiGe. 5.   4. The method of manufacturing a semiconductor wafer according to claim 1, wherein the substrate is formed of a zinc blende type III-V group compound semiconductor crystal. 5.   The method for manufacturing a semiconductor wafer according to claim 1, wherein the substrate is a sapphire substrate.   The method for manufacturing a semiconductor wafer according to claim 1, wherein the substrate is a wet etching resistant substrate. A semiconductor wafer manufacturing process for manufacturing the semiconductor wafer by the manufacturing method according to claim 1;
A division step of dividing the semiconductor wafer in at least a direction along a lower end of the second groove.   The semiconductor device to be manufactured is a semiconductor laser, and the dividing step includes a resonator surface forming step of forming a resonator surface by cleaving the wafer in a direction along the lower end of the second groove. 11. The method of manufacturing a semiconductor device according to claim 10, wherein The semiconductor element to be manufactured is a semiconductor laser, and the dividing step includes a laser bar manufacturing step of cleaving the wafer to obtain a laser bar, and the laser bar is divided in a direction along the lower end of the second groove. The method of manufacturing a semiconductor device according to claim 10, further comprising a laser bar dividing step of obtaining a semiconductor laser.

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