JP2012216852A - Control device of substrate processing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To control transportation of a wafer according to a degree of microfabrication required for each lot.SOLUTION: A substrate processing device comprises plural PMs 400 for applying predetermined processing to a wafer W, and an LLM 500, in which a transportation mechanism for transporting the wafer W is built. An EC 200 controls the substrate processing device. The A selection part 255 of the EC 200 selects the PM 400, to which the wafer is transported next, and also selects for each lot a unit of the wafer W transported to the same PM from one lot or one wafer according to a degree of microfabrication required for each lot. A transportation control part 260 of the EC 200 sequentially transports the wafers W included in a lot to the selected same PM 400 when transportation of a lot unit is selected, and sequentially OR-transports the wafers W included in the lot one by one from the selected PM 400 to the other PM 400 when transportation of a wafer unit is selected.

Description

  The present invention relates to a control apparatus for a substrate processing apparatus that performs predetermined processing on a substrate.

  In recent years, most substrate processing apparatuses arranged in a semiconductor factory have two or more processing chambers for performing predetermined processing on a substrate, along with a transport mechanism for transporting the substrate. Thus, when a plurality of processing chambers are provided in the substrate processing apparatus, how to transfer a large number of substrates to the plurality of processing chambers is to increase substrate processing throughput and improve product productivity. is important.

  Therefore, in the conventional substrate processing apparatus, in order to process different substrates simultaneously in different processing chambers, different substrates are sequentially transferred to different processing chambers with different transfer paths (hereinafter referred to as OR transfer). The transport path of each substrate is controlled so that each substrate is sequentially processed via two or more processing chambers (see, for example, Patent Document 1). Thereby, a board | substrate can be processed efficiently.

  Furthermore, in another conventional substrate processing apparatus, a substrate is transported only to a processing chamber group in which the operation is enabled based on a signal indicating whether or not each processing chamber can be operated (for example, Patent Document 2). See). Thereby, even when any one of the processing chambers cannot be used due to a failure or the like, the substrate can be processed efficiently using the other processing chambers.

JP 63-133532 A Japanese Patent Laid-Open No. 11-67869

  However, if the same processing is simultaneously performed on each substrate in each processing chamber by sequentially transferring different substrates to different processing chambers in normal operation, the throughput of the substrate processing is improved, but each processing chamber originally exists. Due to variations in the atmosphere in each processing chamber due to individual differences and differences in use frequency, variations occur in the processing (processing) state of each substrate.

  On the other hand, since the same lot is one unit for manufacturing the same product, it is better that the processing state of the substrates included in the same lot is uniform and has no variation. In particular, in recent years, an increasing number of products require extremely fine processing. In order to meet such microfabrication requirements, it is necessary to process substrates in the same lot with high accuracy to produce a uniform and high-quality product without variations from substrate to substrate. For this reason, the variation of the processing state permitted until now has occurred in some cases due to the characteristics of the product.

  In such a case, for a lot that requires fine processing, the host computer is requested to change the substrate transfer method from the method specified in the system recipe to another method that does not cause variations in the processing state. Thus, it is conceivable that the host computer changes to another appropriate transport method in response to this request. However, it is very cumbersome and unrealistic to request such work from the host computer that manages the entire system by managing the semiconductor factory, and greatly increases the functions of the system on the host computer side. It is necessary to change to. As a result, until the system operates stably, the entire substrate processing system becomes unstable even if it is temporary, which is not preferable.

  Therefore, the present invention provides a control apparatus for a substrate processing apparatus that controls a change in the transfer method in accordance with the degree of fine processing required for each lot.

  That is, in order to solve the above-described problem, according to one aspect of the present invention, a control device that controls a substrate processing apparatus including a plurality of processing chambers that perform predetermined processing on a substrate and a transport mechanism that transports the substrate. Then, the processing chamber to be transferred next is selected, and the unit of the substrate to be transferred to the same processing chamber is set to one lot unit or one substrate unit depending on the degree of fine processing required for each lot. A control device is provided that includes a selection unit that selects whether to perform each lot, and a transfer control unit that sequentially transfers the substrates included in the unit selected by the selection unit to the processing chamber selected by the selection unit. .

  According to this, depending on the degree of fine processing required for each lot, it is selected for each lot whether the unit of the substrate transported to the same processing chamber is one lot unit or one substrate unit. When one lot unit is selected, all the substrates included in the corresponding lot are transferred to the same processing chamber. Thus, by transferring different substrates to different processing chambers, it is possible to avoid variations in the processing state of each substrate due to individual differences among the processing chambers and differences in atmospheres of the respective processing chambers. In other words, by processing all the substrates in a lot in the same process, processing all the substrates in one lot in the same environment, it is possible to manufacture almost the same product with no variation in characteristics for each lot. can do.

  In particular, in recent years, an increasing number of products require extremely fine processing. In response to such fine processing requirements, it is necessary to perform uniform and high-quality processing on a plurality of substrates included in the same lot, and there may be cases where variations in processing conditions that have been allowed up to now are not allowed. Arise.

  However, even in such a case, according to such a configuration, the method for transporting the substrate included in the lot for which microfabrication is required is the same as the transport procedure described above, in which the processing state does not vary according to instructions from the control device. Be changed. In this way, without requesting the host computer to change the transport unit, the control device itself changes the transport unit without significantly changing the function of the host computer system currently operating. It is possible to respond quickly to user requests.

  Whether or not the fine processing is to be performed may be determined from, for example, the type of recipe specified by the operator or the content of the recipe, or the operator specifies whether the unit parameter is valid or invalid in advance, and the unit parameter is valid. If so, it may be determined that the processing is fine processing, and if the unit parameter is invalid, it may be determined that the processing is not micro processing.

  When the selection unit selects one substrate unit, the transfer control unit transfers the trial substrate only to each processing chamber of the processing chamber group specified by the recipe before transferring the product substrate. Also good. The number of trial substrates transferred to each processing chamber may be one, for example, or two or more.

  That is, in the OR transport in units of one substrate, it is necessary to transport the trial substrates to all the processing chambers to be OR transported before transporting the product substrates for the purpose of confirming whether or not the product substrates can be processed. . Therefore, in the OR transfer, trial substrates for all the processing chambers to be OR transferred are required at a minimum.

  However, when one lot unit is selected by the selection unit, the transfer control unit may transfer the trial substrate only to the selected processing chamber before transferring the product substrate. The number of trial substrates transferred to the selected processing chamber may be, for example, one or two or more.

  That is, in the transfer in units of lots, since all the substrates in the lot are transferred to one selected processing chamber, only one trial substrate is required, thereby reducing the cost.

  As described above, according to the present invention, it is possible to control the change of the transport method according to the degree of fine processing required for each lot.

It is a conceptual diagram of the substrate processing system concerning the 1st-3rd embodiment of the present invention. It is a hardware block diagram of EC concerning 1st-3rd embodiment. It is a block diagram of the substrate processing apparatus concerning 1st-3rd embodiment. It is a schematic diagram of the longitudinal cross-section of PM concerning 1st-3rd embodiment. It is a functional block diagram of EC concerning 1st-3rd embodiment. It is the flowchart which showed the process execution process routine (main routine) performed in 1st-3rd embodiment. It is the flowchart which showed the conveyance procedure selection processing routine (subroutine) performed in 1st Embodiment. It is the flowchart which showed the process execution control processing routine (subroutine) performed in 1st Embodiment. 9A is a screen for editing a recipe, FIG. 9B is a screen for starting a lot of the cassette LP1, and FIG. 9C shows the state of the substrate processing apparatus. This is the displayed screen. It is a figure for demonstrating the conveyance state at the time of being conveyed per lot. It is the flowchart which showed the conveyance procedure selection processing routine performed in 2nd Embodiment. It is the flowchart which showed the process execution control processing routine performed in 2nd Embodiment. It is the flowchart which showed the conveyance procedure selection process routine performed in 3rd Embodiment. It is the flowchart which showed the process execution control processing routine performed in 3rd Embodiment. It is the figure which showed typically the longitudinal cross-section of other internal structure of PM.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description and the accompanying drawings, the same reference numerals are given to the constituent elements having the same configuration and function, and redundant description is omitted.

(First embodiment)
First, the outline | summary is demonstrated, referring FIG. 1 about the substrate processing system concerning 1st Embodiment of this invention. In the present embodiment, an example in which a silicon wafer (hereinafter referred to as wafer W) is etched using the substrate processing system will be described.

(Substrate processing system)
The substrate processing system 10 includes a host computer 100, an EC (Equipment Controller) 200, four MCs (Machine Controllers) 300a to 300d, two PMs (Process Modules) 400a, 400b, two It has LLM (Load Lock Module: Load lock module) 500a, 500b and management server 600.

  The EC 200 and the host computer 100 and the EC 200 and the management server 600 are connected by customer side LANs (Local Area Networks) 700a and 700b, respectively. Further, the management server 600 is connected to an information processing device such as a PC (Personal Computer) 800. The operator sends a command to the substrate system 10 by operating the PC 800.

  EC200, MC300a-300d, PM400a, 400b, LLM500a, 500b are provided in the area Q in a factory, and are each connected by LAN in a factory.

  The host computer 100 manages the entire substrate processing system 10 such as data management. The EC 200 holds a system recipe used for etching the substrate, transmits a control signal to each MC 300 to operate the PMs 400a, 400b, LLM 500a, 500b according to the system recipe, and manages history of data after the operation. And so on.

  The MCs 300a to 300d hold process recipes and drive the respective devices provided in the PMs 400a and 400b, which are difficult to follow the process recipe procedure, based on the control signals transmitted from the EC 200. While controlling the processing, each device provided in the LLMs 500a and 500b is driven to control the transfer of the wafer W.

  PMs 400a and 400b are vacuum processing chambers for performing predetermined processing such as etching processing on the wafer W, for example. The LLMs 500a and 500b are transfer chambers having a transfer mechanism for transferring the wafer W. A substrate processing apparatus that includes the PMs 400a and 400b and the LLMs 500a and 500b and processes the substrates by operating them will be described later. The management server 600 sets operating conditions and the like of each device based on data transmitted from the PC 800 by an operator's operation.

(EC, MC hardware configuration)
Next, the hardware configuration of the EC 200 will be described with reference to FIG. Since the hardware configuration of the MC 300 is the same as that of the EC 200, the description thereof is omitted here.

  As shown in FIG. 2, the EC 200 includes a ROM 205, a RAM 210, a CPU 215, a bus 220, an internal interface (internal I / F) 225, and an external interface (external I / F) 230.

  The ROM 205 stores a basic program executed by the EC 200, a program that starts when an abnormality occurs, various recipes, and the like. The RAM 210 stores various programs and data. The ROM 205 and the RAM 210 are examples of a storage device, and may be a storage device such as an EEPROM, an optical disk, or a magneto-optical disk.

  The CPU 215 controls substrate processing according to various recipes. The bus 220 is a path for exchanging data among the devices such as the ROM 205, the RAM 210, the CPU 215, the internal interface 225, and the external interface 230.

  The internal interface 225 inputs data and outputs necessary data to a monitor, a speaker, etc. (not shown). The external interface 230 transmits and receives data to and from devices connected via a network such as a LAN.

(Hardware configuration of substrate processing equipment)
Next, the hardware configuration of the substrate processing apparatus including the PM 400 and the LLM 500 will be described with reference to FIG. The substrate processing apparatus includes a first process ship Q1, a second process ship Q2, a transfer unit Q3, an alignment mechanism Q4, and a cassette stage Q5.

  The first process ship Q1 has a PM 400a and an LLM 500a. The second process ship Q2 is arranged in parallel with the first process ship Q1, and includes the PM 400b and the LLM 500b.

  The LLMs 500a and 500b adjust the internal pressure by opening and closing the gate valves V provided at both ends of the LLM 500a and 500b so that the wafer W is brought into a vacuum state using the built-in transfer arms Arma and Armb. It is transported to a certain PM 400a, 400b and a transport unit Q3 in an atmospheric state. Details of the internal configuration of the PM 400 will be described later.

  The transfer unit Q3 is a rectangular transfer chamber, and is connected to the first process ship Q1 and the second process ship Q2. The transfer unit Q3 is provided with a transfer arm Armc. The transfer arm Armc is used to transfer the wafer W to the first process ship Q1 or the second process ship Q2 in conjunction with the transfer arms Arma and Armb.

  An alignment mechanism Q4 for positioning the wafer W is provided at one end of the transfer unit Q3. While the wafer W is placed on the rotating table Q4a, the optical sensor Q4b changes the state of the peripheral edge of the wafer. By detecting, the position of the wafer W is adjusted.

  A cassette stage Q5 is provided on the side surface in the longitudinal direction of the transport unit Q3. Three cassette containers LP1 to LP3 are placed on the cassette stage Q5. Each cassette container LP stores, for example, a maximum of 25 wafers W in multiple stages.

  With such a configuration, for example, 25 wafers W in the cassette container LP1 are alternately transferred one by one from the cassette container LP1 to the alignment mechanism Q4 to the process ship Q1 or the process ship Q2 by the transfer arm Armc. It is transferred to PM 400a or PM 400b by arm Arma or transfer arm Armb, and is again stored in cassette container LP1 after the etching process. A method of alternately transferring wafers W to PM 400a and PM 400b one by one in this way is called OR transfer.

(Internal structure of PM)
Next, the internal configuration of the PM 400 will be described with reference to a longitudinal sectional view of the PM 400 schematically shown in FIG. The PM 400 has a rectangular tube-shaped processing container C in which substantially the center part of the ceiling part and the bottom part is opened. A lid body 405 that is opened at a substantially central portion of the ceiling portion is attached to the ceiling portion of the processing container C. O-rings 410 are provided on the contact surfaces of the upper side wall of the processing container C and the lower side wall of the lid 405, so that the airtightness in the processing chamber is maintained.

  Inside the processing container C, an upper electrode 415 is provided above the processing container C. The upper electrode 415 is electrically separated from the processing container C by an insulating material 420 provided at the opening periphery of the upper part of the processing container C.

  A high frequency power supply 430 is connected to the upper electrode 415 via a matching circuit 425. The matching circuit 425 is provided with a matching box 435 around the center of the ceiling portion, and serves as a grounding housing for the matching circuit 425 and seals the ceiling portion.

  A processing gas supply unit 445 is also connected to the upper electrode 415 via a gas line 440, and a desired gas supplied from the processing gas supply unit 445 is supplied into the processing container C from the plurality of gas injection holes A. Spray. In this way, the upper electrode 415 functions as a gas shower head.

  A lower electrode 455 is provided inside the processing container C below the processing container C. The lower electrode 455 also functions as a susceptor on which the wafer W is placed. The lower electrode 455 is supported by a support body 465 provided via an insulating material 460. Accordingly, the lower electrode 455 is electrically separated from the processing container C.

  One end of a bellows 470 is attached in the vicinity of the outer periphery of the opening provided on the bottom surface of the processing container C. A lifting plate 475 is fixed to the other end of the bellows 470. With this configuration, the opening on the bottom surface of the processing container C is sealed by the bellows 470 and the lifting plate 475. Further, the lower electrode 455 moves up and down integrally with the bellows 470 and the lifting plate 475 in order to adjust the position where the wafer W is placed to a height corresponding to the processing process.

  The lower electrode 455 is connected to the elevating plate 465 through the conductive path 480 and the impedance adjusting unit 485. The upper electrode 415 and the lower electrode 455 correspond to a cathode electrode and an anode electrode. The inside of the processing container is depressurized to a desired degree of vacuum by the exhaust mechanism 490. With this configuration, the plasma is generated by the high-frequency power to which the gas supplied to the inside of the processing container is applied in a state where the wafer W is transferred to the inside of the processing container C while keeping the airtightness of the processing container C by opening and closing the gate valve 495. The wafer W is subjected to desired etching by the action of the generated plasma.

(Functional structure of EC)
Next, the functional configuration of the EC will be described with reference to FIG. 5 showing each function of the EC 200 in blocks. The EC 200 has functions indicated by blocks of a storage unit 250, a selection unit 255, a conveyance control unit 260, a process execution control unit 265, and a communication unit 270.

  The storage unit 250 stores, as a recipe group 250a, various recipes (recipes a to n) in which processing procedures for performing a desired process on the wafer W in each PM 400 are shown. In addition, the storage unit 250 stores a unit parameter 250b indicating whether or not a fine processing process is requested. Further, the storage unit 250 stores route selection information 250c as information necessary for selecting a transfer route for the wafer W. As the route selection information 250c, for example, the order of PMs on which the wafer W has been etched may be stored. Further, the total number of processed wafers W processed in each PM before cleaning each PM may be stored for each PM. Further, the total processing time of the wafer W processed in each PM before cleaning each PM may be stored for each PM.

  The selection unit 255 selects the PM to which the next wafer W is to be transferred, and sets the substrate unit to be transferred to the same processing chamber as one lot unit or one substrate unit depending on the degree of fine processing required for each lot. Choose either one for each lot.

  The selection unit 255 selects the PM to be transferred from the next wafer W, for example, among the PM groups specified by the recipe (for example, specified by the PM 400a and the PM 400b) based on the order of the PMs stored in the storage unit 250. The PM 400 that has been processed most recently is selected.

  The selection unit 255 selects the PM 400 having the smallest number of processed sheets from the PM group designated by the recipe based on the total number of processed wafers W stored in the storage unit 250 as the PM to be transferred with the next wafer W. You may make it do. The selection unit 255 may select the PM 400 having the shortest processing time from among the PM group specified by the recipe based on the total processing time of the wafer W stored in the storage unit 250.

  The transfer control unit 260 sequentially transfers the wafers W included in the unit selected by the selection unit 255 to the PM 400 selected by the selection unit 255. Specifically, when one lot unit is selected by the selection unit 255, the transfer control unit 260 assigns all wafers W included in the lot to, for example, only the PM 400a specified as the processing chamber to be selected next. Transport in order (not transported to PM 400b).

  On the other hand, when one wafer unit is selected by the selection unit 255, the transfer control unit 260 sets the first wafer included in the corresponding lot as the PM 400 that has been processed most recently (or the PM 400 with the smallest number of processed sheets). The transport method of transporting the next wafer contained in the same lot to the next PM is repeated up to the last wafer contained in the same lot.

  The process execution control unit 265 selects a recipe designated by the operator from the storage unit 250 and performs etching on the wafer W transferred into the PM 400 by the transfer control unit 260 based on the procedure indicated in the selected recipe. A control signal for executing the process is generated.

  The communication unit 270 mainly transmits / receives information to / from the MC 300. For example, the communication unit 270 sends the control signal generated by the process execution control unit 265 to the MC 300, thereby instructing the MC 300 to execute a desired etching process in the PM 400.

  The functions of each part of the EC 200 described above are actually from a storage medium such as the ROM 205 and the RAM 210 in which programs (including recipes) in which the CPU 215 in FIG. 2 describes processing procedures for realizing these functions are stored. This is accomplished by reading a program, interpreting and executing the program. For example, in the present embodiment, the functions of the selection unit 255, the conveyance control unit 260, and the process execution control unit 265 are actually achieved by the CPU 215 executing a program that describes the processing procedure for realizing these functions. Is done.

(EC operation)
Next, the process execution process executed by the EC 200 will be described with reference to the flowcharts shown in FIGS. 6 to 8, focusing on the transfer procedure selection process that is a feature of the present embodiment. 6 is a main routine showing the process execution process, FIG. 7 is a subroutine showing the transfer procedure selection process called during the process execution process, and FIG. 8 is a process execution after the transfer procedure selection process is completed. It is a subroutine showing a process execution control process called during the process.

  When the operator designates the recipe a and the lot number and turns on the lot start button, the corresponding lot is inserted, and preparations for sequentially transporting 25 wafers included in the lot are completed. In accordance with this timing, the process execution process is started from step 600 of FIG. 6, the transfer procedure selection process is called in step 605, and after the transfer procedure selection process is completed, the process proceeds to step 610 and the process execution control process is called. After the process execution control process ends, the process ends in step 695.

(Transfer procedure selection process)
The transfer procedure selection process called in step 605 in FIG. 6 starts from step 700 in FIG. 7, proceeds to step 705, and the selection unit 255 determines whether or not this is the first process after the system is activated. . When the substrate processing apparatus is in an idle state, the selection unit 255 determines that the process is the first process after activation, and proceeds to step 710 to select the PM 400 having the smallest number from among the PM group designated by the recipe. . Here, it is assumed that PM 400a and PM 400b are designated by the recipe. Therefore, the selection unit 255 selects the PM 400a having the smallest number.

  On the other hand, if it is not the first process, the process proceeds to step 715, and the selection unit 255 selects the PM 400 next to the PM 400 that has been subjected to the final process, from the PM group specified by the recipe. For example, if the PM that last processed the wafer W is PM400b, the selection unit 255 selects PM400a in Step 715.

  In this way, after the PM 400 to which the wafer W is to be transferred next is selected in Step 710 or Step 715, the process proceeds to Step 720, and the selection unit 255 determines whether or not the fine processing is performed. That is, the selection unit 255 determines whether or not the unit parameter stored in the storage unit 250 is valid.

  When the fine processing is not requested (that is, when the unit parameter indicates invalid), the process proceeds to step 725, and the selection unit 255 selects the wafer unit as the transfer unit, proceeds to step 795, and ends this process. To do. On the other hand, when the fine processing is requested in step 720 (that is, when the unit parameter indicates valid), the selection unit 255 proceeds to step 730 to select the lot unit as the transport unit and perform the step Proceed to 795 to end the process.

  As described above, whether or not it is a fine machining process is determined by the operator as valid or invalid in advance for the unit parameter. If the unit parameter is valid, it is determined as a fine machining process. If the unit parameter is invalid, It may be determined that the processing is not microfabrication processing, or may be determined from the type of recipe or the content of the recipe specified by the operator.

(Process execution control processing)
When the transfer procedure selection process in FIG. 7 is completed, the process execution control process in FIG. 8 is called in step 610 in FIG. 6, and the process execution control process is started from step 800 in FIG. The process execution control unit 265 selects the recipe a designated by the operator from the recipe group stored in the storage unit 250.

  Next, proceeding to step 810, the transport control unit 260 generates a control signal indicating the transport path according to the transport unit selected by the selection unit 255. For example, the operator creates a system recipe for the OR transport path (that is, PM1 or PM2) on the system recipe editing screen shown in FIG. 9A, and has created it on the start screen shown in FIG. 9B. Even if the system recipe of the OR transport route is designated and the start is turned on, when the lot unit is selected by the selection unit 255, the state of the substrate processing apparatus is displayed as shown in FIG. 9C. As described above, the transfer control unit 260 selects one PM (here, PM1) from the OR designated PM group (PM1 or PM2) by the method described above, and all the wafers W of the corresponding lot are selected by PM1 (PM400a). A control signal to be transferred to PM1 in order from the first wafer W to the last wafer W of the corresponding lot is generated so as to perform the etching process. Therefore, all the wafers W in the corresponding lot are not transferred to PM2 (PM400b).

  Next, proceeding to step 815, the process execution control unit 265 generates a control signal indicating an etching process according to the processing procedure shown in the recipe a, and proceeds to step 820, where the communication unit 270 is generated. A control signal is transmitted to MC300.

  Next, the process proceeds to step 825, and the process execution control unit 265 repeats the processes of steps 810 to 825 until it is determined that the last wafer W of the corresponding lot. As a result, all the wafers W in the corresponding lot are etched in the PM 400a, and after the last wafer W is processed, the process proceeds to step 830 to store the final process PM number “PM400a” as one of the route selection information. Proceeding to step 895, the present process is terminated.

  For example, when lot 1, lot 2, and lot 3 accommodated in LP1, LP2, and LP3 are all targets for fine processing, as shown in FIG. 10, all wafers in lot 1 are PM1 (PM400a). All wafers in lot 2 are processed in PM2 (PM400b), the processing chamber that was processed most recently at that time, and all wafers in lot 3 are processed most recently at that time. It is processed in PM1 (PM400a) which is a processing chamber to which is applied.

  On the other hand, when the wafer unit is selected by the selection unit 255, in step 810, the processing execution control unit 265 generates a control signal designated to perform OR transfer to the PM group designated by the system recipe. The process execution control signal generated in step 815 together with the transfer control signal generated in this way is transmitted to the MC 300 until the final lot. As a result, the first wafer W of the lot is transferred to the previously selected PM 400a, the next wafer W of the same lot is transferred to the next processing chamber PM 400b, and the next wafer W of the same lot is It is conveyed to PM400a which is the next processing chamber. In this manner, up to the final wafer W of the corresponding lot, the wafers W are alternately ORed one by one to the PM 400a and PM 400b, and etched in parallel by each PM 400.

  As described above, according to the transfer in units of lots, by transferring all the wafers W in the lot into the same PM and processing them, all the wafers W included in one lot under the same environment are processed. Processing can be performed uniformly, whereby the same product without variations in characteristics can be manufactured in units of one lot. On the other hand, according to the OR transfer in units of wafers W, since the wafers W are processed in parallel, the throughput can be improved as compared with the case of transferring in units of lots.

  In the transfer in units of wafers, the test wafer is transferred, for example, one by one to each processing chamber of the PM group designated by the recipe before the product wafer is transferred. That is, in the OR transfer in units of wafers, for the purpose of confirming whether or not the product wafer can be processed, it is necessary to transfer the trial wafers to all the processing chambers to be OR transferred before transferring the product wafer. Therefore, in OR transfer, trial wafers for all processing chambers to be OR transferred are required at a minimum.

  However, in the case of lot-by-lot conveyance, for example, only one test wafer is conveyed to the PM selected by the selection unit 255 before the product substrate is conveyed. That is, in the transfer in units of lots, since all the wafers W in the lot are transferred to one selected processing chamber, only one trial wafer W is required, thereby reducing the cost. .

(Second Embodiment)
Next, the substrate processing system 10 according to the second embodiment will be described. In the second embodiment, when the PM 400 to be transferred next is selected, the method of selecting the PM 400 that is used less frequently is focused on the number of wafers W processed in each PM 400. This is different from the first embodiment focusing on the PM 400 used in the first embodiment. Therefore, the substrate processing system 10 according to the present embodiment will be described with reference to FIGS. 11 and 12 focusing on this difference.

  In the second embodiment, the functional configuration of the EC 200 (see FIG. 5) is the same, and the transfer procedure selection process in FIG. 11 and a part of the process execution control process in FIG. 12 are different. Specifically, in the transfer procedure selection process of FIG. 11 called during the process execution process of FIG. 6, if it is the first process in step 705 following step 1100, step 710 is performed as in the first embodiment. If it is not the first process in step 705, the process proceeds to step 1105, and the selection unit 255 selects the PM 400 having the smallest total number of wafers to be processed from the PM group designated by the system recipe. The total number of processed wafers is accumulated for each PM as one piece of route selection information 250c in the storage unit 250.

  In this way, after selecting the PM to be transported next, the selection unit 255 processes Steps 720 to 730 as in the case of the first embodiment, proceeds to Step 1195, and ends this processing.

  In the process execution control process of FIG. 12 that is called during the process execution process of FIG. 6 after the transfer procedure selection process of FIG. 11 is completed, the process execution control unit 265 performs step 805 to step 815 following the step 1200. As in the first embodiment, a control signal for controlling the transfer of the wafer W and the etching process of the wafer W is generated. In step 820, the communication unit 270 transmits the generated control signal to the MC 300. Thereafter, the process proceeds to step 1205, where the process execution control unit 265 counts the number of wafers processed in the corresponding PM, and proceeds to step 825.

  When it is determined in step 825 that the processed wafer W is the final wafer of the lot, the process execution control unit 265 repeats the processes in steps 810 to 820 and 1205 and determines in step 825 that it is the final wafer. In step 1210, the storage unit 250 stores, for each PM, the total number of wafers processed in each PM 400 before cleaning.

  According to this, a board | substrate is conveyed by PM400 with few processing number among PM groups designated by the system recipe. As a result, the wafer W can be processed by the PM 400 that is predicted to be less frequently used. As a result, it is possible to execute a desired process on all the PMs 400 as averagely as possible without biasing the usage frequency of the plurality of PMs 400. Thereby, the variation in the atmosphere of each PM400 can be suppressed, and accordingly, the variation in processing performed in each PM400 can be suppressed as much as possible.

(Third embodiment)
Next, the substrate processing system 10 according to the third embodiment will be described. In the third embodiment, when the PM 400 to be transferred next is selected, the processing time of the wafer W using each PM 400 is focused on as a method for selecting the PM 400 that is less frequently used. This is different from the second embodiment that focuses on the number of wafers W processed in this way. Therefore, the substrate processing system 10 according to the present embodiment will be described with reference to FIGS. 13 and 14 focusing on this difference.

  In the third embodiment, the functional configuration of the EC 200 (see FIG. 5) is the same, and a part of the transfer procedure selection process in FIG. 13 and the process execution control process in FIG. 14 are different. Specifically, in the transfer procedure selection process of FIG. 13 called during the process execution process of FIG. 6, if it is the first process in step 705 following step 1300, step 710 is performed as in the second embodiment. If it is not the first process in step 705, the process proceeds to step 1305, and the selection unit 255 selects the PM 400 having the shortest total wafer processing time from the PM group specified by the system recipe. The total wafer processing time is accumulated for each PM as one piece of route selection information 250c in the storage unit 250.

  In this way, after selecting the PM to be transported next, the selection unit 255 processes Steps 720 to 730 as in the second embodiment, and proceeds to Step 1395 to end the present process.

  In the process execution control process of FIG. 14 that is called during the process execution process of FIG. 6 after the transfer procedure selection process is completed, in step 805 to step 820 following step 1400, the process execution control unit 265 is the same as in the second embodiment. Similarly, a control signal for controlling the transfer of the wafer W and the processing of the wafer W is generated, and the communication unit 270 transmits the generated control signal to the MC 300. Thereafter, the process proceeds to step 1405, and the process execution control unit 265 counts the time during which the wafer is processed in the corresponding PM, and proceeds to step 825.

  The process execution control unit 265 repeats the processes of Steps 810 to 820 and Step 1405 until the wafer W processed in Step 825 is determined as the final wafer of the lot. In step 1410, the storage unit 250 stores the total processing time of the wafers processed in each PM 400 for each PM before cleaning.

  According to this, the board | substrate contained in the selected unit is conveyed by PM400 with the shortest processing time among PM groups designated by the system recipe. As a result, the wafer W can be processed by the PM 400 that is predicted to be used less frequently. As a result, it is possible to execute a desired process on all the PMs 400 as averagely as possible without biasing the usage frequency of the plurality of PMs 400. Thereby, the variation in the atmosphere of each PM400 can be suppressed, and accordingly, the variation in processing performed in each PM400 can be suppressed as much as possible.

  In each of the embodiments described above, the operations of the respective units are related to each other, and can be replaced as a series of operations in consideration of the relationship with each other. Thus, the embodiment of the control device of the substrate processing apparatus can be replaced. An embodiment of a method for controlling a substrate processing apparatus can be provided. Further, by replacing the operation of each part with the process of each part, the embodiment of the control method of the substrate processing apparatus can be made the embodiment of the control program of the substrate processing apparatus. Further, by storing the control program of the substrate processing apparatus in a computer-readable recording medium, the embodiment of the control program of the substrate processing apparatus can be made into the embodiment of the computer-readable recording medium recorded in the control program. .

  As mentioned above, although preferred embodiment of this invention was described referring an accompanying drawing, it cannot be overemphasized that this invention is not limited to the example which concerns. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Understood.

(Modification of substrate processing apparatus)
For example, the substrate processing apparatus is not limited to the structure shown in FIG. 3, and may have the structure shown in FIG. The substrate processing apparatus of FIG. 15 is provided with a transfer system H that transfers the wafer W and a processing system S that performs substrate processing such as film formation processing or etching processing on the wafer W. The transfer system H and the processing system S are connected via load lock chambers (LLM) 400t1 and 400t2.

  The transfer system H includes a cassette stage 400H1 and a transfer stage 400H2. The cassette stage 400H1 is provided with a container mounting table H1a, and four cassette containers H1b1 to H1b4 are mounted on the container mounting table H1a. Each cassette container H1b can accommodate a product substrate (wafer W) before processing, a processed product substrate, and a non-product substrate for dummy processing in multiple stages.

  On the transfer stage 420, two transfer arms H2a1 and H2a2 capable of bending and extending and turning are supported so as to slide by magnetic drive. The transfer arms H2a1 and H2a2 hold the wafer W on a fork attached to the tip.

  At one end of the transfer stage 400H2, a positioning mechanism H2b for positioning the wafer W is provided. The alignment mechanism H2b aligns the position of the wafer W by detecting the peripheral state of the wafer W by the optical sensor H2b2 while rotating the turntable H2b1 while the wafer W is placed. .

  The load lock chambers 400t1 and 400t2 are each provided with a mounting table on which the wafer W is mounted, and gate valves V that can be opened and closed airtight at both ends. With this configuration, the transfer system H transfers the wafer W between the cassette containers H1b1 to H1b3, the load lock chambers 400t1 and 400t2, and the alignment mechanism H2b.

  The processing system S is provided with a transfer chamber (T / C) 400t3 and six process chambers (P / C) 400s1 to 400s6 (= PM1 to PM6). The transfer chamber 400t3 is joined to the process chambers 400s1 to 400s6 via gate valves s1a to s1f that can be opened and closed in an airtight manner. The transfer chamber 400t3 is provided with a transfer arm Sa that can be bent and stretched.

  With such a configuration, the wafer W is loaded into the process chambers 400s1 to 400s6 from the load lock chambers 400t1 and 400t2 via the transfer chamber 400t3 using the transfer arm Sa, and after being subjected to a process such as an etching process, It is carried out to the load lock chambers 400t1 and 400t2 via the transfer chamber 400t3.

  Also in the case of the substrate processing apparatus shown in FIG. 15, among the six transfer chambers P / C (corresponding to PM400), the P / C having the lowest use frequency at that time is selected and depends on the degree of microfabrication of the lot. Depending on the selected lot unit or wafer unit, all the wafers W in the lot are transferred to the selected P / C in order (in the case of lot unit), or different P in order from the selected P / C. ORed one by one to / C (in wafer units).

  As a result, lots of wafers W that require microfabrication are all processed in the same processing chamber, so that substantially the same product can be formed while suppressing variations in processing. On the other hand, lots of wafers W that do not require fine processing are transferred to separate processing chambers and processed in parallel, thereby improving the processing throughput.

  The number of processing chambers of the substrate processing apparatus according to the present invention is not limited to two shown in FIG. 4 or six shown in FIG. 15 and may be any number. Further, the processing chamber according to the present invention is not limited to the film forming process, and can perform all kinds of substrate processing such as thermal diffusion processing and etching processing.

An example of an apparatus for performing these processes is an etching apparatus, a CVD (Chemical Vapor).
Deposition: chemical vapor deposition method), ashing device, sputtering device, coater developer, cleaning device, CMP (Chemical Mechanical Polishing) device, PVD (Physical Vapor Deposition) device, An exposure apparatus, an ion implanter, etc. are mentioned. These apparatuses may be embodied by a microwave plasma substrate processing apparatus, an inductively coupled plasma substrate processing apparatus, a capacitively coupled plasma substrate processing apparatus, or the like.

  The substrate used in the present invention is not limited to a glass substrate, and may be a silicon wafer, for example. That is, the substrate used in the present invention may be a substrate used in, for example, an organic EL display, a plasma display, a liquid crystal display (LCD), or the like.

  Furthermore, the control device according to the present invention may be realized only by the EC 200, or may be realized by the EC 200 and the MC 300.

  The present invention can be applied to a substrate processing apparatus that performs predetermined processing on a substrate.

100 Host computer 200 EC
250 storage unit 255 selection unit 260 transport control unit 265 process execution control unit 270 communication unit 300, 300a to 300d MC
400, 400a, 400b PM
500, 500a, 500b LLM
600 Management server 700, 700a, 700b Customer side LAN
800 pcs
LP, LP1, LP2, LP3 cassette container

Claims (1)

A control device for controlling a substrate processing apparatus including a plurality of processing chambers for performing predetermined processing on a substrate and a transport mechanism for transporting the substrate,
The processing chamber to be transferred next is selected, and the unit of the substrate to be transferred to the same processing chamber is set to one lot unit or one substrate unit according to the degree of fine processing required for each lot. A selection section to select for each;
A control apparatus provided with the conveyance control part which conveys the board | substrate contained in the unit selected by the said selection part in order to the process chamber selected by the said selection part.

Images