JP2012216831A - Semiconductor chip packaging body manufacturing method - Google Patents

Semiconductor chip packaging body manufacturing method Download PDF

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Publication number
JP2012216831A
JP2012216831A JP2012077126A JP2012077126A JP2012216831A JP 2012216831 A JP2012216831 A JP 2012216831A JP 2012077126 A JP2012077126 A JP 2012077126A JP 2012077126 A JP2012077126 A JP 2012077126A JP 2012216831 A JP2012216831 A JP 2012216831A
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semiconductor chip
electrode
electronic component
sealing resin
compound
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Inventor
Hisatoshi Okayama
久敏 岡山
Munehiro Hatai
宗宏 畠井
Kohei Takeda
幸平 竹田
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Sekisui Chemical Co Ltd
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Sekisui Chemical Co Ltd
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Priority to JP2012077126A priority Critical patent/JP2012216831A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor chip packaging body manufacturing method which can perform highly accurate electrode bonding and reduce failure of electrode bonding.SOLUTION: A semiconductor chip packaging body manufacturing method comprises a process of pressing a semiconductor chip and an electronic component via an encapsulation resin 5 with heating the semiconductor chip and the electronic component at different temperatures to contact and bond bump electrodes 2 of the semiconductor chip with an electrode part of the electronic component, and a process of curing the encapsulation resin 5. In the process of contacting and bonding the bump electrodes 2 of the semiconductor chip with the electrode part of the electronic component, when it is assumed that a melt point of a tip portion of the bump electrode 2 of the semiconductor chip is M1, a melt point of the electrode part of the electronic component is M2, a temperature for heating the semiconductor chip is T1 and a temperature for heating the electronic component is T2, the following formula is satisfied: T1<M1<T2<M2 or T2<M2<T1<M1.

Description

本発明は、高精度な電極接合を行うことができ、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減することのできる半導体チップ実装体の製造方法に関する。 The present invention can perform high-precision electrode bonding, and can reduce defective bonding of electrodes even in a thin semiconductor chip having a large number of protruding electrodes or a semiconductor chip having a fragile low dielectric layer. The present invention relates to a method for manufacturing a semiconductor chip package.

近年、ますます進展する半導体装置の小型化、高集積化に対応するために、ハンダ等からなる突起状電極(バンプ)を有する半導体チップを用いたフリップチップ実装が多用されている。更に、半導体チップ間の距離も突起状電極間の距離も狭くなっていることから、封止樹脂材料を電極接合後に注入するのではなく、基板又は半導体チップに封止樹脂層を予め設けておく方法が検討されている。
このような方法においては、一般的に、半導体チップを加熱しながら封止樹脂層を介して基板に押圧し、その後、半導体チップの突起状電極が溶融する温度よりやや高い温度にまで半導体チップを加熱して、突起状電極を基板の電極部に接合する。
In recent years, flip-chip mounting using a semiconductor chip having protruding electrodes (bumps) made of solder or the like has been widely used in order to cope with miniaturization and high integration of semiconductor devices that are becoming more and more advanced. Further, since the distance between the semiconductor chips and the distance between the protruding electrodes are narrowed, the sealing resin layer is not provided after the electrode bonding, but a sealing resin layer is provided in advance on the substrate or the semiconductor chip. A method is being considered.
In such a method, generally, the semiconductor chip is pressed against the substrate through the sealing resin layer while heating the semiconductor chip, and then the semiconductor chip is heated to a temperature slightly higher than the temperature at which the protruding electrode of the semiconductor chip melts. By heating, the protruding electrode is bonded to the electrode portion of the substrate.

例えば、特許文献1には、フリップチップ実装方法において、半導体チップ及び配線回路基板の少なくとも一方の対向面に封止充填剤用樹脂組成物を介在させ、半導体チップのバンプと配線回路基板の電極とを加熱圧着することが記載されている。特許文献1の実施例には、具体的な実装条件として、熱超音波併用フリップチップボンダーで、ヘッド温度200℃、ステージ温度80℃、圧力180N/チップの条件で加熱圧着したことが記載されている。 For example, in Patent Document 1, in a flip chip mounting method, a resin composition for a sealing filler is interposed on at least one facing surface of a semiconductor chip and a printed circuit board, and bumps of the semiconductor chip, electrodes of the printed circuit board, Is described. In the example of Patent Document 1, as a specific mounting condition, it is described that a thermo-ultrasonic combined flip chip bonder is thermocompression bonded under the conditions of a head temperature of 200 ° C., a stage temperature of 80 ° C., and a pressure of 180 N / chip. Yes.

しかしながら、近年、半導体チップの高密度化が進行するとともに半導体チップ1つ当たりの突起状電極の数が増加したり突起状電極のサイズが小さくなったりしていることから、高精度な電極接合を行うことが難しくなっており、特に突起状電極の高さのばらつきを原因とする接合不良の問題が顕著となっている。 However, in recent years, as the density of semiconductor chips has increased, the number of protruding electrodes per semiconductor chip has increased or the size of the protruding electrodes has decreased. In particular, the problem of poor bonding due to variations in the height of the protruding electrodes has become prominent.

特開2008−147510号公報JP 2008-147510 A

本発明は、高精度な電極接合を行うことができ、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減することのできる半導体チップ実装体の製造方法を提供することを目的とする。 The present invention can perform high-precision electrode bonding, and can reduce defective bonding of electrodes even in a thin semiconductor chip having a large number of protruding electrodes or a semiconductor chip having a fragile low dielectric layer. An object of the present invention is to provide a method for manufacturing a semiconductor chip package.

本発明は、封止樹脂を介して半導体チップと電子部品とを別々の温度に加熱しながら押圧して、前記半導体チップの突起状電極と前記電子部品の電極部とを接触及び接合させる工程と、前記封止樹脂を硬化させる工程とを有する半導体チップ実装体の製造方法であって、前記半導体チップの突起状電極と前記電子部品の電極部とを接触及び接合させる工程において、前記半導体チップの突起状電極の先端部の融点をM1、前記電子部品の電極部の融点をM2、前記半導体チップを加熱する温度をT1、前記電子部品を加熱する温度をT2としたとき、T1<M1<T2<M2、又は、T2<M2<T1<M1を満たす半導体チップ実装体の製造方法である。
以下、本発明を詳述する。
The present invention includes a step of contacting and joining the protruding electrode of the semiconductor chip and the electrode portion of the electronic component by pressing the semiconductor chip and the electronic component through the sealing resin while heating to different temperatures. And a step of curing the sealing resin, wherein the step of contacting and joining the protruding electrode of the semiconductor chip and the electrode portion of the electronic component includes: When the melting point of the tip of the protruding electrode is M1, the melting point of the electrode part of the electronic component is M2, the temperature for heating the semiconductor chip is T1, and the temperature for heating the electronic component is T2, T1 <M1 <T2 This is a method for manufacturing a semiconductor chip package satisfying <M2 or T2 <M2 <T1 <M1.
The present invention is described in detail below.

本発明者は、突起状電極の高さにばらつきがある場合には、半導体チップを基板に押圧しても低い突起状電極は電極部に到達できず、その結果、電極の接合不良が生じることを見出した。突起状電極の高さにばらつきがある場合にも、例えば、半導体チップを押圧する荷重を大きくすれば全ての突起状電極を電極部に到達させることができると考えられる。しかしながら、薄い半導体チップに高荷重をかけると、半導体チップに割れ又は欠けが生じたり、半導体チップ上に形成されている脆い低誘電層が破壊されたりしてしまう。
このような問題に対し、本発明者は、半導体チップの突起状電極と電子部品の電極部とを接触及び接合させる工程において、突起状電極が電極部に接触した時点で、電極部の熱により突起状電極が溶融するか又は突起状電極の熱により電極部が溶融するように加熱温度を調整することにより、突起状電極の高さにばらつきがあっても高荷重をかける必要がなく、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減できることを見出した。更に、本発明者は、このような方法によれば、個々の電極接合についても高精度に行うことができることを見出し、本発明を完成させるに至った。
When the height of the protruding electrode varies, the inventor cannot reach the electrode portion even if the semiconductor chip is pressed against the substrate, resulting in poor bonding of the electrodes. I found. Even when there is variation in the height of the protruding electrodes, for example, it is considered that all the protruding electrodes can reach the electrode portion by increasing the load for pressing the semiconductor chip. However, when a high load is applied to a thin semiconductor chip, the semiconductor chip is cracked or chipped, or a fragile low dielectric layer formed on the semiconductor chip is destroyed.
In response to such a problem, the present inventor, in the process of contacting and joining the protruding electrode of the semiconductor chip and the electrode part of the electronic component, at the time when the protruding electrode contacts the electrode part, By adjusting the heating temperature so that the protruding electrode melts or the electrode part is melted by the heat of the protruding electrode, there is no need to apply a high load even if the height of the protruding electrode varies. It has been found that even a thin semiconductor chip having a protruding electrode and a semiconductor chip having a fragile low dielectric layer can reduce defective bonding of electrodes. Furthermore, the present inventor has found that according to such a method, individual electrode bonding can be performed with high accuracy, and the present invention has been completed.

本発明の半導体チップ実装体の製造方法では、まず、封止樹脂を介して半導体チップと電子部品とを別々の温度に加熱しながら押圧して、上記半導体チップの突起状電極と上記電子部品の電極部とを接触及び接合させる工程を行う。 In the manufacturing method of the semiconductor chip mounting body of the present invention, first, the semiconductor chip and the electronic component are pressed through the sealing resin while being heated to different temperatures, so that the protruding electrode of the semiconductor chip and the electronic component are A process of contacting and joining the electrode part is performed.

上記半導体チップは、突起状電極を有する。上記突起状電極として、例えば、低融点の電極材料のみからなる突起状電極、銅等の金属材料からなる柱状電極と、低融点の電極材料からなる先端部とを有する突起状電極等が挙げられる。上記低融点の電極材料として、例えば、ハンダ等が挙げられる。
上記電子部品は、電極部を有する。上記電極部を構成する電極材料として、例えば、銅、鉛フリーハンダ等の合金等が挙げられる。上記電子部品は特に限定されず幅広く選択され、例えば、半導体チップ、ウエハ、基板等が挙げられる。
The semiconductor chip has a protruding electrode. Examples of the protruding electrode include a protruding electrode made of only a low melting point electrode material, a protruding electrode having a columnar electrode made of a metal material such as copper, and a tip portion made of a low melting point electrode material. . Examples of the low melting point electrode material include solder.
The electronic component has an electrode part. Examples of the electrode material constituting the electrode part include alloys such as copper and lead-free solder. The electronic component is not particularly limited and is widely selected. Examples thereof include a semiconductor chip, a wafer, and a substrate.

上記半導体チップの突起状電極と上記電子部品の電極部とを接触及び接合させる工程では、上記半導体チップと上記電子部品とを別々の温度に加熱しながら押圧する。
上記半導体チップと上記電子部品とを別々の温度に加熱しながら押圧する方法として、例えば、従来公知のステージ及びボンディングヘッドを有するボンディング装置にて、所定の温度に設定したステージに上記電子部品を搭載し、所定の温度に設定したボンディングヘッドを用いて上記電子部品に対して上記半導体チップを押圧する方法、上記半導体チップと上記電子部品とをそれぞれ所定の温度に設定したパルスヒーターを用いて加熱しながら、上記電子部品に対して上記半導体チップを押圧する方法等が挙げられる。なかでも、短時間で昇温させることができることから、上記半導体チップと上記電子部品とをパルスヒーターを用いて加熱する方法が好ましい。
なお、上記半導体チップと上記電子部品とを押圧する際には、上記半導体チップに対して上記電子部品を押圧してもよく、上記電子部品に対して上記半導体チップを押圧してもよい。
In the step of contacting and joining the protruding electrode of the semiconductor chip and the electrode portion of the electronic component, the semiconductor chip and the electronic component are pressed while being heated to different temperatures.
As a method for pressing the semiconductor chip and the electronic component while heating them at different temperatures, for example, the electronic component is mounted on a stage set at a predetermined temperature in a bonding apparatus having a conventionally known stage and bonding head. And a method of pressing the semiconductor chip against the electronic component using a bonding head set at a predetermined temperature, and heating the semiconductor chip and the electronic component using a pulse heater set at a predetermined temperature, respectively. However, there is a method of pressing the semiconductor chip against the electronic component. Especially, since the temperature can be raised in a short time, a method of heating the semiconductor chip and the electronic component using a pulse heater is preferable.
When pressing the semiconductor chip and the electronic component, the electronic component may be pressed against the semiconductor chip, or the semiconductor chip may be pressed against the electronic component.

ボンディング装置のステージ及びボンディングヘッドを所定の温度に設定する方法は特に限定されず、例えば、パルスヒーター、コンスタントヒーター等のヒーターを用いてステージ温度及びボンディングヘッド温度を調整する方法等が挙げられる。 A method of setting the stage and the bonding head of the bonding apparatus to a predetermined temperature is not particularly limited, and examples thereof include a method of adjusting the stage temperature and the bonding head temperature using a heater such as a pulse heater or a constant heater.

上記半導体チップと上記電子部品とを押圧する際の突起状電極1個あたりの荷重は、好ましい下限が0.002N、好ましい上限が0.080Nである。荷重が0.002N未満であると、特に突起状電極の高さにばらつきがある場合に、良好な電極接合を行うことができないことがある。荷重が0.080Nを超えると、特に上記半導体チップ又は上記電子部品が薄い場合に、上記半導体チップ又は上記電子部品に割れ又は欠けが生じることがある。
上記押圧する際の突起状電極1個あたりの荷重のより好ましい上限は0.010Nである。荷重が0.010Nを超えると、上記半導体チップの脆い低誘電層が破壊されることがある。
The preferable lower limit of the load per protruding electrode when pressing the semiconductor chip and the electronic component is 0.002N, and the preferable upper limit is 0.080N. When the load is less than 0.002 N, good electrode bonding may not be performed particularly when the height of the protruding electrode varies. When the load exceeds 0.080 N, particularly when the semiconductor chip or the electronic component is thin, the semiconductor chip or the electronic component may be cracked or chipped.
A more preferable upper limit of the load per protruding electrode at the time of pressing is 0.010N. When the load exceeds 0.010 N, the brittle low dielectric layer of the semiconductor chip may be destroyed.

上記半導体チップの突起状電極と上記電子部品の電極部とを接触及び接合させる工程では、上記半導体チップの突起状電極の先端部の融点をM1、上記電子部品の電極部の融点をM2、上記半導体チップを加熱する温度をT1、上記電子部品を加熱する温度をT2としたとき、T1<M1<T2<M2、又は、T2<M2<T1<M1となる。
なお、上記電子部品の電極部が複数の融点を有する場合には、上記電子部品の電極部の融点M2とは、上記電子部品の電極部の融点のうち最も低い融点を意味する。
図3に、本発明の半導体チップ実装体の製造方法における、半導体チップの突起状電極と電子部品の電極部とを接触及び接合させる工程の一例を模式的に示す。図3においては、ボンディングヘッド1に保持された半導体チップの突起状電極2と、ステージ4上の電子部品(基板)の電極部3とが接触及び接合している。図3では、突起状電極の先端部の融点M1、基板の電極部の融点M2、ボンディングヘッド温度T1、ステージ温度T2を、符号の後の括弧内に示す。
In the step of contacting and joining the protruding electrode of the semiconductor chip and the electrode portion of the electronic component, the melting point of the tip portion of the protruding electrode of the semiconductor chip is M1, the melting point of the electrode portion of the electronic component is M2, When the temperature for heating the semiconductor chip is T1, and the temperature for heating the electronic component is T2, T1 <M1 <T2 <M2 or T2 <M2 <T1 <M1.
When the electrode part of the electronic component has a plurality of melting points, the melting point M2 of the electrode part of the electronic component means the lowest melting point among the melting points of the electrode part of the electronic component.
FIG. 3 schematically shows an example of the process of contacting and joining the protruding electrode of the semiconductor chip and the electrode part of the electronic component in the method for manufacturing a semiconductor chip package according to the present invention. In FIG. 3, the protruding electrode 2 of the semiconductor chip held by the bonding head 1 and the electrode portion 3 of the electronic component (substrate) on the stage 4 are in contact with and bonded to each other. In FIG. 3, the melting point M1 at the tip of the protruding electrode, the melting point M2 of the substrate electrode, the bonding head temperature T1, and the stage temperature T2 are shown in parentheses after the reference numerals.

まず、式:T1<M1<T2<M2について説明する。
上記半導体チップを加熱する温度(T1)が上記半導体チップの突起状電極の先端部の融点(M1)より低い(T1<M1)ことにより、上記半導体チップの突起状電極は、上記電子部品の電極部と接触する前は溶融していない。一方、上記電子部品を加熱する温度(T2)が上記半導体チップの突起状電極の先端部の融点(M1)より高い(M1<T2)ことにより、上記半導体チップの突起状電極は、上記電子部品の電極部と接触すると、接触した時点で電極部の熱により溶融する。従って、上記半導体チップの突起状電極は、高い突起状電極から順に上記電子部品の電極部に到達して溶融し、該電極部と接合することとなる。
従って、式:T1<M1<T2<M2を満たすことにより、突起状電極の高さにばらつきがあっても高荷重をかける必要がなく、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減することができる。また、個々の電極接合についても高精度に行うことができる。
なお、上記電子部品を加熱する温度(T2)が上記電子部品の電極部の融点(M2)より低い(T2<M2)ことにより、上記電子部品の電極部は加熱されても溶融しない。
First, the formula: T1 <M1 <T2 <M2 will be described.
When the temperature (T1) for heating the semiconductor chip is lower than the melting point (M1) of the tip of the protruding electrode of the semiconductor chip (T1 <M1), the protruding electrode of the semiconductor chip becomes the electrode of the electronic component. It is not melted before contacting the part. On the other hand, when the temperature (T2) for heating the electronic component is higher than the melting point (M1) of the tip of the protruding electrode of the semiconductor chip (M1 <T2), the protruding electrode of the semiconductor chip is When it comes into contact with the electrode part, it melts due to the heat of the electrode part at the time of contact. Therefore, the protruding electrode of the semiconductor chip reaches the electrode part of the electronic component in order from the high protruding electrode and melts and is joined to the electrode part.
Therefore, by satisfying the formula: T1 <M1 <T2 <M2, it is not necessary to apply a high load even if the height of the protruding electrode varies, and a thin semiconductor chip having a large number of protruding electrodes or a fragile low Even in a semiconductor chip having a dielectric layer, it is possible to reduce electrode bonding defects. Also, individual electrode bonding can be performed with high accuracy.
The temperature (T2) for heating the electronic component is lower than the melting point (M2) of the electrode portion of the electronic component (T2 <M2), so that the electrode portion of the electronic component does not melt even when heated.

次に、式:T2<M2<T1<M1について説明する。
上記電子部品を加熱する温度(T2)が上記電子部品の電極部の融点(M2)より低い(T2<M2)ことにより、上記電子部品の電極部は、上記半導体チップの突起状電極と接触する前は溶融していない。一方、上記半導体チップを加熱する温度(T1)が上記電子部品の電極部の融点(M2)より高い(M2<T1)ことにより、上記電子部品の電極部は、上記半導体チップの突起状電極と接触すると、接触した時点で突起状電極の熱により溶融する。従って、上記電子部品の電極部は、高い突起状電極と接触した電極部から順に溶融し、該突起状電極と接合することとなる。
従って、式:T2<M2<T1<M1を満たすことにより、突起状電極の高さにばらつきがあっても高荷重をかける必要がなく、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減することができる。また、個々の電極接合についても高精度に行うことができる。
なお、上記半導体チップを加熱する温度(T1)が上記半導体チップの突起状電極の先端部の融点(M1)より低い(T1<M1)ことにより、上記半導体チップの突起状電極は加熱されても溶融しない。
Next, the formula: T2 <M2 <T1 <M1 will be described.
Since the temperature (T2) for heating the electronic component is lower than the melting point (M2) of the electrode portion of the electronic component (T2 <M2), the electrode portion of the electronic component is in contact with the protruding electrode of the semiconductor chip. It has not melted before. On the other hand, when the temperature (T1) for heating the semiconductor chip is higher than the melting point (M2) of the electrode part of the electronic component (M2 <T1), the electrode part of the electronic component is connected to the protruding electrode of the semiconductor chip. When contacted, the projection electrode melts at the time of contact. Therefore, the electrode part of the electronic component is melted in order from the electrode part in contact with the high projecting electrode and joined to the projecting electrode.
Therefore, by satisfying the formula: T2 <M2 <T1 <M1, there is no need to apply a high load even if the height of the protruding electrode varies, and a thin semiconductor chip having a large number of protruding electrodes or a brittle low Even in a semiconductor chip having a dielectric layer, it is possible to reduce electrode bonding defects. Also, individual electrode bonding can be performed with high accuracy.
The temperature (T1) for heating the semiconductor chip is lower than the melting point (M1) of the tip of the protruding electrode of the semiconductor chip (T1 <M1), so that the protruding electrode of the semiconductor chip is heated. Does not melt.

上記半導体チップの突起状電極の先端部の融点(M1)は、例えば、上記先端部を構成する電極材料がハンダである場合は220℃程度である。また、上記電子部品の電極部の融点(M2)は、例えば、上記電極部を構成する電極材料が銅である場合は1083℃程度であり、上記電極部を構成する電極材料が鉛フリーハンダである場合は230℃程度である。
上記半導体チップを加熱する温度(T1)及び上記電子部品を加熱する温度(T2)は、使用する電極材料の融点に合わせて適宜調整すればよいが、上記半導体チップを加熱する温度(T1)は、例えば、200〜210℃程度であり、上記電子部品を加熱する温度(T2)は、例えば、230〜240℃程度である。
The melting point (M1) of the tip of the protruding electrode of the semiconductor chip is, for example, about 220 ° C. when the electrode material constituting the tip is solder. The melting point (M2) of the electrode part of the electronic component is, for example, about 1083 ° C. when the electrode material constituting the electrode part is copper, and the electrode material constituting the electrode part is lead-free solder. In some cases, it is about 230 ° C.
The temperature (T1) for heating the semiconductor chip and the temperature (T2) for heating the electronic component may be appropriately adjusted according to the melting point of the electrode material used, but the temperature (T1) for heating the semiconductor chip is For example, it is about 200-210 degreeC, and the temperature (T2) which heats the said electronic component is about 230-240 degreeC, for example.

上記封止樹脂は特に限定されず、硬化剤と硬化性化合物とを含有することが好ましく、硬化剤と硬化性化合物との組み合わせによって上記封止樹脂の硬化性を制御することができる。
上記硬化性化合物は特に限定されず、例えば、ユリア化合物、メラミン化合物、フェノール化合物、レゾルシノール化合物、エポキシ化合物、アクリル化合物、ポリエステル化合物、ポリアミド化合物、ポリベンズイミダゾール樹脂、ジアリルフタレート化合物、キシレン化合物、アルキル−ベンゼン化合物、エポキシアクリレート化合物、珪素樹脂、ウレタン化合物、エピスルフィド化合物、ビスマレイミド化合物等の熱硬化性化合物が挙げられる。なかでも、得られる半導体チップ実装体が信頼性及び接合強度に優れることから、エポキシ化合物又はエピスルフィド化合物が好ましい。
The sealing resin is not particularly limited, and preferably contains a curing agent and a curable compound, and the curability of the sealing resin can be controlled by a combination of the curing agent and the curable compound.
The curable compound is not particularly limited. For example, urea compound, melamine compound, phenol compound, resorcinol compound, epoxy compound, acrylic compound, polyester compound, polyamide compound, polybenzimidazole resin, diallyl phthalate compound, xylene compound, alkyl- Examples thereof include thermosetting compounds such as benzene compounds, epoxy acrylate compounds, silicon resins, urethane compounds, episulfide compounds, and bismaleimide compounds. Especially, since the obtained semiconductor chip mounting body is excellent in reliability and joining strength, an epoxy compound or an episulfide compound is preferable.

上記エポキシ化合物は特に限定されず、例えば、ビスフェノールA型、ビスフェノールF型、ビスフェノールAD型、ビスフェノールS型等のビスフェノール型エポキシ化合物、フェノールノボラック型、クレゾールノボラック型等のノボラック型エポキシ化合物、レゾルシノール型エポキシ化合物、トリスフェノールメタントリグリシジルエーテル等の芳香族エポキシ化合物、ナフタレン型エポキシ化合物、フルオレン型エポキシ化合物、ジシクロペンタジエン型エポキシ化合物、ポリエーテル変性エポキシ化合物、ベンゾフェノン型エポキシ化合物、アニリン型エポキシ化合物、NBR変性エポキシ化合物、CTBN変性エポキシ化合物、及び、これらの水添化物等が挙げられる。なかでも、速硬化性が得られやすいことから、ベンゾフェノン型エポキシ化合物が好ましい。これらのエポキシ化合物は、単独で用いられてもよく、2種以上が併用されてもよい。 The epoxy compound is not particularly limited, and examples thereof include bisphenol type epoxy compounds such as bisphenol A type, bisphenol F type, bisphenol AD type, and bisphenol S type, novolac type epoxy compounds such as phenol novolak type and cresol novolak type, and resorcinol type epoxy. Compounds, aromatic epoxy compounds such as trisphenolmethane triglycidyl ether, naphthalene type epoxy compounds, fluorene type epoxy compounds, dicyclopentadiene type epoxy compounds, polyether modified epoxy compounds, benzophenone type epoxy compounds, aniline type epoxy compounds, NBR modified Examples thereof include epoxy compounds, CTBN-modified epoxy compounds, and hydrogenated products thereof. Among these, a benzophenone type epoxy compound is preferable because quick curability is easily obtained. These epoxy compounds may be used independently and 2 or more types may be used together.

上記ビスフェノールF型エポキシ化合物のうち、市販品として、例えば、EXA−830−LVP、EXA−830−CRP(以上、DIC社製)等が挙げられる。
上記レゾルシノール型エポキシ化合物のうち、市販品として、例えば、EX−201(ナガセケムテックス社製)等が挙げられる。
上記ポリエーテル変性エポキシ化合物のうち、市販品として、例えば、EX−931(ナガセケムテックス社製)、EXA−4850−150(DIC社製)、EP−4005(アデカ社製)等が挙げられる。
Among the above bisphenol F-type epoxy compounds, as commercial products, for example, EXA-830-LVP, EXA-830-CRP (manufactured by DIC) and the like can be mentioned.
Among the resorcinol type epoxy compounds, as a commercially available product, for example, EX-201 (manufactured by Nagase ChemteX Corporation) and the like can be mentioned.
Among the polyether-modified epoxy compounds, as commercial products, for example, EX-931 (manufactured by Nagase ChemteX), EXA-4850-150 (manufactured by DIC), EP-4005 (manufactured by ADEKA) and the like can be mentioned.

上記エピスルフィド化合物は、エピスルフィド基を有していれば特に限定されず、例えば、エポキシ化合物のエポキシ基の酸素原子を硫黄原子に置換した化合物が挙げられる。
上記エピスルフィド化合物として、具体的には例えば、ビスフェノール型エピスルフィド化合物(ビスフェノール型エポキシ化合物のエポキシ基の酸素原子を硫黄原子に置換した化合物)、水添ビスフェノール型エピスルフィド化合物、ジシクロペンタジエン型エピスルフィド化合物、ビフェニル型エピスルフィド化合物、フェノールノボラック型エピスルフィド化合物、フルオレン型エピスルフィド化合物、ポリエーテル変性エピスルフィド化合物、ブタジエン変性エピスルフィド化合物、トリアジンエピスルフィド化合物、ナフタレン型エピスルフィド化合物等が挙げられる。なかでも、ナフタレン型エピスルフィド化合物が好ましい。これらのエピスルフィド化合物は、単独で用いられてもよく、2種以上が併用されてもよい。
なお、酸素原子から硫黄原子への置換は、エポキシ基の少なくとも一部におけるものであってもよく、すべてのエポキシ基の酸素原子が硫黄原子に置換されていてもよい。
The episulfide compound is not particularly limited as long as it has an episulfide group, and examples thereof include compounds in which the oxygen atom of the epoxy group of the epoxy compound is substituted with a sulfur atom.
Specific examples of the episulfide compound include bisphenol type episulfide compounds (compounds in which the oxygen atom of the epoxy group of the bisphenol type epoxy compound is substituted with a sulfur atom), hydrogenated bisphenol type episulfide compounds, dicyclopentadiene type episulfide compounds, and biphenyl. Type episulfide compound, phenol novolac type episulfide compound, fluorene type episulfide compound, polyether modified episulfide compound, butadiene modified episulfide compound, triazine episulfide compound, naphthalene type episulfide compound and the like. Of these, naphthalene type episulfide compounds are preferred. These episulfide compounds may be used independently and 2 or more types may be used together.
The substitution from oxygen atoms to sulfur atoms may be in at least a part of the epoxy group, or the oxygen atoms of all epoxy groups may be substituted with sulfur atoms.

上記エピスルフィド化合物のうち、市販品として、例えば、YL−7007(水添ビスフェノールA型エピスルフィド化合物、ジャパンエポキシレジン社製)等が挙げられる。また、上記エピスルフィド化合物は、例えば、チオシアン酸カリウム、チオ尿素等の硫化剤を使用して、エポキシ化合物から容易に合成される。 Among the above-mentioned episulfide compounds, YL-7007 (hydrogenated bisphenol A type episulfide compound, manufactured by Japan Epoxy Resin Co., Ltd.) and the like can be mentioned as commercially available products. Moreover, the said episulfide compound is easily synthesize | combined from an epoxy compound, for example using sulfurizing agents, such as potassium thiocyanate and thiourea.

上記封止樹脂が上記エピスルフィド化合物を含有する場合、上記エピスルフィド化合物の配合量は特に限定されないが、上記封止樹脂全体100重量部に対する好ましい下限が3重量部、好ましい上限が12重量部であり、より好ましい下限が6重量部、より好ましい上限が9重量部である。 When the sealing resin contains the episulfide compound, the compounding amount of the episulfide compound is not particularly limited, but a preferable lower limit with respect to 100 parts by weight of the entire sealing resin is 3 parts by weight, and a preferable upper limit is 12 parts by weight, A more preferred lower limit is 6 parts by weight, and a more preferred upper limit is 9 parts by weight.

上記封止樹脂は、上記硬化性化合物と反応可能な官能基を有する高分子化合物(以下、単に、反応可能な官能基を有する高分子化合物ともいう)を含有することが好ましい。上記反応可能な官能基を有する高分子化合物を含有することにより、得られる封止樹脂は、熱によるひずみが発生する際の接合信頼性が向上する。 The sealing resin preferably contains a polymer compound having a functional group capable of reacting with the curable compound (hereinafter also simply referred to as a polymer compound having a functional group capable of reacting). By containing the high molecular compound which has the said functional group which can react, the sealing resin obtained improves the joining reliability at the time of the distortion | strain by a heat | fever generate | occur | producing.

上記反応可能な官能基を有する高分子化合物として、上記硬化性化合物としてエポキシ化合物を用いる場合には、例えば、アミノ基、ウレタン基、イミド基、水酸基、カルボキシル基、エポキシ基等を有する高分子化合物等が挙げられる。なかでも、エポキシ基を有する高分子化合物が好ましい。上記エポキシ基を有する高分子化合物を含有することで、得られる封止樹脂の硬化物は、優れた可撓性を発現する。即ち、上記封止樹脂の硬化物は、上記硬化性化合物としてのエポキシ化合物に由来する優れた機械的強度、耐熱性及び耐湿性と、上記エポキシ基を有する高分子化合物に由来する優れた可撓性とを兼備することができ、耐冷熱サイクル性、耐ハンダリフロー性及び寸法安定性等に優れ、高い接着信頼性及び高い導通信頼性を発現する。 When an epoxy compound is used as the curable compound as the polymer compound having a reactive functional group, for example, a polymer compound having an amino group, a urethane group, an imide group, a hydroxyl group, a carboxyl group, an epoxy group, or the like. Etc. Among these, a polymer compound having an epoxy group is preferable. By containing the high molecular compound which has the said epoxy group, the hardened | cured material of the obtained sealing resin expresses the outstanding flexibility. That is, the cured product of the sealing resin has excellent mechanical strength, heat resistance and moisture resistance derived from the epoxy compound as the curable compound, and excellent flexibility derived from the polymer compound having the epoxy group. It is excellent in cold cycle resistance, solder reflow resistance, dimensional stability, etc., and exhibits high adhesion reliability and high conduction reliability.

上記エポキシ基を有する高分子化合物は特に限定されず、末端及び/又は側鎖(ペンダント位)にエポキシ基を有する高分子化合物であればよく、例えば、エポキシ基含有アクリルゴム、エポキシ基含有ブタジエンゴム、ビスフェノール型高分子量エポキシ化合物、エポキシ基含有フェノキシ樹脂、エポキシ基含有アクリル樹脂、エポキシ基含有ウレタン樹脂、エポキシ基含有ポリエステル樹脂等が挙げられる。なかでも、エポキシ基を多く含有することができ、得られる封止樹脂の硬化物の機械的強度及び耐熱性がより優れたものとなることから、エポキシ基含有アクリル樹脂が好ましい。これらのエポキシ基を有する高分子化合物は、単独で用いられてもよく、2種以上が併用されてもよい。 The polymer compound having an epoxy group is not particularly limited as long as it is a polymer compound having an epoxy group at a terminal and / or side chain (pendant position). For example, an epoxy group-containing acrylic rubber, an epoxy group-containing butadiene rubber Bisphenol type high molecular weight epoxy compound, epoxy group-containing phenoxy resin, epoxy group-containing acrylic resin, epoxy group-containing urethane resin, epoxy group-containing polyester resin and the like. Among these, an epoxy group-containing acrylic resin is preferable because it can contain a large amount of epoxy groups and the cured product of the resulting sealing resin has better mechanical strength and heat resistance. These polymer compounds having an epoxy group may be used alone or in combination of two or more.

上記反応可能な官能基を有する高分子化合物として、上記エポキシ基を有する高分子化合物、特にエポキシ基含有アクリル樹脂を用いる場合、上記エポキシ基を有する高分子化合物の重量平均分子量の好ましい下限は1万である。上記エポキシ基を有する高分子化合物の重量平均分子量が1万未満であると、得られる封止樹脂の硬化物の可撓性が充分に向上しないことがある。 When the polymer compound having an epoxy group, particularly an epoxy group-containing acrylic resin, is used as the polymer compound having a functional group capable of reacting, the preferred lower limit of the weight average molecular weight of the polymer compound having an epoxy group is 10,000. It is. When the weight average molecular weight of the polymer compound having an epoxy group is less than 10,000, the flexibility of the cured product of the obtained sealing resin may not be sufficiently improved.

上記反応可能な官能基を有する高分子化合物として、上記エポキシ基を有する高分子化合物、特にエポキシ基含有アクリル樹脂を用いる場合、上記エポキシ基を有する高分子化合物のエポキシ当量の好ましい下限は200、好ましい上限は1000である。上記エポキシ基を有する高分子化合物のエポキシ当量が200未満であると、得られる封止樹脂の硬化物の可撓性が充分に向上しないことがある。上記エポキシ基を有する高分子化合物のエポキシ当量が1000を超えると、得られる封止樹脂の硬化物の機械的強度及び耐熱性が低下することがある。 When the polymer compound having an epoxy group, particularly an epoxy group-containing acrylic resin is used as the polymer compound having a functional group capable of reacting, the preferred lower limit of the epoxy equivalent of the polymer compound having an epoxy group is preferably 200. The upper limit is 1000. When the epoxy equivalent of the polymer compound having an epoxy group is less than 200, the flexibility of the cured sealing resin obtained may not be sufficiently improved. When the epoxy equivalent of the polymer compound having an epoxy group exceeds 1000, the mechanical strength and heat resistance of the cured encapsulated resin obtained may be lowered.

上記封止樹脂が上記反応可能な官能基を有する高分子化合物を含有する場合、上記反応可能な官能基を有する高分子化合物の配合量は特に限定されないが、上記硬化性化合物100重量部に対する好ましい下限が1重量部、好ましい上限が30重量部である。上記反応可能な官能基を有する高分子化合物の配合量が1重量部未満であると、得られる封止樹脂は、熱によるひずみが発生する際の接合信頼性が低下することがある。上記反応可能な官能基を有する高分子化合物の配合量が30重量部を超えると、得られる封止樹脂の硬化物は、機械的強度、耐熱性及び耐湿性が低下することがある。 When the sealing resin contains a polymer compound having a functional group capable of reacting, the amount of the polymer compound having a functional group capable of reacting is not particularly limited, but is preferably based on 100 parts by weight of the curable compound. The lower limit is 1 part by weight, and the preferred upper limit is 30 parts by weight. When the blending amount of the polymer compound having a functional group capable of reacting is less than 1 part by weight, the resulting sealing resin may have reduced bonding reliability when heat distortion occurs. When the amount of the polymer compound having a functional group capable of reacting exceeds 30 parts by weight, the cured product of the obtained sealing resin may have reduced mechanical strength, heat resistance, and moisture resistance.

上記硬化剤は特に限定されず、従来公知の硬化剤を上記硬化性化合物に合わせて適宜選択することができる。上記硬化性化合物としてエポキシ化合物を用いる場合、上記硬化剤として、例えば、トリアルキルテトラヒドロ無水フタル酸等の加熱硬化型酸無水物系硬化剤、フェノール系硬化剤、アミン系硬化剤、ジシアンジアミド等の潜在性硬化剤、カチオン系触媒型硬化剤等が挙げられる。これらの硬化剤は、単独で用いられてもよく、2種以上が併用されてもよい。 The said hardening | curing agent is not specifically limited, A conventionally well-known hardening | curing agent can be suitably selected according to the said sclerosing | hardenable compound. When an epoxy compound is used as the curable compound, examples of the curing agent include latent heat-curing acid anhydride-based curing agents such as trialkyltetrahydrophthalic anhydride, phenol-based curing agents, amine-based curing agents, and dicyandiamide. For example, a cationic curing agent and a cationic catalyst-type curing agent. These hardening | curing agents may be used independently and 2 or more types may be used together.

上記封止樹脂が上記硬化剤を含有する場合、上記硬化剤の配合量は特に限定されないが、上記硬化性化合物の官能基と等量反応する硬化剤を用いる場合、上記硬化性化合物の官能基量に対して、60〜100当量であることが好ましい。また、触媒として機能する硬化剤を用いる場合、上記硬化剤の配合量は、上記硬化性化合物100重量部に対して好ましい下限が1重量部、好ましい上限が20重量部である。 When the sealing resin contains the curing agent, the blending amount of the curing agent is not particularly limited, but when using a curing agent that reacts with the functional group of the curable compound in an equivalent amount, the functional group of the curable compound. It is preferable that it is 60-100 equivalent with respect to quantity. Moreover, when using the hardening | curing agent which functions as a catalyst, as for the compounding quantity of the said hardening | curing agent, a preferable minimum is 1 weight part with respect to 100 weight part of said curable compounds, and a preferable upper limit is 20 weight part.

上記封止樹脂は、硬化速度又は硬化温度を調整する目的で、上記硬化剤に加えて硬化促進剤を含有することが好ましい。
上記硬化促進剤は特に限定されず、例えば、イミダゾール系硬化促進剤、3級アミン系硬化促進剤等が挙げられる。なかでも、硬化速度の制御をしやすいことから、イミダゾール系硬化促進剤が好ましい。これらの硬化促進剤は、単独で用いられてもよく、2種以上が併用されてもよい。
The sealing resin preferably contains a curing accelerator in addition to the curing agent for the purpose of adjusting the curing rate or the curing temperature.
The said hardening accelerator is not specifically limited, For example, an imidazole series hardening accelerator, a tertiary amine type hardening accelerator, etc. are mentioned. Of these, imidazole-based curing accelerators are preferable because the curing rate can be easily controlled. These hardening accelerators may be used independently and 2 or more types may be used together.

上記イミダゾール系硬化促進剤は特に限定されず、例えば、イミダゾールの1位をシアノエチル基で保護した1−シアノエチル−2−フェニルイミダゾール、イソシアヌル酸で塩基性を保護したイミダゾール系硬化促進剤(商品名「2MA−OK」、四国化成工業社製)等が挙げられる。これらのイミダゾール系硬化促進剤は、単独で用いられてもよく、2種以上が併用されてもよい。
上記硬化促進剤として、例えば、2MZ、2MZ−P、2PZ、2PZ−PW、2P4MZ、C11Z−CNS、2PZ−CNS、2PZCNS−PW、2MZ−A、2MZA−PW、C11Z−A、2E4MZ−A、2MA−OK、2MAOK−PW、2PZ−OK、2MZ−OK、2PHZ、2PHZ−PW、2P4MHZ、2P4MHZ−PW、2E4MZ・BIS、VT、VT−OK、MAVT、MAVT−OK(以上、四国化成工業社製)等が挙げられる。
The imidazole-based curing accelerator is not particularly limited. For example, 1-cyanoethyl-2-phenylimidazole in which the 1-position of imidazole is protected with a cyanoethyl group, and an imidazole-based curing accelerator whose basicity is protected with isocyanuric acid (trade name “ 2MA-OK ", manufactured by Shikoku Kasei Kogyo Co., Ltd.). These imidazole type hardening accelerators may be used independently and 2 or more types may be used together.
Examples of the curing accelerator include 2MZ, 2MZ-P, 2PZ, 2PZ-PW, 2P4MZ, C11Z-CNS, 2PZ-CNS, 2PZCNS-PW, 2MZ-A, 2MZA-PW, C11Z-A, 2E4MZ-A, 2MA-OK, 2MAOK-PW, 2PZ-OK, 2MZ-OK, 2PHZ, 2PHZ-PW, 2P4MHZ, 2P4MHZ-PW, 2E4MZ · BIS, VT, VT-OK, MAVT, MAVT-OK (above, Shikoku Chemical Industries, Ltd. Manufactured) and the like.

上記硬化促進剤の配合量は特に限定されず、上記硬化性化合物100重量部に対して好ましい下限が1重量部、好ましい上限が10重量部である。 The compounding quantity of the said hardening accelerator is not specifically limited, A preferable minimum is 1 weight part with respect to 100 weight part of said curable compounds, and a preferable upper limit is 10 weight part.

上記硬化性化合物としてエポキシ化合物を用い、かつ、上記硬化剤と上記硬化促進剤とを併用する場合、用いる硬化剤の配合量は、用いるエポキシ化合物中のエポキシ基に対して理論的に必要な当量以下とすることが好ましい。上記硬化剤の配合量が理論的に必要な当量を超えると、得られる封止樹脂を硬化して得られる硬化物から、水分によって塩素イオンが溶出しやすくなることがある。即ち、硬化剤が過剰であると、例えば、得られる封止樹脂の硬化物から熱水で溶出成分を抽出した際に、抽出水のpHが4〜5程度となるため、エポキシ化合物から塩素イオンが多量溶出することがある。従って、得られる封止樹脂の硬化物1gを、100℃の純水10gで2時間浸した後の純水のpHが6〜8であることが好ましく、pHが6.5〜7.5であることがより好ましい。 When an epoxy compound is used as the curable compound and the curing agent and the curing accelerator are used in combination, the blending amount of the curing agent used is the theoretically required equivalent to the epoxy group in the epoxy compound to be used. The following is preferable. If the blending amount of the curing agent exceeds the theoretically required equivalent, chlorine ions may be easily eluted by moisture from a cured product obtained by curing the obtained sealing resin. That is, when the curing agent is excessive, for example, when the eluted component is extracted with hot water from the resulting cured resin of the sealing resin, the pH of the extracted water becomes about 4 to 5, so that the chloride ion from the epoxy compound. May elute in large quantities. Accordingly, it is preferable that the pH of pure water after 1 g of the resulting cured resin of the sealing resin is immersed in 10 g of pure water at 100 ° C. for 2 hours is 6 to 8, and the pH is 6.5 to 7.5. More preferably.

上記封止樹脂は、上記封止樹脂の粘度を低減させるために希釈剤を含有してもよい。
上記希釈剤は、エポキシ基を有することが好ましく、1分子中のエポキシ基数の好ましい下限が2、好ましい上限が4である。1分子中のエポキシ基数が2未満であると、封止樹脂の硬化後に充分な耐熱性が発現しないことがある。1分子中のエポキシ基数が4を超えると、硬化によるひずみが発生したり、未硬化のエポキシ基が残存したりすることがあり、これにより、接合強度の低下又は繰り返しの熱応力による接合不良が発生することがある。上記希釈剤の1分子中のエポキシ基数のより好ましい上限は3である。
また、上記希釈剤は、芳香環及び/又はジシクロペンタジエン構造を有することが好ましい。
The sealing resin may contain a diluent in order to reduce the viscosity of the sealing resin.
The diluent preferably has an epoxy group, and the preferable lower limit of the number of epoxy groups in one molecule is 2, and the preferable upper limit is 4. If the number of epoxy groups in one molecule is less than 2, sufficient heat resistance may not be exhibited after the sealing resin is cured. If the number of epoxy groups in one molecule exceeds 4, distortion due to curing may occur, or uncured epoxy groups may remain, which may result in poor bonding strength or poor bonding due to repeated thermal stress. May occur. A more preferable upper limit of the number of epoxy groups in one molecule of the diluent is 3.
The diluent preferably has an aromatic ring and / or a dicyclopentadiene structure.

上記希釈剤は、120℃での重量減少量及び150℃での重量減少量の好ましい上限が1%である。120℃での重量減少量及び150℃での重量減少量が1%を超えると、得られる封止樹脂の硬化中又は硬化後に未反応物が揮発してしまい、生産性又は得られる半導体チップ実装体の性能に悪影響を与えることがある。
また、上記希釈剤は、上記硬化性化合物よりも硬化開始温度が低く、硬化速度が大きいことが好ましい。
The preferable upper limit of the weight loss at 120 ° C. and the weight loss at 150 ° C. is 1%. If the weight loss at 120 ° C. and the weight loss at 150 ° C. exceed 1%, unreacted substances will volatilize during or after curing of the resulting sealing resin, resulting in productivity or obtained semiconductor chip mounting. May adversely affect body performance.
The diluent preferably has a lower curing start temperature and a higher curing rate than the curable compound.

上記封止樹脂が上記希釈剤を含有する場合、上記封止樹脂全体における上記希釈剤の配合量の好ましい下限は1重量%、好ましい上限は20重量%である。上記希釈剤の配合量が上記範囲外であると、得られる封止樹脂の粘度を充分に低減できないことがある。 When the said sealing resin contains the said diluent, the minimum with the preferable compounding quantity of the said diluent in the said whole sealing resin is 1 weight%, and a preferable upper limit is 20 weight%. If the blending amount of the diluent is out of the above range, the viscosity of the obtained sealing resin may not be sufficiently reduced.

上記封止樹脂は、更に、チキソトロピー付与剤を含有してもよい。
上記チキソトロピー付与剤を含有することで、上記封止樹脂の粘度挙動を、フリップチップ実装に最適となるように調整することができる。
The sealing resin may further contain a thixotropic agent.
By containing the thixotropy imparting agent, the viscosity behavior of the sealing resin can be adjusted to be optimal for flip chip mounting.

上記チキソトロピー付与剤は特に限定されず、例えば、金属微粒子、炭酸カルシウム、ヒュームドシリカ、酸化アルミニウム、窒化硼素、窒化アルミニウム、硼酸アルミ等の無機微粒子等が挙げられる。なかでも、ヒュームドシリカが好ましい。
また、上記チキソトロピー付与剤は、必要に応じて、表面処理が施されていてもよい。上記表面処理が施されたチキソトロピー付与剤は特に限定されないが、表面に疎水基を有する粒子が好ましく、具体的には、例えば、表面を疎水化したヒュームドシリカ等が挙げられる。
The thixotropy imparting agent is not particularly limited, and examples thereof include fine metal particles, calcium carbonate, fumed silica, inorganic fine particles such as aluminum oxide, boron nitride, aluminum nitride, and aluminum borate. Of these, fumed silica is preferable.
The thixotropy imparting agent may be subjected to a surface treatment as necessary. The thixotropy imparting agent subjected to the surface treatment is not particularly limited, but particles having a hydrophobic group on the surface are preferable, and specific examples include fumed silica having a hydrophobic surface.

上記チキソトロピー付与剤が粒子状である場合、該粒子状チキソトロピー付与剤の平均粒子径は特に限定されないが、好ましい上限は1μmである。上記粒子状チキソトロピー付与剤の平均粒子径が1μmを超えると、得られる封止樹脂が所望のチキソトロピー性を発現できないことがある。 When the thixotropy-imparting agent is in the form of particles, the average particle size of the particulate thixotropy-imparting agent is not particularly limited, but a preferred upper limit is 1 μm. When the average particle diameter of the particulate thixotropy-imparting agent exceeds 1 μm, the resulting sealing resin may not exhibit the desired thixotropy.

上記封止樹脂全体における上記チキソトロピー付与剤の配合量は特に限定されないが、上記チキソトロピー付与剤に表面処理がなされていない場合には、好ましい下限が0.5重量%、好ましい上限が20重量%である。上記チキソトロピー付与剤の配合量が0.5重量%未満であると、得られる封止樹脂に充分なチキソトロピー性を付与することができないことがある。上記チキソトロピー付与剤の配合量が20重量%を超えると、半導体チップ実装体を製造する際に上記封止樹脂の排除性が低下することがある。上記チキソトロピー付与剤の配合量のより好ましい下限は3重量%、より好ましい上限は10重量%である。 The blending amount of the thixotropy imparting agent in the entire sealing resin is not particularly limited, but when the thixotropy imparting agent is not surface-treated, a preferred lower limit is 0.5% by weight and a preferred upper limit is 20% by weight. is there. If the blending amount of the thixotropy-imparting agent is less than 0.5% by weight, sufficient thixotropy may not be imparted to the resulting sealing resin. When the blending amount of the thixotropy-imparting agent exceeds 20% by weight, the exclusion property of the sealing resin may be lowered when a semiconductor chip package is manufactured. A more preferable lower limit of the amount of the thixotropy-imparting agent is 3% by weight, and a more preferable upper limit is 10% by weight.

上記封止樹脂は、更に、無機充填材を含有することが好ましい。
上記無機充填材として、例えば、表面処理されたシリカフィラー等が挙げられる。上記表面処理されたシリカフィラーは特に限定されないが、フェニルシランカップリング剤で表面処理されたシリカフィラーが好ましい。
The sealing resin preferably further contains an inorganic filler.
Examples of the inorganic filler include surface-treated silica filler. Although the said surface-treated silica filler is not specifically limited, The silica filler surface-treated with the phenylsilane coupling agent is preferable.

上記封止樹脂が上記無機充填材を含有する場合、上記封止樹脂における上記無機充填材の配合量は特に限定されないが、上記硬化性化合物100重量部に対する好ましい下限が30重量部、好ましい上限が400重量部である。上記無機充填材の配合量が30重量部未満であると、得られる封止樹脂が充分な信頼性を保持することができないことがある。上記無機充填材の配合量が400重量部を超えると、得られる封止樹脂の粘度が高くなりすぎることがある。 When the sealing resin contains the inorganic filler, the blending amount of the inorganic filler in the sealing resin is not particularly limited, but a preferable lower limit with respect to 100 parts by weight of the curable compound is 30 parts by weight, and a preferable upper limit is 400 parts by weight. When the blending amount of the inorganic filler is less than 30 parts by weight, the obtained sealing resin may not be able to maintain sufficient reliability. When the compounding quantity of the said inorganic filler exceeds 400 weight part, the viscosity of sealing resin obtained may become high too much.

上記封止樹脂は、必要に応じて、無機イオン交換体を含有してもよい。
上記無機イオン交換体のうち、市販品として、例えば、IXEシリーズ(東亞合成社製)等が挙げられる。上記封止樹脂が上記無機イオン交換体を含有する場合、上記無機イオン交換体の配合量は特に限定されないが、好ましい上限が10重量%、好ましい下限が1重量%である。
The sealing resin may contain an inorganic ion exchanger as necessary.
Among the inorganic ion exchangers, examples of commercially available products include IXE series (manufactured by Toagosei Co., Ltd.). When the sealing resin contains the inorganic ion exchanger, the blending amount of the inorganic ion exchanger is not particularly limited, but a preferable upper limit is 10% by weight and a preferable lower limit is 1% by weight.

上記封止樹脂は、必要に応じて、ブリード防止剤、イミダゾールシランカップリング剤等の接着性付与剤等のその他の添加剤を含有してもよい。 The sealing resin may contain other additives such as an adhesion-imparting agent such as a bleed inhibitor and an imidazole silane coupling agent, if necessary.

上記封止樹脂は、上記突起状電極と上記電極部とを接触及び接合させる際に上記半導体チップと上記電子部品との間に挟み込まれればよく、上記半導体チップ側に上記封止樹脂層が予め設けられていてもよく、上記電子部品側に上記封止樹脂層が予め設けられていてもよい。 The sealing resin only needs to be sandwiched between the semiconductor chip and the electronic component when the protruding electrode and the electrode portion are brought into contact with each other, and the sealing resin layer is previously formed on the semiconductor chip side. The sealing resin layer may be provided in advance on the electronic component side.

上記封止樹脂層を半導体チップ又は電子部品に設ける方法は特に限定されず、例えば、ペースト状の封止樹脂組成物をスクリーン印刷等により半導体チップ又は電子部品に塗布する方法、シート状の封止樹脂組成物を半導体チップ又は電子部品に貼り合わせる方法等が挙げられる。また、シート状の封止樹脂組成物を半導体チップに貼り合わせる場合には、上記封止樹脂層と基材とを有するシート状材料を用い、このシート状材料をウエハに貼り合わせた状態でウエハのバックグラインドを行った後、基材の剥離及びウエハのダイシングを経て、ウエハを個別の半導体チップにダイシングしてもよい。
上記封止樹脂層を半導体チップに設ける際には、ウエハに上記封止樹脂層を設けた後でウエハを個別の半導体チップにダイシングしてもよく、ウエハを個別の半導体チップにダイシングした後で半導体チップに上記封止樹脂層を設けてもよい。
The method for providing the sealing resin layer on the semiconductor chip or electronic component is not particularly limited. For example, a method of applying a paste-like sealing resin composition to the semiconductor chip or electronic component by screen printing or the like, sheet-like sealing Examples thereof include a method of bonding a resin composition to a semiconductor chip or an electronic component. When the sheet-shaped sealing resin composition is bonded to a semiconductor chip, the sheet-shaped material having the sealing resin layer and the base material is used, and the wafer is bonded to the wafer. After performing the back grinding, the wafer may be diced into individual semiconductor chips by peeling the substrate and dicing the wafer.
When the sealing resin layer is provided on the semiconductor chip, the wafer may be diced into individual semiconductor chips after the sealing resin layer is provided on the wafer, or after the wafer is diced into individual semiconductor chips. The sealing resin layer may be provided on the semiconductor chip.

本発明の半導体チップ実装体の製造方法では、次いで、上記封止樹脂を硬化させる工程を行う。
上記封止樹脂を硬化させる工程は、上記半導体チップの突起状電極と上記電子部品の電極部とを接触及び接合させる工程の後、別途行ってもよく、上記半導体チップの突起状電極と上記電子部品の電極部とを接触及び接合させる工程と同時に行ってもよい。より良好な電極接合を行うためには、上記半導体チップの突起状電極と上記電子部品の電極部とを接触及び接合させる工程では上記封止樹脂を完全には硬化させず、その後、本硬化させることが好ましい。
In the method for manufacturing a semiconductor chip mounting body of the present invention, the step of curing the sealing resin is then performed.
The step of curing the sealing resin may be performed separately after the step of contacting and joining the protruding electrode of the semiconductor chip and the electrode portion of the electronic component. The protruding electrode of the semiconductor chip and the electronic You may perform simultaneously with the process of contacting and joining with the electrode part of components. In order to perform better electrode bonding, the sealing resin is not completely cured in the step of contacting and bonding the protruding electrode of the semiconductor chip and the electrode part of the electronic component, and is then fully cured. It is preferable.

本発明によれば、高精度な電極接合を行うことができ、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減することのできる半導体チップ実装体の製造方法を提供することができる。 According to the present invention, high-accuracy electrode bonding can be performed, and even in the case of a thin semiconductor chip having a large number of protruding electrodes or a semiconductor chip having a fragile low dielectric layer, it is possible to reduce electrode bonding defects. The manufacturing method of the semiconductor chip mounting body which can be provided can be provided.

実施例1で得られた半導体チップ実装体の研磨により露出した断面の顕微鏡写真を示す。The microscope picture of the cross section exposed by grinding | polishing of the semiconductor chip mounting body obtained in Example 1 is shown. 比較例1で得られた半導体チップ実装体の研磨により露出した断面の顕微鏡写真を示す。The microscope picture of the cross section exposed by grinding | polishing of the semiconductor chip mounting body obtained by the comparative example 1 is shown. 本発明の半導体チップ実装体の製造方法における、半導体チップの突起状電極と電子部品の電極部とを接触及び接合させる工程の一例の模式図を示す。The schematic diagram of an example of the process of making the protruding electrode of a semiconductor chip and the electrode part of an electronic component contact and join in the manufacturing method of the semiconductor chip mounting body of this invention is shown.

以下に実施例を掲げて本発明の態様を更に詳しく説明するが、本発明はこれら実施例のみに限定されない。 Examples of the present invention will be described in more detail with reference to the following examples, but the present invention is not limited to these examples.

(実施例1)
厚み725μm、幅7.3mm角であり、表面に高さ35μm、幅35μm角の正方形の銅ポストの上に高さ20μmのハンダからなる先端部(融点210℃、M1)をつけたバンプが50μmピッチでペリフェラル状に多数形成されており、デイジー回路が形成された半導体チップを準備した。この半導体チップの封止エリアに、下記の材料からなる表1に示す組成の封止樹脂溶液を塗布し、80℃20分で乾燥し、封止樹脂層が形成された半導体チップを得た。また、ハンダからなる電極部(融点230℃、M2)を有するデイジー回路が形成された基板を準備した。なお、基板としては、導通確認用の端子が設けられているものを用いた。
基板及び半導体チップをそれぞれ、パルスヒーター(ADVANCED MATERIALS社製、12mm角及び35mm角)に保持させ、基板を保持するパルスヒーターを220℃(T2)に、半導体チップを保持するパルスヒーターを200℃(T1)に設定した。基板に対して半導体チップを10N5秒で押圧し、バンプと電極部との接触及び接合を行うとともに封止樹脂を硬化させ、半導体チップ実装体を得た。このときのバンプ1個あたりの荷重は0.009Nであった。
Example 1
A bump having a thickness of 725 μm, a width of 7.3 mm square, and a tip having a tip (made of melting point: 210 ° C., M1) made of solder having a height of 20 μm on a square copper post having a height of 35 μm and a width of 35 μm is 50 μm. A large number of peripheral chips with a pitch were formed, and a semiconductor chip on which a daisy circuit was formed was prepared. A sealing resin solution having the composition shown in Table 1 made of the following materials was applied to the sealing area of the semiconductor chip and dried at 80 ° C. for 20 minutes to obtain a semiconductor chip on which a sealing resin layer was formed. In addition, a substrate on which a daisy circuit having an electrode portion made of solder (melting point: 230 ° C., M2) was formed was prepared. In addition, as a board | substrate, what was provided with the terminal for conduction | electrical_connection confirmation was used.
The substrate and the semiconductor chip are respectively held by a pulse heater (ADVANCED MATERIALS, 12 mm square and 35 mm square), the pulse heater holding the substrate is 220 ° C. (T2), and the pulse heater holding the semiconductor chip is 200 ° C. ( T1). The semiconductor chip was pressed against the substrate in 10N5 seconds to make contact and bonding between the bump and the electrode part, and to cure the sealing resin, thereby obtaining a semiconductor chip mounting body. The load per bump at this time was 0.009N.

(エポキシ化合物)
ビフェニル型エポキシ樹脂(商品名「YX−4000」、ジャパンエポキシレジン社製)
ビスフェノールA型エポキシ樹脂(商品名「1004AF」、ジャパンエポキシレジン社製)
(Epoxy compound)
Biphenyl type epoxy resin (trade name “YX-4000”, manufactured by Japan Epoxy Resin Co., Ltd.)
Bisphenol A type epoxy resin (trade name “1004AF”, manufactured by Japan Epoxy Resin Co., Ltd.)

(反応可能な官能基を有する高分子化合物)
グリシジル基含有アクリル樹脂(重量平均分子量20万、商品名「G−2050M」、日油社製)、
グリシジル基含有アクリル樹脂(重量平均分子量2万、商品名「G−0250SP」、日油社製)
(High molecular compound having a functional group capable of reacting)
Glycidyl group-containing acrylic resin (weight average molecular weight 200,000, trade name “G-2050M”, manufactured by NOF Corporation),
Glycidyl group-containing acrylic resin (weight average molecular weight 20,000, trade name “G-0250SP”, manufactured by NOF Corporation)

(硬化剤)
トリアルキルテトラヒドロ無水フタル酸(商品名「YH−306」、JER社製)
(Curing agent)
Trialkyltetrahydrophthalic anhydride (trade name “YH-306”, manufactured by JER)

(硬化促進剤)
2,4−ジアミノ−6−[2’−メチルイミダゾリル−(1’)]−エチル−s−トリアジン イソシアヌル酸付加塩(商品名「2MA−OK」、四国化成工業社製)
(Curing accelerator)
2,4-Diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid addition salt (trade name “2MA-OK”, manufactured by Shikoku Kasei Kogyo Co., Ltd.)

(無機充填材)
表面フェニル処理無機フィラー(シリカ)(商品名「SE−1050−SPT」、アドマテックス社製)
表面疎水化ヒュームドシリカ(商品名「MT−10」、トクヤマ社製)
(Inorganic filler)
Surface phenyl-treated inorganic filler (silica) (trade name “SE-1050-SPT”, manufactured by Admatechs)
Surface hydrophobized fumed silica (trade name “MT-10”, manufactured by Tokuyama Corporation)

(その他)
シランカップリング剤(商品名「KBM−573」、信越化学社製)
溶剤 メチルエチルケトン(MEK、和光純薬工業社製)
(Other)
Silane coupling agent (trade name “KBM-573”, manufactured by Shin-Etsu Chemical Co., Ltd.)
Solvent Methyl ethyl ketone (MEK, Wako Pure Chemical Industries, Ltd.)

(実施例2)
厚み725μm、幅7.3mm角であり、表面に高さ35μm、幅35μm角の正方形の銅ポストの上に高さ20μmのハンダからなる先端部(融点230℃、M1)をつけたバンプが50μmピッチでペリフェラル状に多数形成されており、デイジー回路が形成された半導体チップを準備した。この半導体チップの封止エリアに、下記の材料からなる表1に示す組成の封止樹脂溶液を塗布し、80℃20分で乾燥し、封止樹脂層が形成された半導体チップを得た。また、ハンダからなる電極部(融点210℃、M2)を有するデイジー回路が形成された基板を準備した。なお、基板としては、導通確認用の端子が設けられているものを用いた。
基板及び半導体チップをそれぞれ、パルスヒーター(ADVANCED MATERIALS社製、12mm角及び35mm角)に保持させ、基板を保持するパルスヒーターを200℃(T2)に、半導体チップを保持するパルスヒーターを220℃(T1)に設定した。基板に対して半導体チップを10N5秒で押圧し、バンプと電極部との接触及び接合を行うとともに封止樹脂を硬化させ、半導体チップ実装体を得た。このときのバンプ1個あたりの荷重は0.009Nであった。
(Example 2)
A bump having a thickness of 725 μm and a width of 7.3 mm square, and having a tip made of solder having a height of 20 μm on a square copper post having a height of 35 μm and a width of 35 μm square (melting point 230 ° C., M1) is 50 μm. A large number of peripheral chips with a pitch were formed, and a semiconductor chip on which a daisy circuit was formed was prepared. A sealing resin solution having the composition shown in Table 1 made of the following materials was applied to the sealing area of the semiconductor chip and dried at 80 ° C. for 20 minutes to obtain a semiconductor chip on which a sealing resin layer was formed. In addition, a substrate on which a daisy circuit having an electrode part (melting point: 210 ° C., M2) made of solder was formed was prepared. In addition, as a board | substrate, what was provided with the terminal for conduction | electrical_connection confirmation was used.
The substrate and the semiconductor chip are respectively held by a pulse heater (ADVANCED MATERIALS, 12 mm square and 35 mm square), the pulse heater holding the substrate is 200 ° C. (T2), and the pulse heater holding the semiconductor chip is 220 ° C. ( T1). The semiconductor chip was pressed against the substrate in 10N5 seconds to make contact and bonding between the bump and the electrode part, and to cure the sealing resin, thereby obtaining a semiconductor chip mounting body. The load per bump at this time was 0.009N.

(比較例1)
実施例1と同様にして、封止樹脂層が形成された半導体チップと、基板とを準備した。
基板に対して半導体チップを荷重10Nで押圧し、パルスヒーターでヘッド温度を280℃(T1)に、コンスタントヒーターでステージ温度を120℃(T2)に調整したフリップチップボンダー(FC3000、東レエンジニアリング社製)を用いてバンプと電極部との接触及び接合を行ったこと以外は実施例1と同様にして、半導体チップ実装体を得た。このときのバンプ1個あたりの荷重は0.009Nであった。
(Comparative Example 1)
In the same manner as in Example 1, a semiconductor chip on which a sealing resin layer was formed and a substrate were prepared.
Flip chip bonder (FC3000, manufactured by Toray Engineering Co., Ltd.) with a semiconductor chip pressed against the substrate with a load of 10 N, the head temperature adjusted to 280 ° C (T1) with a pulse heater, and the stage temperature adjusted to 120 ° C (T2) with a constant heater ) Was used to obtain a semiconductor chip mounting body in the same manner as in Example 1 except that the bump and the electrode portion were contacted and bonded. The load per bump at this time was 0.009N.

(比較例2)
実施例1と同様にして、封止樹脂層が形成された半導体チップと、基板とを準備した。
基板に対して半導体チップを荷重40Nで押圧し、パルスヒーターでヘッド温度を280℃(T1)に、コンスタントヒーターでステージ温度を120℃(T2)に調整したフリップチップボンダー(FC3000、東レエンジニアリング社製)を用いてバンプと電極部との接触及び接合を行ったこと以外は実施例1と同様にして、半導体チップ実装体を得た。このときのバンプ1個あたりの荷重は0.036Nであった。
(Comparative Example 2)
In the same manner as in Example 1, a semiconductor chip on which a sealing resin layer was formed and a substrate were prepared.
A flip chip bonder (FC3000, manufactured by Toray Engineering Co., Ltd.), which presses a semiconductor chip against the substrate with a load of 40 N, adjusts the head temperature to 280 ° C. (T1) with a pulse heater, and the stage temperature to 120 ° C. (T2) with a constant heater. ) Was used to obtain a semiconductor chip mounting body in the same manner as in Example 1 except that the bump and the electrode portion were contacted and bonded. The load per bump at this time was 0.036N.

<評価>
実施例及び比較例で得られた半導体チップ実装体について、以下の評価を行った。
<Evaluation>
The following evaluation was performed about the semiconductor chip mounting body obtained by the Example and the comparative example.

(1)導通試験
基板に設けられた導通確認用の端子に抵抗器(HIOKI社製、3541)を接続し、抵抗値を測定して、下記の基準により評価した。結果を表1に示した。なお、比較例1で得られた半導体チップ実装体については、一部のバンプが基板の電極部に到達していないため、ディジーチェーンで導通確認ができなかった。
○:抵抗値が、配線部面積及び接続数から計算される期待値に対し、±20%以内の値であった。
×:抵抗値が、配線部面積及び接続数から計算される期待値に対し、±20%を超える値であった。
(1) A resistor (manufactured by Hioki Corporation, 3541) was connected to a terminal for continuity confirmation provided on the continuity test board, and the resistance value was measured and evaluated according to the following criteria. The results are shown in Table 1. In addition, about the semiconductor chip mounting body obtained by the comparative example 1, since one part bump did not reach | attain the electrode part of a board | substrate, continuity confirmation was not able to be performed with a daisy chain.
A: The resistance value was within ± 20% of the expected value calculated from the wiring area and the number of connections.
X: The resistance value exceeded ± 20% with respect to the expected value calculated from the wiring area and the number of connections.

(2)接合状態の観察1
半導体チップ実装体を透明樹脂で封止して、観察用サンプルを作製した。この観察用サンプルを導通方向と並行な方向(バンプと並行な方向)に研磨して、接合電極部分の形状を直接観察し、下記の基準で評価した。結果を表1に示した。なお、比較例2で得られた半導体チップ実装体については、全てのバンプが基板の電極部に到達していたが、半導体チップが薄いと割れることがあり、また、脆い低誘電層が存在すると破壊されていることがあった。
○:全てのバンプが基板の電極部に到達して高精度に接合されており、半導体チップの割れも確認されなかった。
×:一部のバンプが基板の電極部に到達していないか、接合状態が不良であるか、又は、半導体チップの割れが確認された。
(2) Observation of bonding state 1
The semiconductor chip mounting body was sealed with a transparent resin to produce an observation sample. This observation sample was polished in a direction parallel to the conduction direction (direction parallel to the bump), and the shape of the bonded electrode portion was directly observed and evaluated according to the following criteria. The results are shown in Table 1. In addition, about the semiconductor chip mounting body obtained in the comparative example 2, all the bumps reached the electrode part of the substrate, but if the semiconductor chip is thin, it may be cracked, and there is a fragile low dielectric layer. It was sometimes destroyed.
○: All bumps reached the electrode part of the substrate and were bonded with high accuracy, and no cracks in the semiconductor chip were confirmed.
X: Some bumps did not reach the electrode part of the substrate, the bonding state was poor, or cracking of the semiconductor chip was confirmed.

(3)接合状態の観察2
実施例1及び比較例1で得られた半導体チップ実装体をSUS板に押し当てながら、研磨を行い、基板の電極部と半導体チップのバンプとの境界付近を露出させた。研磨により露出した断面を、金属顕微鏡(ニコン社製、MM800)を用いて観察した。
その結果、実施例1で得られた半導体チップ実装体については、全ての接合電極部分の断面において、金属の露出が確認された。これは、電極間に樹脂が介在しておらず、電極同士が良好に接合していたことを示す。一方、比較例1で得られた半導体チップ実装体については、1以上のバンプを樹脂が被覆していた。これは、電極間に樹脂が介在しており、電極同士が良好に接合できなかったことを示す。一部のバンプの高さが不足しており基板の電極部に到達できなかったため、電極同士が良好に接合することができなかったものと考えられる。
(3) Observation of bonding state 2
Polishing was performed while pressing the semiconductor chip mounting body obtained in Example 1 and Comparative Example 1 against the SUS plate to expose the vicinity of the boundary between the electrode portion of the substrate and the bump of the semiconductor chip. The cross section exposed by polishing was observed using a metal microscope (Nikon Corporation, MM800).
As a result, in the semiconductor chip mounting body obtained in Example 1, it was confirmed that the metal was exposed in the cross sections of all the bonded electrode portions. This indicates that the resin was not interposed between the electrodes, and the electrodes were well bonded. On the other hand, for the semiconductor chip mounting body obtained in Comparative Example 1, one or more bumps were covered with resin. This indicates that the resin is present between the electrodes, and the electrodes could not be bonded well. It is considered that some of the bumps were insufficient in height and could not reach the electrode part of the substrate, so that the electrodes could not be bonded satisfactorily.

なお、図1に、実施例1で得られた半導体チップ実装体の研磨により露出した断面の顕微鏡写真を、図2に、比較例1で得られた半導体チップ実装体の研磨により露出した断面の顕微鏡写真を示した。 1 shows a micrograph of a cross section exposed by polishing the semiconductor chip mounting body obtained in Example 1, and FIG. 2 shows a cross section exposed by polishing of the semiconductor chip mounting body obtained in Comparative Example 1. A photomicrograph was shown.

本発明によれば、高精度な電極接合を行うことができ、多数の突起状電極を有する、薄い半導体チップ又は脆い低誘電層を有する半導体チップであっても、電極の接合不良を低減することのできる半導体チップ実装体の製造方法を提供することができる。 According to the present invention, high-accuracy electrode bonding can be performed, and even in the case of a thin semiconductor chip having a large number of protruding electrodes or a semiconductor chip having a fragile low dielectric layer, it is possible to reduce electrode bonding defects. The manufacturing method of the semiconductor chip mounting body which can be provided can be provided.

1 ボンディングヘッド
2 突起状電極
3 基板の電極部
4 ステージ
5 封止樹脂
DESCRIPTION OF SYMBOLS 1 Bonding head 2 Protruding electrode 3 Substrate electrode part 4 Stage 5 Sealing resin

Claims (1)

封止樹脂を介して半導体チップと電子部品とを別々の温度に加熱しながら押圧して、前記半導体チップの突起状電極と前記電子部品の電極部とを接触及び接合させる工程と、
前記封止樹脂を硬化させる工程とを有する半導体チップ実装体の製造方法であって、
前記半導体チップの突起状電極と前記電子部品の電極部とを接触及び接合させる工程において、前記半導体チップの突起状電極の先端部の融点をM1、前記電子部品の電極部の融点をM2、前記半導体チップを加熱する温度をT1、前記電子部品を加熱する温度をT2としたとき、T1<M1<T2<M2、又は、T2<M2<T1<M1を満たす
ことを特徴とする半導体チップ実装体の製造方法。
A step of pressing and heating the semiconductor chip and the electronic component to different temperatures through the sealing resin to contact and join the protruding electrode of the semiconductor chip and the electrode portion of the electronic component;
A method of manufacturing a semiconductor chip mounting body including a step of curing the sealing resin,
In the step of contacting and joining the protruding electrode of the semiconductor chip and the electrode portion of the electronic component, the melting point of the tip portion of the protruding electrode of the semiconductor chip is M1, the melting point of the electrode portion of the electronic component is M2, Semiconductor chip mounting body satisfying T1 <M1 <T2 <M2 or T2 <M2 <T1 <M1, where T1 is a temperature for heating the semiconductor chip and T2 is a temperature for heating the electronic component. Manufacturing method.
JP2012077126A 2011-03-31 2012-03-29 Semiconductor chip packaging body manufacturing method Pending JP2012216831A (en)

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JP5962834B1 (en) * 2015-06-04 2016-08-03 住友ベークライト株式会社 Resin composition, adhesive film and circuit member connection method
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US10121966B2 (en) 2013-07-01 2018-11-06 Micron Technology, Inc. Semiconductor device structures including silicon-containing dielectric materials
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