JP2012183877A - Detection processing device of vehicle occupant protection system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a detection processing device of a vehicle occupant protection system, facilitating a proper treatment such as part replacement of a control circuit by outputting an alarm according to the kind of a reset factor.SOLUTION: A development current is output to an airbag device 15 in response to development determination of a development determining part 6 provided in a control circuit 5 including a microcomputer or the like. A memory part 9 is connected to a CPU 8 that is a central arithmetic processing unit of the control circuit 5. In the memory part 9, a region in a RAM part 9b, where signal data including a forced reset signal can be read and written, is divided into a general RAM part 10 and a WDT circuit diagnosing RAM part 11. To the control circuit 5, an external WDT circuit 17 comprising ASIC is connected in addition to an internal WDT circuit 12, and runaway or the like is detected to distinguish the restart factor.

Description

  The present invention relates to a detection processing apparatus for a vehicle occupant protection system that detects an operating state of a control circuit that is mainly used in a vehicle such as an automobile and is used to determine whether a passenger protection system such as an air bag is deployed. It is.

  Conventionally, a detection processing apparatus for a vehicle occupant protection system as shown in FIGS. 5 and 6 is known (see, for example, Patent Document 1).

  First, the configuration of the detection processing device of the vehicle occupant protection system will be described. In the detection processing device of the vehicle occupant protection system, detection is provided in the driver's seat or the front of the passenger seat in the passenger compartment of the vehicle. An airbag device is provided that operates the inflator to inflate the airbag body when the processing circuit 1 determines deployment.

  Such an airbag device is provided with a CPU 2 as a microcomputer, and a memory 4 having a RAM portion and a ROM portion, and data is read and written as needed, and a deployment judgment that is not shown is performed. A determination unit is connected to constitute a part of the control device.

  When a reset factor occurs, the normal operation such as power-on reset and the reset operation from the watchdog timer (WDT) circuit 3 connected to the outside of the CPU 2 and configured by a diagnostic RAM or the like are performed. Of these, a reset operation based on an abnormal operation that is not an intentional reset operation performed at the time of diagnosis is configured to be performed in the restart process regardless of the types of these reset factors.

  Next, the basic operation of the detection processing apparatus of this conventional airbag apparatus will be described along the flowchart shown in FIG.

  In the conventional airbag apparatus configured as described above, when the restart process is started, in Step 2, the initial setting in the CPU 2 is performed.

  In Step 3, it is determined whether or not the first time is set in the diagnostic RAM of the watchdog timer circuit 3.

  If the setting has been completed, the process proceeds to Step 7, and if the first time has not yet been completed, the process proceeds to Step 4, and the diagnosis RAM of the watchdog timer circuit 3 is set to the first time.

  In Step 5, it is determined whether or not the watchdog timer circuit 3 is operating normally. If it is operating normally, the process returns to Step 2, and if it is not operating normally, the process proceeds to Step 6.

  In Step 6, it is set that the diagnostic RAM of the watchdog timer circuit 3 is detected as abnormal, and the process proceeds to Step 7.

  In Step 7, the contents of the RAM other than for diagnosis are cleared, and in Step 8, ROM diagnosis is performed. In Step 9, it is determined whether or not the diagnostic RAM of the watchdog timer circuit 3 has detected an abnormality.

  Here, if an abnormality is detected, a failure code is set in Step 10, and if no abnormality is detected, the restart process is terminated in Step 11.

  Next, the effect of the detection device of this conventional vehicle occupant protection system will be described.

  When the detection processing circuit 1 of the conventional detection processing apparatus configured as described above is applied to a vehicle occupant protection system, the power supply reset that is a normal operation as a restart factor is shown in the flowchart of FIG. Step 1, Step 2, Step 3, Step 4, and Step 5 are performed, and the operation to return to Step 2 is performed once. Then, since Step 3 is the second time again, the process proceeds to Step 7.

  Then, in Step 8, ROM diagnosis is performed, and in Step 9, it is determined whether or not the diagnosis RAM of the watchdog timer circuit has detected an abnormality.

  Here, if an abnormality is detected, a failure code is set in Step 10, and if no abnormality is detected, the restart process is terminated in Step 11.

  In addition, when there is a reset output from the outside such as an intentional operation by a reset output or the like from an external watchdog timer circuit within a normal operation range or an abnormal operation of the CPU, Step 1, Step 2, Step 3, Step 4, and Step 5 in the flowchart shown in FIG. 5 are performed, and the operation to return to Step 2 is performed once. Then, since Step 1 is completed again, the process proceeds to Step 7.

  Then, in Step 8, ROM diagnosis is performed, and in Step 9, it is determined whether or not the diagnosis RAM of the watchdog timer circuit has detected an abnormality.

  If an abnormality is detected, a failure code is set in Step 10, and if no abnormality is detected, the restart process is similarly terminated in Step 11.

  As a control circuit for an air bag device mounted on a vehicle, there is known a processing device in which a watchdog timer circuit 3 for performing reset processing is added to an IC having a main CPU and a sub CPU separately (for example, , See Patent Document 2).

Japanese Patent Laid-Open No. 5-19897 JP 2004-284376 A

  However, in the detection processing device of the conventional vehicle occupant protection system configured as described above, the reset output from the outside such as the runaway of the CPU 2 which is abnormal operation is performed as in the case of the power-on reset which is normal operation. Of these, even if the cause is due to a malfunction of the microcomputer, Step 1, Step 2, Step 3, Step 4, and Step 5 in the flowchart shown in FIG. 5 are performed, and after returning to Step 2 is performed once, Step 3 to Step 7 are performed again. The operation that proceeds to Step 8, Step 9,... Is exactly the same operation, and the restart process is completed in the same manner.

  For this reason, the malfunction of the microcomputer, etc. is temporarily resolved by restart, but it was not possible to notify the occupant etc., and the restart process was likely to occur again due to the cause of the malfunction of the same microcomputer, etc. .

  Accordingly, it is an object of the present invention to provide a detection processing device for a vehicle occupant protection system that can output a warning depending on the type of reset factor and prompt an appropriate action such as replacement of parts of a control circuit. Yes.

  In order to solve the above-described problem, an embodiment described in claim 1 includes an output arithmetic unit that connects an occupant protection device and outputs a control signal to a deployment determination unit that determines whether or not the occupant protection device is deployed. A memory unit capable of reading and writing data from the output operation unit, and an internal watchdog timer circuit for comparing the diagnosis data written in the memory unit and diagnosing the output operation unit Connected to the outside of the control circuit via a communication line, detects the operation state of the control circuit, receives reset data from the output calculation unit, and outputs a forced reset signal to the output calculation unit An external watchdog timer circuit, and warning means for outputting a warning when the reset factor reset by the external watchdog timer circuit is an abnormal operation of the output calculation unit; It is characterized in detecting apparatus of the occupant protection system for a vehicle provided.

  Further, according to the second aspect, whether or not the reset factor reset by the external watchdog timer circuit is an intentional reset operation performed when the external watchdog timer diagnoses, It is characterized in that it is determined that there is no abnormal operation of the output calculation unit.

  Further, according to a third aspect of the present invention, the internal watchdog timer circuit uses an ignition on signal and an ignition off signal input to the control circuit from an ignition switch connected to the control circuit. When the output calculation unit determines whether to perform a forced reset, the elapsed time from the input of the ignition off signal to the input of the next ignition on signal is based on a predetermined time set in advance. When the time until the next ignition on signal is input after the predetermined time has elapsed, the internal watchdog timer circuit performs a forced reset.

  When the operation state of the control circuit is detected as an abnormal operation, except for the case where the control circuit is reset by a normal operation, the external watchdog timer circuit is configured as described above. In response to the reset data from the output calculation unit, a forced reset signal is output to the output calculation unit.

  In response to the forced reset signal from the external watchdog timer circuit, the output calculation unit can output a warning from the warning means and, for example, restart by stopping the restart process. When there is a high possibility that the process will recur, appropriate measures such as replacement of parts of the control circuit can be promoted.

  Further, according to the second aspect of the present invention, whether or not the reset factor reset by the external watchdog timer circuit is an intentional reset operation performed when the external watchdog timer circuit diagnoses is determined. Since it is determined that the output calculation unit is not operating abnormally, it is possible to output a warning from the warning unit as an abnormal operation in the case of a reset that is reliably caused by an unstable factor.

  Further, according to a third aspect of the present invention, an ignition on signal and an ignition off signal input to the control circuit are used from an ignition switch connected to the control circuit, and the internal watchdog timer circuit When the output calculation unit determines whether to perform a forced reset to be performed, the elapsed time from when the ignition off signal is input until the next ignition on signal is input is based on a preset predetermined time. When the time until the next ignition on signal is input after the predetermined time has elapsed, the internal watchdog timer circuit performs a forced reset.

  Therefore, each time the ignition switch is turned on, the internal watchdog timer circuit and the external watchdog timer circuit provided separately function to distinguish restart factors, thereby restarting due to abnormal operation. The detection performance can be further improved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a circuit for explaining the overall configuration of a detection processing apparatus for a vehicle occupant protection system according to an embodiment of the present invention. It is a flowchart figure explaining a restart process with the detection processing apparatus of the vehicle occupant protection system of an embodiment. It is a flowchart figure explaining an improper interruption process with the detection processing apparatus of the vehicle occupant protection system of the embodiment. It is a flowchart figure explaining a time over interruption process with the detection processing apparatus of the vehicle occupant protection system of the embodiment. It is a flowchart figure explaining an unjust interruption process with the detection processing apparatus of the conventional passenger protection system for vehicles. It is a block diagram which shows an example of the conventional detection processing circuit.

  Next, a detection processing device of a vehicle occupant protection system according to an embodiment for carrying out the present invention will be described with reference to FIGS.

  In addition, the same code | symbol is attached | subjected and demonstrated about the same thru | or equivalent part as the said conventional.

  First, the configuration of the detection processing device of the vehicle occupant protection system according to this embodiment will be described. In this embodiment, the deployment determination is made in the driver's seat or the front of the passenger seat in the passenger compartment of the vehicle. Thus, an airbag device 15 that operates the inflator to inflate the airbag body is provided.

  As shown in FIG. 1, such an airbag device 15 is connected via a driver circuit 7 to a deployment determination unit 6 provided in a control circuit 5 constituted by a microcomputer or the like. As a result, the internal inflator is ignited by the developed current output from the driver circuit 7.

  The control circuit 5 is provided with a CPU 8 as an output calculation unit which is a central calculation processing unit, and is connected to the development determination unit 6.

  The control circuit 5 is provided with a memory unit 9 connected to the CPU 8.

  The memory unit 9 is mainly provided with a ROM unit 9a that holds data in advance and performs only reading, and a RAM unit 9b that can read and write each signal data including a forced reset signal.

  Among them, the area in the RAM section 9b includes, as shown in FIG. 1, a general RAM section 10 mainly occupying a memory space and a watchdog timer circuit diagnosis RAM section occupying a part of the memory space. 11 is provided.

  Further, the control circuit 5 is provided with an internal WDT circuit (internal watchdog timer circuit: hereinafter referred to as an internal WDT circuit) 12.

    Further, an ignition switch 14 (ING) and various sensors 16 such as an acceleration sensor are connected to the CPU 8 of the control circuit 5 via an A / D conversion circuit 13.

  An ignition on signal and an ignition off signal are output from the connected ignition switch 14, and an acceleration signal obtained by converting acceleration applied to the vehicle into an electrical signal is output to the CPU 8 from the sensor 16. Yes.

  In the internal WDT circuit 12, as a restart factor, a power-on reset that is a normal operation, and an ignition switch 14 connected to the CPU 8 of the control circuit 5 via the A / D conversion circuit 13 are used. In response to the ignition on signal and the ignition off signal, an elapsed time from the input of the ignition off signal to the input of the next ignition on signal is a predetermined time t (in this embodiment, Cleared from the CPU 8 as a normal operation when the time t1 until the next ignition on signal is input (t <t1) exceeds the predetermined time t with reference to t = 1 second). In response to the processing signal, a forced reset signal is returned to the CPU 8 to perform processing operations such as WDT forced reset inside the microcomputer. And it is configured to divide.

  Further, when the acceleration signal output from the sensor 16 is input to the CPU 8 of the control circuit 5, the development determination unit 6 connected to the CPU 8 receives information from various switches (not shown) and the information from the CPU 8. Based on the output signal, the developed current is output to the driver circuit 7.

  The CPU 8 of the control circuit 5 has an external WDT circuit (external watchdog timer circuit: hereinafter referred to as an external WDT circuit) 17 as a watchdog monitoring external device constituted by an ASIC (Application Specific Integrated Circuit). Is provided.

  The external WDT circuit 17 is configured to transmit / receive communication data to / from the CPU 8 and to output a forced reset signal to the CPU 8.

  The forced reset signal of this embodiment is a normal operation, in addition to an intentional restart operation by watchdog timer diagnosis, as an abnormal operation, a watchdog timer clear time over which causes a time over due to runaway of the CPU 8, etc. It is configured to be output at the time.

  Further, as shown in FIG. 3, the forced reset signal of this embodiment is output from the external WDT circuit 17 even in the illegal interrupt processing.

  That is, when an unexpected interrupt is activated, the interrupt is prohibited outside of the setting, but when the runaway or the like permits it without permission, or when the runaway occurs due to the runaway, the CPU 8 sends an external watchdog. When a timer forced reset output request signal is transmitted as the communication data to the external WDT circuit 17, a forced reset signal can be returned to the CPU 8 and output.

  Further, the forced reset signal of this embodiment is output from the external WDT circuit 17 in the time over interrupt process as shown in FIG.

  That is, when the time is over (for example, 600 μs period) after the main processing period (for example, 500 μs period) is exceeded, it is determined that the runaway occurs, and the external watchdog timer forced reset output request signal is sent from the CPU 8 to the communication When it is transmitted as data to the external WDT circuit 17, a forced reset signal can be returned to the CPU 8 and output.

  Further, the timer is restarted within the main processing cycle time if it operates normally in the main processing cycle.

  As shown in FIG. 1, a warning lamp (W / L) 18 is connected to the CPU 8 of the control circuit 5. The warning lamp 18 is configured to be lit or blinked in accordance with a lighting signal output from the CPU 8.

  Next, along with the flowchart shown in FIG. 2, the effect of the detection processing apparatus of the vehicle occupant protection system of this embodiment will be described.

  In this embodiment, first, when the restart detection process is started in Step 21, initial setting is performed in Step 22.

  Next, in Step 23, the RAM 9b is diagnosed, and the data written in the general RAM area in the RAM 9b is cleared.

  In Step 24, it is determined whether or not the first time out of the diagnosis by the watchdog timer circuit diagnosis RAM unit 11 of the RAM unit 9b has been completed.

  If the first diagnosis is completed, the process proceeds to Step 26. If not completed, the ROM diagnosis is performed at Step 25, and then the process proceeds to Step 26.

  Steps 26 to 30 surrounded by a two-dot chain line in FIG. 2 are main parts of the detection method of the vehicle occupant protection system according to the embodiment of the present invention.

  First, in Step 26, it is determined whether or not the first of the diagnoses by the watchdog timer circuit diagnosis RAM unit 11 has been completed.

  If it is determined that the first time is completed, the process proceeds to the next Step 27. If it is not determined that the first time is completed, that is, it is determined that the first time is completed, the process proceeds to Step 28.

  In Step 27, if there is a WDT reset and there is no WDT forced reset, it is within the range of normal operation. Therefore, the process proceeds to Step 31, and if there is no WDT reset or there is a WDT forced reset, In Step 29, after determining the abnormality, the process proceeds to Step 31.

  In Step 28, if there is no WDT reset and there is no WDT forced reset, it is within the range of normal operation. Therefore, the process proceeds to Step 31, and there is a WDT reset or a WDT forced reset. Is determined to be abnormal at Step 30, and then proceeds to Step 31.

  Specifically, when an abnormality determination is performed in Step 29 and Step 30, a signal when the abnormality occurs is taken out as record information from the external WDT circuit 17 as being watchdog reset and written in the status. . The status is held as a flag indicating whether or not the diagnosis is completed, and is used for determination.

  In Step 31, if it is determined by the watchdog timer circuit diagnosis RAM unit 11 that the first diagnosis is completed, the process proceeds to Step 35, and if not yet completed, the process proceeds to Step 32, where the watchdog timer circuit The diagnosis RAM unit 11 sets a status when the first diagnosis is completed.

  Then, in the next Step 33, it is determined whether or not the watchdog timer is operating normally.

  If it is operating normally, the process returns to Step 22, and if it is not operating normally, the process proceeds to Step 34.

  In Step 34, “failure code” is set on the assumption that the diagnostic RAM of the watchdog timer circuit 3 is abnormal.

  Further, in Step 35, the internal WDT circuit 12 uses an ignition on signal and an ignition off signal which are sent from the ignition switch 14 via the A / D conversion circuit 13 and input to the control circuit 5. Then, the CPU 8 determines whether or not to perform a forced reset by the internal WDT circuit 12.

  When this determination is made, the elapsed time from the input of the ignition off signal to the input of the next ignition on signal is a predetermined time t (in this embodiment, t = 1 second). ) And when the time t1 until the next ignition on signal is input (t <t1), it is assumed that the operation is normal, and a clear processing signal is received from the CPU 8 and the forced reset signal is Then, the internal WDT circuit 12 returns to the CPU 8 to perform processing operations such as a microcomputer internal WDT forced reset as shown in Step 36.

  If the predetermined time has not been exceeded, the process returns to Step 35 without performing the forced reset processing operation in Step 36.

  Further, in this embodiment, as shown in FIG. 3, when an external interrupt is activated by the external WDT circuit 17, for example, an external interrupt is prohibited, but due to a runaway of the CPU 8, etc. When unauthorized interrupt processing is started at Step 40, such as when permission is granted without permission, an external WDT forced reset output request is made at Step 41.

  For this reason, as shown in FIG. 1, an external WDT forced reset output request is made on the communication data from the CPU 8 of the control circuit 5 to the external WDT circuit 17, and the external WDT circuit 17 resets the external WDT circuit 17. The output is returned.

  Furthermore, in this embodiment, as shown in FIG. 4, when the main processing period is exceeded by the external WDT circuit 17, for example, if it is operating normally, a timer is set within the main period time (500 μs period). When the time-over interrupt process is started in Step 50, such as when the CPU 8 runs out of control due to a runaway of the CPU 8, etc., in Step 51, an external WDT forced reset output request is made.

  For this reason, as shown in FIG. 1, an external WDT forced reset output request is made on the communication data from the CPU 8 of the control circuit 5 to the external WDT circuit 17, and the external WDT circuit 17 resets the external WDT circuit 17. The output is returned.

  When these reset outputs are input to the control circuit 5, a forced reset process from the outside is started and restarted.

  Among the restart factors, when a power-on reset or a microcomputer internal WDT forced reset is performed, it is a restart factor within the range of normal operation. Therefore, from Step 21, Step 22, Step 23, and Step 24 of the flowchart shown in FIG. Proceed to Step 25. For this reason, in Step 25, diagnosis is performed by the ROM unit 9a of the memory unit 9, and the process proceeds to Step 26. In Step 26, since the first diagnosis has not been completed, the process proceeds from Step 28 to Step 31.

  At this time, in this embodiment, in Step 28, since there is no status of the flag and there is no WDT forced reset, it is determined that it is within the range of normal operation, and the process proceeds to Step 31 as it is.

  Next, at Step 31, the watchdog timer circuit diagnosis RAM unit 11 determines that the first diagnosis is not completed, and the process proceeds to Step 32, where the flag of the watchdog timer circuit diagnosis RAM unit 11 is determined. Is set to the status where the first diagnosis is completed.

  Furthermore, since it is determined in Step 33 that the operation is normal, the process returns to Step 22 and the main routine is processed again.

  In the second round, based on the status where the first diagnosis is completed, the process proceeds from Step 21, Step 22, Step 23, and Step 24 in the flowchart shown in FIG. 2 to Step 26.

  For this reason, in Step 26, it is determined that the first diagnosis is completed, and the process proceeds to the next Step 27.

  In Step 27, since an intentional WDT reset by WDT diagnosis within the range of the normal operation is performed, the process proceeds to Step 31 as it is.

  In Step 31, the process proceeds to Step 35 based on the status of the flag for which the first diagnosis has been completed.

  In step 35, the ignition on signal and the ignition off signal sent from the ignition switch 14 are used, and in step 36, the internal WDT circuit 12 determines whether or not to perform a forced reset, and processing is performed. Will continue.

  For this reason, in this embodiment, the occurrence of abnormal operation itself can be reduced.

  Next, the abnormal operation separated from the normal operation will be described in detail.

  In this embodiment, as an abnormal operation, for example, due to a runaway of the CPU 8 or the like, a forced reset output from the outside that is not an intentional restart operation by the external WDT circuit 17, that is, an unset interrupt is activated, Or the case where time over by a runaway etc. generate | occur | produces is assumed.

  First, in the illegal interrupt processing shown in FIG. 3, when the illegal interrupt processing is started in Step 40, an external WDT forced reset output request is made by the external WDT circuit 17 in Step 41.

  For this reason, as shown in FIG. 1, an external WDT forced reset output request is made on the communication data from the CPU 8 of the control circuit 5 to the external WDT circuit 17, and the external WDT circuit 17 resets the external WDT circuit 17. The output is returned.

  Also in this case, in the main processing routine, the flowchart shown in FIG. 2 proceeds to Step 21, Step 22, Step 23, Step 24, Step 25, and Step 26. However, in Step 28, the external WDT circuit 17 is forced by the external WDT circuit 17 at Step 41 in FIG. Since there is a reset output request and it is forcibly reset, the process proceeds to Step 30, and if abnormal, the status is changed and stored in the memory unit 9.

  For this reason, when a reset occurs due to a disturbance factor or a failure of the external WDT circuit 17, the status is different from that in which normal reset and restart are performed, and can be distinguished.

  Also, as shown in FIG. 4 due to the runaway of the CPU 8, as shown in FIG. 4, for example, if it is operating normally, the timer is restarted within the main cycle time (eg, 500 μs cycle). When time over interrupt processing is started in Step 50, such as when the main processing cycle times out due to runaway, etc., and is performed at a different cycle time (for example, 600 μs cycle), in Step 51, an external WDT forced reset output request is made. The

  For this reason, as shown in FIG. 1, an external WDT forced reset output request is made on the communication data from the CPU 8 of the control circuit 5 to the external WDT circuit 17, and the external WDT circuit 17 resets the external WDT circuit 17. The output is returned.

  When these reset outputs are input to the control circuit 5, a forced reset process from the outside is started and restarted.

  Therefore, in the main processing routine, the flow chart shown in FIG. 2 proceeds to Step 21, Step 22, Step 23, Step 24, Step 25, and Step 26, but in Step 28, the external WDT circuit 17 performs an external WDT forced reset output request at Step 51 in FIG. Since it is forcibly reset, the process proceeds to Step 30, and if it is abnormal, the status is changed and stored in the memory unit 9.

  For this reason, if it is operating normally, the timer is restarted within the main cycle time. However, even if the main processing cycle exceeds the time due to the runaway of the CPU 8, reset and restart are performed by normal operation. It is stored in the memory unit 9 so that its status is different from that of the existing one and can be distinguished.

  Therefore, in the detection processing device of the vehicle occupant protection system according to this embodiment, when the operation state of the control circuit 5 is detected as an abnormal operation, except when reset by normal operation, the external The WDT circuit 17 receives the reset data from the CPU 8 and outputs a forced reset signal to the CPU 8.

  In response to the forced reset signal from the external WDT circuit 17, the CPU 8 can output a warning signal such as light emission or blinking from the warning lamp 18 connected to the control circuit 5.

  Further, for example, by stopping the restart process, when there is a high possibility that the restart process will recur, an appropriate measure such as replacement of a part such as the CPU 8 of the control circuit 5 can be promoted.

  Further, it is determined by the external WDT circuit 17 that it is not an abnormal operation of the CPU, depending on whether or not the reset factor reset is an intentional reset operation performed when the external WDT circuit 17 diagnoses. Therefore, in the case of a reset that is reliably caused by an unstable factor, a warning can be output from the warning lamp 18 or the like as an abnormal operation.

  Further, the ignition switch 14 connected to the control circuit 5 uses the ignition on signal and the ignition off signal input to the control circuit 5 to perform a forced reset performed by the internal watchdog timer circuit 12. Is determined by the CPU 8.

  In this determination, the elapsed time from the input of the ignition off signal to the input of the next ignition on signal is determined based on the predetermined time t (t = 1 second). When the time t1 until the next ignition on signal is input after t is exceeded (t <t1), the internal WDT circuit 12 performs a forced reset.

  For this reason, each time the ignition switch 14 is turned on, the external WDT circuit 17 provided separately from the internal WDT circuit 12 functions to distinguish the restart factor.

  Therefore, the restart detection performance due to abnormal operation can be further improved.

  In the conventional vehicle occupant protection system, when a reset factor occurs, the reset operation from a watchdog timer circuit connected to the outside of the CPU 2 and constituted by a diagnostic RAM is periodically performed. A reset operation based on an abnormal operation that is not an intentional reset operation is performed in the restart process regardless of the type of these reset factors.

  On the other hand, in the detection processing device of the vehicle occupant protection system according to this embodiment, the detection factor is high even if the reset factor is based on a rare-case factor with a very low probability such as the occurrence of a runaway. Therefore, the possibility of recurrence remains high, and in addition to normal periodic diagnosis, it can be detected, reset, and restarted, so that it does not operate as if it is normal. A warning means such as the warning lamp 18 can notify a passenger or the like, and by stopping it, the occurrence of an infinite loop due to a program runaway can be eliminated.

  For this reason, depending on the type of reset factor, a detection processing device for a vehicle occupant protection system that can output a warning and prompt an appropriate measure such as replacement of parts of the control circuit 5 is provided.

  The vehicle occupant protection system detection processing apparatus according to the embodiment of the present invention has been described in detail above with reference to the drawings. The specific configuration of the vehicle occupant protection system detection processing according to this embodiment is described above. Not only the apparatus but also design changes that do not depart from the gist of the present invention are included in the present invention.

  For example, the detection processing device of the vehicle occupant protection system according to the embodiment and the first embodiment is configured so that the occupant or the like can be informed by a warning unit that lights or blinks the warning lamp 18 or the like as the warning unit. However, the present invention is not limited to this, and any warning means may be used, such as notifying the passenger of an abnormality by an alarm such as a speaker, and the output method, quantity and combination are limited. is not.

  The detection processing device of the vehicle occupant protection system of this embodiment can be any vehicle, for example, an electric vehicle or a hybrid car, as long as it is a detection processing device of a vehicle occupant protection system used for a vehicle such as an automobile. The configuration of the occupant protection device is not limited to the front seat airbag device, but is applied to occupant restraint means such as side airbag devices, curtain airbag devices, and seat belts. There may be.

5 Control circuit (microcomputer)
6 Deployment determination unit 7 Driver circuit 9 Memory unit 10 General RAM unit 11 Watchdog timer circuit diagnostic RAM unit 12 Internal WDT circuit (internal watchdog timer circuit)
14 Ignition switch 15 Airbag device 17 External WDT circuit (external watchdog timer circuit)
18 Warning lamp (Warning means)

Claims (3)

  An output computing unit that connects an occupant protection device and outputs a control signal to a deployment determination unit that determines whether the occupant protection device is deployed, a memory unit that can read and write data from the output computation unit, and the memory The control circuit is connected to the outside of a control circuit having an internal watchdog timer circuit for performing diagnosis of the output operation unit by collating with diagnostic data written in the unit, and connected to the control circuit. The external watchdog timer circuit that receives the reset data from the output calculation unit and outputs a forced reset signal to the output calculation unit and the external watchdog timer circuit When the reset factor is an abnormal operation of the output calculation unit, a warning means for outputting a warning is provided. .   Whether the reset factor reset by the external watchdog timer circuit is an intentional reset operation performed when diagnosed by the external watchdog timer, is not an abnormal operation of the output arithmetic unit; The detection device for a vehicle occupant protection system according to claim 1, wherein the determination is performed.   The output calculation unit determines whether to perform a forced reset performed by the internal watchdog timer circuit using an ignition on signal and an ignition off signal input to the control circuit from an ignition switch connected to the control circuit. When determining, the elapsed time from the input of the ignition off signal to the input of the next ignition on signal exceeds the predetermined time on the basis of the predetermined time set in advance, and the next ignition on 3. The vehicle occupant protection system detection device according to claim 1, wherein the internal watchdog timer circuit performs a forced reset when a time until a signal is input elapses.