JP2012178767A5 - - Google Patents

Download PDF

Info

Publication number
JP2012178767A5
JP2012178767A5 JP2011041254A JP2011041254A JP2012178767A5 JP 2012178767 A5 JP2012178767 A5 JP 2012178767A5 JP 2011041254 A JP2011041254 A JP 2011041254A JP 2011041254 A JP2011041254 A JP 2011041254A JP 2012178767 A5 JP2012178767 A5 JP 2012178767A5
Authority
JP
Japan
Prior art keywords
transmission rate
time
reference clock
terminal devices
management unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2011041254A
Other languages
English (en)
Japanese (ja)
Other versions
JP5589895B2 (ja
JP2012178767A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2011041254A priority Critical patent/JP5589895B2/ja
Priority claimed from JP2011041254A external-priority patent/JP5589895B2/ja
Priority to PCT/JP2012/054094 priority patent/WO2012117890A1/ja
Priority to US13/985,128 priority patent/US9042737B2/en
Priority to TW101106245A priority patent/TW201242319A/zh
Publication of JP2012178767A publication Critical patent/JP2012178767A/ja
Publication of JP2012178767A5 publication Critical patent/JP2012178767A5/ja
Application granted granted Critical
Publication of JP5589895B2 publication Critical patent/JP5589895B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2011041254A 2011-02-28 2011-02-28 クロック・データ再生部及びその電力制御方法並びにponシステム Active JP5589895B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2011041254A JP5589895B2 (ja) 2011-02-28 2011-02-28 クロック・データ再生部及びその電力制御方法並びにponシステム
PCT/JP2012/054094 WO2012117890A1 (ja) 2011-02-28 2012-02-21 クロック・データ再生部及びその電力制御方法並びにponシステム
US13/985,128 US9042737B2 (en) 2011-02-28 2012-02-21 Clock and data recovery unit and power control method therefor and PON system
TW101106245A TW201242319A (en) 2011-02-28 2012-02-24 Clock/data reproduction unit, method for controlling power thereof, and pon system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011041254A JP5589895B2 (ja) 2011-02-28 2011-02-28 クロック・データ再生部及びその電力制御方法並びにponシステム

Publications (3)

Publication Number Publication Date
JP2012178767A JP2012178767A (ja) 2012-09-13
JP2012178767A5 true JP2012178767A5 (enExample) 2013-09-05
JP5589895B2 JP5589895B2 (ja) 2014-09-17

Family

ID=46757829

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011041254A Active JP5589895B2 (ja) 2011-02-28 2011-02-28 クロック・データ再生部及びその電力制御方法並びにponシステム

Country Status (4)

Country Link
US (1) US9042737B2 (enExample)
JP (1) JP5589895B2 (enExample)
TW (1) TW201242319A (enExample)
WO (1) WO2012117890A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5434808B2 (ja) * 2010-06-09 2014-03-05 住友電気工業株式会社 データ中継装置及びその機能制御方法
KR101578191B1 (ko) * 2015-10-06 2015-12-16 라이트웍스 주식회사 수동형 광네트워크를 위한 중계장치 및 중계방법
KR102817517B1 (ko) * 2020-04-20 2025-06-10 주식회사 엘엑스세미콘 데이터구동장치 및 이의 구동 방법
CN116437426B (zh) * 2023-04-14 2025-07-15 上海大学 一种实时imdd ofdm-pon系统接收端的节能方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11317729A (ja) * 1998-05-06 1999-11-16 Sony Corp クロックデータリカバリ回路
JP4454798B2 (ja) * 2000-06-09 2010-04-21 Necエレクトロニクス株式会社 クロック再生装置
US7385379B2 (en) * 2003-03-06 2008-06-10 Fairchild Semiconductor Corporation No load to high load recovery time in ultraportable DC-DC converters
US7680232B2 (en) * 2005-01-21 2010-03-16 Altera Corporation Method and apparatus for multi-mode clock data recovery
JP2008153754A (ja) * 2006-12-14 2008-07-03 Toshiba Corp 半導体集積回路
JP5343748B2 (ja) * 2009-07-30 2013-11-13 住友電気工業株式会社 受信部及び局側装置並びにクロック・データ再生回路における周波数校正方法

Similar Documents

Publication Publication Date Title
FR2965082B1 (fr) Procede et dispositif de modulation de charge active par couplage inductif
MX2016000500A (es) Metodo y dispositivo para activar un chip mcu.
GB201115517D0 (en) Radio communication system
WO2012067884A3 (en) Techniques for wakeup signaling for a very low power wlan device
WO2013090397A3 (en) Timing circuit calibration in devices with selectable power modes
EP2293457A3 (en) Transmission control for a specific absorption rate compliant communication device
WO2009088875A3 (en) Electrolytic purifier
WO2012121892A3 (en) Delay circuitry
RU2015133908A (ru) Совместимость между кбп и тбз
WO2008032163A3 (en) System and method for pre-defined wake-up of high speed serial link
WO2012074711A3 (en) Integrated circuit device having an injection-locked oscillator
TW200731685A (en) Apparatus and methods for estimating a sleep clock frequency
GB2492605B (en) Receiver
WO2011094520A3 (en) Quantum key distribution method and apparatus
EP2568607A3 (en) Oscillator and radio communication device
JP2012178767A5 (enExample)
WO2015048620A3 (en) Indicating a busy period in a wireless network
WO2012003480A3 (en) Parallel path frequency divider circuit
WO2012118714A3 (en) Timing calibration for multimode i/o systems
CN105763209B (zh) 射频功率控制方法及装置
PH12013502143A1 (en) Navigation signal transmitter and navigation signal generating method
RU2015102791A (ru) Способ активации удаленного устройства с локального устройства
IN2015DN00583A (enExample)
WO2011010146A3 (en) Real-time clock
WO2015021012A3 (en) System and method for managing time-to-trigger timers in measurement reporting for a wireless communication network