JP2012174801A - Semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element which is provided with a gate insulating film having excellent surface flatness, a low dielectric constant, and excellent lamination properties and thus has high mobility with low leakage current.SOLUTION: A semiconductor element comprises a coating type organic gate insulating film made of a thermally crosslinkable resin composition and a semiconductor layer. A curing temperature of the organic gate insulating film is 130-150°C; a contact angle of a surface of the organic gate insulating film is 70-80°; and the semiconductor layer is formed of an organic semiconductor or an inorganic oxide semiconductor.

Description

  The present invention relates to a semiconductor element, and more particularly to a semiconductor element having a gate insulating film having excellent surface flatness, a low dielectric constant, and excellent stackability, high mobility, and low leakage current.

  In recent years, research on organic TFTs (thin film transistors) using organic materials has been actively conducted. Such a thin film transistor is configured, for example, by forming a gate electrode, a gate insulating layer, a source electrode, a drain electrode, and a semiconductor layer on the surface of a substrate.

In such a thin film transistor, for example, in Patent Document 1, the gate insulating layer is formed of _two layers of a SiO ₂ layer and a 0.3 to 10 nm fluoropolymer layer, whereby the contact angle of the gate insulating layer is increased. Attempts have been made to improve the characteristics of thin film transistors. However, since the method of Patent Document 1 is formed by _two layers of a SiO ₂ layer and a fluoropolymer layer, the manufacturing process becomes complicated and the flatness of the gate insulating layer is controlled. Therefore, there is a problem that the thin film transistor obtained is inferior in leakage current characteristics.

  Further, in Patent Document 2, similarly, in the thin film transistor, the surface of the gate insulating layer is subjected to surface treatment using 2 to 5 kinds of surface treatment agents, thereby similarly increasing the contact angle of the gate insulating layer, Attempts have been made to improve the characteristics of thin film transistors. However, since the method of Patent Document 1 requires a surface treatment step, the manufacturing process becomes complicated. In addition, when the semiconductor layer is formed on the gate insulating layer, the formability of the semiconductor layer is increased. Therefore, there is a problem that the obtained thin film transistor is inferior in mobility and leakage current characteristics.

JP 2001-94107 A International Publication No. 2007/29551

  An object of the present invention is to provide a semiconductor element having a gate insulating film having excellent surface flatness, a low dielectric constant, and excellent stackability, high mobility, and low leakage current.

  As a result of diligent researches to achieve the above object, the inventors of the present invention formed a gate insulating layer with a coating type organic gate insulating film made of a thermally crosslinkable resin composition and having a curing temperature of 130 to 150 ° C. And it discovered that the said objective could be achieved by controlling the contact angle of the surface of this organic gate insulating film in the range of 70-80 degrees, and came to complete this invention.

  That is, according to the present invention, there is provided a semiconductor element having a coating type organic gate insulating film made of a thermally crosslinkable resin composition and a semiconductor layer, and the curing temperature of the organic gate insulating film is 130 to 150 ° C. And the contact angle of the said organic gate insulating film surface is 70-80 degrees, The said semiconductor layer is formed with the organic semiconductor or the inorganic oxide semiconductor, The semiconductor element characterized by the above-mentioned is provided.

Preferably, the organic gate insulating film has a surface roughness of 2 nm or less.
Preferably, the organic gate insulating film has a dielectric constant of 1.5 to 3.0.

  According to the present invention, it is possible to provide a semiconductor element that includes a gate insulating film that has excellent surface flatness, low dielectric constant, and excellent stackability, high mobility, and low leakage current.

FIG. 1 is a cross-sectional view showing an example of a thin film transistor as a semiconductor element according to the present invention. FIG. 2 is a cross-sectional view showing another example of a thin film transistor as a semiconductor element according to the present invention. FIG. 3 is a cross-sectional view showing another example of a thin film transistor as a semiconductor element according to the present invention. FIG. 4 is a graph showing an example of drain current-gate voltage (Id-Vg) characteristics of a thin film transistor as a semiconductor element according to the present invention. FIG. 5 is a diagram showing a method of manufacturing a thin film transistor as a semiconductor element according to the present invention. FIG. 6 is a cross-sectional view showing another example of a thin film transistor as a semiconductor element according to the present invention. FIG. 7 is a diagram showing another example of the drain current-gate voltage (Id-Vg) characteristics of the thin film transistor as the semiconductor element according to the present invention.

The semiconductor element of the present invention has a coating-type organic gate insulating film made of a thermally crosslinkable resin composition and a semiconductor layer, the curing temperature of the organic gate insulating film is 130 to 150 ° C., and the organic The contact angle on the surface of the gate insulating film is 70 to 80 °, and the semiconductor layer is formed of an organic semiconductor or an inorganic oxide semiconductor.
In the following, first, the thermally crosslinkable resin composition used in the present invention will be described.

(Heat-crosslinkable resin composition)
The heat-crosslinkable resin composition used in the present invention can be cross-linked at 130 to 150 ° C., and the surface contact angle in the case of a coating type organic gate insulating film is in the range of 70 to 80 °. Although it will not be specifically limited if it is such a resin composition, For example, the resin composition containing resin (A) and a crosslinking agent (B) can be used.

(Resin (A))
Although it does not specifically limit as resin (A), A cyclic olefin polymer (A1), an acrylic resin (A2), a cardo resin (A3), a polysiloxane (A4), or a polyimide (A5) is mentioned.
These resins (A) may be used alone or in combination of two or more.

  The cyclic olefin polymer (A1) used in the present invention may be a ring-opening polymer obtained by ring-opening polymerization of a monomer, or an addition polymer obtained by addition polymerization of the above-described monomer. It may be.

  The method for synthesizing the cyclic olefin polymer (A1) is disclosed in Japanese Patent Application Laid-Open No. 11-52574, Japanese Patent Application No. 2001-174872, International Publication WO99 / 03903, International Publication WO01 / 79325 using monomers. The carbon-carbon double bond of the main chain of the polymer obtained by ring-opening polymerization is hydrogenated according to the method for producing an alicyclic olefin resin described in the above, and further, hydrolysis or graft modification is performed as necessary. Can be obtained.

  Further, the acrylic resin (A2) used in the present invention is not particularly limited, but at least one selected from a carboxylic acid having an acrylic group, a carboxylic acid anhydride having an acrylic group, or an epoxy group-containing acrylate compound is an essential component. A homopolymer or a copolymer is preferable.

  The monomer polymerization method for producing the acrylic resin (A2) may be a conventional method, and for example, a suspension polymerization method, an emulsion polymerization method, a solution polymerization method and the like are employed.

The cardo resin (A3) used in the present invention is a resin having a cardo structure, that is, a skeleton structure in which two cyclic structures are bonded to a quaternary carbon atom constituting the cyclic structure. A common cardo structure is a fluorene ring bonded to a benzene ring.
Specific examples of the skeleton structure in which two cyclic structures are bonded to a quaternary carbon atom constituting the cyclic structure include a fluorene skeleton, a bisphenol fluorene skeleton, a bisaminophenyl fluorene skeleton, a fluorene skeleton having an epoxy group, and an acrylic group. And a fluorene skeleton having the same.
The cardo resin (A3) used in the present invention is formed by polymerizing a skeleton having the cardo structure by a reaction between functional groups bonded thereto. The cardo resin (A3) has a structure (cardo structure) in which the main chain and bulky side chains are connected by one element, and has a ring structure in a direction substantially perpendicular to the main chain.

  The monomer polymerization method for producing the cardo resin (A3) may be a conventional method, and for example, a ring-opening polymerization method or an addition polymerization method is employed.

Although it does not specifically limit as polysiloxane (A4) used by this invention, Preferably the polymer obtained by mixing and making 1 type (s) or 2 or more types of organosilane represented by following formula (1) mention is mentioned. It is done.
_{^{(R 1) m -Si- (OR}} 2) 4-m (1)
(In the above formula (1), ^{R 1} is a hydrogen atom, an alkyl group having 1 to 10 carbon atoms, an alkenyl group having 2 to 10 carbon atoms or an aryl group having from 6 to 15 carbon atoms, a plurality of ^{R 1} each R ² is a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, an acyl group having 1 to 6 carbon atoms, or an aryl group having 6 to 15 carbon atoms, and a plurality of R 2 ² may be the same or different.

  The polysiloxane (A4) used in the present invention is obtained by hydrolyzing and partially condensing organosilane. A general method can be used for hydrolysis and partial condensation. For example, a solvent, water and, if necessary, a catalyst are added to the mixture, and the mixture is heated and stirred. During stirring, if necessary, hydrolysis by-products (alcohols such as methanol) and condensation by-products (water) may be distilled off by distillation.

  The polyimide (A5) used by this invention can be obtained by heat-processing the polyimide precursor obtained by making tetracarboxylic anhydride and diamine react.

  The polyimide (A5) used in the present invention is synthesized by a known method. That is, a tetracarboxylic dianhydride and a diamine are selectively combined, and these are combined with N-methyl-2-pyrrolidone, N, N-dimethylacetamide, N, N-dimethylformamide, dimethyl sulfoxide, hexamethylphosphorotriamide, It is synthesized by a known method such as reacting in a polar solvent such as γ-butyrolactone or cyclopentanone.

(Crosslinking agent (B))
The crosslinking agent (B) used in the present invention forms a crosslinked structure between crosslinking agent molecules by heating to 130 to 150 ° C., or reacts with the resin (A) to form a crosslinked structure between resin molecules. Specifically, a compound having two or more reactive groups can be mentioned. Examples of such reactive groups include amino groups, carboxy groups, hydroxyl groups, epoxy groups, and isocyanate groups.

(Interface modifier (C))
Moreover, the resin composition used by this invention may contain the interface regulator (C) in addition to resin (A) and a crosslinking agent (B).

  Examples of the surface conditioner (C) include polyoxyethylene lauryl ether, polyoxyethylene stearyl ether, polyoxyethylene alkyl ethers such as polyoxyethylene oleyl ether; polyoxyethylene octyl phenyl ether, polyoxyethylene nonyl phenyl ether, and the like. Polyoxyethylene aryl ethers; Nonionic surfactants such as polyoxyethylene dialkyl esters such as polyoxyethylene dilaurate and polyoxyethylene distearate; Fluorine surfactants; Methacrylic acid copolymer surfactants; Acrylic Acid copolymer surfactants: halogen-modified silicone oil, polyester-modified silicone oil, polyether-modified silicone oil, alkyl-modified silicone oil, aralkyl-modified silicone Modified silicone oils such as N'oiru and a reactive group modified silicone oil; and the like.

(Other ingredients)
Furthermore, the resin composition used in the present invention may contain a solvent in addition to the above components. It does not specifically limit as a solvent, A well-known thing may be sufficient as a solvent of a resin composition. In addition, when making a resin composition contain a solvent, a solvent will be normally removed after resin film formation.

The preparation method of the resin composition used by this invention is not specifically limited, What is necessary is just to mix each component which comprises a resin composition by a well-known method.
The mixing method is not particularly limited, but it is preferable to mix a solution or dispersion obtained by dissolving or dispersing each component constituting the resin composition in a solvent. Thereby, a resin composition is obtained with the form of a solution or a dispersion liquid.

(Semiconductor element)
Next, the semiconductor element of the present invention will be described. The semiconductor element of the present invention has a coating-type organic gate insulating film made of the above-mentioned thermally crosslinkable resin composition, and a semiconductor layer, and the curing temperature of the organic gate insulating film is 130 to 150 ° C., and The contact angle of the surface of the organic gate insulating film is 70 to 80 °, and the semiconductor layer is formed of an organic semiconductor or an inorganic oxide semiconductor. FIG. 1 shows a cross-sectional view of a thin film transistor 1 as an example of a semiconductor element of the present invention. As shown in FIG. 1, a thin film transistor 1 as an example of a semiconductor element of the present invention includes a gate electrode 3, a coating type organic gate insulating film 4 made of the above-described thermally crosslinkable resin composition, and a semiconductor layer 5 on a substrate 2. , A bottom gate top contact type thin film transistor having a source electrode 6 and a drain electrode 7. Although FIG. 1 shows a single thin film transistor 1, a configuration in which a plurality of thin film transistors 1 are formed on a substrate 2 (for example, an active matrix substrate) may be used. A thin film transistor 1 shown in FIG. 1 is an example of the semiconductor element of the present invention. In the following description, the thin film transistor 1 shown in FIG. 1 will be described as an example, but the semiconductor element of the present invention is shown in FIG. It is not limited to the thin film transistor 1 at all.

  The substrate 2 is not particularly limited, and is a flexible substrate made of a flexible plastic such as polycarbonate, polyimide, polyethylene terephthalate, alicyclic olefin polymer, glass substrate such as quartz, soda glass, inorganic alkali glass, silicon wafer, etc. The silicon substrate can be mentioned.

  The gate electrode 3 is made of a conductive material. Examples of conductive materials include platinum, gold, silver, nickel, chromium, copper, iron, tin, antimony lead, tantalum, indium, palladium, tellurium, rhenium, iridium, aluminum, ruthenium, germanium, molybdenum, tungsten, and oxide. Tin antimony, indium tin oxide (ITO), fluorine-doped zinc oxide, zinc, carbon, graphite, glassy carbon, silver paste and carbon paste, lithium, beryllium, magnesium, potassium, calcium, scandium, titanium, manganese, zirconium, Gallium, niobium, sodium, sodium-potassium alloy, magnesium / copper mixture, magnesium / silver mixture, magnesium / aluminum mixture, magnesium / indium mixture, aluminum / oxide Miniumu mixture, lithium / aluminum mixture and the like. In addition, known conductive polymers whose conductivity is improved by doping or the like, such as conductive polyaniline, conductive polypyrrole, and conductive polythiophene (polyethylenedioxythiophene and polystyrenesulfonic acid complex, etc.) can be mentioned. Among these, chromium and molybdenum are preferable, and chromium is more preferable. The gate electrode 3 is formed in a predetermined pattern on the substrate 2 by, for example, forming the above-described conductive material on the substrate 2 by sputtering or the like and then performing an etching process.

  The gate insulating film 4 is composed of the above-described heat-crosslinkable resin composition, and the above-described heat-crosslinkable resin composition is applied onto the substrate 2 on which the gate electrode 3 is formed in a predetermined pattern. It is formed by curing at 150 ° C. Examples of the method for applying the thermally crosslinkable resin composition include various methods such as a spray method, a spin coating method, a roll coating method, a die coating method, a doctor blade method, a spin coating method, a bar coating method, and a screen printing method. Can be adopted. Moreover, hardening time is 0.5 to 300 minutes normally, Preferably it is 1 to 150 minutes, More preferably, it is 1 to 60 minutes. Although the thickness of the gate insulating film 4 is not specifically limited, Preferably it is 100-400 nm, More preferably, it is 100-300 nm, More preferably, it is 100-200 nm.

  In the present invention, the contact angle of the surface of the gate insulating film 4 is in the range of 70 to 80 °. As a method for adjusting the contact angle to the above range, for example, the ratio of polar groups of components such as the resin (A), the crosslinking agent (B), and the interface adjusting agent (C) constituting the gate insulating film 4 ( For example, a method of controlling the polarity of the gate insulating film 4 by appropriately adjusting the carbon atom ratio of hydrophobic groups such as alkyl groups and phenyl groups, the ratio of hydrophilic groups such as hydroxyl groups and carboxy groups); By adjusting the temperature and time of the drying process when forming the coating film to form a uniform film, the solvent evaporation from the coating film surface is made uniform, thereby reducing the change in surface tension and resulting gate insulating film 4 for smoothing the surface; By these methods, the contact angle of the surface can be adjusted to a desired range.

  The gate insulating film 4 is formed by applying the above-described thermally crosslinkable resin composition and curing at 130 to 150 ° C., and setting the contact angle of the surface to be in the range of 70 to 80 °. The laminating property of the insulating film 4, specifically, the laminating property with the semiconductor layer 5 formed on the gate insulating film 4, the source electrode 6 and the drain electrode 7 can be made favorable. Various electrical characteristics of the semiconductor element can be improved. In the present invention, since the gate insulating film 4 is composed of the above-described thermally crosslinkable resin composition, the gate insulating film 4 is excellent in surface flatness and has a low dielectric constant. It can be. Specifically, the surface roughness (arithmetic average roughness Ra) of the gate insulating film 4 can be preferably 2 nm or less, more preferably 1 nm or less. Further, the dielectric constant of the gate insulating film 4 can be preferably in the range of 1.5 to 3.0, more preferably in the range of 2.0 to 2.5. Thus, the obtained thin film transistor 1 (semiconductor element) can have high mobility and low leakage current.

  The semiconductor layer 5 is formed of an organic semiconductor or an inorganic oxide semiconductor. Organic semiconductors include p-channel type, pentacene, naphthacene, thiophene oligomer, perylene, α-sexiphenyl and derivatives thereof, naphthalene, anthracene, rubrene and derivatives thereof, coronene and derivatives thereof, metal-containing / non-containing phthalocyanines and derivatives thereof And high molecular semiconductors such as polyalkylthiophene based on thiophene and fluorene, polyalkylfluorene and derivatives thereof, and the like. Examples of the inorganic oxide semiconductor include zinc oxide (ZnO) and indium gallium zinc oxide (IGZO). The semiconductor layer 5 is formed by forming the above-described organic semiconductor or inorganic oxide semiconductor on the gate insulating film 4 by a coating method or a CVD method, and then patterning the gate insulating film 4 to have a predetermined pattern shape. Is done.

  The source electrode 6 and the drain electrode 7 are made of a conductive material. As the conductive material, the same material as the gate electrode 3 described above can be used. The source electrode 6 and the drain electrode 7 are formed in a predetermined pattern on the semiconductor layer 5 by, for example, forming the above-described conductive material on the semiconductor layer 5 by sputtering or the like and then performing an etching process. .

  In the above, as an example of the semiconductor element, the bottom gate top contact type thin film transistor 1 as illustrated in FIG. 1 is illustrated, but the bottom gate bottom contact type thin film transistor 1a as illustrated in FIG. The top gate top contact type thin film transistor 1b as shown can also be obtained in the same manner as described above.

  The semiconductor element of the present invention is formed by applying the above-described thermally crosslinkable resin composition as a gate insulating film and curing at 130 to 150 ° C., and the contact angle of the surface is 70 to 80 °. Therefore, the gate insulating film can have excellent surface flatness, a low dielectric constant, and excellent stackability. And since the semiconductor element of this invention is equipped with such a gate insulating film, it has a high mobility and a small leak current, and can be used suitably as a thin film transistor, for example.

Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples. Parts and% in each example are based on weight unless otherwise specified.
In addition, the definition and evaluation method of each characteristic are as follows.

<Contact angle>
A heat-crosslinkable resin composition was spin-coated on a silicon wafer and then pre-baked at 90 ° C. for 2 minutes using a hot plate to form a 300 nm thick resin film. Subsequently, the test sample which consists of a silicon wafer in which the resin film was formed was obtained by heating in air at 130 degreeC for 1 hour. And the contact angle was measured using the obtained test sample. Specifically, ultrapure water was dropped on the surface of the resin film, the angle formed by the formed droplets was measured, and this was defined as the contact angle θ. The measurement was performed in an environment of 23 ° C. and a humidity of 55%, and an angle 300 milliseconds after the water droplet contacted was used as a contact angle.

<Surface flatness>
In the same manner as the evaluation of the contact angle, a test sample is obtained, and the surface of the test sample is observed with an AFM (atomic force microscope) using the obtained test sample. The thickness (arithmetic mean roughness Ra) was measured.

<Dielectric constant>
Similarly to the evaluation of the contact angle, a test sample was obtained, and the dielectric constant of the resin film was measured at 10 KHz (room temperature) using the obtained test sample according to JIS C6481. The lower the dielectric constant, the better.

<Laminability>
In the same manner as the evaluation of the contact angle, a test sample was obtained, and the stackability was evaluated using the obtained test sample. Specifically, a semiconductor layer was formed on the resin film by vapor deposition or coating, the formed semiconductor layer was visually observed, and the stackability was evaluated according to the following criteria.
○: No flipping after semiconductor coating ×: With flipping after semiconductor coating

<Mobility>
The electrical characteristics of the obtained thin film transistor were evaluated using a semiconductor parameter analyzer (manufactured by Agilent, 4156C) under the atmosphere and in a dark room. As a result, the characteristics as a p-type transistor element were shown. Then, the transfer voltage was evaluated by fixing the drain voltage (Vd = −20V) and changing the gate voltage (Vg) from + 10V to −20V. Here, FIG. 4 shows drain current-gate voltage (Id-Vg) characteristics of the organic thin film transistor. As shown in FIG. 4, the organic thin film transistor has a saturated region, and in this example, field effect mobility was obtained from this saturated region. In Example 3, the mobility was measured by fixing the drain voltage to Vd = 10 V and changing the gate voltage from −20 V to +20 V.
In addition, the following formula was used to calculate the field effect mobility of the thin film transistor.
Id = μCinW (Vg−Vth) ² / 2L
(Where Cin is the capacitance per unit area of the gate insulating film, W is the channel width, L is the channel length, Vg is the gate voltage, Id is the drain current, μ is the mobility, and Vth is the gate where the channel begins to form. Threshold voltage.)

<Leakage current>
A voltage of 20 V is applied between the source electrode and the drain electrode of the thin film transistor, the voltage applied to the gate electrode is changed from +10 V to −20 V, and the current flowing between the source electrode and the drain electrode is changed to a manual prober and a semiconductor. The leakage current was measured by measuring using a parameter analyzer (manufactured by Agilent, 4156C). The measurement was performed in the atmosphere / dark room. In Example 3, the leakage current was measured by applying a voltage of 20 V between the source electrode and the drain electrode and changing the voltage applied to the gate electrode from −20 V to +20 V.

Example 1
<Preparation of thermally crosslinkable resin composition>
As the resin (A), a cyclic olefin weight containing 70 mol% of a cyclic olefin monomer unit having a protic polar group and 30 mol% of a cyclic olefin monomer unit having a polar group other than a protic polar group. 100 parts of coalescence (Mw: 6000), 690 parts of ethylene glycol dimethyl ether as a solvent, 40 parts of epoxidized butanetetracarboxylic acid tetrakis (3-cyclohexenylmethyl) modified ε-caprolactone as a cross-linking agent (B), a surfactant ( C), polyether-modified polydimethylsiloxane (43%), poly (oxyethylene) alkyl ether (57%), 0.75 part, and antioxidant, pentaerythritol tetrakis [3- (3,5-di-t- Butyl-4-hydroxyphenyl) propionate] 1.5 parts After, to prepare a thermally crosslinkable resin composition was filtered with a polytetrafluoroethylene filter with a pore size of 0.45 [mu] m.

<Production of Thin Film Transistor>
(1) Pretreatment The glass substrate was subjected to ultrasonic cleaning in pure water, air blow dried, and baked at 100 ° C. for 1 hour.
(2) Formation of Gate Electrode A gate electrode 3 was formed on the glass substrate (substrate 2) pretreated as described above (FIG. 5A). Specifically, the gate electrode 3 was formed by forming an aluminum layer on a glass substrate by vacuum deposition and patterning the aluminum layer.
(3) Formation of Gate Insulating Film Next, the glass substrate 2 on which the gate electrode 3 is formed is placed on a spin coater, and a predetermined amount of the thermally crosslinkable resin composition prepared above is dropped onto the glass substrate 2, and the glass A coating film was formed by rotating the substrate 2 at a rotational speed of about 2000 rpm for about 60 seconds. Thereafter, the glass substrate 2 on which this film was formed was baked with a hot plate at a temperature of 150 ° C. for about 60 minutes to obtain a gate insulating film 4 (FIG. 5B).
(4) Formation of semiconductor active layer After forming the gate insulating film 4, a semiconductor active layer 5 made of pentacene was formed by vacuum deposition. In the vacuum vapor deposition method, the deposition rate of pentacene was adjusted to about 0.03 to 0.04 nm / second and the film thickness was adjusted to about 50 nm. In vacuum deposition, the semiconductor active layer 5 was formed in a predetermined shape using a mask having an opening of a predetermined shape (FIG. 5C).
(5) Formation of source and drain electrodes
Next, gold was deposited on the gate insulating film 4 and the glass substrate 2 by a vacuum evaporation method, and this gold layer was patterned to form a source electrode 6 and a drain electrode 7 to obtain a thin film transistor (FIG. 5 ( D)). The thickness of these electrodes 6 and 7 was about 50 nm.
The source electrode 6 and the drain electrode 7 are formed by forming a photoresist layer having a predetermined pattern on the gate insulating film 4 and the glass substrate 2, depositing gold by vacuum evaporation, and forming by lift-off. You may do it.

  Then, using the heat-crosslinkable resin composition obtained above, each evaluation of the contact angle, surface flatness, dielectric constant and laminate property of the resin film, and mobility and leakage current using the thin film transistor Each evaluation was performed. The results are shown in Table 1.

Example 2
Except for changing the polyether-modified polydimethylsiloxane (43%) poly (oxyethylene) alkyl ether (57%) to aralkyl-modified polymethylalkylsiloxane in preparing the thermally crosslinkable resin composition, Example 1 and Similarly, a thermally crosslinkable resin composition and a thin film transistor were obtained and evaluated in the same manner. The results are shown in Table 1.

Example 3
When manufacturing the thin film transistor, a thermally crosslinkable resin composition was obtained in the same manner as in Example 1 except that a semiconductor layer made of indium gallium zinc oxide (IGZO) was formed instead of the semiconductor layer made of pentacene. It was. And the inorganic oxide semiconductor thin-film transistor which has a semiconductor layer which consists of indium gallium zinc oxide (IGZO) using the obtained heat crosslinkable resin composition was produced in the following procedures. Note that FIG. 6 illustrates an inorganic oxide semiconductor thin film transistor manufactured in this example.

<Preparation of inorganic oxide semiconductor thin film transistor>
(1) Formation of Semiconductor Active Layer InGaZnO ₄ was used as the oxide semiconductor target, and the semiconductor active layer 5 made of IGZO having a thickness of about 30 nm was formed on the substrate 2 by sputtering under argon gas. The substrate temperature was room temperature.

(2) Formation of source and drain electrodes
Next, aluminum was stacked on the semiconductor active layer 5 and the substrate 2 by sputtering, and the aluminum layer was patterned to form the source electrode 6 and the drain electrode 7. The thickness of these electrodes 6 and 7 was about 30 nm.

(3) Formation of Gate Insulating Film Next, the substrate 2 on which the source electrode 6 and the drain electrode 7 are formed is placed on a spin coater, and a predetermined amount of the thermally crosslinkable resin composition prepared in Example 1 is dropped on the substrate 2. The substrate 2 was rotated at a rotational speed of about 2000 rpm for about 60 seconds to form a coating film. Thereafter, the substrate 2 on which this film was formed was baked on a hot plate at a temperature of 130 ° C. for about 60 minutes to obtain a gate insulating film 4.

(4) Formation of Gate Electrode Next, aluminum was stacked on the gate insulating film 4 by a sputtering method, and the gate electrode 3 was formed by patterning the aluminum layer. The thickness of the gate electrode 3 was about 30 nm.

By these procedures (1) to (4), a top gate / top contact type inorganic oxide semiconductor thin film transistor having a channel width W = 130 μm and a channel length L = 80 μm as shown in FIG. 6 was obtained. And it evaluated similarly to Example 1 using the obtained heat-crosslinkable resin composition and thin-film transistor. The results are shown in Table 1. FIG. 7 shows drain current-gate voltage (Id-Vg) characteristics of the inorganic oxide semiconductor thin film transistor. In FIG. 7, “1.E-x” means 1.0 × 10 ^−x .

<< Comparative Example 1 >>
A thin film transistor was obtained and evaluated in the same manner as in Example 1 except that a gate insulating film was formed using SiO ₂ instead of the thermally crosslinkable resin composition. The results are shown in Table 1. The gate insulating film made of SiO ₂ was formed on the glass substrate on which the gate electrode was formed by the CVD method. In Comparative Example 1, the contact angle, the surface flatness, the dielectric constant, and the lamination property were evaluated by obtaining a test sample made of a silicon wafer with a SiO ₂ film formed by a CVD method. _This was carried out using a sample for _two- film testing.

<< Comparative Example 2 >>
A cyclic olefin comprising 2 mol% of a cyclic olefin monomer unit having a protic polar group and 98 mol% of a cyclic olefin monomer unit having no polar group in preparing the thermally crosslinkable resin composition A thermally crosslinkable resin composition and a thin film transistor were obtained in the same manner as in Example 1 except that the polymer (Mw: 6000) was used, and evaluated in the same manner. The results are shown in Table 1.

<< Comparative Example 3 >>
A thermally crosslinkable resin composition and a thin film transistor were obtained and evaluated in the same manner as in Example 1 except that the gate insulating film was not formed. The results are shown in Table 1.

  As shown in Table 1, in Examples 1 to 3, the gate insulating film was formed using a thermally crosslinkable resin composition, and the curing temperature was 130 to 150 ° C. and the surface contact angle was 70 to 80 °. In either case, the obtained gate insulating film was excellent in surface flatness, dielectric constant and stackability, and in the case of a semiconductor device, it was excellent in mobility and leakage current.

On the other hand, in Comparative Example 1 in which the gate insulating film was formed of SiO ₂ , the surface contact angle was as small as 49 °, and the resulting gate insulating film was inferior in surface flatness and dielectric constant. Furthermore, the semiconductor element of Comparative Example 1 had a large leakage current and an on / off ratio that was too small to measure the mobility.
Moreover, although the gate insulating film was formed using the thermally crosslinkable resin composition, in the comparative example 2 which is outside the range of the surface contact angle of the present invention, the obtained gate insulating film is inferior in laminating property. A semiconductor layer could not be stacked well, and a thin film transistor capable of measuring mobility and leakage current could not be obtained.
Furthermore, in Comparative Example 3 in which no gate insulating film was formed, the obtained semiconductor element had a large leakage current and an on / off ratio that was too small to measure the mobility.

DESCRIPTION OF SYMBOLS 1, 1a, 1b ... Thin-film transistor 2 ... Substrate 3 ... Gate electrode 4 ... Gate insulating film 5 ... Semiconductor layer 6 ... Source electrode 7 ... Drain electrode

Claims (3)

A semiconductor element having a coating type organic gate insulating film made of a thermally crosslinkable resin composition and a semiconductor layer,
The curing temperature of the organic gate insulating film is 130 to 150 ° C., and the contact angle of the organic gate insulating film surface is 70 to 80 °,
The semiconductor element, wherein the semiconductor layer is formed of an organic semiconductor or an inorganic oxide semiconductor.   The semiconductor element according to claim 1, wherein the organic gate insulating film has a surface roughness of 2 nm or less.   The semiconductor element according to claim 1, wherein a dielectric constant of the organic gate insulating film is 1.5 to 3.0.

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