JP2012150937A - Method for manufacturing electron emission element, electron beam device, and image display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing an electron emission element having reduced variation in electron emission characteristic for each element, an electron beam device using the electron emission element, and an image display device using the electron beam device.SOLUTION: A method for manufacturing an electron emission element comprising a gate, an insulation member having the gate on a top face thereof and having a recess on a side face just below the gate, and a cathode having a protrusion whose tip is opposite to the gate via the recess, the method comprises: forming the insulation member having on a top face thereof the gate composed of a member containing metal and capable of forming a passive film; and then forming the passive film on a surface of the gate.

Description

  The present invention relates to an electron-emitting device, an electron beam device using the electron-emitting device, and a method for manufacturing an image display device using the electron beam device.

  2. Description of the Related Art A field emission type electron-emitting device is known as an electron-emitting device used for a display or the like. Patent Document 1 includes a cathode having a fine protruding portion where an electric field is concentrated, and a gate facing the protruding portion. A field emission type electron-emitting device is disclosed.

JP 2009-272298 A

  In the technique described in Patent Document 1, in the manufacturing process after gate formation, the gate is naturally oxidized to form a natural oxide film on the surface of the gate, and the gate is sagging in the emitter direction due to the film stress of the natural oxide film. was there. If the degree of oxidation of the gate varies from element to element, the sagging of the gate varies from element to element. As a result, there is a possibility that the electron emission characteristics vary from element to element.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an electron-emitting device with little variation in electron emission characteristics from device to device, an electron beam device using the electron-emitting device, and a method for manufacturing an image display device using the electron beam device. To do.

In order to solve the above problems, the present invention includes a gate,
An insulating member having the gate on an upper surface and a recess on a side surface directly below the gate;
A cathode having a protruding portion, the tip of the protruding portion facing the gate through the recess;
A method of manufacturing an electron-emitting device comprising:
After forming an insulating member having a gate made of a member containing metal and capable of forming a passive state on the upper surface,
It is another object of the present invention to provide a method for manufacturing an electron-emitting device, wherein a passive film is formed on the surface of the gate.

  According to the present invention, a passivation film is formed on the surface of a gate made of a member containing a metal and capable of forming a passivation, and the gate sagging due to oxidation is always kept constant by making the oxide film thickness constant. can do. Thereby, the dispersion | variation in an electron emission characteristic can be suppressed for every element.

It is a figure which shows the structure of the electron emission element which concerns on this invention. It is an enlarged view of the recessed part periphery part of the electron emission element of FIG. It is a figure which shows the supply arrangement | positioning of a power supply when measuring an electron emission characteristic. This is the relationship between the shortest distance from the cathode tip to the gate bottom and the electron emission characteristics. It is a figure explaining the sagging of a gate. It is the relationship between time and oxide film thickness, and the relationship between oxide film thickness and gate sagging. It is an enlarged view of the recessed part periphery part of the electron emission element which concerns on other embodiment of this invention. It is a figure which shows an example of the manufacturing method of the electron emission element which concerns on this invention. It is an enlarged view of the recessed part periphery part of the electron emission element which concerns on other embodiment of this invention. 2 is a perspective view of an electron-emitting device of Example 1. FIG. It is a perspective view which shows the structure of the display panel of the image display apparatus which concerns on this invention.

  Hereinafter, exemplary embodiments of the present invention will be described with reference to the drawings. However, the dimensions, materials, shapes, relative arrangements, and the like of the components described in the following embodiments are not intended to limit the scope of the present invention only to those unless otherwise specified. .

[Outline of electron-emitting device]
1A and 1B are schematic views showing an example of the configuration of an electron-emitting device according to the present invention. FIG. 1A is a top view, FIG. 1B is a cross-sectional view taken along line AA ′ in FIG. 1 (C) is a side view of the electron-emitting device viewed from the direction of the arrow in FIG. 1 (B).

  In FIG. 1B, 1 is a substrate, 2 is an electrode, 3 is an insulating member, and is formed of a laminate of an insulating layer 3a and an insulating layer 3b. Reference numeral 5 denotes a gate, which includes a gate base material 5a, a passive film 5b covering the gate base material 5a, and a conductive film 5c. Reference numeral 6 denotes a cathode which is electrically connected to the electrode 2. Reference numeral 7 denotes a recess of the insulating member 3, which is formed by recessing only the side surface of the insulating layer 3b inward of the insulating layer 3a. The portion of the upper surface of the insulating layer 3a constituting the recess 7 where the insulating layer 3b is not formed and the side surface of the insulating layer 3b may be hereinafter referred to as “the inner surface of the recess 7”. In FIG. 1B, the recess 7 is provided in the insulating member 3 made of a laminate, but the recess 7 may be provided in the insulating member 3 made of one insulating layer. Reference numeral 8 denotes a gap (shortest distance d from the tip of the protruding portion of the cathode 6 to the bottom surface of the gate 5) where an electric field necessary for electron emission is formed.

  As shown in FIG. 1B, the insulating member 3 has a gate 5 on the top surface and a recess on the side surface immediately below the gate. The cathode 6 has a protruding portion, and the tip of the protruding portion faces the gate 5 via the recess 7. The length of the protruding portion of the cathode 6 in the direction along the edge of the concave portion 7 may be shorter than the length of the portion of the gate 5 facing the protruding portion in the direction (see FIG. 10). . As shown in FIG. 1B, the cathode 6 may be provided from the edge of the recess 7 to the substrate 1 along the side surface of the insulating layer 3a. In the present invention, the cathode 6 is defined at a lower potential than the gate 5. By applying a voltage so that the potential of the gate 5 is higher than the potential of the cathode 6, electrons are emitted from the protruding portion of the cathode 6.

  FIG. 2 is an enlarged view of the periphery of the recess 7 of the electron-emitting device in FIG. As shown in FIG. 2, the cathode 6 is formed so as to enter the inner surface of the recess 7 with a distance dx. The distance dx is set to about 10 nm to 30 nm and is preferably longer than 20 nm. However, if the distance dx is too long, a current leakage path is generated between the cathode 6 and the gate 5, and the leakage current increases.

[Power supply / potential]
FIG. 3 is a diagram showing a power supply arrangement when measuring the electron emission characteristics of the electron-emitting device according to the present invention, and is an example of the configuration of the electron beam apparatus according to the present invention. As shown in FIG. 3, in the electron beam apparatus according to the present invention, an anode 20 defined at a higher potential than these is disposed at a position facing the cathode 6 (protrusion portion of the cathode 6) via the gate 5. ing. In FIG. 3, since the insulating member 3 is disposed on the substrate 1, it can be said that the anode 20 is disposed opposite to the substrate 1 on the side where the insulating member 3 is disposed. A part of the electrons emitted from the protruding portion of the cathode 6 is taken out into the vacuum by the anode 20.

  In FIG. 3, Vf is a voltage applied between the gate 5 and the cathode 6, If is an element current flowing at this time, Va is a voltage applied between the cathode 6 and the anode 20, and Ie is an electron emission current. Here, the electron emission efficiency η is generally given by η = Ie / (If + Ie) using a current If detected when a voltage is applied to the electron-emitting device and a current Ie extracted in vacuum.

  FIG. 4A shows an example of the relationship between the shortest distance d (hereinafter referred to as “shortest distance d”) from the tip of the protruding portion of the cathode 6 to the bottom surface of the gate 5 and the device current If. As the shortest distance d decreases, the electric field strength increases and electrons are easily emitted. Therefore, as shown in FIG. 4A, the shortest distance d and the element current If have a negative correlation.

  FIG. 4B shows an example of the relationship between the shortest distance d and the electron emission efficiency η. A part of the electrons emitted from the cathode 6 toward the opposing gate 5 is scattered isotropically at the tip of the gate 5, and the rest is extracted outside without colliding. As the shortest distance d is narrower, electrons isotropically scattered at the tip of the gate 5 are less likely to jump out. Conversely, as the shortest distance d is wider, scattered electrons are more likely to jump out. As shown in B), the shortest distance d and the electron emission efficiency η have a positive correlation.

[Gate sauce]
The sagging of the gate 5 will be described with reference to FIG. The sagging of the gate 5 is a phenomenon in which the intersection 9 between the bottom surface of the gate base material 5a and the side surface of the gate base material 5a is deformed to the emitter side with respect to the extension line of the interface between the gate base material 5a and the insulating layer 3b. It is. If the oxide film is diffused inside the extended line at the interface between the gate base material 5a and the insulating layer 3b, correction may be performed. When the sagging of the gate 5 is not constant for each element, the gap 8 (shortest distance d) in which an electric field necessary for electron emission is formed is not constant for each element. As a result, the electron emission amount and the electron emission efficiency vary from element to element.

  The cause of sagging of the gate 5 will be described with reference to FIG. As a result of intensive studies by the present inventors on the sagging of the gate 5, it has been found that the sagging of the gate 5 occurs due to the formation of an oxide film on the surface of the gate substrate 5a. In FIG. 5B, the oxide film has no drag in the film thickness direction. If there is no drag in the film thickness direction, the oxide film expands. However, in FIG. 5B, the oxide film is continuous in the in-plane direction, and as a result, the oxide film does not expand and compressive stress is generated. When comparing the magnitude of the compressive stress of the oxide film between the anode side and the recess 7 side of the gate base material 5a, the area of the oxide film is larger on the anode side, so the compression on the anode side is in the in-plane direction. Stress is large. For this reason, since the gate 5 spreads more in the in-plane direction on the anode side, the gate 5 is deformed on the insulating layer 3b side as shown in FIG.

[Method of forming passive film]
Next, a passive film and a method for forming the passive film will be described. The passive film is a state in which an oxide film that resists the corrosive action is formed on the metal surface. The passive film is a dense film, and when formed on the surface, the metal loses its reactivity and is protected from corrosion and oxidation. The metal that easily forms a passive film is, for example, a metal such as Ti, Zr, Hf, Ta, Al, Cu, Ni, Cr, or an alloy material thereof. The passive film is formed by oxygen plasma irradiation, air firing, or the like. The formed passive film is about several nm to several tens of nm, and varies depending on the metal species and processing conditions.

[Relationship between time and oxide film thickness]
FIG. 6A shows an example of the relationship between time and oxide film thickness. As shown in FIG. 6 (A), when a metal is naturally oxidized, the degree of oxidation changes depending on the time, temperature, etc. in contact with oxygen, and the oxide film thickness also changes. On the other hand, when oxygen plasma irradiation or atmospheric firing is performed, the surface of the gate base material 5a is oxidized in a short time, and the passive film 5b is formed. After the passivation film 5b is formed, natural oxidation does not proceed and the film thickness does not change.

[Relationship between oxide film thickness and gate sagging]
FIG. 6B shows an example of the relationship between the oxide film thickness and the sagging of the gate 5. Since the compressive stress of the oxide film is proportional to the oxide film thickness, it can be seen that the sagging of the gate 5 increases as the oxide film thickness increases. As shown in FIG. 6A, in the case of natural oxidation, the thickness of the oxide film varies depending on the degree of oxidation, so that the sagging of the gate 5 varies from element to element. On the other hand, when a passive film is formed on the metal surface under certain conditions by oxygen plasma irradiation or atmospheric firing, the sagging of the gate 5 becomes constant because the oxide film thickness becomes constant depending on the processing conditions.

  Further, since compressive stress acts on the oxide film, the film density increases. In general, since the film density and Young's modulus have a positive correlation, the Young's modulus of the oxide film increases. For this reason, after sagging due to compressive stress, the gate 5 is less likely to be deformed by an external force such as a Coulomb force.

(Wedge shaped gate)
In the above, the gate 5 has a shape having a rectangular cross section as shown in FIG. 2, but the gate 5 has a shape having a wedge-shaped cross section that becomes thinner toward the outer surface as shown in FIG. 7, which is another embodiment of the present invention. Even in this case, sagging of the gate 5 occurs when the oxide film is formed. In this case, in order to make the sagging of the gate 5 constant, a passive film may be formed as in the case of a shape having a rectangular cross section.

[Outline of manufacturing method]
FIG. 8 is a schematic cross-sectional view showing an example of a method for manufacturing an electron-emitting device according to the present invention. First, an insulating layer 22, an insulating layer 23, and a conductive layer 24 are stacked in this order on the substrate 1 by a general vacuum film forming technique such as a CVD method, a vacuum evaporation method, or a sputtering method (FIG. 8A). )).

  The substrate 1 is a substrate for mechanically supporting the element. For example, quartz glass, glass with reduced impurity content such as Na, blue plate glass, silicon substrate, or the like can be used. As a function required for the substrate, it is desirable that the substrate has not only high mechanical strength but also resistance to alkali and acid such as dry etching, wet etching, and developer. When used as an integral part such as a display panel, it is desirable that the difference in thermal expansion between the film forming material and other laminated members is small. Further, it is desirable to use a material in which alkali elements or the like from the inside of the glass are difficult to diffuse with heat treatment.

The insulating layer 22 and the insulating layer 23 are insulating films made of a material excellent in workability, and for example, SiN (SixNy) or SiO ₂ can be used. The thickness of the insulating layer 22 is set in the range of several nm to several tens of μm, and preferably selected in the range of several tens of nm to several hundreds of nm. The thickness of the insulating layer 23 is set in the range of several nm to several hundred nm, and preferably selected in the range of several nm to several tens of nm. In addition, since it is necessary to form the recessed part 7 after laminating | stacking the insulating layer 22 and the insulating layer 23, it is desirable to set it as the relationship where the insulating layer 22 and the insulating layer 23 have a different etching amount with respect to an etching. Further, the ratio of the etching amount between the insulating layer 22 and the insulating layer 23 is desirably 10 or more, and desirably 50 or more. For example, SixNy can be used as the insulating layer 22 and an insulating material such as SiO ₂ or a PSG having a high phosphorus concentration, a BSG film having a high boron concentration, or the like can be used as the insulating layer 23.

The conductive layer 24 preferably has a high thermal conductivity in addition to conductivity, a material having a high melting point, and a material capable of forming a passive film. For example, metals such as Ti, Zr, Hf, Ta, Al, Cu, Ni, and Cr, or alloy materials thereof can be used. Further, carbides such as TiC, ZrC, HfC, and TaC, borides such as HfB ₂ and ZrB ₂ , and nitrides such as TiN, ZrN, HfN, and TaN can be used. The thickness of the conductive layer 24 is set in the range of several nm to several hundred nm, and is preferably selected in the range of several nm to several tens of nm.

Next, after forming a resist pattern on the conductive layer 24 by a photolithography technique, the conductive layer 24, the insulating layer 23, and the insulating layer 22 are sequentially processed by using an etching method, and the gate base material 5a, the insulating layer 3b, and the insulating layer are processed. The layer 3a is obtained (FIG. 8B). In such an etching process, RIE (Reactive Ion Etching) is generally used, which enables precise etching of a material by turning the etching gas into plasma and irradiating the material with the plasma. As the processing gas at this time, when the target member to be processed forms fluoride, a fluorine-based gas such as CF ₄ , CHF ₃ , or SF ₆ is selected, and the target member to be processed is made of chloride such as Si or Al. In the case of formation, a chlorine-based gas such as Cl ₂ or BCl ₃ is selected. Further, in order to obtain a selection ratio with the resist, hydrogen, oxygen, argon gas, or the like is added as needed to ensure the smoothness of the etching surface or increase the etching speed.

Subsequently, the insulating layer 3b is etched to form a recess 7 in the insulating member 3 including the insulating layer 3a and the insulating layer 3b (FIG. 8C). Etching, for example, an insulating layer 3b is a mixed solution of ammonium fluoride and hydrofluoric acid, referred to as long as the material of SiO ₂ called buffered hydrofluoric acid (BHF), as long as the material insulating layer 3b is made of SixNy A hot phosphoric acid etching solution can be used. The depth of the concave portion 7 (distance from the outer surface of the insulating member 3 (side surface of the insulating layer 3a) to the side surface of the insulating layer 3b) is deeply related to the leakage current after the electron-emitting device is manufactured, and the deeper the concave portion 7 is formed. The value of the leakage current is reduced. For this reason, it is formed with a thickness of about 30 nm to 200 nm.

  Next, a passive film 5b is formed on the surface of the gate base material 5a by oxygen plasma irradiation or atmospheric baking (FIG. 8D). The passive film 5b is desirably formed sufficiently thicker than the natural oxide film. As a result of investigations by the present inventors, for example, in the case of TaN, it has been found that the natural oxide film is several nm, and if it is formed to be 5 nm or more, the natural oxidation hardly proceeds. The formation method of the passive film 5b may be any method that can be oxidized under certain conditions, and is not limited to oxygen plasma irradiation and atmospheric firing.

  In the case of oxygen plasma irradiation, it is performed by a plasma generator. The conditions for the oxygen plasma irradiation may be any conditions that allow the passivation film 5b to be formed on the surface of the gate substrate 5a. However, it is desirable that the conditions for passivation are always constant from the viewpoint of forming a constant film thickness. Specific conditions such as processing time and power depend on the apparatus. As an example, the irradiation time may be 30 seconds, and the power may be Ps (source high frequency) = 1.5 kW and Pb (bias high frequency) = 0.5 kW.

  In the case of atmospheric firing, the firing is performed in a firing furnace. The conditions for the atmospheric firing may be any conditions that allow the passivation film 5b to be formed on the surface of the gate base material 5a. However, from the viewpoint of forming a constant film thickness, it is desirable that the conditions for passivation are always constant. Specifically, the firing temperature may be 350 ° C. or higher and the firing time may be 30 minutes or longer.

  The specific numerical values given above are examples, and the time and conditions vary depending on the apparatus, but it is only necessary to confirm that the passive film 5b exists on the surface of the gate base material 5a. As a confirmation method of the passive film, for example, a cross section may be observed with a TEM (transmission electron microscope).

  In the present embodiment, the passivation film 5b is formed after the insulating layer 3b is etched to form the recess 7 in the insulating member 3. However, even if the passivation film 5b is formed before the recess 7 is formed, the effect of the present invention is achieved. Is obtained. However, if the passivation film 5b is formed before forming the recess 7, the passivation film 5b is not formed on the recess 7 side of the gate substrate 5a after the recess 7 is formed. May oxidize. When the concave portion 7 side of the gate base material 5a is naturally oxidized, the sagging of the gate 5 for each element may vary more than in the case where the passive film 5b is formed after the concave portion 7 is formed. For this reason, from the viewpoint of further enhancing the effect of suppressing variation in electron emission characteristics for each element, it is more preferable to form the passive film 5b after the recess 7 is formed.

  Subsequently, a conductive film is deposited on the passive film 5b, a part of the outer surface of the insulating member 3 and the inner surface of the recess 7 by a general vacuum film forming technique such as a CVD method, a vacuum evaporation method, or a sputtering method. (FIG. 8E). The conductive film deposited on the passive film 5b becomes the conductive film 5c. The conductive film attached to a part of the outer surface of the insulating member 3 and the inner surface of the recess 7 becomes the cathode 6. The conductive film serving as the cathode 6 has a protruding portion, and is attached so that the tip of the protruding portion faces the gate 5 through the concave portion of the insulating member 3.

The conductive film only needs to be a field emission material, and is generally a high melting point of 2000 ° C. or higher and a work function material of 5 eV or less, and it is difficult to form a chemical reaction layer such as an oxide or a chemical reaction layer easily. A material that can be removed is preferred. For example, metals such as Hf, V, Nb, Ta, Mo, W, Au, Pt, and Pd, or alloy materials thereof can be used. Further, carbides such as TiC, ZrC, HfC, TaC, SiC, and WC, borides such as HfB ₂ , ZrB ₂ , CeB ₆ , YB ₄ , and GdB ₄ , and nitrides such as TiN, ZrN, HfN, and TaN can also be used. . Furthermore, amorphous carbon, graphite, diamond-like carbon, carbon in which diamond is dispersed, a carbon compound, and the like can also be used.

  As another embodiment of the present invention, the conductive film 5c on the passive film 5b may be removed. In the case of removing the conductive film 5c, as shown in FIG. 9A, the peeling layer 25 is formed before the formation of the conductive film. The release layer 25 may be formed by a method such as attaching a release metal by electrolytic plating. After the release layer 25 is formed, a conductive film is attached. As shown in FIG. 9B, after the release layer 25 and the conductive film 5c are peeled off, the gate substrate 5a is passivated to form the passive film 5b. good.

  In the present invention, in order to efficiently extract electrons, it is necessary to control the deposition angle and film formation time, the temperature during formation, and the degree of vacuum during formation so that the protruding portion of the cathode 6 has an optimal shape. There is. Specifically, the amount dx of the conductive film entering the upper surface of the insulating layer 3a that is the inner surface of the recess 7 is 10 nm to 30 nm, more preferably 20 nm to 30 nm. The angle (θ in FIG. 2) formed by the upper surface of the insulating layer 3a, which is the inner surface of the recess 7 of the insulating member 3, and the protruding portion of the cathode 6 is preferably 90 ° or more.

Next, an electrode 2 for establishing electrical continuity with the cathode 6 is formed by a general vacuum film forming technique such as a CVD method, a vacuum deposition method, or a sputtering method, or a photolithography technique (FIG. 8F). . The electrode 2 has conductivity similar to the cathode 6, for example, Be, Mg, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Al, Cu, Ni, Cr, Au, Pt, Pd. Such metals or alloy materials thereof can be used. Further, carbides such as TiC, ZrC, HfC, TaC, SiC, and WC, borides such as HfB ₂ , ZrB ₂ , CeB ₆ , YB ₄ , and GdB ₄ , and nitrides such as TiN, ZrN, and HfN can also be used. Further, semiconductors such as Si and Ge, organic polymer materials, amorphous carbon, graphite, diamond-like carbon, carbon in which diamond is dispersed, and carbon compounds can be used. The thickness of the electrode 2 is set in the range of several tens of nm to several mm, preferably selected in the range of several tens of nm to several μm.

  Hereinafter, an image display apparatus having an electron beam apparatus including an electron source and an anode obtained by arranging a plurality of electron-emitting devices according to the present invention and a light emitting member will be described with reference to FIG. FIG. 11 is a schematic diagram illustrating an example of a display panel of an image display device configured using an electron source having a simple matrix arrangement, and a part of the display panel is cut away.

  In FIG. 11, 31 is an electron source substrate, 32 is an X direction wiring, and 33 is a Y direction wiring. The electron source substrate 31 corresponds to the substrate 1 of the above-described electron-emitting device, the X-direction wiring 32 is a wiring that connects the above-described electrodes 2 in common, and the Y-direction wiring 33 is a wiring that connects the above-described gates 5 in common. It is. Reference numeral 34 denotes an electron-emitting device according to the present invention. The m X-direction wirings 32 are composed of Dx1, Dx2,. The n Y-direction wirings 33 are composed of Dy1, Dy2,. In the above configuration, a simple matrix wiring can be used, and individual electron-emitting devices can be selected and driven independently.

  In FIG. 11, reference numeral 41 denotes a rear plate to which the electron source substrate 31 is fixed, 46 denotes a fluorescent film 44 as a phosphor as a light emitting member and a metal back 45 as an anode 20 on the inner surface of the glass substrate 43. It is a face plate. Reference numeral 42 denotes a support frame, and a rear plate 41 and a face plate 46 are attached to the support frame 42 via frit glass or the like to constitute an envelope 47.

  The display panel is connected to an external electric circuit through terminals Dx1 to Dxm, terminals Dy1 to Dyn, and a high voltage terminal. The terminals Dx1 to Dxm receive scanning signals for sequentially driving one row (N elements) of electron sources provided in the display panel, that is, electron emission element groups arranged in a matrix of m rows and n columns. Applied. On the other hand, to the terminals Dy1 to Dyn, a modulation signal for controlling the output electron beam of each element of the electron emission elements in one row selected by the scanning signal is applied. The high-voltage terminal is supplied with a DC voltage of, for example, 10 [kV] from a DC voltage source, which gives sufficient energy to excite the phosphor to the electron beam emitted from the electron-emitting device. Acceleration voltage. By applying a scanning signal, applying a modulation signal, and applying a high voltage to the anode, the emitted electrons are accelerated to irradiate the phosphor to realize an image display device.

  By forming the image display device using the electron-emitting device according to the present invention, an image display device with a well-shaped electron beam can be configured, and as a result, an image display device with good display characteristics can be provided. it can.

  Hereinafter, the present invention will be described in more detail with reference to examples.

[Example 1]
The electron-emitting device having the configuration shown in FIG. 1 was fabricated according to the process of FIG. FIG. 10 is a perspective view of the electron-emitting device manufactured in this example. First, an insulating layer 22, an insulating layer 23, and a conductive layer 24 were stacked in this order on the substrate 1 by sputtering (FIG. 8A). As the substrate 1, PD200, which is a high strain point glass, was used. The insulating layer 22 is made of SiN (SixNy) and has a thickness of 500 nm. The insulating layer 23 is made of SiO _{2 and} has a thickness of 23 nm. TaN was used for the conductive layer 24, and the thickness was 30 nm.

Next, after forming a resist pattern on the conductive layer 24 by a photolithography technique, the conductive layer 24, the insulating layer 23, and the insulating layer 22 are sequentially processed by using RIE, and the gate base material 5a, the insulating layer 3b, and the insulating layer are processed. 3a was obtained (FIG. 8B). As the processing gas at this time, a CF ₄ -based gas was used because a material for forming a fluoride was selected for the insulating layer 22, the insulating layer 23, and the conductive layer 24. As a result of performing RIE using this gas, the angle after etching of the insulating layer 3a, the insulating layer 3b, and the gate base material 5a was formed at an angle of about 80 ° with respect to the substrate horizontal plane.

  Subsequently, after removing the resist, the insulating layer 3b was etched using BHF to form the recess 7 in the insulating member 3 including the insulating layer 3a and the insulating layer 3b (FIG. 8C). The depth of the recess 7 was about 150 nm.

  Next, using a plasma generator (plasma etching system SE-1310T manufactured by Tokyo Electron Ltd.), the surface of the gate substrate 5a was irradiated with oxygen plasma to form a passive film 5b (FIG. 8D). The irradiation time was 30 seconds, the power was Ps (high frequency for source) = 1.5 kW, and Pb (high frequency for bias) = 0.5 kW.

  Subsequently, molybdenum (Mo), which is a conductive film, was adhered to the outer surface of the insulating member 3 and the inner surface of the recess 7 (the upper surface of the insulating layer 3a) by EB vapor deposition to form the cathode 6 (FIG. 8E )). At this time, a conductive film was also deposited on the passive film 5b. In the present embodiment, the angle of the substrate was set to 60 ° with respect to the horizontal plane of the substrate so that the conductive film entered the recess 7 by about 40 nm. As a result, Mo was incident on the upper portion of the gate 5 at 60 °, and the incident angle was set to 40 ° on the outer surface of the insulating layer 3a which is a part of the insulating member 3 after the RIE processing. The deposition rate was determined so that the deposition was about 12 nm / min. The deposition time is precisely controlled (2.5 minutes in this embodiment), the thickness of Mo on the outer surface of the insulating member 3 is 30 nm, and the amount of the conductive film entering the recess 7 (dx) is 40 nm. It formed so that it might become. Further, the angle (θ in FIG. 2) formed by the inner surface of the recess 7 (the upper surface of the insulating layer 3a) and the protruding portion of the cathode 6 serving as the electron emission portion was set to 120 °.

Next, a resist pattern was formed by a photolithography technique so that the width T4 (FIG. 10) of the cathode 6 was 200 μm. Thereafter, the cathode 6 made of molybdenum was processed using RIE. As the processing gas at this time, CF ₄ -based gas was used because molybdenum used as the conductive layer material produces fluoride (FIG. 8E). As a result, a strip-like cathode 6 having a protruding portion located along the edge of the recess 7 of the insulating member 3 was formed. In this embodiment, the width of the cathode 6 coincides with the width of the protruding portion, and T4 (FIG. 10) can also be said to be the width of the protruding portion. In addition, the width of the protruding portion means the length of the protruding portion in the direction along the edge of the recess 7 of the insulating member 3.

  Subsequently, an electrode 2 was formed on the substrate 1 and the cathode 6 by sputtering (FIG. 8F). The electrode 2 was made of copper (Cu) and had a thickness of 500 nm and was processed into a wiring pattern.

  With respect to the electron-emitting device manufactured by the above method, the electron emission characteristics were measured with the configuration shown in FIG. 3, and the gate oxide film thickness, the gate sagging amount, and the shortest distance d were measured by a cross-sectional TEM. Table 1 shows the measurement results of the average, maximum and minimum element emission currents in this example. In Table 1, 1 is an element having the smallest electron emission current, 2 is an element having an average electron emission current, and 3 is an element having the largest electron emission current. The drive voltage Vf = 23 V, the anode applied voltage Va = 11.8 kV, and the electron emission current Ie was 13.0 to 13.6 μA. The gate oxide film thickness was 5.2 to 5.3 nm, the gate sagging was 11.0 to 12.0 nm, and the shortest distance d was 9.4 to 9.8 nm. In this example, a uniform device with uniform electron emission characteristics was obtained. This is presumably because the gate oxide film thickness is uniform for each element.

  Further, when the same evaluation was carried out with the oxygen plasma irradiation time of 60 seconds and 90 seconds, the difference from the irradiation time of 30 seconds was small, almost the same electron emission characteristics were obtained, and the gate oxide film thickness was also the same. there were. This is presumably because a sufficiently thick passivation film was formed by the oxygen plasma irradiation, and the gate oxide film thickness was uniform for each element.

[Comparative example]
As a comparative example, an electron-emitting device that does not form a passive film was manufactured. In this comparative example, an electron-emitting device was produced in the same manner as in Example 1 except that it was left in the atmosphere without being irradiated with oxygen plasma. After producing the electron-emitting device, the electron emission characteristics and the cross-sectional shape were measured in the same manner as in Example 1. Table 1 shows the measurement results of the average, maximum and minimum electron emission currents in this comparative example. In Table 1, 1 is an element having the smallest electron emission current, 2 is an element having an average electron emission current, and 3 is an element having the largest electron emission current. The drive voltage Vf = 23 V, the anode applied voltage Va = 11.8 kV, and the electron emission current Ie was 3.0 to 13.3 μA. The gate oxide film thickness was 3.6 to 5.1 nm, the gate sagging was 6.0 to 12.0 nm, and the shortest distance d was 9.6 to 13.8 nm. In this comparative example, since the gate oxide film thickness varies from element to element, the gate sagging varies from element to element. As a result, it is considered that the electron emission characteristics vary from device to device.

[Example 2]
In this example, an electron-emitting device was produced in the same manner as in Example 1 except that a passive film was formed by atmospheric firing. When forming the passive film, it was baked at 350 ° C. for 30 minutes in a baking furnace. After the electron-emitting device was fabricated, the electron emission characteristics and the cross-sectional shape were measured in the same manner as in Example 1. As a result, a uniform device with uniform electron emission characteristics was obtained in this example. Since the variation range was the same as that in Example 1, Table 1 shows only the measurement result of the element having an average electron emission current in this example. The drive voltage Vf = 23 V, the anode applied voltage Va = 11.8 kV, and the electron emission current Ie was 13.9 μA. The gate oxide film thickness was 6.0 nm, the gate sagging was 12.0 nm, and the shortest distance d was 9.2 nm. In this example, as in Example 1, the gate oxide film thickness was uniform for each element, and it is considered that the electron emission characteristics were uniform for each element.

  1: substrate, 2: electrode, 3: insulating member, 5: gate, 5a: gate substrate, 5b: passive film, 5c: conductive film, 6: cathode, 7: recess, 8: gap, 20: anode

Claims (6)

The gate,
An insulating member having the gate on an upper surface and a recess on a side surface directly below the gate;
A cathode having a protruding portion, the tip of the protruding portion facing the gate through the recess;
A method of manufacturing an electron-emitting device comprising:
After forming an insulating member having a gate made of a member containing metal and capable of forming a passive state on the upper surface,
A method of manufacturing an electron-emitting device, comprising forming a passive film on the surface of the gate.   The method of manufacturing an electron-emitting device according to claim 1, wherein the passive film is formed by oxygen plasma irradiation.   The method for manufacturing an electron-emitting device according to claim 1, wherein the passive film is formed by air firing.   4. The method of manufacturing an electron-emitting device according to claim 1, wherein a thickness of the passive film is 5 nm or more. 5. A method of manufacturing an electron beam apparatus having an electron-emitting device and an anode,
5. A method of manufacturing an electron beam apparatus, wherein a cathode and an anode of an electron-emitting device manufactured by the manufacturing method according to claim 1 are arranged to face each other with the gate interposed therebetween. A method for manufacturing an image display device having an electron beam device and a phosphor,
6. A method for manufacturing an image display device, wherein the anode and the phosphor of the electron beam device manufactured by the manufacturing method according to claim 5 are laminated and disposed.

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