JP2012143116A - Switching device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance noise suppression effect regardless of small size by solving the problem of heating.SOLUTION: A PWM control circuit 7 on/off drives, in complementary manner, transistors 5 and 6 by a PWM drive signal. The transistors 5 and 6 include first and second variable capacitance circuits 22 and 23 in parallel. A capacitance value control circuit 24 outputs a switching signal to a switch SWn (n=1-6) for switching its on/off state at such timing as different from on/off switching of the PWM drive signal, to change parallel capacitance values of the transistors 5 and 6 as time passes. Though ringing occurs at turn on and turn off of the transistors 5 and 6, the ringing frequency displaces itself as time passes to spread the spectrum of noise energy in a wide band, resulting in dropping of the peak level of the noise.

Description

  The present invention relates to a switching device including two semiconductor elements connected in series with a load output terminal interposed between power supply lines.

  FIG. 19 shows a configuration of a switching device that performs PWM control of a vehicle-mounted DC motor. The switching device 1 includes transistors 5 and 6 (semiconductor elements) connected in series with a load output terminal 4 between power lines 2 and 3 and a PWM control circuit 7 that drives the transistors 5 and 6. A capacitor 8 is connected between the power lines 2 and 3, and power is supplied from the battery 9. A DC motor 10 as a load is connected to the load output terminal 4.

  When the transistors 5 and 6 are PWM-driven, ringing occurs in the output voltage Vs when switching on and off, and radio noise to a broadcasting band higher than the SW band becomes a problem. FIG. 20A shows the waveform of the output voltage Vs, and FIGS. 20B and 20C show enlarged waveforms at the rise and fall. In order to suppress this ringing, snubbers 11 and 12 as noise suppressing means are added to the transistors 5 and 6, respectively. FIG. 28 of Patent Document 1 also describes a CR snubber having a similar configuration.

Japanese Patent Laying-Open No. 2010-205845 (FIG. 28)

  Since the conventional snubbers 11 and 12 convert the energy of ringing into heat using a resistor, a large amount of heat is generated when ringing (switching noise) is reduced. Therefore, the resistor to be used requires a large rated power, and the element size becomes large. In the case of a general-purpose CR snubber, since the resistor and the capacitor are arranged close to each other, the temperature of the capacitor increases due to the heat generated by the resistor, and the capacitance of the capacitor decreases. For this reason, it is necessary to set the capacitance value of the capacitor to be large in advance, and the size of the capacitor also increases. Further, conventionally, since the ringing cannot be attenuated only with the CR snubber, the LC filter 13 is also used together, and a larger size is required for the switching device.

  To cope with this, it is conceivable that the turn-on time and turn-off time of the transistors 5 and 6 are set longer to suppress the ringing itself. However, when this means is used, the loss of the transistors 5 and 6 increases, so that it is necessary to increase the transistor size. As described above, in the conventional snubbers 11 and 12, it is difficult to suppress the switching noise while reducing the size.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to solve the problem of heat generation of the noise suppression means and to provide a switching device that is small and has a large noise suppression effect.

  According to the means described in claim 1, the first semiconductor element and the second semiconductor element are provided between the first power supply line and the load output terminal and between the load output terminal and the second power supply line, respectively. At least one of the first semiconductor element and the second semiconductor element is composed of a transistor, and the other is composed of, for example, a diode. The drive circuit drives the transistor on and off with a drive signal having a constant switching frequency.

  The first variable capacitance circuit is connected in parallel to the first semiconductor element, and changes the capacitance value between the parallel connection terminals into a plurality according to the switching signal. Similarly, the second variable capacitance circuit is connected in parallel to the second semiconductor element, and changes the capacitance value between the parallel connection terminals into a plurality according to the switching signal. The capacitance value control circuit outputs a switching signal for switching the capacitance value of the first variable capacitance circuit and the capacitance value of the second variable capacitance circuit at a timing different from the on / off switching of the drive signal during the switching operation by the drive circuit. For each of the first semiconductor element and the second semiconductor element, a plurality of states having different parallel capacitance values of the semiconductor element are sequentially created.

  According to this means, since the parallel capacitance values of the semiconductor elements are sequentially switched to a plurality, the ringing frequency shifts with the passage of time, the noise energy spectrum spreads over a wide band, and the noise peak level decreases. Unlike the snubber, this means does not suppress the generation of noise by converting the ringing energy into heat, so there is no or very little heat generation in the first and second variable capacitance circuits, and there is a problem of heat generation. Can be solved. As a result, it is not necessary to provide a margin for the size of the first and second variable capacitance circuits in preparation for heat reception. In addition, the LC filter is not necessary, or even if it is provided as an auxiliary, a smaller one than the conventional one is sufficient. Therefore, this switching device can achieve a large noise suppression effect while being small in size as compared with the conventional snubber.

  According to the means described in claim 2, the DC capacitor is provided between the first and second power supply lines. The negative terminal of the DC capacitor through the first power supply line from the positive terminal of the DC capacitor, the first semiconductor element, the output terminal line from the first semiconductor element to the second semiconductor element, the second semiconductor element and the second power supply line The inductance intervening in the current path to Lp1 is Lp1, the inductance intervening in the series path of the first semiconductor element, the output terminal line and the second semiconductor element is Lp2, and the parasitic capacitance between the main terminals of the first and second semiconductor elements is When the capacitance values of the first and second variable capacitance circuits are CpX and CpY, respectively, and the capacitance value control circuit has a relationship of Lp1 · (CpY + Cq2) ≠ Lp2 · (CpX + Cq1), respectively. A switching signal is output so as to

  When this relational expression is established, in high-side driving, the ringing frequency when the first semiconductor element shifts from off to on is controlled to be different from the ringing frequency when the first semiconductor element shifts from on to off. it can. Due to the difference in both ringing frequencies, a further diffusion effect of the radiated noise is obtained and the peak level is lowered.

  According to the means described in claim 3, the capacitance value control circuit includes the n period of the drive signal (n is a value selected from 1, 2,...) For each of the first semiconductor element and the second semiconductor element. A switching signal is output so that the capacitance values of the first and second variable capacitance circuits change every time. As the set value of n increases, the peak value generated in the spectrum of noise energy increases.

  According to the means described in claim 4, the capacitance value control circuit has the capacitance values of the first and second variable capacitance circuits for each of the first semiconductor element and the second semiconductor element in a random cycle with respect to the drive signal. A switching signal is output so as to change. Thereby, the peak value generated in the spectrum of the noise energy is lowered, and the spectrum of the part approaches a flat.

  According to the means described in claim 5, the first and second variable capacitance circuits are configured by connecting in parallel a plurality of series circuits of capacitors and switches that are turned on and off according to the switching signal. Thereby, the first and second variable capacitance circuits have the parallel capacitance value of the capacitor selected according to the switching signal.

  According to the means described in claim 6, the first and second variable capacitance circuits are configured such that the number of capacitors connected in series can be changed by a switch. As a result, the first and second variable capacitance circuits have the series capacitance value of the capacitor selected according to the switching signal.

  According to the means described in claim 7, the first and second variable capacitance circuits are constituted by variable capacitance elements whose capacitance values change in accordance with the voltage of the switching signal.

  According to the means described in claim 8, the first and second variable capacitance circuits are provided with a series resistor for the capacitor and the variable capacitance capacitor. This series resistance is used to further reduce the ringing after spreading the ringing frequency spectrum over a wide band by the above-mentioned means. Therefore, compared with a snubber that converts ringing energy into heat and suppresses the generation of noise, the action of heat generated by the series resistor is small. For this reason, the rated power and size of the series resistor are reduced, and it is not necessary to provide a margin for the capacitance value of the capacitor or the like in consideration of heat reception.

  According to the ninth aspect, since the variable capacitance circuit can be miniaturized as described above, the first semiconductor element and the first variable capacitance circuit are configured as one bare chip, and the second semiconductor element and the second variable circuit are configured. The capacitor circuit can be configured as one bare chip.

The block diagram of the switching apparatus which shows the 1st Embodiment of this invention The figure which shows the result of FFT of the output voltage at the time of setting the total capacity value of a variable capacity circuit to (a) 1 nF, and (b) 100 pF. Explanatory diagram of ringing at turn-on of high side transistor Explanatory diagram of ringing at turn-off of high-side transistor A diagram schematically showing the spectrum of radio noise generated by ringing (A) Every 1 PWM period, (b) Every 2 PWM period, (c) Waveform diagram of switching signal and output voltage when changing capacitance value sequentially at random period FIG. 5 equivalent view in each case of FIG. 6 (a) (b) (c) (A) Waveform diagram of switching signal and output voltage when the switching timing of the first variable capacitance circuit and the second variable capacitance circuit are the same and (b) different Waveform diagram of switching signal and output voltage when changing capacitance value sequentially every 2 PWM cycles The figure which shows the result of FFT when there exists a diffusion effect of ringing energy The figure which shows the result of FFT at the time of using the conventional snubber FIG. 1 equivalent diagram showing a second embodiment of the present invention FIG. 1 equivalent view showing a third embodiment of the present invention Figure 10 equivalent FIG. 1 equivalent view showing a fourth embodiment of the present invention FIG. 1 equivalent view showing a fifth embodiment of the present invention FIG. 1 equivalent view showing a sixth embodiment of the present invention FIG. 1 equivalent view showing a seventh embodiment of the present invention 1 equivalent diagram showing the prior art (A) Waveform of output voltage, (b) Enlarged waveform at rising, (c) Enlarged waveform at falling

In each embodiment, substantially the same parts are denoted by the same reference numerals and description thereof is omitted.
(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a configuration of a switching device 21 that performs PWM control of a DC motor for vehicle use. MOS transistors 5 and 6 (first and second semiconductor elements) are connected between the first power supply line 2 and the load output terminal 4 and between the load output terminal 4 and the second power supply line 3, respectively. . The transistors 5 and 6 have body diodes 5D and 6D. Parasitic capacitances Cq1 and Cq2 exist between the drain and the source.

  A DC capacitor 8 is connected between the power supply lines 2 and 3, and a power supply voltage Vb is supplied from the battery 9. A DC motor 10 as a load is connected to the load output terminal 4 and is driven on the high side. The PWM control circuit 7 corresponding to the drive circuit complementarily drives the transistors 5 and 6 on and off with a PWM drive signal having a constant switching frequency while ensuring a dead time.

  A first variable capacitance circuit 22 is connected in parallel between the drain and source, which are the main terminals of the transistor 5. The first variable capacitance circuit 22 is configured by connecting three series circuits of a capacitor Cpn and a switch SWn in parallel (n = 1, 2, 3). Similarly, a second variable capacitance circuit 23 is connected in parallel between the drain and source of the transistor 6. The second variable capacitance circuit 23 is configured by connecting three series circuits of a capacitor Cpn and a switch SWn in parallel (n = 4, 5, 6). The switch SWn is composed of a MOS transistor. The transistors 5 and 6 and the variable capacitance circuits 22 and 23 are assembled on the substrate by bare chips or discrete elements, respectively. In the following description, the symbol Cpn may represent a capacitance value.

  During the switching operation in which the PWM control circuit 7 outputs the PWM drive signal, the capacitance value control circuit 24 applies the switch SWn (n = 1 to 6) to the switch SWn (n = 1 to 6) at a timing different from when the PWM drive signal is switched on / off. A switching signal for switching the on / off state is output. As a result, the capacitance values of the variable capacitance circuits 22 and 23 are continuously changed, and for each of the variable capacitance circuits 22 and 23, a plurality of states in which the parallel capacitance values of the transistors 5 and 6 are different are sequentially created. Change the capacitance value over time.

  Ringing occurs when the transistors 5 and 6 are turned on and off. However, according to the switching device 21, the ringing frequency shifts with time, the spectrum of noise energy spreads over a wide band, and the peak level of noise decreases. Hereinafter, this operation will be described in detail.

  FIG. 2 shows the FFT results of the output voltage Vs when the total capacitance values of the variable capacitance circuits 22 and 23 are set to 1 nF (a) and when set to 100 pF (b). When the capacitance value is 1 nF, the surge voltage peak due to ringing appears at 55 MHz, whereas when the capacitance value is 100 pF, the surge voltage peak due to ringing appears at 95 MHz. That is, it can be seen that when the capacitance value connected in parallel to the transistors 5 and 6 changes, the peak frequency of the surge voltage due to ringing changes.

The frequency of ringing appearing in the output voltage Vs due to switching of the transistor 5 is as follows.
[When transistor 5 is turned on]
FIG. 3 is an explanatory diagram of ringing when the transistor 5 is turned on. (A) shows that the transistors 5 and 6 are both off (dead time), (b) shows the state immediately after the transistor 5 is turned on, and (c) shows the state in which the body diode 6D of the transistor 6 is reversely recovered. Circuit elements unnecessary for the description are omitted. The resistor Rp2 shown in (c) is the equivalent resistance (including the parasitic loss resistance of the circuit) of the body diode 6D when the accumulated carriers are drawn out.

  Immediately before the transistor 5 is turned on, a forward current ID flows through the body diode 6D. Immediately after the transistor 5 is turned on, the current of the diode 6D does not instantaneously become zero due to the parasitic inductance Lp1. The parasitic inductance Lp1 is an energization path from the positive terminal of the capacitor 8 to the power supply line 2, the transistor 5, the output terminal line 25 from the transistor 5 to the transistor 6, the transistor 6 and the power supply line 3 to the negative terminal of the capacitor 8. This is the inductance intervening.

The current IL flowing through the output terminal line 25 at this time is expressed by equation (1).
IL = −ID + (Vb / Lp1) · t (1)
The current IL flowing through the body diode 6D rapidly decreases to zero, but a reverse current flows until all the accumulated carriers in the body diode 6D are drawn. As a result, the output voltage Vs swings to the minus side.

After that, when the body diode 6D reversely recovers, the energy WL stored in the parasitic inductance Lp1 is expressed by equation (2). Here, IPR is the reverse current of the body diode 6D when all the stored carriers are drawn.
WL = (1/2) · Lp1 · IPR ² (2)

This energy WL charges all the parallel capacitance Ct of the transistor 6 and resonates between the parasitic inductance Lp1 and the parallel capacitance Ct to cause ringing. The ringing frequency fon at this time can be approximately expressed by equation (3).
fon = 1 / (2π · (Lp1 · Ct) ^1/2 ) (3)

When this result is applied to the switching device 21 shown in FIG. 1, when all of the switches SW4 to SW6 are turned off, the ringing frequency fon generated when the transistor 5 is turned on is expressed by equation (4). Cq2 is a parasitic capacitance existing between the drain and source of the transistor 6 as described above.
fon = 1 / (2π · (Lp1 · Cq2) ^1/2 ) (4)

If the total capacitance value of the second variable capacitance circuit 23 corresponding to the switching state of the switches SW4 to SW6 is CpY, the relationship Ct = CpY + Cq2 is established, and the ringing frequency fon is expressed by the equation (5). . Equation (4) is for CpY = 0 in equation (5).
fon = 1 / (2π · (Lp1 · (CpY + Cq2)) ^1/2 ) (5)

[When transistor 5 is turned off]
FIG. 4 is an explanatory diagram of ringing when the transistor 5 is turned off. (A) shows the state immediately after the transistor 5 is turned on, the transistor 6 is turned off, and (b) the transistor 5 is turned off. Circuit elements unnecessary for the description are omitted. Assuming that the inductance interposed in the series path of the transistor 5, the output terminal line 25, and the transistor 6 is Lp2, a current also flows through the parasitic inductance Lp2 while the transistor 5 is on. At this time, the energy WL accumulated in the parasitic inductance Lp2 is expressed by equation (6).
WL = (1/2) · Lp2 · IL ² (6)

Immediately after the transistor 5 is turned off, the energy WL becomes maximum as shown in the equation (7). I PK is a current at the moment when the transistor 5 is turned off.
WL = (1/2) · Lp2 · IPK ² (7)

This energy WL charges the parallel capacitor Cs of the transistor 5 and resonates between the parasitic inductance Lp2 and the parallel capacitor Cs to cause ringing. The ringing frequency foff at this time can be approximately expressed by equation (8).
foff = 1 / (2π · (Lp2 · Cs) ^1/2 ) (8)

When this result is applied to the switching device 21 shown in FIG. 1, when all of the switches SW1 to SW3 are turned off, the ringing frequency foff generated when the transistor 5 is turned off is expressed by equation (9). Cq1 is a parasitic capacitance existing between the drain and source of the transistor 5 as described above.
foff = 1 / (2π · (Lp2 · Cq1) ^1/2 ) (9)

Further, if the total capacitance value of the first variable capacitance circuit 22 corresponding to the switching state of the switches SW1 to SW3 is CpX, the relationship Cs = CpX + Cq1 is established, and the ringing frequency foff is expressed by equation (10). . Expression (9) is a case where CpX = 0 in Expression (10).
foff = 1 / (2π · (Lp2 · (CpX + Cq1)) ^1/2 ) (10)

In order to reduce the noise caused by ringing by broadening the radiated noise energy, the ringing frequencies fon and foff are preferably different. The condition for fon ≠ foff when all the switches SWn are off is given by equation (11).
Lp1 · Cq2 ≠ Lp2 · Cq1 (11)

Further, the capacitance value of the first variable capacitance circuit 22, that is, the parallel combined capacitance value of the capacitors Cp1 to Cp3 corresponding to the switching state of the switches SW1 to SW3 is CpX, and the capacitance value of the second variable capacitance circuit 23, that is, the switching of the switches SW4 to SW6. If the parallel composite capacitance value of the capacitors Cp4 to Cp6 according to the state is CpY, the condition for fon ≠ foff is expressed by equation (12).
Lp1 · (CpY + Cq2) ≠ Lp2 · (CpX + Cq1) (12)

  The ringing frequency fon when the transistor 5 is turned on depends on the on / off state of the switches SW4 to SW6. SW4 to SW6 are all off, only SW4 is on, only SW5 is on, only SW6 is on, SW4 and SW5 are on, SW4 and SW6 are on There are 8 types when ON, SW5 and SW6 are ON, and SW4 to SW6 are all ON. Similarly, there are eight ringing frequencies foff when the transistor 5 is turned off, depending on the on / off states of SW1 to SW3. In order to broaden the noise energy, it is desirable that the ringing frequencies under these conditions be 100 kHz or more apart from each other.

  FIG. 5 schematically shows a spectrum of radio noise generated by ringing. A shown in the figure is a spectrum by the switching device 21 that sequentially switches to three states of only SW1 and SW4 on (broken line A1), only SW2 and SW5 on (dashed line A2), and only SW3 and SW6 on (dashed line A3). Yes, B is a spectrum obtained by the switching device 1 (see FIG. 20) provided with the conventional CR snubbers 11 and 12.

  If the variable capacitance circuits 22 and 23 included in the switching device 21 have the relationship of capacitors Cp1 ≠ Cp2 ≠ Cp3 and Cp4 ≠ Cp5 ≠ Cp6, the ringing frequencies in the three states are different from each other. Further, since the three states each have a time ratio of 1/3, the noise levels of the spectra A1 to A3 corresponding to the switching states are lowered. As a result, the time-averaged noise energy is spread over a wide band like the spectrum A obtained by superimposing the spectra A1 to A3, and the noise peak level is lowered with respect to the configuration including the conventional snubber.

  FIG. 6 shows waveforms of the switching signal output from the capacitance value control circuit 24 and the output voltage Vs. (A) switches the switches SW1 to SW6 every 1 PWM cycle and sequentially changes the capacitance values of the variable capacitance circuits 22 and 23. (b) switches the switches SW1 to SW6 every 2 PWM cycles. When the capacitance values of 23 are sequentially changed, (c) is a case where the capacitance values of the variable capacitance circuits 22 and 23 are changed by switching the switches SW1 to SW6 at a random cycle with respect to the PWM drive signal.

  In (a), the switches SW1 to SW3 themselves are not necessarily switched every 1 PWM cycle. However, since any of the switches SW1 to SW3 is switched, the capacitance value of the variable capacitance circuit 22 changes every 1 PWM cycle. Further, the switches SW1 and SW4, the switches SW2 and SW5, and the switches SW3 and SW6 are controlled to the same on / off state, but may be controlled to different on / off states.

  FIG. 7 shows a spectrum of radio noise shown in the same manner as FIG. (A)-(c) is corresponded to the case of (a)-(c) of FIG. 6, respectively. When the capacitance values of the variable capacitance circuits 22 and 23 are switched every 1 PWM period, the spectrum A obtained by superimposing the spectra A1 to A3 has a shape close to a normal distribution. As the switching cycle of the capacitance values of the variable capacitance circuits 22 and 23 becomes longer, the peak values of the spectra A1, A2 and A3 become higher, and valleys are formed between the spectra. When the switching cycle becomes random, the peak value peak is crushed and flat characteristics are obtained.

  FIG. 8 also shows the waveform of the switching signal output from the capacitance value control circuit 24 and the output voltage Vs. (A) is a case where the switching timing of the switches SW1 to SW3 of the first variable capacitance circuit 22 and the switching timing of the switches SW4 to SW6 of the second variable capacitance circuit 23 are the same, and has the same waveform as FIG. 6 (a). . (B) is a case where the switching timing of the switches SW1 to SW3 of the first variable capacitance circuit 22 and the switching timing of the switches SW4 to SW6 of the second variable capacitance circuit 23 are different.

  Since the switching of the capacitance value of the first variable capacitance circuit 22 acts when the output voltage Vs falls, the switching of the capacitance value of the second variable capacitance circuit 23 acts when the output voltage Vs rises. The same occurs in both cases of FIGS. 8A and 8B. However, if the switching timings of the first variable capacitance circuit 22 and the second variable capacitance circuit 23 are the same, it is considered that noise due to the switching timing occurs. Therefore, a different timing is preferable as a noise countermeasure at the time of switching.

  FIG. 10 shows a result of obtaining the output voltage Vs of the switching device 21 by simulation when the switches SW1 to SW6 are switched every 2 PWM periods by the switching signal shown in FIG. Capacitors Cp1 ≠ Cp2 ≠ Cp3, Cp4 ≠ Cp5 ≠ Cp6, the ringing frequency at turn-on when the switches SW1 to SW6 are all off is 100 MHz, at the time of turn-on when one switch is selectively turned on The ringing frequencies are 88 MHz, 93 MHz, and 95 MHz. That is, the ringing frequency is distributed in four states.

  In FIG. 10, a peak is observed near 100 MHz, which is a noise component due to ringing that appears during switching. According to the present switching device 21, it can be seen that the voltage is reduced to -36 dB (100 MHz). For comparison, FIG. 11 shows an FFT result of the output voltage Vs of the switching device 1 (see FIG. 20) provided with the conventional CR snubbers 11 and 12. Both have the same transistors 5, 6, power supply voltage Vb, PWM frequency (200 kHz), parasitic inductances Lp1, Lp2, and motor load. According to the conventional switching device 1, it can be seen that it is reduced only to −30 dB (100 MHz).

  As described above, the switching device 21 according to this embodiment includes the variable capacitance circuits 22 and 23 in parallel with the transistors 5 and 6, respectively, and the capacitance value control circuit 24 switches the PWM drive signal on and off during PWM switching. The capacitance values of the variable capacitance circuits 22 and 23 are switched at different timings. As a result, a plurality of states in which the parallel capacitance values of the transistors 5 and 6 are different from each other before and after the time are created.

  As a result, with the passage of time, the ringing frequency shifts, the noise energy spectrum spreads over a wide band, and the noise peak level decreases when viewed in terms of time average. That is, the noise suppression means used in the switching device 21 has no or very little heat generation in the variable capacitance circuits 22 and 23, unlike a snubber that suppresses the generation of noise by converting ringing energy into heat. Can solve the problem of fever.

  For this reason, it is not necessary to provide a margin for the sizes of the variable capacitance circuits 22 and 23 in preparation for a decrease in the capacitance value of the capacitor due to heat reception. In addition, the LC filter is not necessary, or even if it is provided as an auxiliary, a smaller one than the conventional one is sufficient. Furthermore, it is not necessary to deliberately reduce the switching speed of the transistors 5 and 6. Therefore, the present switching device 21 can achieve a large noise suppression effect while being small in size as compared with the conventional switching device 1. This noise suppression effect is particularly effective at a frequency of 10 MHz or more, and noise to the in-vehicle device, for example, radio noise can be reduced.

  Ringing that occurs in the output voltage Vs occurs when the transistors 5 and 6 are turned on and off. Since the capacitance value control circuit 24 shifts the switching timing of the capacitance value from the switching timing of the PWM drive signal, it is possible to avoid an increase in ringing due to switching of the capacitors of the variable capacitance circuits 22 and 23 when ringing occurs. That is, it is preferable that the capacitance value control circuit 24 change the switching signal during a period in which no ringing occurs.

  Since the capacitance value control circuit 24 outputs a switching signal so that the relationship of Lp1 · (CpY + Cq2) ≠ Lp2 · (CpX + Cq1) is satisfied at any given time, the ringing frequency fon generated when the transistor 5 is turned on and the transistor 5 is turned off. The resulting foff is different. Thereby, the energy of ringing noise is further dispersed, and the peak value of ringing noise can be further reduced.

  For each of the transistors 5 and 6, the capacitance value control circuit 24 changes the capacitance values of the variable capacitance circuits 22 and 23 for every n periods (n is a value selected from 1, 2,...) Of the PWM drive signal. The switching signal is output as follows. As n increases, the peak value of the spectrum corresponding to each parallel capacitance value gradually increases, and valleys are formed between the spectra. Therefore, n is preferably set to a small value. The capacitance value control circuit 24 can also output a switching signal so that the capacitance values of the variable capacitance circuits 22 and 23 change with a random period (for example, M series) with respect to the PWM drive signal. According to this, the peak of the spectrum corresponding to each parallel capacitance value is crushed and a flat spectrum is obtained.

(Second Embodiment)
Next, a second embodiment will be described with reference to FIG. The switching device 31 differs from the switching device 21 shown in FIG. 1 in the configuration of a first variable capacitance circuit 32, a second variable capacitance circuit 33, and a capacitance value control circuit 34. In the first variable capacitance circuit 32, a series circuit of a switch SW7, a capacitor Cp7, a switch SW8 and a capacitor Cp8 and a series circuit of a switch SW9, a capacitor Cp9, a switch SW10 and a capacitor Cp10 are connected in parallel. In the second variable capacitance circuit 33, a series circuit of a switch SW11, a capacitor Cp11, a switch SW12 and a capacitor Cp12 and a series circuit of a switch SW13, a capacitor Cp13, a switch SW14 and a capacitor Cp14 are connected in parallel.

  The switches SW7 to SW14 are single pole double throw switches composed of MOS transistors. The capacitance value control circuit 34 switches the on / off state of the switches SW7 to SW14 during the switching operation in which the PWM control circuit 7 outputs the PWM drive signal at a timing different from the on / off switching of the PWM drive signal. Output a signal.

  According to this switching signal, the first variable capacitance circuit 32 becomes a parallel capacitance of 0, Cp7, any of the series capacitances of Cp7 and Cp8, and 0, Cp9, any of the series capacitances of Cp9 and Cp10. Similarly, the second variable capacitance circuit 33 has a parallel capacitance of 0, Cp11, any of the series capacitances of Cp11 and Cp12, and 0, Cp13, any of the series capacitances of Cp13 and Cp14.

  The present embodiment is configured such that the capacitance value can be changed according to the number of capacitors connected in series in the first variable capacitance circuit 32 and the second variable capacitance circuit 33, and the same operation and effect as the first embodiment can be obtained. can get. In addition, except for the case where the capacitance value is 0, two switches (for example, SW7 and SW8) are interposed in series with respect to the capacitor. Therefore, the effect of suppressing ringing is enhanced by the DC resistance component of the switch.

(Third embodiment)
Next, a third embodiment will be described with reference to FIGS. 13 and 14. In the first variable capacitance circuit 42 and the second variable capacitance circuit 43, the switching device 41 shown in FIG. 13 further includes a series resistance Rn (n = 1 to 6) with respect to the series circuit of the switch SWn and the capacitor Cpn. . Other configurations are the same as those of the switching device 21 (FIG. 1). FIG. 14 shows the result of the FFT of the output voltage Vs calculated under the same conditions as in FIG. According to the switching device 41, the ringing noise component is reduced to -41 dB (100 MHz), and a higher noise reduction effect can be expected.

  As described above, according to the present embodiment, the ringing energy spectrum is spread over a wide band, and the ringing energy is further consumed by the series resistance Rn. Therefore, the snubber that suppresses noise generation by converting all the ringing energy into heat. Compared with the above, the amount of heat generated by the series resistor Rn can be small. For this reason, the size of the series resistor Rn is reduced, and a large noise suppression effect can be obtained while being smaller than the switching device 1 having the conventional configuration.

(Fourth embodiment)
Each of the above embodiments is a high-side drive switching device. On the other hand, as shown in FIG. 15, a DC motor 10 as a load is connected between the load output terminal 4 and the high-potential side power line 2, and the output voltage Vs is changed according to the duty ratio of the transistor 6. A low-side drive configuration that controls the size may be used. The switching device 51 of the present embodiment can provide the same operations and effects as those of the first embodiment.

(Fifth embodiment)
A switching device 61 shown in FIG. 16 employs a diode 62 instead of the transistor 6 as the second semiconductor element connected between the load output terminal 4 and the second power supply line 3. The capacitance value control circuit 63 switches the switches SW4 to SW6 of the second variable capacitance circuit 23 connected in parallel to the diode 62 to the same timing as the switches SW1 to SW3 of the first variable capacitance circuit 22 or the off period of the transistor 5. Other configurations are the same as those of the switching device 21.

  This configuration can also be applied to other embodiments of high-side drive in which a load (motor 10) is connected between the load output terminal 4 and the second power supply line 3. In the case of the low-side drive described in the fourth embodiment, a diode may be employed for the first semiconductor element connected between the first power supply line 2 and the load output terminal 4. That is, it is sufficient that at least one of the first semiconductor element and the second semiconductor element is constituted by a transistor. Also in these embodiments, the same operations and effects as those in the embodiments in which the transistors 5 and 6 are employed for the first and second semiconductor elements can be obtained.

(Sixth embodiment)
The switching device 71 shown in FIG. 17 uses variable capacitance elements 72 and 73 whose capacitance values change according to the applied voltage as the first and second variable capacitance circuits. The variable capacitance elements 72 and 73 are described in, for example, a variable capacitance element described in JP-A-6-275853, a voltage control capacitor described in JP-A-7-283651, and JP-A-2008-66682. It consists of a variable capacitor.

  The capacitance value control circuit 74 corresponds to the capacitance values of the variable capacitance elements 72 and 73 at a timing different from the on / off switching of the PWM drive signal during the switching operation in which the PWM control circuit 7 outputs the PWM drive signal. A switching signal with voltage is output. Thereby, the capacitance values of the variable capacitance elements 72 and 73 are changed, and for each of the variable capacitance elements 72 and 73, a plurality of states in which the parallel capacitance values of the transistors 5 and 6 are different are sequentially generated. Change the value over time.

  Also according to the present embodiment, the same operations and effects as those of the first embodiment can be obtained. Further, since the capacitance values of the variable capacitance elements 72 and 73 can be continuously changed according to the voltage value of the switching signal, many states with different parallel capacitance values can be easily created, and the spectrum of noise energy Easy to diffuse.

(Seventh embodiment)
The switching device 91 shown in FIG. 18 has the same electrical configuration as the switching device 21 described in the first embodiment. However, the MOS transistor 5 and the first variable capacitance circuit 22 are built in the bare chip 92, and the MOS transistor 6 and the second variable capacitance circuit 23 are built in the bare chip 93. As described above, since the variable capacitance circuits 22 and 23 do not generate heat or are very small, the size of the capacitor Cpn can be reduced, so that the transistor and the variable capacitance circuit can be built in one bare chip. It becomes.

  According to this configuration, the size can be further reduced. In addition, by replacing the transistor in the conventional switching device with the bare chip and adding the capacitance value control circuit 24, the noise energy can be diffused and the peak level of the noise can be lowered, thereby increasing versatility. The MOS transistors 5 and 6 and the variable capacitance circuits 22 and 23 may all be built in one bare chip.

(Other embodiments)
As mentioned above, although preferred embodiment of this invention was described, this invention is not limited to embodiment mentioned above, A various deformation | transformation and expansion | extension can be performed within the range which does not deviate from the summary of invention.
It is sufficient that at least one of the first semiconductor element and the second semiconductor element is formed of a transistor. The transistors are not limited to MOS transistors and diodes, and may be various semiconductor elements such as bipolar transistors and IGBTs.

The motor 10 may be one that can perform various controls such as current, rotation speed, and position. Further, the load is not limited to the motor, and may be an inductive load such as a solenoid.
In the first embodiment, each of the variable capacitance circuits 22 and 23 is configured such that any one or a plurality of capacitors can be selected from three capacitors and connected in parallel. However, the variable capacitance circuits 22 and 23 may be configured to include at least two capacitors and switch the total capacitance value between the terminals to a plurality. However, the diffusion effect increases as the number of capacitors provided in the variable capacitance circuits 22 and 23, that is, the number of states having different capacitance values increases.

The configurations of the first and second variable capacitance circuits 32 and 33 of the second embodiment may be applied to the above-described embodiments.
The configuration using the series resistor Rn of the third embodiment may be applied to each of the embodiments described above.
You may apply the structure of the low side drive of 4th Embodiment to each embodiment mentioned above.
You may apply the structure of the bare chip of 7th Embodiment to each embodiment mentioned above.

  In the drawing, 2 is a first power supply line, 3 is a second power supply line, 4 is a load output terminal, 5 is a MOS transistor (first semiconductor element), 6 is a MOS transistor (second semiconductor element), and 7 is a PWM control circuit. (Driving circuit), 8 is a DC capacitor, 21, 31, 41, 51, 61, 71, 91 are switching devices, 22, 32, 42 are first variable capacitance circuits, 23, 33, 43 are second variable capacitance circuits. 24, 34, 63, 74 are capacitance value control circuits, 25 is an output terminal line, 62 is a diode (second semiconductor element), 72 is a variable capacitor element (first variable capacitor circuit), and 73 is a variable capacitor element (first capacitor element). 2 variable capacitance circuit), 92 and 93 are bare chips, Cpn is a capacitor, SWn is a switch, and Rn is a series resistor.

Claims (9)

A first semiconductor element and a second semiconductor element connected between the first power supply line and the load output terminal and between the load output terminal and the second power supply line, respectively, at least one of which is composed of a transistor;
A drive circuit for driving the transistor on and off by a drive signal having a constant switching frequency;
A first variable capacitance circuit connected in parallel to the first semiconductor element and changing a capacitance value between the parallel connection terminals to a plurality in accordance with a switching signal;
A second variable capacitance circuit connected in parallel to the second semiconductor element and changing the capacitance value between the parallel connection terminals to a plurality in accordance with a switching signal;
By outputting a switching signal for switching the capacitance value of the first variable capacitance circuit and the capacitance value of the second variable capacitance circuit at a timing different from the on / off switching of the drive signal during the switching operation by the drive circuit, A switching device comprising: a capacitance value control circuit that sequentially generates a plurality of states having different parallel capacitance values of each of the first semiconductor element and the second semiconductor element. A DC capacitor is provided between the first and second power lines;
Via the first power supply line from the positive terminal of the DC capacitor, the first semiconductor element, the output terminal line from the first semiconductor element to the second semiconductor element, the second semiconductor element, and the second power supply line Lp1 is an inductance interposed in the energization path to the negative terminal of the DC capacitor, and Lp2 is an inductance interposed in the series path of the first semiconductor element, the output terminal line, and the second semiconductor element. When the parasitic capacitances between the main terminals of the second semiconductor element are Cq1 and Cq2, respectively, and the capacitance values of the first and second variable capacitance circuits are CpX and CpY, respectively, the capacitance value control circuit is Lp1 at that time. 2. The switching device according to claim 1, wherein the switching signal is output so that a relationship of (CpY + Cq2) ≠ Lp2 (CpX + Cq1) is established.   For each of the first semiconductor element and the second semiconductor element, the capacitance value control circuit performs the first, second, and every n cycles (n is a value selected from 1, 2,...) Of the drive signal. 3. The switching device according to claim 1, wherein the switching signal is output so that a capacitance value of the two variable capacitance circuit changes.   The capacitance value control circuit performs the switching so that the capacitance values of the first and second variable capacitance circuits change in a random cycle with respect to the drive signal for each of the first semiconductor element and the second semiconductor element. 3. The switching device according to claim 1, wherein a signal is output.   5. The first and second variable capacitance circuits are configured by connecting a plurality of series circuits of capacitors and switches that are turned on and off according to the switching signal in parallel. The switching device described.   5. The switching device according to claim 1, wherein each of the first and second variable capacitance circuits is configured such that the number of capacitors connected in series can be changed by a switch.   5. The switching according to claim 1, wherein each of the first and second variable capacitance circuits includes a variable capacitance element whose capacitance value changes according to a voltage of the switching signal. apparatus.   The switching device according to claim 1, wherein the first and second variable capacitance circuits include a series resistor.   9. The device according to claim 1, wherein the first semiconductor element and the first variable capacitance circuit, and the second semiconductor element and the second variable capacitance circuit are each configured as one bare chip. 10. Switching device.

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