JP2012128697A - 情報処理装置 - Google Patents

情報処理装置 Download PDF

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Publication number
JP2012128697A
JP2012128697A JP2010280003A JP2010280003A JP2012128697A JP 2012128697 A JP2012128697 A JP 2012128697A JP 2010280003 A JP2010280003 A JP 2010280003A JP 2010280003 A JP2010280003 A JP 2010280003A JP 2012128697 A JP2012128697 A JP 2012128697A
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JP
Japan
Prior art keywords
unit
failure
processor
occurred
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010280003A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012128697A5 (https=
Inventor
Motoi Nishijima
基 西嶋
Takashi Nishiyama
隆 西山
Takashi Aoyagi
隆 青柳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2010280003A priority Critical patent/JP2012128697A/ja
Priority to EP12182536.8A priority patent/EP2535817B1/en
Priority to EP11193336.2A priority patent/EP2466467B1/en
Priority to US13/327,190 priority patent/US20120159241A1/en
Publication of JP2012128697A publication Critical patent/JP2012128697A/ja
Publication of JP2012128697A5 publication Critical patent/JP2012128697A5/ja
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2043—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share a common memory address space
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/142—Reconfiguring to eliminate the error
    • G06F11/1423—Reconfiguring to eliminate the error by reconfiguration of paths
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2035—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant without idle spare hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1417—Boot up procedures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
JP2010280003A 2010-12-16 2010-12-16 情報処理装置 Pending JP2012128697A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2010280003A JP2012128697A (ja) 2010-12-16 2010-12-16 情報処理装置
EP12182536.8A EP2535817B1 (en) 2010-12-16 2011-12-13 Information processing system
EP11193336.2A EP2466467B1 (en) 2010-12-16 2011-12-13 Information Processing System
US13/327,190 US20120159241A1 (en) 2010-12-16 2011-12-15 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010280003A JP2012128697A (ja) 2010-12-16 2010-12-16 情報処理装置

Publications (2)

Publication Number Publication Date
JP2012128697A true JP2012128697A (ja) 2012-07-05
JP2012128697A5 JP2012128697A5 (https=) 2013-03-14

Family

ID=45418405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010280003A Pending JP2012128697A (ja) 2010-12-16 2010-12-16 情報処理装置

Country Status (3)

Country Link
US (1) US20120159241A1 (https=)
EP (2) EP2466467B1 (https=)
JP (1) JP2012128697A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016091480A (ja) * 2014-11-11 2016-05-23 三菱電機株式会社 二重化制御システム
WO2017090164A1 (ja) * 2015-11-26 2017-06-01 三菱電機株式会社 制御装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4437560B2 (ja) * 2007-08-02 2010-03-24 ソニー株式会社 情報処理装置および方法、並びに、非接触ｉｃカードデバイス
US10491701B2 (en) * 2016-07-14 2019-11-26 Cisco Technology, Inc. Interconnect method for implementing scale-up servers
WO2018193449A1 (en) * 2017-04-17 2018-10-25 Mobileye Vision Technologies Ltd. Secure system that includes driving related systems
US11009874B2 (en) 2017-09-14 2021-05-18 Uatc, Llc Fault-tolerant control of an autonomous vehicle with multiple control lanes
US11953559B2 (en) 2018-05-28 2024-04-09 Mobileye Vision Technologies Ltd. Secure system that includes driving related systems

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06168218A (ja) * 1992-11-30 1994-06-14 Fujitsu Ltd マルチプロセッサシステム
JPH1153329A (ja) * 1997-08-05 1999-02-26 Hitachi Ltd 情報処理システム
JPH11232237A (ja) * 1998-02-16 1999-08-27 Hitachi Ltd クロスバースイッチを有する情報処理装置およびクロスバースイッチ制御方法
JP2000076216A (ja) * 1998-09-02 2000-03-14 Nec Corp マルチプロセッサシステム及びそのプロセッサ二重化方法並びにその制御プログラムを記録した記録媒体
JP2000122986A (ja) * 1998-10-16 2000-04-28 Hitachi Ltd マルチプロセッサシステム
JP2005507116A (ja) * 2001-09-28 2005-03-10 チヤパラル ネツトワーク ストレージ，インコーポレーテツド チャネル独立記憶制御装置アーキテクチャにおけるバス区分
JP2005149281A (ja) * 2003-11-18 2005-06-09 Hitachi Ltd 情報処理システム、情報処理装置、情報処理装置の制御方法及びプログラム
JP2006172220A (ja) * 2004-12-16 2006-06-29 Nec Corp フォールトトレラント・コンピュータシステム
JP2007219571A (ja) * 2006-02-14 2007-08-30 Hitachi Ltd 記憶制御装置及びストレージシステム
JP2009193469A (ja) * 2008-02-15 2009-08-27 Nec Corp 動的切り替え装置、動的切り替え方法、及び動的切り替えプログラム
US20090235104A1 (en) * 2000-09-27 2009-09-17 Fung Henry T System, architecture, and method for logical server and other network devices in a dynamically configurable multi-server network environment
US20090240981A1 (en) * 2008-03-24 2009-09-24 Advanced Micro Devices, Inc. Bootstrap device and methods thereof
WO2010103562A1 (ja) * 2009-03-09 2010-09-16 富士通株式会社 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム

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Publication number Priority date Publication date Assignee Title
US6971043B2 (en) * 2001-04-11 2005-11-29 Stratus Technologies Bermuda Ltd Apparatus and method for accessing a mass storage device in a fault-tolerant server
JP2003131900A (ja) * 2001-10-24 2003-05-09 Hitachi Ltd サーバシステム運用管理方式
US6874103B2 (en) * 2001-11-13 2005-03-29 Hewlett-Packard Development Company, L.P. Adapter-based recovery server option
US7389411B2 (en) * 2003-08-29 2008-06-17 Sun Microsystems, Inc. Secure transfer of host identities
US20050125557A1 (en) * 2003-12-08 2005-06-09 Dell Products L.P. Transaction transfer during a failover of a cluster controller
JP4182948B2 (ja) * 2004-12-21 2008-11-19 日本電気株式会社 フォールト・トレラント・コンピュータシステムと、そのための割り込み制御方法
WO2007084422A2 (en) * 2006-01-13 2007-07-26 Sun Microsystems, Inc. Modular blade server
WO2009081737A1 (ja) * 2007-12-26 2009-07-02 Nec Corporation 縮退構成設計システムおよび方法
US7802042B2 (en) * 2007-12-28 2010-09-21 Intel Corporation Method and system for handling a management interrupt event in a multi-processor computing device
TW200947224A (en) * 2008-05-02 2009-11-16 Inventec Corp A sharing basic input output system type server device and method thereof
US8335943B2 (en) * 2009-06-22 2012-12-18 Citrix Systems, Inc. Systems and methods for stateful session failover between multi-core appliances
US9141489B2 (en) * 2009-07-09 2015-09-22 Uniloc Luxembourg S.A. Failover procedure for server system

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06168218A (ja) * 1992-11-30 1994-06-14 Fujitsu Ltd マルチプロセッサシステム
JPH1153329A (ja) * 1997-08-05 1999-02-26 Hitachi Ltd 情報処理システム
JPH11232237A (ja) * 1998-02-16 1999-08-27 Hitachi Ltd クロスバースイッチを有する情報処理装置およびクロスバースイッチ制御方法
JP2000076216A (ja) * 1998-09-02 2000-03-14 Nec Corp マルチプロセッサシステム及びそのプロセッサ二重化方法並びにその制御プログラムを記録した記録媒体
JP2000122986A (ja) * 1998-10-16 2000-04-28 Hitachi Ltd マルチプロセッサシステム
US20090235104A1 (en) * 2000-09-27 2009-09-17 Fung Henry T System, architecture, and method for logical server and other network devices in a dynamically configurable multi-server network environment
JP2005507116A (ja) * 2001-09-28 2005-03-10 チヤパラル ネツトワーク ストレージ，インコーポレーテツド チャネル独立記憶制御装置アーキテクチャにおけるバス区分
JP2005149281A (ja) * 2003-11-18 2005-06-09 Hitachi Ltd 情報処理システム、情報処理装置、情報処理装置の制御方法及びプログラム
JP2006172220A (ja) * 2004-12-16 2006-06-29 Nec Corp フォールトトレラント・コンピュータシステム
JP2007219571A (ja) * 2006-02-14 2007-08-30 Hitachi Ltd 記憶制御装置及びストレージシステム
JP2009193469A (ja) * 2008-02-15 2009-08-27 Nec Corp 動的切り替え装置、動的切り替え方法、及び動的切り替えプログラム
US20090240981A1 (en) * 2008-03-24 2009-09-24 Advanced Micro Devices, Inc. Bootstrap device and methods thereof
WO2010103562A1 (ja) * 2009-03-09 2010-09-16 富士通株式会社 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016091480A (ja) * 2014-11-11 2016-05-23 三菱電機株式会社 二重化制御システム
WO2017090164A1 (ja) * 2015-11-26 2017-06-01 三菱電機株式会社 制御装置

Also Published As

Publication number Publication date
EP2466467A1 (en) 2012-06-20
EP2535817A1 (en) 2012-12-19
EP2535817B1 (en) 2014-04-02
EP2466467B1 (en) 2013-05-01
US20120159241A1 (en) 2012-06-21

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