JP2012119390A - Method of manufacturing semiconductor light-emitting element, semiconductor light-emitting element, lamp, electronic apparatus, and mechanical device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element in which degradation of crystallinity of a light-emitting layer caused by the lattice relaxation of a second n-type semiconductor layer hardly occurs and has high output and low operating voltage, and to provide a method of manufacturing the same.SOLUTION: A method of manufacturing a semiconductor light-emitting element comprises: a first step of sequentially stacking a ground layer having a composition of AlInGaN (0≤x<1, 0≤y<1, and 0≤x+y<1), a first n-type semiconductor layer, and a second n-type semiconductor layer on a substrate and then lowering the substrate temperature to 400°C or less; and a second step of forming a regrowth layer of the second n-type semiconductor layer, which has a higher In composition than the second n-type semiconductor layer, on the second n-type semiconductor layer and then sequentially stacking a light-emitting layer and a p-type semiconductor layer.

Description

  The present invention relates to a method for manufacturing a semiconductor light emitting element, a semiconductor light emitting element, a lamp, an electronic device, and a mechanical device.

  In recent years, group III nitride semiconductors have attracted attention as semiconductor materials for semiconductor light emitting devices that emit light of short wavelengths. In general, group III nitride semiconductors use various oxide crystals such as sapphire single crystal, silicon carbide single crystal, or group III-V compound semiconductor single crystal as a substrate, and metal organic vapor phase chemical reaction method ( MOCVD method), molecular beam epitaxy method (MBE method), hydride vapor phase epitaxy method (HVPE method), or the like.

At present, a crystal growth method that is widely adopted is a method of using sapphire, SiC, GaN, AlN, or the like as a substrate and using a metal organic chemical vapor deposition method (MOCVD method) thereon. For example, an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are grown in a temperature range of 700 ° C. to 1200 ° C. using a group III organometallic compound and a group V source gas in a reaction tube in which the above-described substrate is installed. Let
Then, after the growth of each semiconductor layer, a negative electrode is formed on the substrate or the n-type semiconductor layer, and a positive electrode is formed on the p-type semiconductor layer, whereby a light emitting element is obtained.

However, when an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are sequentially and sequentially stacked on a substrate, these layers are formed in the same growth chamber. The used impurities adhere to the growth chamber. Therefore, there is a problem that impurities attached to the growth chamber are mixed in the p-type semiconductor layer and the crystallinity of the p-type semiconductor layer is lowered.
As a technique for solving such a problem, a method of forming a plurality of semiconductor layers having different conductivity types on a substrate using a plurality of independent growth chambers corresponding to the conductivity type of the semiconductor layer to be formed has been proposed. (Patent Document 1).

  In addition, the n-type semiconductor layer generally has a function of relaxing the mismatch of the crystal lattice between the first n-type semiconductor layer, which is a layer for providing a negative electrode, and the first n-type semiconductor layer and the light emitting layer. And a second n-type semiconductor layer. Further, since the light emitting layer is made of InGaN whose composition is adjusted to adjust the emission wavelength, the lattice constant of the light emitting layer and the lattice constant of the first n-type semiconductor layer are greatly different. For this reason, the second n-type semiconductor layer is required to relax crystal lattice mismatch between the first n-type semiconductor layer and the light emitting layer. For this reason, the second n-type semiconductor layer is required to have a large film thickness and contain a high concentration of indium.

Japanese Unexamined Patent Publication No. 7-45538

However, since the composition of the second n-type semiconductor layer is different from the composition of the first n-type semiconductor layer, their lattice constants are also different. In addition, when high concentration of indium is contained in the second n-type semiconductor layer, the electronic state is changed by indium, so that the atomic force in the crystal changes (lattice relaxation). For this reason, when the second n-type semiconductor layer containing a high concentration of indium is grown on the first n-type semiconductor layer with a thickness exceeding the critical thickness, atoms constituting the second n-type semiconductor layer are formed. Forces in a direction that avoids changes in interatomic forces work. Further, when dislocations are generated in the crystals constituting the second n-type semiconductor layer, strain energy in the second n-type semiconductor layer is released, and lattice relaxation occurs. For this reason, when the film thickness of the second n-type semiconductor layer is increased, the second n-type semiconductor layer grows in a state close to the original lattice constant. For this reason, the crystallinity of the second n-type semiconductor layer is lowered, and a light-emitting layer with high crystallinity cannot be formed in the subsequent steps.
On the other hand, if the film thickness of the second n-type semiconductor layer is reduced, the crystal lattice mismatch between the first n-type semiconductor layer and the light-emitting layer cannot be sufficiently relaxed. High light emitting layer cannot be formed. Further, when the In composition of the second n-type semiconductor layer is lowered, the second n-type semiconductor layer grows in a state close to the original lattice constant, so that the crystal lattice between the first n-type semiconductor layer and the light emitting layer is increased. This inconsistency cannot be alleviated sufficiently. Therefore, a light-emitting layer with high crystallinity cannot be formed in the subsequent steps. For this reason, the fall of the light emission output of the semiconductor light-emitting device resulting from the crystallinity fall of a light emitting layer has been a problem.

  The present invention has been made in view of the above problems, and it is difficult for the crystallinity of the light-emitting layer to be lowered due to lattice relaxation of the second n-type semiconductor layer, and the semiconductor light-emitting device has a high output and a low operating voltage. It is an object to provide a manufacturing method thereof.

In order to achieve the above object, the present invention provides the following means.
[1] An underlayer having a composition of Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, 0 ≦ x + y <1), a first n-type semiconductor layer, and a first n-type semiconductor layer on a substrate A first step of lowering the substrate temperature to 400 ° C. or less after sequentially laminating two n-type semiconductor layers, and a higher In composition than the second n-type semiconductor layer on the second n-type semiconductor layer, And a second step of sequentially laminating a light emitting layer and a p-type semiconductor layer after forming a regrowth layer of the second n-type semiconductor layer.
[2] The semiconductor according to [1], wherein the first step is performed in a first metal organic chemical vapor deposition apparatus, and the second step is performed in a second metal organic chemical vapor deposition apparatus. Manufacturing method of light emitting element.
[3] In the first step, the temperature of the substrate is lowered to 400 ° C. or lower in an atmosphere containing nitrogen and ammonia. The method for manufacturing a semiconductor light-emitting element according to either [1] or [2] Method.
[4] Before forming the regrowth layer, in the second organometallic chemical vapor deposition apparatus, in an atmosphere containing nitrogen and ammonia, a pressure of 15 kPa to 100 kPa and a substrate temperature of 500 ° C. to 900 ° C. The method for producing a semiconductor light-emitting element according to any one of [2] or [3], wherein a heat treatment is performed in step [2].
[5] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [4], wherein the regrowth layer is formed with a thickness of 10 nm to 200 nm.
[6] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [5], wherein the regrown layer contains In at a composition of 1% to 5%.
[7] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [6], wherein a substrate temperature in forming the regrowth layer is 600 ° C. to 900 ° C.
[8] An underlayer, a first n-type semiconductor layer, a second n-type semiconductor layer, a regrowth layer of the second n-type semiconductor layer having an In composition higher than that of the second n-type semiconductor layer on the substrate; A semiconductor light emitting device in which a light emitting layer and a p-type semiconductor layer are stacked.
[9] The semiconductor light emitting element according to [8], wherein the regrowth layer is formed with a thickness of 10 nm to 200 nm.
[10] The semiconductor light emitting device according to [7] or [9], wherein the regrown layer contains In at a composition of 1% to 5%.
[11] A lamp comprising the semiconductor light emitting device according to any one of [8] to [10].
[12] An electronic device in which the lamp according to [11] is incorporated.
[13] A mechanical apparatus in which the electronic device according to [12] is incorporated.

According to the method for manufacturing a semiconductor light emitting device of the present invention, an underlayer having a composition of Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, 0 ≦ x + y <1), After sequentially laminating the first n-type semiconductor layer and the second n-type semiconductor layer, the substrate temperature is lowered to 400 ° C. or lower to stop the growth of the second n-type semiconductor layer, and Thermal strain due to the difference in thermal expansion coefficient of the second n-type semiconductor layer can be alleviated. Further, the surface migration of the second n-type semiconductor layer is increased, and the crystallinity of the second n-type semiconductor layer is improved. Further, when the growth of the second n-type semiconductor layer is stopped, the substrate temperature is lowered to 400 ° C. or lower, so that sublimation of nitrogen from the surface of the second n-type semiconductor layer is prevented, and the second n-type semiconductor layer It is possible to prevent the surface crystallinity from being lowered.
Further, by forming a regrowth layer of the second n-type semiconductor layer on the second n-type semiconductor layer, the entire thickness of the second n-type semiconductor layer can be increased. In addition, a regrowth layer having a higher In composition (higher In concentration) than the second n-type semiconductor layer is formed on the second n-type semiconductor layer, thereby forming a gap between the first n-type semiconductor layer and the light emitting layer. The crystal lattice mismatch can be relaxed. For this reason, the light emitting layer with high crystallinity can be formed on the second n-type semiconductor layer in the step after the formation of the second n-type semiconductor layer. For this reason, the light emission output of the semiconductor light emitting element can be improved.

  According to the semiconductor light emitting device of the present invention, since the regrowth layer of the second n-type semiconductor layer is formed on the second n-type semiconductor layer, the film thickness of the entire second n-type semiconductor layer is critical. Even if the thickness exceeds the thickness, lattice relaxation of the second n-type semiconductor layer can be prevented. In addition, since a regrowth layer having an In composition higher than that of the second n-type semiconductor layer is formed on the second n-type semiconductor layer, a crystal lattice defect between the first n-type semiconductor layer and the light emitting layer is eliminated. Alignment can be relaxed. For this reason, a light emitting layer with high crystallinity is formed, and the light emission output of a semiconductor light emitting element can be improved.

FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor light emitting device manufactured using the method for manufacturing a semiconductor light emitting device of the present invention. FIG. 2 is a schematic cross-sectional view for explaining a process for manufacturing the semiconductor light emitting element shown in FIG. FIG. 3 is a schematic cross-sectional view showing an example of a lamp including the semiconductor light emitting element shown in FIG.

  Hereinafter, the semiconductor light emitting device 1 of the present invention will be described in detail with reference to FIG. Note that the drawings referred to in the following description may show the characteristic portions in an enlarged manner for the sake of convenience, and the dimensional ratios of the respective components are not always the same as the actual ones. In addition, the materials, dimensions, and the like exemplified in the following description are examples, and the present invention is not limited to them, and can be appropriately changed and implemented without changing the gist thereof.

FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor light emitting device 1 of the present invention.
A semiconductor light emitting device 1 according to this embodiment shown in FIG. 1 includes a substrate 11, a laminated semiconductor layer 20 laminated on the substrate 11, a translucent electrode 15 laminated on the upper surface of the laminated semiconductor layer 20, The p-type bonding pad electrode 16 laminated on the conductive electrode 15 and the n-type electrode 17 laminated on the exposed surface 20a of the laminated semiconductor layer 20 are provided.

In the laminated semiconductor layer 20, at least the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 are laminated in this order from the substrate 11 side. Further, as shown in FIG. 1, the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 are partially removed by means such as etching, and the n-type semiconductor layer 12 is removed from the removed portions. A part of is exposed. An n-type electrode 17 is stacked on the exposed surface 20 a of the n-type semiconductor layer 12.
A translucent electrode 15 and a p-type bonding pad electrode 16 are stacked on the upper surface of the p-type semiconductor layer 14. The translucent electrode 15 and the p-type bonding pad electrode 16 constitute a p-type electrode 18.

As a semiconductor constituting the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14, a group III nitride semiconductor is preferably used, and a gallium nitride compound semiconductor is more preferably used. As the gallium nitride-based compound semiconductor constituting the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 in the present invention, a general formula Al _x In _y Ga _1-xy N (0 ≦ x <1,0) Semiconductors having various compositions represented by ≦ y <1, 0 ≦ x + y <1) can be used without any limitation.

The semiconductor light emitting device 1 of the present embodiment can emit light from the light emitting layer 13 constituting the laminated semiconductor layer 20 by passing a current between the p-type electrode 18 and the n-type electrode 17. This is a face-up mount type light emitting element that extracts light from the light emitting layer 13 from the side where the p type bonding pad electrode 16 is formed. The semiconductor light emitting device of the present invention may be a flip chip type light emitting device.
Hereinafter, each configuration will be described in detail.

<Substrate 11>
Examples of the substrate 11 include sapphire, SiC, silicon, zinc oxide, magnesium oxide, manganese oxide, zirconium oxide, manganese zinc iron, magnesium aluminum oxide, zirconium boride, gallium oxide, indium oxide, lithium gallium oxide, and lithium oxide. A substrate formed of aluminum, neodymium gallium oxide, lanthanum strontium aluminum tantalum oxide, strontium titanium oxide, titanium oxide, hafnium oxide, tungsten oxide, molybdenum oxide, or the like can be used. Among the above substrates, it is particularly preferable to use a sapphire substrate having a c-plane as a main surface. Further, at least a regular uneven shape may be provided on the main surface side of the substrate 11.

(Buffer layer 21)
The buffer layer 21 may not be provided, but the difference in lattice constant between the substrate 11 and the base layer 22 is alleviated to form a C-axis oriented single crystal layer on the (0001) C plane of the substrate 11. It is preferable that it is provided in order to facilitate the process.

The buffer layer 21 is particularly preferably made of single crystal Al _x Ga _1-x N (0 ≦ x ≦ 1), but is made of polycrystalline Al _x Ga _1-x N (0 ≦ x ≦ 1). It doesn't matter.
The buffer layer 21 may be, for example, 0.01 μm to 0.5 μm thick made of Al _x Ga _1-x N (0 ≦ x ≦ 1). If the thickness of the buffer layer 21 is less than 0.01 μm, the buffer layer 21 may not be able to alleviate the difference in lattice constant between the substrate 11 and the base layer 22. Further, when the thickness of the buffer layer 21 exceeds 0.5 μm, the film forming process time of the buffer layer 21 becomes long and the productivity is lowered although the function as the buffer layer 21 is not changed. There's a problem.

  The buffer layer 21 may have a polycrystalline structure or a single crystal structure. When the buffer layer 21 having such a polycrystalline structure or a single crystal structure is formed on the substrate 11 by the MOCVD method or the sputtering method, the buffer function of the buffer layer 21 works effectively. The group III nitride semiconductor thus formed becomes a crystal film having good orientation and crystallinity.

(Underlayer 22)
As the material of the underlayer 22, it is particularly preferable to use Al _x Ga _1-x N (0 ≦ x <1) because the underlayer 22 with good crystallinity can be formed, but Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) may be used.
The film thickness of the underlayer 22 is preferably 0.1 μm or more, more preferably 0.5 μm or more, and most preferably 1 μm or more. The underlayer (Al _x Ga _1-x N layer) 22 is formed with a film thickness of 1 μm or more, whereby the crystallinity is improved. Moreover, it is preferable that the film thickness of the base layer 22 is 10 μm or less from the viewpoint of miniaturization of the semiconductor light emitting device and shortening of the formation time.

  In order to improve the crystallinity of the underlayer 22, it is desirable that the underlayer 22 is not doped with impurities.

<Laminated semiconductor layer 20>
(N-type semiconductor layer 12)
The n-type semiconductor layer 12 further includes an n-contact layer (first n-type semiconductor layer) 12a, an n-cladding layer (second n-type semiconductor layer) 12b formed in a first process described later, and a second process described later. And a regrowth layer 12c of the n-clad layer 12b formed in (1).

(N contact layer 12a)
The n contact layer 12a is a layer for providing the n-type electrode 17, and an exposed surface 20a for providing the n-type electrode 17 is formed as shown in FIG.
The thickness of the n contact layer 12a is preferably 0.5 to 5 μm, and more preferably 2 to 4 μm. When the film thickness of the n contact layer 12a is within the above range, the crystallinity of the n contact layer 12a is favorably maintained.

The n-contact layer 12a is preferably composed of an Al _x Ga _1-x N layer (0 ≦ x <1, preferably 0 ≦ x ≦ 0.5, more preferably 0 ≦ x ≦ 0.1), This layer is doped with n-type impurities (impurities). Further, it is preferable that the n-type impurity is contained in the n-contact layer 12a at a concentration of 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ . When the n-type impurity is contained in the n-contact layer 12a at a concentration within this range, the width of the barrier between the n-contact layer 12a and the n-type electrode 17 is narrowed, and a tunnel current is likely to be generated. Therefore, the contact resistance between the n contact layer 12a and the n-type electrode 17 can be lowered. The n-type impurity used for the n-contact layer 12a is not particularly limited, and examples thereof include Si, Ge, and Sn. Si and Ge are preferable, and Si is most preferable. In the present embodiment, Si of about 5 × 10 ¹⁸ / cm ³ is contained as an n-type impurity (impurity).

(N-cladding layer 12b)
The n-clad layer 12b has a function of relaxing crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13. The n-clad layer 12b is a layer for injecting carriers into the light emitting layer 13 and confining carriers. The n-clad layer 12b has a function of preventing diffusion of In from the regrowth layer 12c to the n-contact layer 12a.

  The n-clad layer 12b can be formed of AlGaN, GaN, GaInN, or the like. In the specification, the composition ratio of each element may be omitted and described as AlGaN or GaInN.

  The n-clad layer 12b may have a single layer structure or a superlattice structure. The film thickness of the n-clad layer 12b is preferably 5 nm to 500 nm. When the film thickness of the n-clad layer 12b is within the above range, the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13 can be sufficiently relaxed.

On the other hand, if the film thickness of the n-clad layer 12b is less than 5 nm, it is not preferable because the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13 cannot be sufficiently relaxed.
Further, when the thickness of the n-clad layer 12b exceeds 500 nm, the thickness of the n-clad layer 12b exceeds the critical thickness, so that lattice relaxation occurs in the crystal constituting the n-clad layer 12b. For this reason, the crystallinity of the n-clad layer 12b is lowered, which is not preferable.

  In this embodiment, the n-clad layer 12b may be a single layer, but consists of 10 pairs (20 layers) to 40 pairs (80 layers) by repeatedly growing two thin film layers having different compositions. A superlattice structure is preferred. In the case where the n-clad layer 12b has a superlattice structure, if the number of thin film layers is 20 or more, the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13 is more effectively reduced. Therefore, the effect of improving the output of the semiconductor light emitting device 1 becomes more remarkable. However, if the number of thin film layers exceeds 80, the superlattice structure may be easily disturbed, and the light emitting layer 13 may be adversely affected. Furthermore, there is a problem that the film forming process time of the n-clad layer 12b becomes long and productivity is lowered.

  The thickness of each thin film layer is preferably 10 nm or less, more preferably 6 nm or less, further preferably 4 nm or less, and most preferably in the range of 1 nm to 4 nm. By forming the thin film layer with a film thickness within this range, generation of crystal defects can be prevented. On the other hand, if the film thickness of the thin film layer exceeds 10 nm, crystal defects are likely to occur, which is not preferable.

(Regrown layer 12c)
The regrowth layer 12c is a regrowth layer of the n-clad layer 12b, and contains a higher concentration (higher composition) of In than the n-clad layer 12b.
The regrown layer 12c is preferably formed with a thickness of 10 nm to 200 nm. When the film thickness of the regrowth layer 12c is within the above range, the crystal lattice mismatch between the first n-type semiconductor layer 12a and the light emitting layer 13 can be sufficiently relaxed. In addition, the flatness of the surface of the n-clad layer 12b can be improved. Further, the growth of the n-clad layer 12b is interrupted and moved into the growth chamber of the second MOCVD apparatus, and then the growth of the n-clad layer 12b is resumed, thereby reducing the influence on the crystallinity of the n-clad layer 12b. it can. Therefore, the effect of improving the output of the semiconductor light emitting device becomes more remarkable.

On the other hand, if the thickness of the regrown layer 12c is less than 10 nm, the crystal lattice mismatch between the n contact layer 12a and the light emitting layer 13 cannot be sufficiently relaxed, and the regrown layer 12c (n clad layer 12b). The light emitting layer 13 with high crystallinity cannot be formed thereon.
If the thickness of the regrown layer 12c exceeds 200 nm, after the n-type semiconductor layer 12 is formed in the growth chamber of the second metal organic chemical vapor deposition apparatus used when forming the p-type semiconductor layer 14. The amount of remaining dopant and deposit increases, and the p-type semiconductor layer 14 is likely to be defective due to the dopant and deposit used when the n-type semiconductor layer 12 is formed. Further, the processing time for forming the regrowth layer 12c becomes longer, and the productivity is lowered.

The In composition contained in the regrowth layer 12c is preferably 1% to 5%.
If the In composition of the regrowth layer 12c is within the above range, crystal lattice mismatch between the n contact layer 12a and the light emitting layer 13 can be alleviated. For this reason, the light emitting layer 13 with high crystallinity is formed on the regrowth layer 12c (n clad layer 12b).
On the other hand, if the In composition of the regrowth layer 12c is less than 1%, the crystal lattice mismatch between the n contact layer 12a and the light emitting layer 13 cannot be sufficiently relaxed, which is not preferable.
If the In composition of the regrowth layer 12c exceeds 5%, lattice relaxation occurs in the crystals constituting the regrowth layer 12c. For this reason, the crystallinity of the regrowth layer 12c is lowered, which is not preferable.

<Light emitting layer 13>
The light emitting layer 13 has a multiple quantum well structure in which a plurality of barrier layers 13a and well layers 13b are alternately stacked. The number of stacked layers in the multiple quantum well structure is preferably 3 to 10 layers, more preferably 4 to 7 layers.

(Well layer 13b)
The thickness of the well layer 13b is preferably in the range of 15 angstroms or more and 50 angstroms or less. When the film thickness of the well layer 13b is within the above range, a higher light emission output can be obtained.
The well layer 13b is preferably a gallium nitride compound semiconductor containing In. A gallium nitride compound semiconductor containing In is preferable because it emits strong light in the blue wavelength region. The well layer 13b can be doped with impurities. Moreover, it is preferable to use Si as an impurity in this embodiment. The dope amount is preferably about 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ¹⁷ cm ⁻³ .

(Barrier layer 13a)
The thickness of the barrier layer 13a is preferably in the range of 20 angstroms or more and less than 100 angstroms. If the thickness of the barrier layer 13a is too thin, flattening of the upper surface of the barrier layer 13a is hindered, resulting in a decrease in light emission efficiency and a decrease in aging characteristics. Moreover, when the film thickness of the barrier layer 13a is too thick, a drive voltage rises and light emission falls. Therefore, the thickness of the barrier layer 13a is more preferably 70 angstroms or less.
In addition to GaN and AlGaN, the barrier layer 13a can be formed of InGaN having a smaller In composition ratio than InGaN constituting the well layer. Among these, GaN is preferable. Further, the barrier layer 13a can be doped with impurities. Si is preferably used as an impurity in the present embodiment. The dope amount is preferably about 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁸ cm ⁻³ .

<P-type semiconductor layer 14>
The p-type semiconductor layer 14 is generally composed of a p-cladding layer 14a and a p-contact layer 14b. Further, the p contact layer 14b can also serve as the p clad layer 14a.

(P-clad layer 14a)
The p-clad layer 14 a in the present embodiment is formed on the light emitting layer 13. The p-cladding layer 14a is a layer for confining carriers in the light emitting layer 13 and injecting carriers. The p-cladding layer 14a is not particularly limited as long as it has a composition larger than the band gap energy of the light emitting layer 13 and can confine carriers in the light emitting layer 13, but Al _x Ga _1-x N (0 ≦ x ≦ 0.4) is preferable. When the p-cladding layer 14a is made of such AlGaN, it is preferable in terms of confining carriers in the light-emitting layer 13.

The thickness of the p-cladding layer 14a is not particularly limited, but is preferably 1 to 400 nm, and more preferably 5 to 100 nm. The p-type doping concentration of the p-cladding layer 14a is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , more preferably 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ . When the p-type dope concentration is in the above range, a good p-type crystal can be obtained without reducing the crystallinity. The p-cladding layer 14a may have a superlattice structure in which thin films having different compositions are stacked a plurality of times, or may have a single-layer structure with a constant composition.

(P contact layer 14b)
The p contact layer 14b is a layer for providing a positive electrode (p-type electrode). The p contact layer 14b is preferably made of Al _x Ga _1-x N (0 ≦ x ≦ 0.4) in terms of maintaining good crystallinity and good ohmic contact with the p ohmic electrode. . Further, when the p-contact layer 14b contains p-type impurities (impurities) at a concentration of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ and 5 × 10 ^{19 to} 5 × 10 ²⁰ / cm ^3. From the viewpoint of maintaining good ohmic contact, preventing the occurrence of cracks, and maintaining good crystallinity. Although it does not specifically limit as a p-type impurity, For example, it is especially preferable to use Mg.

The p contact layer 14b is formed by stacking a p contact lower layer and a p contact upper layer, and Mg is contained in the p contact lower layer at a concentration of about 1 × 10 ¹⁹ / cm ³ to 1 × 10 ²⁰ / cm ³ , It is particularly preferable that Mg is contained in the p contact upper layer at a concentration of about 2 × 10 ²⁰ / cm ^{3 to} 5 × 10 ²⁰ / cm ³ . As a result, the portion (p contact upper layer) in contact with the translucent electrode 15 contains Mg at a high concentration, and the surface thereof is formed flat. Therefore, the light emission output of the semiconductor light emitting element 1 can be further improved.

  The thickness of the p-contact layer 14b is not particularly limited, but is preferably 10 to 500 nm, and more preferably 50 to 200 nm. When the film thickness of the p contact layer 14b is within this range, it is preferable in terms of light emission output.

<N-type electrode 17>
The n-type electrode 17 also serves as a bonding pad, and is formed so as to be in contact with the n-type semiconductor layer 12 (n-contact layer 12a) of the laminated semiconductor layer 20. Therefore, when forming the n-type electrode 17, at least a part of the p-semiconductor layer 14 and the light-emitting layer 13 is removed to expose the n-type semiconductor layer 12, and on the exposed surface 20 a of the n-type semiconductor layer 12. An n-type electrode 17 also serving as a bonding pad is formed. As the n-type electrode 17, various compositions and structures are known, and these known compositions and structures can be used without any limitation, and can be provided by conventional means well known in this technical field.

(Translucent electrode 15)
The translucent electrode 15 is laminated on the p-type semiconductor layer 14 and preferably has a small contact resistance with the p-type semiconductor layer 14. Further, the translucent electrode 15 is preferably excellent in light transmissivity in order to efficiently extract light from the light emitting layer 13 to the outside of the semiconductor light emitting element 1. In addition, the translucent electrode 15 preferably has excellent conductivity in order to diffuse current uniformly over the entire surface of the p-type semiconductor layer 14.

As a constituent material of the translucent electrode 15, any one of conductive oxide containing any one of In, Zn, Al, Ga, Ti, Bi, Mg, W, and Ce, zinc sulfide, or chromium sulfide is used. A translucent conductive material selected from the group consisting of: As the conductive oxide, ITO (indium tin oxide (In ₂ O ₃ —SnO ₂ )), IZO (indium zinc oxide (In ₂ O ₃ —ZnO)), AZO (aluminum zinc oxide (ZnO—Al ₂ O)) ₃ )), GZO (gallium zinc oxide (ZnO—Ga ₂ O ₃ )), fluorine-doped tin oxide, titanium oxide and the like.

  Moreover, the structure of the translucent electrode 15 may be any structure including a conventionally known structure. The translucent electrode 15 may be formed so as to cover almost the entire surface of the p-type semiconductor layer 14, or may be formed in a lattice shape or a tree shape with a gap.

(P-type bonding pad electrode 16)
The p-type bonding pad electrode 16 also serves as a bonding pad, and is laminated on the translucent electrode 15. As the p-type bonding pad electrode 16, various compositions and structures are known, and these known compositions and structures can be used without any limitation, and can be provided by conventional means well known in this technical field.

  Further, the electrode area of the p-type bonding pad electrode 16 is as large as possible, but the bonding operation is easy, but it prevents the emission of light emission. Specifically, it is preferably slightly larger than the diameter of the bonding ball, and generally has a circular shape with a diameter of 100 μm.

(Protective film layer)
The protective film layer (not shown) includes the upper surface and side surfaces of the translucent electrode 15, the exposed surface 20a of the n-type semiconductor layer 12, the side surfaces of the light-emitting layer 13 and the p-type semiconductor layer 14, the n-type electrodes 17 and p as required. It is formed so as to cover the side surface and the peripheral portion of the mold bonding pad electrode 16. By forming the protective film layer, it is possible to prevent moisture and the like from entering the semiconductor light emitting element 1 and to suppress the deterioration of the semiconductor light emitting element 1.
As the protective film layer, it is preferable to use an insulating material having a transmittance of 80% or more at a wavelength in the range of 300 to 550 nm. For example, silicon oxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), niobium oxide (Nb ₂ O ₅ ), tantalum oxide (Ta ₂ O ₅ ), silicon nitride (Si ₃ N ₄ ), aluminum nitride (AlN), or the like can be used. Among these, SiO ₂ and Al ₂ O ₃ are more preferable because a dense film can be easily formed by CVD film formation.

  According to the semiconductor light emitting device 1 of the present embodiment, since the regrowth layer 12c of the n cladding layer 12b is formed on the n cladding layer 12b, the entire thickness of the n cladding layer 12b exceeds the critical thickness. Even if it is formed with a thickness, lattice relaxation of the n-clad layer 12b can be prevented. In addition, since the regrowth layer 12c having a higher In composition than the n-clad layer 12b is formed on the n-clad layer 12b, the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13 can be alleviated. . For this reason, the light emitting layer 13 with high crystallinity is formed, and the light emission output of the semiconductor light emitting element 1 can be improved.

Further, since the regrowth layer 12c is formed with a film thickness of 10 nm to 200 nm, the mismatch of the crystal lattice between the n contact layer 12a and the light emitting layer 13 can be sufficiently relaxed.
In addition, since In is contained in the regrowth layer 12c with a composition of 1% to 5%, the mismatch of the crystal lattice between the n contact layer 12a and the light emitting layer 13 can be alleviated. For this reason, the light emitting layer 13 with high crystallinity can be formed on the regrowth layer 12c (n clad layer 12b).

Further, since the n-clad layer 12b is positioned between the n-contact layer 12a and the regrowth layer 12c having a higher In composition than the n-clad layer 12b, the regrowth layer 12c to the n-contact layer 12a Indium diffusion is prevented. Therefore, it is possible to prevent the crystallinity of the n contact layer 12 from being lowered due to the diffusion of In from the regrowth layer 12c.
As described above, the light emission output of the semiconductor light emitting device 1 can be improved and the operating voltage can be reduced.

Hereinafter, a method for manufacturing the semiconductor light emitting device 1 will be described in detail with reference to the drawings as appropriate.
The drawings referred to in the following description are for explaining the present invention, and the size, thickness, dimensions, and the like of each part shown in the drawings are different from the actual dimensional relationship of the semiconductor light emitting device 1.

In the manufacturing method of the semiconductor light emitting device 1 of the present invention shown in FIG. 1, as an example, first, the laminated semiconductor layer 20 shown in FIG. 2 is manufactured. In the method for manufacturing the laminated semiconductor layer 20, the buffer layer 21, the base layer 22, the first n-type semiconductor layer (n contact layer) 12 a, and the second n-type semiconductor layer (n clad layer) 12 b are sequentially laminated on the substrate 11. The first step and the second step of sequentially stacking the light emitting layer 13 and the p-type semiconductor layer 14 after forming the regrowth layer 12c of the n-clad layer 12b on the n-clad layer 12b are roughly configured. .
Hereafter, each process is demonstrated in detail using FIG.

<First step>
First, for example, a substrate 11 made of sapphire or the like is prepared.
Next, the substrate 11 is placed in the growth chamber of the first MOCVD apparatus (first metal organic chemical vapor deposition apparatus), and the buffer layer 21 is formed on the substrate 11 by MOCVD. Alternatively, the buffer layer 21 may be formed by sputtering, and then the substrate 11 may be transferred into the growth chamber of the first MOCVD apparatus to form the underlayer 22.

(Underlayer 22 forming step)
Next, the base layer 22 is laminated on the buffer layer 21 in the first MOCVD apparatus. In the present invention, as an example, the buffer layer 21 made of AlN is formed on the substrate 11 made of sapphire or the like by using the RF sputtering method, and the base layer 22 is further formed on the substrate in the growth chamber of the first MOCVD apparatus. May be sequentially laminated.

The underlayer 22 is preferably formed with a film thickness of 0.1 μm or more, more preferably 0.5 μm or more, and most preferably 1 μm or more. An Al _x Ga _1-x N layer with good crystallinity is more easily obtained when the thickness is increased. Moreover, it is preferable that the film thickness of the base layer 22 be 10 μm or less from the viewpoint of miniaturization of the semiconductor light emitting device and shortening of the formation time.
In order to improve the crystallinity of the underlayer 22, it is desirable that the underlayer 22 is not doped with impurities.

(N contact layer 12a formation process)
Next, an n contact layer (first n-type semiconductor layer) 12 a is stacked on the substrate having the base layer 22.
When growing the n-contact layer 12a, it is preferable to set the temperature of the substrate 11 in the range of 1000 ° C. to 1200 ° C. in a hydrogen atmosphere.
Further, as a raw material for growing the n-contact layer 12a, an organic metal raw material of a group III metal such as trimethyl gallium (TMG) or triethyl gallium (TEG) and a nitrogen raw material such as ammonia (NH ₃ ) are used. A group III nitride semiconductor layer is deposited on the buffer layer. The pressure in the growth chamber of the MOCVD apparatus is preferably 15 to 80 kPa.

(N-cladding layer 12b formation process)
Next, the n clad layer 12b is formed on the n contact layer 12a. Here, in the step of forming the n-clad layer 12b having a superlattice structure, the n-side first layer made of a group III nitride semiconductor having a film thickness of 100 angstroms or less and the film thickness of 100 angstroms different in composition from the n-side first layer. The following n-side second layer made of a group III nitride semiconductor is alternately and repeatedly laminated by 20 to 80 layers. The n-side first layer and / or the n-side second layer is preferably made of a gallium nitride compound semiconductor containing In.
The n-clad layer 12b is preferably formed with a film thickness of 5 nm to 500 nm.

Moreover, it is preferable that the temperature of the board | substrate 11 at the time of growing the n clad layer 12b shall be the range of 600 to 800 degreeC.
Further, the carrier gas used when growing the n-clad layer 12b may be only nitrogen gas or a mixed gas of hydrogen gas and nitrogen gas.

As a raw material for growing the n-clad layer 12b, for example, trimethylgallium (TMG) or triethylgallium (TEG) can be used as a Ga source. Trimethylaluminum (TMA) or triethylaluminum (TEA) can be used as the Al source.
Further, trimethylindium (TMI) or triethylindium (TEI) can be used as the In source. In addition, ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), or the like can be used as an N source that is a group V raw material. Moreover, as an n-type impurity (dopant) raw material, for example, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ), which is a Si raw material, can be used.

  The pressure in the growth chamber of the MOCVD apparatus when growing the n-clad layer 12b is not particularly limited, but is preferably 15 to 100 kPa in order to obtain the n-clad layer 12b with good crystallinity. More preferably, it is 80 kPa.

  Next, the supply of the group III nitride material is stopped, and the growth of the n-clad layer 12b is stopped. Thereafter, the temperature of the substrate 11 is lowered from the growth temperature of the n-clad layer 12b to a temperature of 400 ° C. or less at a rate of 60 ° C./min or less.

  At this time, by lowering the temperature of the substrate 11 to 400 ° C. or less, the growth of the n-clad layer 12b is stopped, and thermal strain caused by the difference in thermal expansion coefficient between the n-contact layer 12a and the n-clad layer 12b is reduced. it can. Moreover, since the surface migration of the n-clad layer 12b increases due to the temperature drop of the substrate 11, the crystallinity of the n-clad layer 12b is improved. At this time, by lowering the temperature of the substrate 11 in an atmosphere containing nitrogen and ammonia, sublimation of nitrogen from the surface of the n-clad layer 12b can be prevented. For this reason, the crystallinity fall of the n clad layer 12b surface can be prevented. The supply of ammonia when the temperature of the substrate is lowered is performed up to a substrate temperature of 400 ° C. Ammonia may or may not be supplied at a substrate temperature of 400 ° C. or lower.

Further, by controlling the temperature lowering rate when the temperature is lowered from the growth temperature of the n-clad layer 12b to 400 ° C. to 60 ° C./min or less, it is possible to prevent the temperature distribution from being generated on the substrate 11 during the temperature lowering. Therefore, it is possible to prevent thermal distortion from occurring in the n-clad layer 12b.
Further, when the growth of the n-clad layer 12b is stopped, the temperature of the substrate 11 is lowered to 400 ° C. or lower while supplying ammonia into the growth chamber, thereby preventing sublimation of nitrogen from the surface of the n-clad layer 12b. . For this reason, the crystallinity fall of the n clad layer 12b surface can be prevented.

<Second step>
The second step is preferably performed in a second MOCVD apparatus (second organometallic chemical vapor deposition apparatus). When the second step is performed in the second MOCVD apparatus, first, the substrate 11 on which the n-clad layer 12b is formed is taken out from the growth chamber of the first MOCVD apparatus and placed in the growth chamber of the second MOCVD apparatus.

  When the second step is performed in the second MOCVD apparatus, the heat treatment temperature 500 is applied to the substrate 11 on which the layers up to the n-clad layer 12b are formed in an atmosphere containing nitrogen and ammonia before forming the regrown layer 12c. It is preferable to perform a heat treatment (thermal cleaning) at a temperature of from 900C to 900C. Here, the atmosphere of the heat treatment may be an atmosphere containing only nitrogen, for example, instead of the atmosphere containing nitrogen and ammonia. Note that, in an atmosphere containing only hydrogen, the surface of the n-clad layer 12 is sublimated, and crystallinity is deteriorated. Further, the pressure in the growth chamber of the second MOCVD apparatus at this time is preferably 15 to 100 kPa, and more preferably 75 to 95 kPa. When the pressure in the growth chamber is within the above range, sublimation of the n clad layer 12b constituent component from the surface of the n clad layer 12b can be prevented.

Further, when such a heat treatment is performed, the substrate 11 on which each layer up to the n-clad layer 12b is formed after the first step is taken out from the growth chamber of the first MOCVD apparatus, whereby the surface of the n-clad layer 12b is obtained. Even if it is contaminated, the contaminant can be removed before the regrowth layer 12c is formed. As a result, the regrown layer 12c having high crystallinity can be formed, and the crystallinity of the light emitting layer 13 becomes even better when formed on the regrown layer 12c.
If the surface of the n-clad layer 12b remains contaminated, the reverse current (IR) may not be sufficiently low, or the electrostatic discharge (ESD) breakdown voltage may be insufficient. Reliability decreases.

(Step of forming regrowth layer 12c)
Next, a regrowth layer 12c of the n-clad layer 12b is formed on the n-clad layer 12b by MOCVD. At this time, it is preferable that the growth condition of the n-clad layer 12b and the growth condition of the regrowth layer 12c in the n-clad layer 12b forming step are the same except for the temperature of the substrate 11 and the In-containing composition.
The regrown layer 12c is preferably formed with a thickness of 10 nm to 200 nm.

Moreover, it is preferable that the temperature of the board | substrate 11 at the time of growing the regrowth layer 12c shall be in the range of 600 to 900 degreeC. By setting the temperature of the substrate 11 when the regrowth layer 12c is formed within this range, the regrowth layer 12c having high crystallinity can be formed.
On the other hand, if the temperature of the substrate 11 when the regrowth layer 12c is grown is less than 600 ° C., the growth rate of the regrowth layer 12c decreases, which is not preferable in terms of manufacturing efficiency. If the temperature of the substrate 11 when the regrowth layer 12c is grown exceeds 900 ° C., In in the regrowth layer 12c is sublimated and the crystallinity of the regrowth layer 12c is lowered.

  In addition, as a raw material for growing the regrowth layer 12c, the same raw material as that used in the n-clad layer 12b forming step can be used. Further, when the regrowth layer 12c is grown, the regrowth layer 12c having a higher In composition than that of the n clad layer 12b is formed by using more In source than when the n clad layer 12b is grown. At this time, it is preferable to adjust the supply amount of the In source so that the In-containing composition of the regrowth layer 12c is 1% to 5%.

(Light emitting layer 13 formation process)
Next, the light emitting layer 13 having a multiple quantum well structure is formed. First, the well layers 13b and the barrier layers 13a are alternately and repeatedly stacked. At this time, the layers are stacked so that the barrier layer 13a is disposed on the n-type semiconductor layer 12 side and the p-type semiconductor layer 14 side.
The composition and film thickness of the well layer 13b and the barrier layer 13a can be appropriately set so as to have a predetermined emission wavelength. Moreover, the substrate temperature at the time of making the light emitting layer 13 grow can be 600-900 degreeC, and nitrogen gas is used as carrier gas.

(P-type semiconductor layer 14 forming step)
Next, the p-type semiconductor layer 14 is formed. The p-type semiconductor layer 14 may be formed by sequentially stacking a p-cladding layer 14a and a p-contact layer 14b on the light emitting layer 13. When the p-cladding layer 14a is a layer including a superlattice structure, a p-side first layer made of a group III nitride semiconductor having a thickness of 100 angstroms or less and a film having a composition different from that of the p-side first layer are used. What is necessary is just to laminate | stack repeatedly the p side 2nd layer which consists of a group III nitride semiconductor below thickness 100angstrom alternately.

Thereafter, the translucent electrode 15 is laminated on the p-type semiconductor layer 14 of the laminated semiconductor layer 20, and the translucent electrode 15 other than the predetermined region is removed by, for example, a generally known photolithography technique.
Subsequently, patterning is performed by, for example, a photolithography technique, a part of the laminated semiconductor layer 20 in a predetermined region is etched to expose a part of the n contact layer 12a, and an n-type is formed on the exposed surface 20a of the n contact layer 12a. The electrode 17 is formed.
Thereafter, a p-type bonding pad electrode 16 is formed on the translucent electrode 15.
As described above, the semiconductor light emitting device 1 shown in FIG. 1 is manufactured.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, after the base layer 21, the n contact layer 12a, and the n clad layer 12b are sequentially stacked on the substrate 11, the temperature of the substrate 11 is lowered to 400 ° C. or lower. While stopping the growth of the clad layer 12b, it is possible to alleviate the thermal distortion caused by the difference in thermal expansion coefficient between the n contact layer 12a and the n clad layer 12b. Moreover, since the surface migration of the n-clad layer 12b increases by lowering the temperature of the substrate 11, the crystallinity of the n-clad layer 12b can be improved.

Further, by controlling the temperature lowering rate when the temperature is lowered from the growth temperature of the n-clad layer 12b to 400 ° C. to 60 ° C./min or less, it is possible to prevent the temperature distribution from being generated on the substrate 11 during the temperature lowering. Therefore, it is possible to prevent thermal distortion from occurring in the n-clad layer 12b.
Further, when the growth of the n-clad layer 12b is stopped, the temperature of the substrate 11 is lowered to 400 ° C. or lower while supplying ammonia into the growth chamber, thereby preventing nitrogen sublimation from the surface of the n-clad layer 12b. it can. For this reason, the crystallinity fall of the n clad layer 12b surface can be prevented.

Further, by forming the regrowth layer 12c of the n-clad layer 12b on the n-clad layer 12b, the film thickness of the entire n-clad layer 12b can be increased. Further, by forming the regrown layer 12c having a higher In composition than the n-clad layer 12b on the n-clad layer 12b, the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13 can be alleviated. Further, by forming the regrowth layer 12c with a thickness of 10 nm to 200 nm, the mismatch of the crystal lattice between the n contact layer 12a and the light emitting layer 13 can be sufficiently relaxed.
For this reason, the light emitting layer 13 with high crystallinity can be formed on the n-clad layer 12b in the step after the formation of the n-clad layer 12b. As described above, the light emission output of the semiconductor light emitting element 1 can be improved.

Further, the temperature of the substrate 11 when the regrowth layer 12c is grown is in the range of 600 ° C. to 900 ° C., whereby the regrowth layer 12c having high crystallinity can be formed.
Further, when the regrowth layer 12c is grown, the supply amount of the In source is adjusted so that the In-containing composition of the regrowth layer 12c is 1% to 5%, whereby the n contact layer 12a and the light emitting layer 13 It is possible to alleviate the mismatch of the crystal lattice between them. For this reason, the light emitting layer 13 with high crystallinity can be formed on the regrowth layer 12c (n clad layer 12b).

  Thus, the light emitting layer 13 with high crystallinity can be formed on the regrown layer 12c. Therefore, the light emission output of the semiconductor light emitting device 1 can be improved.

<Lamp 3>
The lamp 3 of this embodiment includes the semiconductor light emitting device 1 of the present invention, and is a combination of the semiconductor light emitting device 1 and a phosphor. The lamp 3 of the present embodiment can have a configuration well known to those skilled in the art by means well known to those skilled in the art. For example, in the lamp 3 of this embodiment, a technique for changing the emission color by combining the semiconductor light emitting element 1 and the phosphor can be adopted without any limitation.

  FIG. 3 is a schematic cross-sectional view showing an example of a lamp including the semiconductor light emitting element 1 shown in FIG. The lamp 3 shown in FIG. 3 is a shell type, and the semiconductor light emitting element 1 shown in FIG. 1 is used. As shown in FIG. 3, the p-type bonding pad electrode 16 of the semiconductor light emitting device 1 is connected to one of the two frames 31 and 32 (the frame 31 in FIG. 3) by a wire 33. The semiconductor light emitting element 1 is mounted by connecting the mold electrode 17 (bonding pad) to the other frame 32 with a wire 34. Further, the periphery of the semiconductor light emitting element 1 is sealed with a mold 35 made of a transparent resin.

  Since the lamp 3 of the present embodiment uses the semiconductor light emitting element 1 described above, a high light emission output can be obtained.

  In addition, electronic devices such as backlights, mobile phones, displays, various panels, computers, game machines, and lighting incorporating the lamp 3 of the present embodiment, and mechanical devices such as automobiles incorporating such electronic devices are expensive. The semiconductor light emitting device 1 capable of obtaining a light emission output is provided. In particular, an electronic device driven by a battery such as a backlight, a mobile phone, a display, a game machine, and an illumination is preferable because an excellent product including the semiconductor light emitting element 1 that can obtain a high light emission output can be provided.

Hereinafter, the method for producing a semiconductor light emitting device of the present invention will be described in more detail with reference to Examples, but the present invention is not limited to these Examples.
Example 1
The semiconductor light emitting device 1 shown in FIG. 1 was manufactured by the following method.
In the semiconductor light emitting device 1 of Example 1, the underlayer 22 made of undoped GaN having a thickness of 6 μm was formed on the sapphire substrate 11 on which the buffer layer 21 made of AlN was previously formed in the growth chamber of the first MOCVD furnace. At this time, the substrate temperature in forming the underlayer 22 was 1100 ° C.

Thereafter, an n-contact layer 12 a made of Si-doped n-type GaN having a thickness of 2 μm was formed on the base layer 22. The Si impurity concentration of the n-contact layer 12a was about 5 × 10 ¹⁸ / cm ³ . Further, the substrate temperature when forming the n contact layer 12a was 1080 ° C., and the pressure in the growth chamber was 40 kPa.
Next, an n-cladding layer 12b having a superlattice structure with a thickness of 80 nm was formed on the n-contact layer 12a. The substrate temperature for growing the n-clad layer 12b was 710 ° C.

Next, the temperature of the substrate 11 formed up to the n-clad layer 12b was decreased to 300 ° C. at a temperature decrease rate of 60 ° C./min. At this time, the temperature of the substrate 11 was lowered while supplying nitrogen and ammonia into the growth chamber.
Subsequently, it removed from the 1st MOCVD furnace and moved to the growth chamber of the 2nd MOCVD furnace. Next, the substrate 11 on which the layers up to the n-clad layer 12b were formed was subjected to heat treatment (thermal cleaning) at 750 ° C. in an atmosphere containing nitrogen and ammonia. At this time, the pressure in the growth chamber of the second MOCVD apparatus was set to 95 kPa.

  Next, a regrown layer 12c of the clad layer 12b was formed on the n clad layer 12b. Here, the regrowth layer 12c was grown under the following growth conditions.

"Growth conditions for regrowth layer 12c"
A regrowth layer 12c having a superlattice structure and having a thickness of 80 nm was formed on the n-clad layer 12b. The substrate temperature for growing the regrowth layer 12c was 700 ° C. The regrowth layer 12c has a superlattice structure of 2% In composition, 2 nm thick GaInN, and 2 nm thick GaN.

  Subsequently, the barrier layer 13a and the well layer 13b were laminated | stacked 5 times on the regrowth layer 12c, and the light emitting layer 13 of the multiple quantum well structure which provided the barrier layer last was formed.

Thereafter, a p-cladding layer 14a made of Mg-doped single layer Al _0.07 Ga _0.93 N having a thickness of 20 nm and a p-contact layer 14b made of Mg-doped p-type GaN having a thickness of 170 nm were sequentially laminated on the light emitting layer 13. The p contact layer 14b has a structure in which a p contact lower layer and a p contact upper layer are stacked. Further, Mg was contained in the p contact lower layer at a concentration of 5 × 10 ¹⁹ / cm ³ , and Mg was contained in the p contact upper layer at a concentration of about 2 × 10 ²⁰ / cm ³ . Next, a translucent electrode 15 made of ITO having a thickness of 200 nm was formed on the p-contact layer 14b by a generally known photolithography technique.

Next, etching was performed using a photolithography technique to form an exposed surface 20a of the n contact layer 12a in a desired region, and an n-type electrode 17 having a Ti / Au double layer structure was formed thereon.
Further, on the translucent electrode 15, a p-type bonding pad structure 16 having a three-layer structure composed of a metal reflective layer made of 200 nm Al, a barrier layer made of 80 nm Ti, and a bonding layer made of 1100 nm Au, It formed using the technique of photolithography.
As described above, the semiconductor light emitting device 1 of Example 1 was obtained.

  The characteristics of the semiconductor light emitting device 1 of Example 1 obtained in this way were a forward voltage Vf = 2.9 V, a light emission output Po = 25 mW, and a reverse current IR (@ 20 V) = 0.1 μA.

(Example 2)
After forming the n-clad layer 12b, the same operation as in Example 1 was performed except that the temperature of the substrate 11 was lowered to 400 ° C. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 25 mW, and a reverse current IR (@ 20 V) = 0.1 μA.

(Example 3)
In the temperature drop of the substrate 11 of Example 1, the same operation as in Example 1 was performed except that the temperature of the substrate 11 was lowered in an atmosphere containing only nitrogen. The characteristics of the obtained semiconductor issuing element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 0.9 μA.

Example 4
The same operation as in Example 1 was performed except that the pressure during heat treatment (thermal cleaning) in Example 1 was set to 100 kPa. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 25 mW, and a reverse current IR (@ 20 V) = 0.3 μA.

(Example 5)
The same operation as in Example 1 was performed except that the pressure during the heat treatment (thermal cleaning) in Example 1 was set to 50 kPa. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 24 mW, and a reverse current IR (@ 20 V) = 0.5 μA.

(Example 6)
The same operation as in Example 1 was performed except that the substrate temperature during the heat treatment (thermal cleaning) in Example 1 was changed to 850 ° C. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.8 V, a light emission output Po = 24 mW, and a reverse current IR (@ 20 V) = 0.4 μA.

(Example 7)
The same operation as in Example 1 was performed except that the substrate temperature during the heat treatment (thermal cleaning) in Example 1 was changed to 650 ° C. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 0.2 μA.

(Example 8)
The same operation as in Example 1 was performed except that the regrown layer 12c of Example 1 was formed with a film thickness of 120 nm. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.8 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 0.7 μA.

Example 9
The same operation as in Example 1 was performed except that the regrown layer 12c of Example 1 was formed with a film thickness of 40 nm. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 22 mW, and a reverse current IR (@ 20 V) = 0.2 μA.

(Example 10)
The same operation as in Example 1 was performed except that the substrate temperature at the time of forming the regrowth layer 12c in Example 1 was 800 ° C. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 24 mW, and a reverse current IR (@ 20 V) = 0.9 μA.

(Example 11)
The same operation as in Example 1 was performed except that the substrate temperature at the time of forming the regrowth layer 12c in Example 1 was 600 ° C. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 0.3 μA.

(Example 12)
The same operation as in Example 1 was performed except that the In composition of the regrowth layer 12c in Example 1 was changed to 3%. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 2.8 V, a light emission output Po = 22 mW, and a reverse current IR (@ 20 V) = 0.8 μA.

(Example 13)
The same operation as in Example 1 was performed except that the In composition of the regrowth layer 12c in Example 1 was changed to 1%. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 0.2 μA.

(Example 14)
The same operation as in Example 1 was performed except that the heat treatment (thermal cleaning) in Example 1 was not performed. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 1.0 μA.

(Example 15)
The same operation as in Example 1 was performed, except that the semiconductor layer 20 was consistently grown in the first MOCVD furnace and heat treatment (thermal cleaning) was not performed. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 22 mW, and a reverse current IR (@ 20 V) = 0.1 μA.

(Comparative Example 1)
The same operation as in Example 1 was performed except that the semiconductor layer 20 was consistently grown in the first MOCVD furnace, heat treatment (thermal cleaning) was not performed, and the regrowth layer 12c was not formed. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 15 mW, and a reverse current IR (@ 20 V) = 0.8 μA.

(Comparative Example 2)
After forming the n-clad layer 12b, the same operation as in Example 1 was performed except that the temperature of the substrate 11 was lowered to 500 ° C. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 2.8V, a light emission output Po = 10 mW, and a reverse current IR (@ 20V) = 5 μA.

(Comparative Example 3)
The same operation as in Example 1 was performed except that the regrowth layer 12c of Example 1 was formed with a film thickness of 300 nm. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 2.8 V, a light emission output Po = 10 mW, and a reverse current IR (@ 20 V) = 5.0 μA.

(Comparative Example 4)
The same operation as in Example 1 was performed except that the regrowth layer 12c of Example 1 was formed with a film thickness of 5 nm. The characteristics of the obtained semiconductor issuing element 1 were a forward voltage Vf = 3.1 V, a light emission output Po = 18 mW, and a reverse current IR (@ 20 V) = 0.2 μA.

(Comparative Example 5)
The same operation as in Example 1 was performed except that the substrate temperature at the time of forming the regrowth layer 12c in Example 1 was 1000 ° C. The characteristics of the obtained semiconductor issue element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 14 mW, and a reverse current IR (@ 20 V) = 2.3 μA.

(Comparative Example 6)
The same operation as in Example 1 was performed except that the substrate temperature at the time of forming the regrowth layer 12c in Example 1 was 500 ° C. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 2.9 V, a light emission output Po = 17 mW, and a reverse current IR (@ 20 V) = 0.3 μA.

(Comparative Example 7)
The same operation as in Example 1 was performed except that the In composition of the regrowth layer 12c in Example 1 was changed to 7%. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 2.8 V, a light emission output Po = 13 mW, and a reverse current IR (@ 20 V) = 10.0 μA.

(Comparative Example 8)
The same operation as in Example 1 was performed except that the In composition of the regrowth layer 12c in Example 1 was changed to 0.05%. The characteristics of the obtained semiconductor issuance element 1 were a forward voltage Vf = 3.0 V, a light emission output Po = 16 mW, and a reverse current IR (@ 20 V) = 0.1 μA.

Table 1 shows the results of forward voltage, light emission output (Po), and reverse current (IR) of the semiconductor light emitting devices of Examples 1 to 15 and Comparative Examples 1 to 8.
The forward voltage Vf for the semiconductor light emitting devices 1 of the example and the comparative example is a voltage measured at a current application value of 20 mA by energization with a probe needle. Similarly, the light emission outputs (Po) for the semiconductor light emitting devices 1 of the example and the comparative example are each mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA is measured by a tester. The reverse current (IR) is a value obtained by measuring the leakage current when 20 V is applied to the light emitting element in the reverse direction.

As shown in Table 1, all of the semiconductor light emitting devices 1 of Examples 1 to 15 had a low reverse current (IR) and a relatively low forward voltage. In addition, all the semiconductor light emitting devices 1 had a light emission output (Po) of 20 mW or more, high luminance, and low power consumption. In addition, the semiconductor light emitting device 1 of Examples 1 to 13 in which thermal cleaning was performed showed a particularly high effect.
On the other hand, in the semiconductor light emitting devices 1 obtained in Comparative Examples 1 to 8, the light emission output (Po) is lower than that of Examples 1 to 15, the forward voltage is relatively high, and the reverse direction. The current (IR) value was large. In particular, in Comparative Example 1 in which no regrowth layer was formed, the difference became significant.

  As described above, the semiconductor light emitting device 1 obtained in Examples 1 to 15 was able to effectively improve the light emission output. Further, it was confirmed that a high light emission output with a small leakage current was obtained as compared with the semiconductor light emitting devices 1 of Comparative Examples 1 to 8.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor light emitting element, 3 ... Lamp, 12 ... N type semiconductor layer, 12a ... N contact layer, 12b ... N clad layer, 12c ... Regrown layer, 13 ... Light emitting layer, 14 ... P type semiconductor layer, 22 ... Bottom Strata

Claims (13)

An underlayer having a composition of Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, 0 ≦ x + y <1), a first n-type semiconductor layer, and a second n-type on a substrate A first step of lowering the substrate temperature to 400 ° C. or lower after sequentially laminating semiconductor layers;
On the second n-type semiconductor layer, after forming a regrown layer of the second n-type semiconductor layer having a higher In composition than the second n-type semiconductor layer, a light emitting layer and a p-type semiconductor layer are sequentially stacked. And a second step of manufacturing a semiconductor light emitting device. The first step is performed in a first organometallic chemical vapor deposition apparatus,
The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the second step is performed in a second organometallic chemical vapor deposition apparatus.   3. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein, in the first step, the substrate temperature is lowered to 400 ° C. or less in an atmosphere containing nitrogen and ammonia.   Before forming the regrowth layer, in the second organometallic chemical vapor deposition apparatus, heat treatment is performed in an atmosphere containing nitrogen and ammonia under conditions of a pressure of 15 kPa to 100 kPa and a substrate temperature of 500 ° C. to 900 ° C. The method for manufacturing a semiconductor light emitting device according to claim 2, wherein the method is performed.   5. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the regrowth layer is formed with a film thickness of 10 nm to 200 nm.   6. The method for manufacturing a semiconductor light emitting element according to claim 1, wherein the regrown layer contains In at a composition of 1% to 5%.   The method for manufacturing a semiconductor light-emitting element according to claim 1, wherein a substrate temperature when forming the regrowth layer is 600 ° C. to 900 ° C. 7.   An underlayer, a first n-type semiconductor layer, a second n-type semiconductor layer, a regrowth layer of the second n-type semiconductor layer having a higher In composition than the second n-type semiconductor layer, and a light emitting layer; And a p-type semiconductor layer.   9. The semiconductor light emitting element according to claim 8, wherein the regrowth layer is formed with a thickness of 10 nm to 200 nm.   10. The semiconductor light emitting element according to claim 7, wherein In is contained in the regrowth layer in a composition of 1% to 5%.   A lamp comprising the semiconductor light-emitting device according to claim 8.   An electronic device comprising the lamp according to claim 11 incorporated therein.   An electronic apparatus according to claim 12 is incorporated.

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