JP5353827B2 - Semiconductor light emitting device manufacturing method, semiconductor light emitting device, lamp, electronic device, and mechanical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element capable of attaining high output while preventing deterioration in crystallinity of a luminous layer and deterioration in crystallinity of a p-type semiconductor layer due to inclusion of impurities into the p-type semiconductor layer, and a method for manufacturing the semiconductor light emitting element. <P>SOLUTION: A method for manufacturing a semiconductor light emitting element includes: a first step of forming, on a substrate 11, first and second n-type semiconductor layers 12a and 12b, and a luminous layer 13 formed by alternately and repeatedly laminating a well layer and a barrier layer while the uppermost surface is the barrier layer, in a first metal organic chemical vapor deposition system; and a second step of sequentially laminating a regrowth layer 13c of the barrier layer and a p-type semiconductor layer 14 on the barrier layer of the uppermost face of the luminous layer in a second metal organic chemical vapor deposition system. <P>COPYRIGHT: (C)2012,JPO&amp;INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor light-emitting element and a semiconductor light-emitting element, a lamp, an electronic apparatus, and a mechanical device. The present invention relates to a method for manufacturing a semiconductor light-emitting element that can be obtained, and a lamp, an electronic device, and a mechanical device including the semiconductor light-emitting element manufactured by using this manufacturing method.

  2. Description of the Related Art Conventionally, as a semiconductor light emitting element used for a light emitting diode or the like, there is one in which an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are sequentially stacked on a substrate. As a method of manufacturing such a semiconductor light emitting device, an n-type semiconductor layer and a light emitting layer are formed on a substrate made of a sapphire single crystal by a metal organic chemical vapor deposition (MOCVD) method. A method of sequentially and sequentially stacking a p-type semiconductor layer is known.

On the other hand, among compound semiconductors, for example, in pn junction light emitting diodes and double heterojunction laser diodes made of II-VI group compound semiconductors, the carrier concentrations of the p-type conductive film and the n-type conductive film are sufficiently high. When an n-type conductive film and a p-type conductive film are successively formed in the same growth chamber, a p-type conductive film having a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ or more can be obtained due to compensation by residual impurities. Therefore, it was difficult to form a practical II-VI compound semiconductor light emitting device.
As a technique for solving such a problem, for example, Patent Document 1 discloses a compound semiconductor device in which at least a first conductivity type semiconductor layer and a second conductivity type semiconductor layer are sequentially formed on a predetermined substrate. In manufacturing a semiconductor device, a method of manufacturing a compound semiconductor device is proposed in which the respective conductive type semiconductor layers are formed in a plurality of different independent growth chambers corresponding to the conductive type.

Japanese Unexamined Patent Publication No. 7-45538

However, if a film is formed in a plurality of independent growth chambers corresponding to the conductivity type, the substrate is repeatedly cooled and heated each time the growth chamber is changed, resulting in heating the formed compound semiconductor layer more than necessary. In some cases, the compound semiconductor layer may partially sublimate (evaporate) and deteriorate crystallinity.
As described above, the growth chamber (organometallic chemical vapor deposition apparatus) for forming the n-type semiconductor layer and the growth chamber (organometallic chemical vapor deposition apparatus) for forming the p-type semiconductor layer were obtained separately. In some cases, the output of the semiconductor light emitting device becomes insufficient.
Recently, in order to improve the light emission output of the semiconductor light emitting device, a large current is often applied to the semiconductor light emitting device, and the semiconductor light emitting device having excellent light emitting characteristics that can withstand such conditions. Was demanded.

  The present invention has been made in view of the above problems, and prevents a decrease in crystallinity of the light-emitting layer and a decrease in crystallinity of the p-type semiconductor layer due to the incorporation of impurities into the p-type semiconductor layer, and high output. It is an object of the present invention to provide a semiconductor light emitting device and a method for manufacturing the same.

In order to achieve the above object, the present invention provides the following means.
[1] In the first metal organic chemical vapor deposition apparatus, a first n-type semiconductor layer, a second n-type semiconductor layer, a well layer, and a barrier layer are alternately and repeatedly stacked on a substrate, and the uppermost surface is the barrier. In a first step of forming a light emitting layer to be a layer, and in a second metal organic chemical vapor deposition apparatus, a regrowth layer of the barrier layer and a p-type semiconductor layer are formed on the barrier layer on the uppermost surface of the light emitting layer. And a second step of sequentially laminating the semiconductor light-emitting device.
[2] The method for manufacturing a semiconductor light-emitting element according to [1], wherein N ₂ gas is used as a carrier gas when forming the regrowth layer.
[3] The method for manufacturing a semiconductor light-emitting element according to [1] or [2], wherein the regrowth layer is formed with a thickness of 3 nm to 20 nm.
[4] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [3], wherein a substrate temperature in forming the regrowth layer is 600 ° C. to 1000 ° C.
[5] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [4], wherein a pressure when forming the regrowth layer is 10 kPa to 80 kPa.
[6] Before forming the regrowth layer, in the second organometallic chemical vapor deposition apparatus, in an atmosphere containing nitrogen and ammonia, a pressure of 40 kPa to 100 kPa and a substrate temperature of 500 ° C. to 800 ° C. The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [5], wherein heat treatment is performed in step (1).
[7] The method for manufacturing a semiconductor light-emitting element according to any one of [1] to [6], wherein the regrowth layer is a regrowth layer to which no impurity is intentionally added.
[8] A light emitting layer in which a top surface formed by alternately and repeatedly laminating a first n-type semiconductor layer, a second n-type semiconductor layer, a well layer and a barrier layer on the substrate is the barrier layer; A semiconductor light emitting device in which a regrowth layer of the barrier layer formed on the barrier layer on the uppermost surface of the layer and a p-type semiconductor layer are stacked.
[9] The semiconductor light emitting element according to [8], wherein the regrowth layer is formed with a thickness of 3 nm to 20 nm.
[10] A lamp comprising a semiconductor light-emitting device manufactured using the method for manufacturing a semiconductor light-emitting device according to any one of claims 1 to 7.
[11] An electronic device in which the lamp according to [10] is incorporated.
[12] A mechanical apparatus in which the electronic device according to [11] is incorporated.

According to the method for manufacturing a semiconductor light emitting device of the present invention, the light emitting layer and the p-type semiconductor layer are formed in separate growth chambers, and the regrown layer of the barrier layer is formed on the uppermost surface (barrier layer) surface of the light emitting layer. As a result, sublimation of indium and crystallinity in the light emitting layer can be prevented, and crystallinity of the p-type semiconductor layer due to impurity contamination can be prevented. Furthermore, by forming a regrowth layer of the barrier layer, it has been found that the a-axis lattice constant of the light emitting layer is increased, the stress due to the heat history, etc. that the light emitting layer has suffered so far is alleviated, and the crystal of the light emitting layer itself Can improve the performance.
As described above, in the present invention, since a light-emitting layer or a p-type semiconductor layer with high crystallinity can be formed, it is possible to improve the light emission output of the semiconductor light-emitting element and the reliability of the element itself.

FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor light emitting device manufactured using the method for manufacturing a semiconductor light emitting device of the present invention. FIG. 2 is a schematic cross-sectional view for explaining a process for manufacturing the semiconductor light emitting element shown in FIG. FIG. 3 is a schematic cross-sectional view showing an example of a lamp including the semiconductor light emitting element shown in FIG.

  Hereinafter, the semiconductor light emitting device 1 of the present invention will be described in detail with reference to FIG. Note that the drawings referred to in the following description may show the characteristic portions in an enlarged manner for convenience, and the dimensional ratios and the like of each component are not necessarily the same as actual. In addition, the materials, dimensions, and the like exemplified in the following description are examples, and the present invention is not limited to them, and can be appropriately changed and implemented without changing the gist thereof.

FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor light emitting device 1 of the present invention.
A semiconductor light emitting device 1 according to this embodiment shown in FIG. 1 includes a substrate 11, a laminated semiconductor layer 20 laminated on the substrate 11, a translucent electrode 15 laminated on the upper surface of the laminated semiconductor layer 20, The p-type bonding pad electrode 16 laminated on the conductive electrode 15 and the n-type electrode 17 laminated on the exposed surface 20a of the laminated semiconductor layer 20 are schematically configured.

The stacked semiconductor layer 20 is configured by stacking an n-type semiconductor layer 12, a light emitting layer 13, and a p-type semiconductor layer 14 in this order from the substrate 11 side. As shown in FIG. 1, the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 are partially removed by means such as etching, and one part of the n-type semiconductor layer 12 is removed from the removed portions. The part is exposed. An n-type electrode 17 is stacked on the exposed surface 20 a of the n-type semiconductor layer 12.
A translucent electrode 15 and a p-type bonding pad electrode 16 are stacked on the upper surface of the p-type semiconductor layer 14. The translucent electrode 15 and the p-type bonding pad electrode 16 constitute a p-type electrode 18.

As a semiconductor constituting the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14, a group III nitride semiconductor is preferably used, and a gallium nitride compound semiconductor is more preferably used. As the gallium nitride-based compound semiconductor constituting the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 in the present invention, a general formula Al _x In _y Ga _1-xy N (0 ≦ x <1,0) Semiconductors having various compositions represented by ≦ y <1, 0 ≦ x + y <1) can be used without any limitation.

The semiconductor light emitting device 1 of the present embodiment can emit light from the light emitting layer 13 constituting the laminated semiconductor layer 20 by passing a current between the p-type electrode 18 and the n-type electrode 17. This is a face-up mount type light emitting element that extracts light from the light emitting layer 13 from the side where the p type bonding pad electrode 16 is formed. The semiconductor light emitting device of the present invention may be a flip chip type light emitting device.
Hereinafter, each configuration will be described in detail.

<Substrate 11>
Examples of the substrate 11 include sapphire, SiC, zinc oxide, magnesium oxide, manganese oxide, zirconium oxide, manganese zinc iron, magnesium aluminum oxide, zirconium boride, gallium oxide, indium oxide, lithium gallium oxide, lithium aluminum oxide, A substrate made of neodymium gallium oxide, lanthanum strontium aluminum tantalum, strontium titanium oxide, titanium oxide, hafnium oxide, tungsten oxide, molybdenum oxide, or the like can be used. Among the above substrates, it is particularly preferable to use a sapphire substrate having a c-plane as a main surface.

(Buffer layer 21)
The buffer layer 21 may not be provided, but the difference in lattice constant between the substrate 11 and the base layer 22 is alleviated to form a C-axis oriented single crystal layer on the (0001) C plane of the substrate 11. It is preferable that it is provided in order to facilitate the process.

The buffer layer 21 is particularly preferably made of single crystal Al _x Ga _1-x N (0 ≦ x ≦ 1), but is made of polycrystalline Al _x Ga _1-x N (0 ≦ x ≦ 1). It doesn't matter.
The buffer layer 21 can be, for example, made of single crystal Al _x Ga _1-x N (0 ≦ x ≦ 1) and having a thickness of 0.01 μm to 0.5 μm. If the thickness of the buffer layer 21 is less than 0.01 μm, the buffer layer 21 may not sufficiently obtain the effect of reducing the difference in lattice constant between the substrate 11 and the base layer 22. Further, when the thickness of the buffer layer 21 exceeds 0.5 μm, the film forming process time of the buffer layer 21 becomes long and the productivity is lowered although the function as the buffer layer 21 is not changed. There's a problem.

  When the buffer layer 21 having such a polycrystalline structure or a single crystal structure is formed on the substrate 11 by the MOCVD method or the sputtering method, the buffer function of the buffer layer 21 works effectively. The group III nitride semiconductor thus formed becomes a crystal film having good orientation and crystallinity.

(Underlayer 22)
As the material of the underlayer 22, it is particularly preferable to use Al _x Ga _1-x N (0 ≦ x <1) because the underlayer 22 with good crystallinity can be formed, but Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) may be used.
The film thickness of the underlayer 22 is preferably 0.1 μm or more, more preferably 0.5 μm or more, and most preferably 1 μm or more. An Al _x Ga _1-x N layer with good crystallinity is more easily obtained when the thickness is increased. Further, the film thickness of the underlayer 22 is preferably 10 μm or less.
In order to improve the crystallinity of the underlayer 22, it is desirable that the underlayer 22 is not doped with impurities. However, when p-type or n-type conductivity is required, acceptor impurities or donor impurities can be added to the base layer 22.

<Laminated semiconductor layer 20>
(N-type semiconductor layer 12)
The n-type semiconductor layer 12 further includes an n-contact layer 12a and an n-clad layer 12b as a second n-type semiconductor layer. Here, the n-contact layer 12a can be described as a first n-type semiconductor layer, and the n-cladding layer 12b can be described as a second n-type semiconductor layer.

(N contact layer 12a)
The n-contact layer 12a is a layer for providing the n-type electrode 17, and an exposed surface 20a for providing the n-type electrode 17 is partially formed as shown in FIG.
The thickness of the n contact layer 12a is preferably 0.5 to 5 μm, and more preferably 2 to 4 μm. When the film thickness of the n-contact layer 12a is within the above range, the crystallinity of the semiconductor is favorably maintained.

The n-contact layer 12a is preferably composed of an Al _x Ga _1-x N layer (0 ≦ x <1, preferably 0 ≦ x ≦ 0.5, more preferably 0 ≦ x ≦ 0.1), An n-type impurity (dopant) is doped. When n-type impurity is contained in n contact layer 12a at a concentration of 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ , From the viewpoint of maintaining good ohmic contact. The n-type impurity used for the n-contact layer 12a is not particularly limited, and examples thereof include Si, Ge, Sn, etc., Si and Ge are preferable, and Si is most preferable. In this embodiment, Si of about 5 × 10 ¹⁸ / cm ³ is contained as an n-type impurity (dopant).

  The n clad layer 12 b is provided between the n contact layer 12 a and the light emitting layer 13. The n-clad layer 12b is a layer for injecting carriers into the light-emitting layer 13 and confining carriers, and also serves as a buffer layer for the light-emitting layer 13 that alleviates the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13. Function. The n-clad layer 12b can be formed of AlGaN, GaN, GaInN, or the like. In the specification, the composition ratio of each element may be omitted and described as AlGaN or GaInN.

  The n-clad layer 12b may have a single layer structure or a superlattice structure. When the n clad layer 12b is a single layer, the thickness of the n clad layer 12b is preferably 5 nm to 500 nm, and more preferably 5 nm to 100 nm.

  In this embodiment, the n-clad layer 12b may be a single layer, but consists of 10 pairs (20 layers) to 40 pairs (80 layers) by repeatedly growing two thin film layers having different compositions. A superlattice structure is preferred. In the case where the n-clad layer 12b has a superlattice structure, if the number of thin film layers is 20 or more, the crystal lattice mismatch between the n-contact layer 12a and the light-emitting layer 13 is more effectively reduced. Therefore, the effect of improving the output of the semiconductor light emitting device 1 becomes more remarkable. However, if the number of thin film layers exceeds 80, the superlattice structure may be easily disturbed, and the light emitting layer 13 may be adversely affected. Furthermore, there is a problem that the film forming process time of the n-clad layer 12b becomes long and productivity is lowered.

<Light emitting layer 13>
The light emitting layer 13 has a multiple quantum well structure in which a plurality of barrier layers 13a and well layers 13b are alternately stacked, and a regrowth layer of the barrier layer 13a is formed on the uppermost barrier layer (a side of the p-clad layer 14a). 13c is formed. The barrier layer 13a and the well layer 13b are formed in the first step, and the regrowth layer 13c is formed in the second step.
The number of stacked layers in the multiple quantum well structure is preferably 3 to 10 layers, more preferably 4 to 7 layers.

(Well layer 13b)
The thickness of the well layer 13b is preferably in the range of 15 angstroms or more and 50 angstroms or less. When the film thickness of the well layer 13b is within the above range, a higher light emission output can be obtained.
The well layer 13b is preferably a gallium nitride compound semiconductor containing In. A gallium nitride compound semiconductor containing In is preferable because it emits strong light in the blue wavelength region. The well layer 13b can be doped with impurities. Moreover, it is preferable to use Si as a dopant in this embodiment. The dope amount is preferably about 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ¹⁷ cm ⁻³ .

(Barrier layer 13a)
The thickness of the barrier layer 13a is preferably in a range of 20 angstroms or more and less than 100 angstroms, and particularly preferably 20 angstroms or more and 70 angstroms or less. If the thickness of the barrier layer 13a is less than 20 angstroms, flattening of the upper surface of the barrier layer 13a is hindered, resulting in a decrease in light emission efficiency and a decrease in aging characteristics. Further, it is not preferable that the thickness of the barrier layer 13a is 100 angstroms or more, because it causes an increase in driving voltage and a decrease in light emission efficiency.
In addition to GaN and AlGaN, the barrier layer 13a can be formed of InGaN having a smaller In ratio than InGaN constituting the well layer. Of these, GaN can be preferably used. Further, the barrier layer 13a can be doped with impurities. Si is preferably used as the dopant in the present embodiment. The dope amount is preferably about 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁸ cm ⁻³ .

(Regrown layer 13c)
The regrowth layer 13c is a regrowth layer of the barrier layer 13a, and is formed on the uppermost surface (barrier layer 13a) of the light emitting layer 13. The barrier layer 13a and the regrowth layer 13c are preferably made of the same material.
The thickness of the regrowth layer 13c is preferably 3 nm to 20 nm. Since the regrowth layer 13c is formed with a film thickness within this range, after the growth of the barrier layer 13a, the regrowth layer 13c is taken out from the growth chamber of the first metal organic chemical vapor deposition apparatus, and then the second metal organic chemical vapor deposition is performed. The resumption of the growth of the barrier layer 13a in the growth chamber of the device can reduce the influence on the crystallinity of the barrier layer 13a. Therefore, the effect of improving the output of the semiconductor light emitting device becomes more remarkable. The regrowth layer 13c may not be doped with impurities. This is because the function of the regrowth layer 13c does not affect the presence or absence of impurity doping.

  On the other hand, if the film thickness of the regrowth layer 13c is less than 3 nm, the flatness of the surface of the regrowth layer 13c becomes insufficient, which is not preferable. Moreover, when the film thickness of the regrowth layer 13c exceeds 20 nm, the amount of dopants and deposits left after the regrowth layer 13c is formed in the growth chamber of the second metal organic chemical vapor deposition apparatus increases. Defects of the p-type semiconductor layer 14 due to these tend to occur. Further, the film formation time for the regrowth layer 13c becomes longer, and the productivity is lowered.

  In the present embodiment, the regrowth layer 13c is formed on the uppermost surface (the P clad layer 14a side) of the light emitting layer 13, thereby preventing excessive sublimation of indium in the well layer 13b. Therefore, the light emitting layer 13 is maintained with sufficient crystallinity.

<P-type semiconductor layer 14>
The p-type semiconductor layer 14 is generally composed of a p-cladding layer 14a and a p-contact layer 14b. Further, the p contact layer 14b can also serve as the p clad layer 14a.

(P-clad layer 14a)
The p-clad layer 14a in the present embodiment is formed on the regrown layer 13c. The p-cladding layer 14a is a layer for confining carriers in the light emitting layer 13 and injecting carriers. The p-cladding layer 14a is not particularly limited as long as it has a composition larger than the band gap energy of the light emitting layer 13 and can confine carriers in the light emitting layer 13, but Al _x Ga _1-x N (0 ≦ x ≦ 0.4) is preferable. When the p-cladding layer 14a is made of such AlGaN, it is preferable in terms of confining carriers in the light-emitting layer 13.

The thickness of the p-cladding layer 14a is not particularly limited, but is preferably 1 to 400 nm, and more preferably 5 to 100 nm. The p-type doping concentration of the p-cladding layer 14a is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , more preferably 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ . When the p-type dope concentration is in the above range, a good p-type crystal can be obtained without reducing the crystallinity. The p-cladding layer 14a may have a superlattice structure in which thin films are stacked a plurality of times.

  When the p-cladding layer 14a includes a superlattice structure, a p-side first layer made of a group III nitride semiconductor and a p-side second made of a group III nitride semiconductor having a composition different from that of the p-side first layer. The layers may be stacked. When the p-cladding layer 14a includes a superlattice structure, the p-cladding layer 14a may include a structure in which p-side first layers and p-side second layers are alternately and repeatedly stacked.

(P contact layer 14b)
The p contact layer 14b is a layer for providing a positive electrode. The p contact layer 14b is preferably made of Al _x Ga _1-x N (0 ≦ x ≦ 0.4) in terms of maintaining good crystallinity and good ohmic contact with the p ohmic electrode. . When the p-contact layer 14b contains p-type impurities (dopants) at a concentration of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ and 5 × 10 ^{19 to} 5 × 10 ²⁰ / cm ^3. From the viewpoint of maintaining good ohmic contact, preventing the occurrence of cracks, and maintaining good crystallinity. Although it does not specifically limit as a p-type impurity, For example, it is especially preferable to use Mg.
Since the light emitting layer 13 and the p contact layer 14b of this embodiment are formed in different growth chambers, the p contact layer 14b is not mixed with a dopant such as Si used in forming the light emitting layer 13. Therefore, the p contact layer 14b having a high carrier concentration is formed.

  The thickness of the p-contact layer 14b is not particularly limited, but is preferably 10 to 500 nm, and more preferably 50 to 200 nm. When the film thickness of the p contact layer 14b is within this range, it is preferable in terms of light emission output.

<N-type electrode 17>
The n-type electrode 17 also serves as a bonding pad, and is formed in contact with the n-type semiconductor layer 12 of the laminated semiconductor layer 20. Therefore, when forming the n-type electrode 17, at least a part of the p-semiconductor layer 14 and the light-emitting layer 13 is removed to expose the n-type semiconductor layer 12, and on the exposed surface 20 a of the n-type semiconductor layer 12. An n-type electrode 17 also serving as a bonding pad is formed. As the n-type electrode 17, various compositions and structures are known, and these known compositions and structures can be used without any limitation, and can be provided by conventional means well known in this technical field.

(Translucent electrode 15)
The translucent electrode 15 is laminated on the p-type semiconductor layer 14 and preferably has a small contact resistance with the p-type semiconductor layer 14. Further, the translucent electrode 15 is preferably excellent in light transmissivity in order to efficiently extract light from the light emitting layer 13 to the outside of the semiconductor light emitting element 1. In addition, the translucent electrode 15 preferably has excellent conductivity in order to diffuse current uniformly over the entire surface of the p-type semiconductor layer 14.

As a constituent material of the translucent electrode 15, any one of conductive oxide containing any one of In, Zn, Al, Ga, Ti, Bi, Mg, W, and Ce, zinc sulfide, or chromium sulfide is used. A translucent conductive material selected from the group consisting of: As the conductive oxide, ITO (indium tin oxide (In ₂ O ₃ —SnO ₂ )), IZO (indium zinc oxide (In ₂ O ₃ —ZnO)), AZO (aluminum zinc oxide (ZnO—Al ₂ O)) ₃ )), GZO (gallium zinc oxide (ZnO—Ga ₂ O ₃ )), fluorine-doped tin oxide, titanium oxide and the like.

  Moreover, the structure of the translucent electrode 15 may be any structure including a conventionally known structure. The translucent electrode 15 may be formed so as to cover almost the entire surface of the p-type semiconductor layer 14, or may be formed in a lattice shape or a tree shape with a gap.

(P-type bonding pad electrode 16)
The p-type bonding pad electrode 16 also serves as a bonding pad, and is laminated on the translucent electrode 15. As the p-type bonding pad electrode 16, various compositions and structures are known, and these known compositions and structures can be used without any limitation, and can be provided by conventional means well known in this technical field.
The p-type bonding pad electrode 16 can be formed anywhere as long as it is on the translucent electrode 15. However, if it is formed at a position too close to the n-type electrode 17, it is not preferable because a short circuit between wires and balls occurs when bonding.

  The diameter of the p-type bonding pad electrode 16 is generally about 100 μm from the viewpoint of workability and light extraction.

(Protective film layer)
The protective film layer (not shown) includes the upper surface and side surfaces of the translucent electrode 15, the exposed surface 20a of the n-type semiconductor layer 12, the side surfaces of the light-emitting layer 13 and the p-type semiconductor layer 14, the n-type electrodes 17 and p as required. It is formed so as to cover the side surface and the peripheral portion of the mold bonding pad electrode 16. By forming the protective film layer, it is possible to prevent moisture and the like from entering the semiconductor light emitting element 1 and to suppress the deterioration of the semiconductor light emitting element 1.
As the protective film layer, it is preferable to use an insulating material having a transmittance of 80% or more at a wavelength in the range of 300 to 550 nm. For example, silicon oxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), niobium oxide (Nb ₂ O ₅ ), tantalum oxide (Ta ₂ O ₅ ), silicon nitride (Si ₃ N ₄ ), aluminum nitride (AlN), or the like can be used. Among these, SiO ₂ and Al ₂ O ₃ are more preferable because a dense film can be easily formed by CVD film formation.

Hereinafter, a method for manufacturing the semiconductor light emitting device 1 will be described in detail with reference to the drawings as appropriate.
The drawings referred to in the following description are for explaining the present invention, and the size, thickness, dimensions, and the like of each part shown in the drawings are different from the actual dimensional relationship of the semiconductor light emitting device 1.

  In the manufacturing method of the semiconductor light emitting device 1 of the present invention shown in FIG. 1, first, the laminated semiconductor layer 20 shown in FIG. 2 is manufactured. The manufacturing method of the laminated semiconductor layer 20 is a first step of laminating the n-contact layer 12a and the n-cladding layer 12b on the substrate 11 and the light-emitting layer 13 in which the barrier layers 13a and the well layers 13b are alternately and repeatedly laminated. And a second step of sequentially stacking the regrowth layer 13c of the barrier layer 13a and the p-type semiconductor layer 14 on the barrier layer 13a. FIG. 2 shows an example in which the laminated semiconductor layer 20 is laminated via the buffer layer 21 and the base layer 22. Hereafter, each process is demonstrated in detail using FIG.

<First step>
First, a substrate 11 made of sapphire or the like is prepared.
Next, the substrate 11 is placed in a growth chamber of a first MOCVD apparatus (first metal organic chemical vapor deposition apparatus), and a buffer layer 21 and a base layer 22 are sequentially stacked on the substrate 11 by MOCVD. In the present invention, the buffer layer 21 made of AlN is formed on the substrate 11 made of sapphire or the like by using the RF sputtering method, and the base layer 22 is sequentially laminated on the substrate in the growth chamber of the first MOCVD apparatus. May be.

(N contact layer 12a lamination process)
Next, an n contact layer 12 a is laminated on the substrate having the base layer 22.
When growing the n-contact layer 12a, it is preferable to set the temperature of the substrate 11 in the range of 1000 ° C. to 1100 ° C. in a hydrogen atmosphere.
Further, as a raw material for growing the n-contact layer 12a, a group III metal organic metal source such as trimethylgallium (TMG) and a nitrogen source such as ammonia (NH ₃ ) are used, and the group III layer is formed on the buffer layer by thermal decomposition. A nitride semiconductor layer is deposited. The pressure in the growth chamber of the MOCVD apparatus is preferably 15 to 80 kPa.

(N-cladding layer 12b formation process)
Next, the n clad layer 12b is formed on the n contact layer 12a. The step of forming the n-clad layer 12b having a superlattice structure includes an n-side first layer made of a group III nitride semiconductor having a thickness of 100 angstroms or less, and an III-layer having a thickness of 100 angstroms or less having a composition different from that of the n-side first layer. It can be set as the process of repeatedly stacking 20 to 80 layers alternately with the n-side second layer made of a group nitride semiconductor. The n-side first layer and / or the n-side second layer is preferably made of a gallium nitride compound semiconductor containing In.

(Light emitting layer 13 formation process)
Next, the light emitting layer 13 having a multiple quantum well structure is formed. First, the well layers 13b and the barrier layers 13a are alternately and repeatedly stacked on the barrier layer 13a. At this time, the layers are stacked so that the barrier layer 13a is disposed on the n-type semiconductor layer 12 side and the p-type semiconductor layer 14 side.
The composition and film thickness of the well layer 13b and the barrier layer 13a can be appropriately set so as to have a predetermined emission wavelength. The substrate temperature for growing the light emitting layer 13 is 600 to 900 ° C., and nitrogen gas is used as the carrier gas.
Thereafter, the substrate 11 on which the layers up to the light emitting layer 13 are formed is taken out from the growth chamber of the first MOCVD apparatus.

<Second step>
The second step further includes a step of forming a regrowth layer 13c of the barrier layer 13a on the barrier layer 13a and a p-type semiconductor layer 14 in the second MOCVD apparatus (second metal organic chemical vapor deposition apparatus). And a process. Details will be described below.

(Re-growth layer 13c formation process)
First, the substrate 11 on which the layers up to the light emitting layer 13 are formed is placed in the growth chamber of the second MOCVD apparatus. Next, a regrowth layer 13c of the barrier layer 13a is formed on the barrier layer 13a on the uppermost surface (on the p-clad layer 14a side) of the light emitting layer 13 by MOCVD.

  In this embodiment, before the regrowth layer 13c is formed, the substrate 11 on which the layers up to the uppermost barrier layer 13a are formed is subjected to a heat treatment (thermal) at 500 ° C. to 800 ° C. in an atmosphere containing nitrogen and ammonia. Cleaning) is preferably performed. Note that an atmosphere containing only hydrogen is not preferable because the regrowth layer 13c is decomposed and crystallinity is deteriorated. Further, the pressure in the growth chamber of the second MOCVD apparatus at this time is preferably 40 to 100 kPa.

When such a heat treatment is performed, the substrate 11 on which the layers up to the uppermost barrier layer 13a are formed after the completion of the first step is taken out from the growth chamber of the first MOCVD apparatus, whereby the uppermost barrier layer 13a. Even if the surface is contaminated, the contaminant can be removed before the regrowth layer 13c is formed. As a result, the crystallinity of the regrowth layer 13c is improved, and the crystallinity of the p-type semiconductor layer 14 formed on the regrowth layer 13c is further improved.
If the surface of the uppermost barrier layer 13a remains contaminated, the reverse current (IR) may not be sufficiently low, and the electrostatic discharge (ESD) breakdown voltage may be insufficient. For this reason, the reliability of the semiconductor light emitting element 1 is lowered.

  Moreover, it is preferable that the growth conditions of the barrier layer 13a in the process of forming the light emitting layer 13 and the growth conditions of the regrowth layer 13c in this process are the same. That is, it is preferable that the substrate temperature for growing the regrowth layer 13c is 600 ° C. to 900 ° C., and nitrogen gas is used as the carrier gas. By setting the substrate temperature during the formation of the regrowth layer 13c within this range, it is possible to prevent the crystallinity of the light emitting layer 13 from being lowered by heat. Moreover, by using nitrogen gas as the carrier gas, sublimation of indium in the light emitting layer 13 (well layer 13b) can be prevented, and a decrease in crystallinity can be prevented.

  The regrowth layer 13c is preferably formed with a film thickness of 3 nm to 20 nm. By forming the regrown layer 13c with a film thickness within this range, the barrier layer 13a is taken out from the growth chamber of the first MOCVD apparatus after the growth, and then the regrown layer 13c is grown in the growth chamber of the second MOCVD apparatus. This can prevent the crystallinity of the barrier layer 13a from being lowered. Thereby, the effect of improving the output of the semiconductor light emitting device becomes more remarkable. Further, the crystallinity of the p-type semiconductor layer 14 formed on the barrier layer 13a in the process described later can be made even better.

  The pressure in the growth chamber of the MOCVD apparatus when forming the regrowth layer 13c is preferably 10 to 80 kPa. By setting the pressure in the growth chamber within this range, deterioration of the crystallinity of the regrown layer can be prevented. On the other hand, if the pressure during the formation of the regrown layer 13c is less than 10 kPa, the crystallinity of the regrown layer is deteriorated, which is not preferable. Moreover, if the pressure at the time of forming the regrowth layer 13c exceeds 80 kPa, it takes time to form the regrowth layer, which is not preferable from the viewpoint of work efficiency.

  In the present embodiment, the regrown layer 13c is formed on the uppermost surface (on the p-cladding layer 14a side) of the light emitting layer 13, so that indium sublimation from the well layer 13b can be prevented and the uppermost barrier layer is formed. The crystallinity degradation of 13a can be prevented. For this reason, the light emitting layer 13 with high crystallinity can be formed.

(P-type semiconductor layer 14 forming step)
Next, the p-type semiconductor layer 14 is formed. The p-type semiconductor layer 14 may be formed by sequentially stacking the p-cladding layer 14a and the p-contact layer 14b on the regrown layer 13c. When the p-cladding layer 14a is a layer including a superlattice structure, a p-side first layer made of a group III nitride semiconductor having a thickness of 100 angstroms or less and a film having a composition different from that of the p-side first layer are used. What is necessary is just to laminate | stack repeatedly the p side 2nd layer which consists of a group III nitride semiconductor below thickness 100angstrom alternately.

Thereafter, the translucent electrode 15 is laminated on the p-type semiconductor layer 14 of the laminated semiconductor layer 20, and the translucent electrode 15 other than the predetermined region is removed by, for example, a generally known photolithography technique.
Subsequently, patterning is performed by a photolithography technique, for example, and a part of the laminated semiconductor layer 20 in a predetermined region is etched to expose a part of the first n-type semiconductor layer 12c of the n-contact layer 12a. An n-type electrode 17 is formed on the exposed surface 20a of 12a.
Thereafter, a p-type bonding pad electrode 16 is formed on the translucent electrode 15.
As described above, the semiconductor light emitting device 1 shown in FIG. 1 is manufactured.

According to the present embodiment, the p-type semiconductor layer 14 is formed in a growth chamber different from the light-emitting layer 13 even if a dopant such as Si used in forming the light-emitting layer 13 remains in the growth chamber. The semiconductor layer 14 is not mixed with a dopant such as Si. Therefore, it is possible to prevent the carrier concentration of the p-type semiconductor layer 14 from decreasing. As a result, it is possible to form a semiconductor light emitting device with high light output and high reliability.
Further, the crystallinity of the uppermost surface of the light emitting layer 13 can be evaluated by taking out the substrate 11 formed up to the light emitting layer 13 from the growth chamber. Therefore, the reliability of the semiconductor light emitting element can be further improved.

<Lamp 3>
The lamp 3 of this embodiment includes the semiconductor light emitting device 1 of the present invention, and is a combination of the semiconductor light emitting device 1 and a phosphor. The lamp 3 of the present embodiment can have a configuration well known to those skilled in the art by means well known to those skilled in the art. For example, in the lamp 3 of this embodiment, a technique for changing the emission color by combining the semiconductor light emitting element 1 and the phosphor can be adopted without any limitation.

  FIG. 3 is a schematic cross-sectional view showing an example of a lamp including the semiconductor light emitting element 1 shown in FIG. The lamp 3 shown in FIG. 3 is a shell type, and the semiconductor light emitting element 1 shown in FIG. 1 is used. As shown in FIG. 3, the p-type bonding pad electrode 16 of the semiconductor light emitting device 1 is connected to one of the two frames 31 and 32 (the frame 31 in FIG. 3) by a wire 33. The semiconductor light emitting element 1 is mounted by connecting the mold electrode 17 (bonding pad) to the other frame 32 with a wire 34. Further, the periphery of the semiconductor light emitting element 1 is sealed with a mold 35 made of a transparent resin.

  Since the lamp 3 of the present embodiment uses the semiconductor light emitting element 1 described above, a high light emission output can be obtained.

  In addition, electronic devices such as backlights, mobile phones, displays, various panels, computers, game machines, and lighting incorporating the lamp 3 of the present embodiment, and mechanical devices such as automobiles incorporating such electronic devices are expensive. The semiconductor light emitting device 1 capable of obtaining a light emission output is provided. In particular, an electronic device driven by a battery such as a backlight, a mobile phone, a display, a game machine, and an illumination is preferable because an excellent product including the semiconductor light emitting element 1 that can obtain a high light emission output can be provided.

Hereinafter, the method for producing a semiconductor light emitting device of the present invention will be described in more detail with reference to Examples, but the present invention is not limited to these Examples.
Example 1
The semiconductor light emitting device 1 shown in FIG. 1 was manufactured by the following method.
In the semiconductor light emitting device 1 of Example 1, in the growth chamber of the first MOCVD furnace, on a substrate 11 made of sapphire, a buffer layer 21 made of AlN, an underlayer 22 made of undoped GaN having a thickness of 6 μm, and a thickness of 2 μm. An n contact layer 12a made of Si-doped n-type GaN was formed. The Si dopant concentration of the n contact layer 12a was about 5 × 10 ¹⁸ / cm ³ . Further, the substrate temperature when forming the n contact layer 12a was 1080 ° C., and the pressure in the growth chamber was 40 kPa.

Next, an n-cladding layer 12b having a superlattice structure with a thickness of 80 nm was formed on the n-contact layer 12a. The n-clad layer 12b having a superlattice structure is composed of an n-side first layer having a thickness of 2 nm made of Ga _0.99 In _0.01 N and an n-side second layer having a thickness of 2 nm made of GaN. 19 pairs of thin film layers were alternately grown repeatedly, and finally an n-side first layer having a thickness of 2 nm made of Ga _0.99 In _0.01 N was formed.
Furthermore, the barrier layer 13a and the well layer 13b were laminated | stacked 5 times on the n clad layer 12b, and the light emitting layer 13 of the multiple quantum well structure which provided the barrier layer last was formed. The substrate temperature at the time of forming the light emitting layer 13 at this time was 750 ° C., and the pressure in the growth chamber was 40 kPa. A predetermined doping amount of Si was added as an impurity to the barrier layer 13a.

Next, this substrate was once taken out from the first MOCVD furnace and transferred to the growth chamber of the second MOCVD furnace. Here, before forming the regrowth layer 13c, the substrate 11 on which the layers up to the uppermost barrier layer 13a were formed was subjected to heat treatment (thermal cleaning) at 600 ° C. in an atmosphere containing nitrogen and ammonia. . Next, a regrowth layer 13c having a thickness of 4 nm was formed on the barrier layer 13a on the uppermost surface of the light emitting layer 13 (on the p-cladding layer 14a side). At this time, the substrate temperature was 750 ° C., and nitrogen (N ₂ ) gas was used as the carrier gas. No impurity was added to the regrowth layer 13c.

Thereafter, a p-cladding layer 14a made of Mg-doped single layer Al _0.07 Ga _0.93 N having a thickness of 20 nm and a p-contact layer 14b made of Mg-doped p-type GaN having a thickness of 170 nm were sequentially laminated on the regrowth layer 13c. Next, a translucent electrode 15 made of ITO having a thickness of 200 nm was formed on the p-contact layer 14b by a generally known photolithography technique.
Next, etching was performed using a photolithography technique to form an exposed surface 20a of the n contact layer 12a in a desired region, and an n-type electrode 17 having a Ti / Au double layer structure was formed thereon.
Further, on the translucent electrode 15, a p-type bonding pad structure 16 having a three-layer structure composed of a metal reflective layer made of 200 nm Al, a barrier layer made of 80 nm Ti, and a bonding layer made of 1100 nm Au, It formed using the technique of photolithography.
As described above, the semiconductor light emitting device 1 of Example 1 shown in FIG. 1 was obtained.

  The characteristics of the semiconductor light emitting device 1 of Example 1 obtained in this manner were a forward voltage Vf = 2.9 V, a light emission output Po = 23 mW, and a reverse current IR (@ 20 V) = 0.1 μA.

(Example 2)
The semiconductor light emitting device 1 was manufactured by the same procedure as in Example 1 except that the thickness of the regrown layer 13c was 10 nm. As a result, the forward voltage Vf = 3.0 V, the light emission output Po = 22 mW, and the reverse current IR (@ 20 V) = 0.3 μA.

(Example 3)
The semiconductor light emitting device 1 was manufactured by the same procedure as in Example 1 except that the substrate temperature in forming the regrowth layer 13c was 600 ° C. and the film thickness of the regrowth layer 13c was 5 nm. As a result, the forward voltage Vf = 3.1 V, the light emission output Po = 20 mW, and the reverse current IR (@ 20 V) = 0.5 μA.

Example 4
The semiconductor light emitting device 1 was manufactured by the same procedure as in Example 1 except that the substrate temperature in forming the regrowth layer 13c was 900 ° C. and the film thickness of the regrowth layer 13c was 20 nm. As a result, the forward voltage Vf = 3.0 V, the light emission output Po = 22 mW, and the reverse current IR (@ 20 V) = 0.1 μA.

(Example 5)
The semiconductor light emitting device 1 was manufactured by the same procedure as in Example 1 except that the substrate temperature during the formation of the regrowth layer 13c was 1000 ° C. and the film thickness of the regrowth layer 13c was 3 nm. As a result, the forward voltage Vf = 3.0 V, the light emission output Po = 22 mW, and the reverse current IR (@ 20 V) = 0.5 μA.

(Comparative Example 1)
The semiconductor light emitting device 1 was manufactured by the same procedure as in Example 1 except that hydrogen was used as the carrier gas for forming the regrown layer 13c. As a result, the forward voltage Vf = 3.5 V, the light emission output Po = 15 mW, and the reverse current IR (@ 20 V) = 10 μA.

(Comparative Example 2)
The semiconductor light emitting device 1 was manufactured by the same procedure as in Example 1 except that the regrowth layer 13c was not formed. As a result, the forward voltage Vf = 3.9 V, the light emission output Po = 10 mW, and the reverse current IR (@ 20 V) = 5 μA.

Table 1 shows the results of forward voltage, light emission output (Po), and reverse current (IR) of the semiconductor light emitting devices of Examples 1 to 5, Comparative Example 1, and Comparative Example 2.
The forward voltage Vf for the semiconductor light emitting devices 1 of the example and the comparative example is a voltage measured at a current application value of 20 mA by energization with a probe needle. Similarly, the light emission outputs (Po) for the semiconductor light emitting devices 1 of the example and the comparative example are each mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA is measured by a tester. The reverse current (IR) is a value obtained by measuring a leakage current when a voltage of 20 V is applied to the light emitting element in the reverse direction.

As shown in Table 1, each of the semiconductor light emitting devices 1 of Examples 1 to 5 has a sufficiently low reverse current (IR), a relatively low forward voltage, and a light emission output (Po) of 20 mW or more. Thus, the brightness was high and the power consumption was low.
On the other hand, in Comparative Example 1 and Comparative Example 2, the light emission output (Po) was low, the forward voltage was relatively high, and the leakage current (reverse current (IR) was large compared to Examples 1 to 5. .

As described above, in the semiconductor light emitting devices 1 of Examples 1 to 5, the light emitting layer and the p-type semiconductor layer are formed in separate growth chambers, and the barrier layer is regrown on the uppermost surface (barrier layer) surface of the light emitting layer. By forming the layer, it is possible to prevent the sublimation and crystallinity of indium in the light emitting layer and the carrier concentration of the p-type semiconductor layer from being reduced due to impurities, and the heat history that the light emitting layer has suffered so far As a result of the relaxation of stress and the improvement of crystallinity, the light emission output could be improved effectively.
As described above, the semiconductor light-emitting elements 1 of Examples 1 to 5 have smaller leakage current and higher light emission output than the semiconductor light-emitting elements 1 of Comparative Examples 1 and 2, and improved reliability. It was confirmed that the semiconductor light emitting device 1 was manufactured.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor light emitting element, 3 ... Lamp, 12 ... N type semiconductor layer, 12a ... n contact layer, 12b ... N clad layer, 12c ... Regrown layer, 13 ... Light emitting layer, 13a ... Barrier layer, 13b ... Well layer, 13c ... regrowth layer, 14 ... p-type semiconductor layer

Claims (12)

In the first metal organic chemical vapor deposition apparatus, a first n-type semiconductor layer, a second n-type semiconductor layer, a well layer, and a barrier layer are alternately and repeatedly stacked on a substrate, and the uppermost surface becomes the barrier layer. A first step of forming a light emitting layer;
A second metal organic chemical vapor deposition apparatus comprising: a second step of sequentially stacking a regrowth layer of the barrier layer and a p-type semiconductor layer on the barrier layer on the uppermost surface of the light emitting layer; A method for manufacturing a semiconductor light emitting device. The method for manufacturing a semiconductor light emitting element according to claim 1, wherein N ₂ gas is used as a carrier gas when forming the regrowth layer.   The method for manufacturing a semiconductor light emitting element according to claim 1, wherein the regrowth layer is formed with a thickness of 3 nm to 20 nm.   4. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein a substrate temperature in forming the regrowth layer is 600 ° C. to 1000 ° C. 5.   5. The method for manufacturing a semiconductor light-emitting element according to claim 1, wherein a pressure when forming the regrowth layer is 10 kPa to 80 kPa.   Before forming the regrowth layer, heat treatment is performed in the second organometallic chemical vapor deposition apparatus in an atmosphere containing nitrogen and ammonia under conditions of a pressure of 40 kPa to 100 kPa and a substrate temperature of 500 ° C. to 800 ° C. The method for producing a semiconductor light emitting element according to claim 1, wherein the method is performed.   The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the regrowth layer is a regrowth layer to which no impurity is intentionally added.   A first n-type semiconductor layer, a second n-type semiconductor layer, a well layer and a barrier layer that are alternately and repeatedly stacked on the substrate, wherein the uppermost surface is the barrier layer; A semiconductor light emitting device in which a regrowth layer of the barrier layer formed on the barrier layer on the upper surface and a p-type semiconductor layer are stacked.   The semiconductor light emitting device according to claim 8, wherein the regrowth layer is formed with a thickness of 3 nm to 20 nm.   A lamp comprising a semiconductor light emitting device manufactured using the method for manufacturing a semiconductor light emitting device according to claim 1.   An electronic device comprising the lamp according to claim 10 incorporated therein.   12. An electronic device according to claim 11, wherein the electronic device is incorporated.

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