JP2012110072A - Information processor, motor drive device using same, and information processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To determine whether or not a notification function about abnormal signal is normal, relating to an information processor equipped with a gate drive circuit which drives a switching element of upper and lower arms and detects abnormality of the arms for outputting an abnormal signal.SOLUTION: In an information processor (ECU), a gate drive circuit of a boot strap type intentionally generates a dummy abnormal signal Ed (S20) by firstly outputting an upper arm drive signal D1 (S10), although a lower arm drive signal should be outputted firstly during normal driving before the start of gate driving. Here, if an abnormal signal notification function is normal, the dummy abnormal signal Ed is outputted from an abnormal signal outputting part and is transferred by way of an abnormal signal line, and then received by an abnormal signal receiving part. By confirming whether or not the abnormal signal receiving part has received the dummy abnormal signal Ed, it is determined that the abnormal signal notification function is normal or not (S30).

Description

  The present invention relates to an information processing apparatus including a gate drive circuit for a switching element, a motor driving apparatus using the same, and an information processing method.

  2. Description of the Related Art Conventionally, a gate drive circuit and a gate drive method for driving a gate of switching elements of upper and lower arms constituting an inverter circuit and the like are known. For example, in the gate drive method described in Patent Document 1, the gate drive signal of the upper and lower arms is output from the gate drive circuit, and the upper arm abnormality is detected using the power supply of the upper arm circuit in the gate drive circuit, This abnormal signal is transmitted to the circuit unit.

Japanese Patent No. 3831355

  In the gate driving method of Patent Document 1, a circuit is provided that outputs an abnormal signal and transmits it to the abnormal signal receiving unit when an abnormality related to driving of the upper and lower arms is detected. However, even if the gate drive circuit correctly detects an abnormality, (1) when an abnormal signal is not output due to a failure in the abnormal signal output unit, (2) when an abnormal signal line that transmits the abnormal signal fails ( 3) In some cases, such as when the receiving circuit of the abnormal signal receiving unit breaks down, the abnormal signal cannot be normally notified. As described above, when the abnormality signal notification function is abnormal, the abnormality signal receiving unit cannot detect the occurrence of the abnormality of the upper and lower arms even though the abnormality of the upper and lower arms actually occurs. There is a problem.

  The present invention was created in view of the above points, and an object of the present invention is to provide a gate drive circuit that drives the switching elements of the upper and lower arms, and detects an abnormality of the upper and lower arms and outputs an abnormal signal. An object of the present invention is to provide an information processing apparatus that determines whether or not an abnormal signal notification function is normal.

The inventions according to claims 1 to 4 are inventions related to the information processing apparatus. The information processing apparatus includes a gate drive circuit, an abnormal signal line, and an abnormal signal receiving unit.
The gate driving circuit outputs an upper arm driving signal for driving the gate of the switching element of the upper arm and a lower arm driving signal for driving the gate of the switching element of the lower arm with respect to the switching elements of the upper and lower arms connected in series. In addition, the gate drive circuit generates an abnormal signal and outputs it from the abnormal signal output unit when detecting an abnormality that the upper and lower arm switching elements do not operate even though the upper arm drive signal and the lower arm drive signal are output. .
The abnormal signal line transmits the abnormal signal output from the abnormal signal output unit.
The abnormal signal receiving unit receives the abnormal signal transmitted via the abnormal signal line.
Here, “abnormality in which the switching elements of the upper and lower arms do not operate” means, for example, a short circuit failure or an open failure of the switching elements.

Under the above configuration, the gate drive circuit generates a predetermined dummy abnormality signal before starting the gate drive. Then, by determining whether or not the abnormal signal receiving unit has received the dummy abnormal signal, it is determined whether or not the notification function related to the output, transmission, and reception of the abnormal signal is normal.
Here, “before start of gate drive” includes “before start” at the time of initial drive, and “before restart” at the time of redrive after interruption.

  As a result, it is possible to determine whether or not the abnormal signal notification function is normal before starting the gate drive. Therefore, since it is possible to start the gate drive after confirming that the abnormality signal notification function is normal, the reliability of abnormality detection is improved.

  According to another aspect of the information processing apparatus of the present invention, the gate drive circuit is a bootstrap type gate drive circuit that drives the switching element of the upper arm using electric charges generated by driving the switching element of the lower arm. Then, by outputting the upper arm drive signal before the lower arm drive signal, a dummy abnormality signal is generated.

  In the bootstrap gate drive circuit, the lower arm switching element is charged by charging the lower arm by driving the lower arm. Therefore, during normal driving, the lower arm switching element is turned on first, and the upper arm switching element is turned on later. There is a need to. Therefore, by outputting the upper arm drive signal prior to the lower arm drive signal, “the upper arm drive signal is output from the gate drive circuit, but the charge for driving the upper arm is charged. Therefore, it is possible to intentionally create a situation where the upper arm is not driven, detect an “abnormal”, and generate a dummy abnormal signal.

Furthermore, in the method of “outputting the upper arm drive signal before the lower arm drive signal”, for example, in the circuit that alternately outputs the upper arm drive signal and the lower arm drive signal, the upper arm drive signal is output first. There is a method of constructing a circuit to perform. In this case, the edge of the dummy abnormal signal received by the abnormal signal receiving unit, that is, the rising or falling part of the waveform can be detected using the input capture function, the event counter function, or the like. Alternatively, a method of continuously outputting only the upper arm drive signal and detecting the level of the dummy abnormality signal at a predetermined determination timing during output may be employed.
As a result, in the bootstrap gate drive circuit, a dummy abnormality signal can be generated in an existing circuit without adding a special circuit.

The information processing apparatus according to claim 3, wherein when the abnormal signal receiving unit receives a dummy abnormal signal, the gate driving circuit starts gate driving, and when the abnormal signal receiving unit does not receive the dummy abnormal signal, gate driving is performed. The circuit prohibits gate drive.
When the abnormal signal receiving unit does not receive the dummy abnormal signal, it is determined that the abnormal signal notification function is abnormal. If the abnormality signal notification function is abnormal, the abnormality of the upper and lower arms that actually occurs during driving cannot be detected, and as a result of continuing the driving as it is, an unexpected situation may occur. Therefore, when the abnormal signal notification function is abnormal, it is possible to avoid an unexpected situation by prohibiting the gate drive based on the stop priority concept.

In the information processing device according to claim 4, the gate driving circuit performs gate driving both when the abnormal signal receiving unit receives the dummy abnormal signal and when the abnormal signal receiving unit does not receive the dummy abnormal signal. Start.
On the other hand, even when it is determined that the abnormal signal notification function is abnormal, it may be desirable to prioritize driving if there is no problem with the driving function itself at that time. In such a case, according to the configuration of claim 4, the gate drive can be started regardless of whether the abnormal signal notification function is normal or abnormal.
When it is determined that the abnormality signal notification function is abnormal, the abnormality information may be notified to the driver or the like. Alternatively, the abnormality information can be stored in a storage medium, and then used for failure analysis at a dealer or manufacturer when the information processing apparatus is returned.

The invention according to claim 5 is an invention according to the motor drive device. A motor drive device according to a fifth aspect includes the information processing device according to any one of the first to fourth aspects, and an inverter that is controlled by the information processing device and converts DC power into AC power. The motor is driven by the output.
By using the information processing apparatus of the present invention for inverter control of a motor drive device, for example, the effect that “the normal determination of the abnormal signal notification function can be performed” is effectively exhibited.

  The inventions according to claims 6 and 7 relate to an information processing method by the information processing apparatus. The invention according to this information processing method is specifically realized by using an information processing apparatus which is a hardware resource.

An information processing method according to a sixth aspect is a method executed by the information processing apparatus according to the first aspect, and includes a dummy abnormality signal generation stage and a determination stage.
In the dummy abnormality signal generation stage, the gate driving circuit generates a predetermined dummy abnormality signal before starting the gate driving.
In the abnormal signal notification function normal determination stage, it is determined whether the notification function related to the output, transmission and reception of abnormal signals is normal by determining whether the abnormal signal receiving unit has received a dummy abnormal signal. To do.
Thereby, the same effect as that of claim 1 can be obtained.

An information processing method according to a seventh aspect is a method executed by the information processing apparatus according to the second aspect. In this information processing method, a dummy abnormality signal is generated at a dummy abnormality signal generation stage by outputting the upper arm driving signal before the lower arm driving signal.
Thereby, the same effect as that of claim 2 can be obtained.

The schematic block diagram of the electric power steering apparatus with which the information processing apparatus (ECU) by 1st, 2nd embodiment of this invention is applied. The system diagram of the information processor (ECU) by the 1st and 2nd embodiment of the present invention. The flowchart of the abnormal signal notification function confirmation process by 1st Embodiment of this invention. The timing chart which shows the upper and lower arm drive signal which the gate drive circuit by a comparative example outputs. 4 is a timing chart showing upper and lower arm drive signals output by the gate drive circuit according to the first embodiment of the present invention. The timing chart which shows the upper and lower arm drive signal which the gate drive circuit by the modification of 2nd Embodiment of this invention outputs. The flowchart of the abnormal signal notification function confirmation process by other embodiment of this invention. The flowchart of the abnormal signal notification function confirmation process by other embodiment of this invention.

An embodiment in which an information processing apparatus (hereinafter referred to as “ECU”) of the present invention is applied to an electric power steering apparatus for assisting steering operation of an automobile or the like will be described with reference to the drawings.
(First embodiment)
FIG. 1 shows the overall configuration of a steering system provided with an electric power steering device. In the electric power steering apparatus 1 provided in the steering system 90, a torque sensor 94 for detecting a steering torque is installed on a steering shaft 92 connected to a handle 91.
A pinion gear 96 is provided at the tip of the steering shaft 92, and the pinion gear 96 meshes with the rack shaft 97. A pair of wheels 98 are rotatably connected to both ends of the rack shaft 97 via tie rods or the like.

  As a result, when the driver rotates the handle 91, the steering shaft 92 connected to the handle 91 rotates, and the rotational motion of the steering shaft 92 is converted into the linear motion of the rack shaft 97 by the pinion gear 96. The pair of wheels 98 are steered at an angle corresponding to 97 linear motion displacement.

The electric power steering apparatus 1 includes a motor 80 that generates a steering assist torque, a reduction gear 89 that reduces the rotation of the motor 80 and transmits the rotation to the steering shaft 92, and the motor driving apparatus 2. The motor 80 is a three-phase brushless motor, and rotates the reduction gear 89 forward and backward. The motor drive device 2 includes an ECU 10 and an inverter 20. The motor drive device 2 also includes a rotation angle sensor 85 that detects the rotation angle of the motor 80, the above-described torque sensor 94, and a vehicle speed sensor 95 that detects the vehicle speed.
With this configuration, the electric power steering apparatus 1 generates a steering assist torque for assisting the steering of the handle 91 and transmits the steering assist torque to the steering shaft 92.

  FIG. 2 shows a schematic system diagram of the ECU. The ECU 10 includes a gate drive circuit 30 and a command circuit 40. In the ECU 10, an input circuit (not shown) inputs signals from the rotation angle sensor 85, the torque sensor 94, the vehicle speed sensor 95, etc., and controls the inverter 20 based on these information.

  In the inverter 20, an upper MOS 23 as an “upper arm switching element” and a lower MOS 24 as a “lower arm switching element” are connected in series between a power supply line 21 and a ground line 22. The upper MOS 23 and the lower MOS 24 are MOS field effect transistors. The drain of the upper MOS 23 is connected to the power supply line 21, the source of the upper MOS 23 is connected to the drain of the lower MOS 24, and the source of the lower MOS is connected to the ground line 22. The gates of the upper MOS 23 and the lower MOS 24 are connected to the gate drive circuit 30 via resistors 25 and 26, respectively.

The inverter 20 is gate-driven by the ECU 10, converts DC power into AC power, and supplies the AC power to the motor 80. Thereby, the motor drive device 2 configured by the ECU 10 and the inverter 20 drives the motor 80.
For example, in a three-phase inverter, three sets of upper MOS 23 and lower MOS 24 corresponding to each phase are bridge-connected. FIG. 2 shows a set of upper MOS 23 and lower MOS 24 as a representative.

Based on the upper arm command signal C1 and the lower arm command signal C2 from the command circuit 40, the gate drive circuit 30 is an upper arm drive signal D1 that is a switching signal to the upper MOS 23 and a lower signal that is a switching signal to the lower MOS 24. The arm drive signal D2 is output. The gate drive circuit 30 includes a bootstrap circuit 31 and an abnormal signal output unit 38.
The bootstrap circuit 31 charges the capacitor 32 by driving the lower MOS 24 and uses the charge for driving the upper MOS 23.

  The abnormality signal output unit 38 detects that the upper MOS 23 or the lower MOS 24 does not operate even though the upper and lower arm drive signals D1 and D2 are being output, and outputs an abnormality signal Er. Here, the abnormality is, for example, a case of a short failure or open failure of the upper MOS 23 or the lower MOS 24. The abnormal signal Er output from the abnormal signal output unit 38 is transmitted to the abnormal signal receiving unit 41 of the command circuit 40 via the abnormal signal line 39.

The command circuit 40 includes an abnormal signal receiving unit 41 that receives the abnormal signal Er, and a command unit 42. The command unit 42 transmits the upper arm command signal C 1 and the lower arm command signal C 2 to the gate drive circuit 30 via the command signal lines 43 and 44. The upper arm command signal C1 and the lower arm command signal C2 are, for example, PWM signals.
In this embodiment, the abnormal signal receiving unit 41 and the command unit 42 are configured by the same circuit, but the abnormal signal receiving unit 41 and the command unit 42 may be configured by separate circuits.

  Next, the abnormality signal notification function confirmation processing by the ECU 10 will be described with reference to the flowchart of FIG. This process is executed before the start of the initial driving of the gate or before restarting after interruption. Hereinafter, in the description of the flowchart, the symbol S indicates “step”.

  In S10, the gate drive circuit 30 outputs the upper arm drive signal D1. A specific configuration of this output will be described later. Here, in the bootstrap type gate drive circuit, the lower arm switching element is first turned on during the normal driving because the upper arm driving charge is charged by driving the lower arm. Need to be turned on later. Therefore, by outputting the upper arm drive signal prior to the lower arm drive signal, “the upper arm drive signal is output from the gate drive circuit, but the charge for driving the upper arm is charged. The situation where the upper arm does not drive is intentionally created. As a result, the gate drive circuit 30 detects an abnormality and generates a dummy abnormality signal Ed in S20. S20 corresponds to a “dummy abnormality signal generation stage”.

  In subsequent S30, the command circuit 40 determines whether or not the abnormal signal receiving unit 41 has received the dummy abnormal signal Ed. If YES, it is determined that “the abnormal signal notification function is normal” and NO. In this case, it is determined that “the abnormal signal notification function is abnormal”. S30 corresponds to an “abnormal signal notification function normal determination stage”.

  When the abnormal signal receiving unit 41 receives the dummy abnormal signal Ed (S30: YES), the gate driving circuit 30 starts gate driving. When the abnormal signal receiving unit 41 does not receive the dummy abnormal signal Ed (S30: NO), the gate drive circuit 30 prohibits the gate drive.

Next, a specific configuration for generating the dummy abnormality signal Ed in the process of S10 will be described with reference to FIGS.
FIG. 4 shows a timing chart of normal upper and lower arm drive signals D1 and D2 as a comparative example to the present embodiment. In the gate drive by the bootstrap circuit 31, as described above, it is necessary to turn on the lower MOS 24 first and turn on the upper MOS 23 later.
The drive signal according to the timing chart of FIG. 4 is for outputting the lower arm drive signal D2 first and the upper arm drive signal D1 alternately, and performing “normal” gate drive. Therefore, the dummy abnormality signal Ed cannot be generated. Therefore, it cannot be determined whether or not the abnormal signal notification function is normal.

  On the other hand, as shown in the timing chart of FIG. 5, the dummy abnormality signal Ed is created by intentionally generating an abnormal situation by alternately outputting the upper arm driving signal D1 first and the lower arm driving signal D2 later. Can be generated.

  At this time, as shown in FIG. 5A, when the abnormal signal receiver 41 receives the dummy abnormal signal Ed, the command circuit 40 determines that “the abnormal signal notification function is normal” and starts driving. (S40 in FIG. 3). Whether the abnormal signal receiving unit 41 has received the dummy abnormal signal Ed is determined by detecting the edges of the dummy abnormal signal Ed, that is, the rising and falling edges of the waveform, for example, using the input capture function or the event counter function. be able to.

  On the other hand, as shown in FIG. 5B, when the abnormal signal receiver 41 does not receive the dummy abnormal signal Ed, the command circuit 40 determines that “the abnormal signal notification function is abnormal” and prohibits driving. (S50A in FIG. 3). The case where “the abnormal signal notification function is abnormal” includes cases such as an output failure of the abnormal signal output unit 38, a failure of the abnormal signal line 39, a reception failure of the abnormal signal receiving unit 41, and the like.

(effect)
According to this embodiment, in the bootstrap type gate drive circuit, the abnormal signal notification function is normal without adding a special circuit by intentionally generating the dummy abnormal signal Ed before starting the gate drive. It can be confirmed whether or not.

  If it is determined that the abnormal signal notification function is abnormal, gate driving is prohibited. If the abnormality signal notification function is abnormal, the command circuit 40 cannot detect the abnormality of the upper and lower arms that actually occurs during driving, and as a result of continuing the driving as it is, an unexpected situation may occur. Therefore, when the abnormal signal notification function is abnormal, it is possible to avoid an unexpected situation by prohibiting the gate drive based on the stop priority concept.

(Second Embodiment)
The timing chart of FIG. 6 shows a second embodiment for generating the dummy abnormality signal Ed. In the second embodiment, the upper arm drive signal D1 is continuously output for the initial predetermined period, and the lower arm drive signal D2 is not output. Then, the level of the dummy abnormality signal Ed is confirmed at a predetermined determination timing while the upper arm drive signal D1 is being output. At this time, if the dummy abnormality signal Ed is equal to or higher than a predetermined level, it is determined that “the abnormality signal notification function is normal”, and driving is started (S40 in FIG. 3). On the other hand, if the dummy abnormality signal Ed is less than the predetermined level, it is determined that “the abnormality signal notification function is abnormal”, and driving is prohibited (S50A in FIG. 3).

In the second embodiment, as in the first embodiment, in the bootstrap gate drive circuit, the dummy abnormality signal Ed is intentionally generated before the start of the gate drive, so that an abnormality can be made without adding a special circuit. Whether or not the signal notification function is normal can be confirmed.
Further, in the second embodiment, when determining the abnormal signal notification function, it is only necessary to monitor the level of the dummy abnormal signal Ed at the determination timing, so it is necessary to capture the edge of the drive signal as in the first embodiment. In addition, the configuration for confirming reception is simplified.
If the gate drive circuit 30 is configured to output an abnormal signal for a certain period of time regardless of the arm drive signal after the abnormality is detected, the dummy abnormal signal Ed continues to be output even if the upper arm drive signal D1 is not continuously output. Therefore, it is possible to confirm reception by monitoring only the level of the dummy abnormality signal Ed as in the second embodiment.

(Other embodiments)
(A) In the abnormal signal notification function confirmation process according to the above embodiment, when the abnormal signal receiver 41 does not receive the dummy abnormal signal Ed (S30: No in FIG. 3), gate driving is prohibited (S50A in FIG. 3). .
In the abnormal signal notification function confirmation process according to the other embodiment, as shown in the flowchart of FIG. 7, when the abnormal signal receiver 41 does not receive the dummy abnormal signal Ed (S30: No), the abnormal signal notification function is abnormal. It is determined that the abnormality information of the abnormality signal notification function is notified or stored, and the gate drive may be started as usual (S50B).

  Even when it is determined that the abnormal signal notification function is abnormal, it may be desirable to prioritize driving if there is no problem with the driving function at that time. In such a case, for example, the driver, dealer, failure diagnosis room, or the like is notified of the abnormality information of the abnormality signal notification function by turning on a warning lamp or the like, and the gate drive can be normally performed.

Alternatively, if it is not necessary to notify the driver or the like, the gate information may be normally driven only by storing the abnormality information of the abnormality signal notification function in a nonvolatile RAM such as an EEPROM. Thereby, the dealer or manufacturer of the ECU 10 can use it for failure analysis when the ECU 10 is subsequently returned.
In addition, when RAM reading can be performed using an external failure diagnosis device, the storage destination is not particularly provided, and the determination result regarding the abnormal signal notification function of the gate drive circuit 30 may be stored in the RAM. If a failure diagnosis of the abnormal signal notification function is implemented based on a command from the failure diagnosis device, it is possible to perform a failure diagnosis without storing the result in the RAM by returning the result as a response. is there.

  (A) Further, if there is almost no influence even if the abnormal signal notification function is abnormal, whether or not the abnormal signal receiving unit 41 has received the dummy abnormal signal Ed as shown in the flowchart of FIG. Regardless of this, the drive may always be started (S40). That is, the determination process in S30 may be omitted.

  (C) In the above embodiment, the gate drive circuit is constituted by a bootstrap circuit, but is not limited to this. Even in the case of a gate drive circuit other than the bootstrap type, whether or not the abnormal signal notification function is normal by generating a dummy abnormal signal by some method and checking whether or not the dummy signal receiver has received the dummy abnormal signal. Can be determined.

  As a method for generating a dummy abnormality signal in a gate drive circuit other than the bootstrap type, for example, the following method can be considered. A circuit that cuts off the upper and lower arm drive signals is provided, and when the abnormal signal output is confirmed, the connection between the gate drive circuit and the upper and lower arms is cut off and the upper and lower arm drive signals are output. Then, since the drive signal is interrupted, the upper and lower arms are not driven. Accordingly, it is possible to recognize that “the upper and lower arms are not driven when the drive signal is output” as an abnormality, and to intentionally generate a dummy abnormality signal.

  As mentioned above, this invention is not limited to such embodiment, In the range which does not deviate from the meaning of invention, it can implement with a various form.

1 ... Electric power steering device,
2 ... Motor drive device,
10: ECU (information processing device),
20 ... Inverter 23 ... Upper MOS (upper arm switching element),
24 ... Lower MOS (lower arm switching element),
30 ・ ・ ・ Gate drive circuit,
31 ・ ・ ・ Bootstrap circuit,
38 ・ ・ ・ Abnormal signal output section,
39 ... Abnormal signal line,
40 ・ ・ ・ Command circuit,
41... Abnormal signal receiver,
42 ... command section,
C1 ... upper arm command signal C2 ... lower arm command signal,
D1 ... upper arm drive signal,
D2 ... Upper arm drive signal,
Er: Abnormal signal,
Ed: Dummy abnormality signal.

Claims (7)

The upper arm driving signal for driving the gate of the switching element of the upper arm and the lower arm driving signal for driving the gate of the switching element of the lower arm are output to the switching elements of the upper and lower arms connected in series, and the upper arm driving signal and A gate drive circuit that generates an abnormal signal and outputs it from an abnormal signal output unit when detecting an abnormality in which the switching elements of the upper and lower arms do not operate despite outputting the lower arm drive signal;
An abnormal signal line for transmitting an abnormal signal output from the abnormal signal output unit;
An abnormal signal receiving unit for receiving an abnormal signal transmitted via the abnormal signal line;
With
The gate driving circuit generates a predetermined dummy abnormality signal before the start of gate driving,
Information that determines whether the notification function related to output, transmission, and reception of an abnormal signal is normal by determining whether the abnormal signal receiving unit has received the dummy abnormal signal Processing equipment. The information processing apparatus according to claim 1,
The gate driving circuit is a bootstrap type gate driving circuit that drives the switching element of the upper arm using electric charges generated by driving the switching element of the lower arm, and the upper arm driving signal is transmitted to the lower arm. An information processing apparatus that generates the dummy abnormality signal by outputting the driving signal before the driving signal. The information processing apparatus according to claim 1 or 2,
When the abnormal signal receiving unit receives the dummy abnormal signal, the gate driving circuit starts gate driving,
When the abnormal signal receiving unit does not receive the dummy abnormal signal, the gate driving circuit prohibits gate driving. The information processing apparatus according to claim 1 or 2,
The gate driving circuit starts gate driving both when the abnormal signal receiving unit receives the dummy abnormal signal and when the abnormal signal receiving unit does not receive the dummy abnormal signal. Information processing apparatus. An information processing apparatus according to any one of claims 1 to 4,
An inverter that is controlled by the information processing device and converts DC power to AC power;
With
A motor driving device that drives a motor by the output of the inverter. The upper arm driving signal for driving the gate of the switching element of the upper arm and the lower arm driving signal for driving the gate of the switching element of the lower arm are output to the switching elements of the upper and lower arms connected in series, and the upper arm driving signal and A gate drive circuit that generates an abnormal signal and outputs it from an abnormal signal output unit when detecting an abnormality in which the switching elements of the upper and lower arms do not operate despite outputting the lower arm drive signal;
An abnormal signal line for transmitting an abnormal signal output from the abnormal signal output unit;
An abnormal signal receiving unit for receiving an abnormal signal transmitted via the abnormal signal line;
An information processing method executed by an information processing apparatus comprising:
A dummy abnormality signal generation stage in which the gate driving circuit generates a predetermined dummy abnormality signal before the start of gate driving;
Abnormal signal notification function normal determination for determining whether the abnormal signal output, transmission and reception notification function is normal by determining whether the abnormal signal receiving unit has received the dummy abnormal signal Stages,
An information processing method comprising: The information processing method according to claim 6,
The gate driving circuit is a bootstrap type gate driving circuit that drives the switching element of the upper arm using electric charges generated by driving the switching element of the lower arm, and the upper arm driving signal is transmitted to the lower arm. An information processing method, wherein the dummy abnormality signal is generated at the dummy abnormality signal generation stage by outputting the driving signal before the driving signal.

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