JP2012109457A - Manufacturing method of substrate for power module - Google Patents

Manufacturing method of substrate for power module Download PDF

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JP2012109457A
JP2012109457A JP2010258116A JP2010258116A JP2012109457A JP 2012109457 A JP2012109457 A JP 2012109457A JP 2010258116 A JP2010258116 A JP 2010258116A JP 2010258116 A JP2010258116 A JP 2010258116A JP 2012109457 A JP2012109457 A JP 2012109457A
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metal layer
power module
thickness
substrate
metal
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JP5625794B2 (en
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Joji Kitahara
丈嗣 北原
Shinsuke Aoki
慎介 青木
Toshiyuki Nagase
敏之 長瀬
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Mitsubishi Materials Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable substrate for a power module capable of solving a warpage problem.SOLUTION: The substrate for power module is manufactured using processes of: bonding a ceramic substrate 20 with a metal plate 50 having a prescribed thickness by laminating alternately; and then, by cutting the metal plate 50 at a halfway position of the thickness direction along the surface direction, forming a first metal layer 30 and a second metal layer 40 of prescribed thicknesses respectively on both surfaces of the ceramic substrate 20. The thickness of the first metal layer 30 and the thickness of the second metal layer 40 can be different.

Description

本発明は、大電流、高電圧を制御する半導体装置に用いられるパワーモジュール用基板の製造方法に関する。   The present invention relates to a method for manufacturing a power module substrate used in a semiconductor device that controls a large current and a high voltage.

従来、セラミックス基板の一方の面に回路層となるアルミニウム金属層を積層し、この回路層の上に半導体チップ等の電子部品がはんだ付けされるとともに、セラミックス基板の他方の面に放熱層となるアルミニウム金属層が形成され、この放熱層にヒートシンクが接合されたパワーモジュールが知られている。   Conventionally, an aluminum metal layer serving as a circuit layer is laminated on one surface of a ceramic substrate, and an electronic component such as a semiconductor chip is soldered on the circuit layer, and a heat dissipation layer is formed on the other surface of the ceramic substrate. There is known a power module in which an aluminum metal layer is formed and a heat sink is bonded to the heat dissipation layer.

このようなセラミックス基板に回路層または放熱層となるアルミニウム金属層を積層状態に形成する方法として、たとえば特許文献１では、Ａｌ−Ｓｉ系またはＡｌ−Ｇｅ系のろう材を介在させてセラミックス基板とアルミニウム金属層とを重ね合わせ、その積層体を加圧、加熱することにより、ろう材を溶融させてセラミックス基板とアルミニウム金属層とを接合している。   As a method of forming an aluminum metal layer serving as a circuit layer or a heat dissipation layer in such a ceramic substrate in a laminated state, for example, in Patent Document 1, an Al—Si based or Al—Ge based brazing material is interposed to By superposing the aluminum metal layer and pressurizing and heating the laminated body, the brazing material is melted to join the ceramic substrate and the aluminum metal layer.

特開２００８−３１１２９６号公報JP 2008-311296 A

従来、パワーモジュールは、回路層および放熱層とも同じ板厚で形成されるのが一般的であったが、近年では放熱層とヒートシンクとの間の熱膨張差による熱応力を緩和するための応力緩衝機能を放熱層自体に持たせるために、放熱層を厚肉に形成することが検討されている。しかしながら、回路層と放熱層との厚さに差があると、ろう付のための加熱処理を経由すると熱応力により全体に反りが生じて、その後のヒートシンクへの接合を阻害するという問題が生じる。   Conventionally, a power module is generally formed with the same thickness for both the circuit layer and the heat dissipation layer. However, in recent years, the stress for relieving the thermal stress due to the difference in thermal expansion between the heat dissipation layer and the heat sink. In order to give the heat dissipation layer itself a buffer function, it has been studied to form the heat dissipation layer thick. However, if there is a difference between the thickness of the circuit layer and the heat dissipation layer, there is a problem in that when the heat treatment for brazing is performed, the entire substrate is warped due to thermal stress, thereby hindering subsequent bonding to the heat sink. .

本発明は、このような事情に鑑みてなされたもので、反りの問題を解消し、信頼性の高いパワーモジュール用基板を提供することを目的とする。   The present invention has been made in view of such circumstances, and an object thereof is to solve the problem of warping and to provide a highly reliable power module substrate.

本発明は、セラミックス基板と所定の厚さを有する金属板とを交互に積層して接合した後、前記金属板を厚さ方向の途中位置で面方向に沿って切断することにより、前記セラミックス基板の両面にそれぞれ所定厚さの第１金属層および第２金属層を形成するパワーモジュール用基板の製造方法である。   In the present invention, the ceramic substrate and the metal plate having a predetermined thickness are alternately laminated and bonded, and then the metal plate is cut along the plane direction at a midway position in the thickness direction. This is a method for manufacturing a power module substrate in which a first metal layer and a second metal layer having a predetermined thickness are formed on both surfaces of the substrate.

この発明によれば、セラミックス基板の両面に金属板を接合するときに同じ板厚の金属板をセラミックス基板の間に介在させるので、各セラミックス基板の両面で生じる熱伸縮が等しく、接合時の熱の影響による反りを抑制することができる。しかも、セラミックス基板と金属板とを複数層積層するので、その積層体は厚さ方向に大きなブロック状となり、反りが生じにくくなる。そして、この積層体における金属板を厚さ方向に切り分けることにより第１金属層および第２金属層を形成するので、第１金属層および第２金属層の厚さが異なっていても、反りの発生が略抑制されたパワーモジュール用基板を製造することができる。   According to the present invention, when the metal plates are bonded to both surfaces of the ceramic substrate, the metal plates having the same thickness are interposed between the ceramic substrates. Warpage due to the influence of the can be suppressed. In addition, since the ceramic substrate and the metal plate are laminated in a plurality of layers, the laminated body has a large block shape in the thickness direction, and is less likely to warp. Since the first metal layer and the second metal layer are formed by cutting the metal plate in the laminated body in the thickness direction, even if the thicknesses of the first metal layer and the second metal layer are different from each other, A power module substrate in which generation is substantially suppressed can be manufactured.

本発明のパワーモジュール用基板の製造方法は、接合時の熱応力による反りが生じにくいので、前記第１金属層の厚さと前記第２金属層の厚さとが異なる場合にも好適である。   The method for manufacturing a power module substrate according to the present invention is suitable for the case where the thickness of the first metal layer and the thickness of the second metal layer are different because warpage due to thermal stress during bonding hardly occurs.

本発明のパワーモジュール用基板の製造方法によれば、金属板の接合時の熱による反りを抑えることができるので、反りの問題を解消して信頼性の高いパワーモジュール用基板を製造することができる。   According to the method for manufacturing a power module substrate of the present invention, it is possible to suppress warpage due to heat at the time of joining metal plates, and thus it is possible to solve the problem of warpage and manufacture a highly reliable power module substrate. it can.

パワーモジュール用基板を用いたパワーモジュールを示す断面図である。It is sectional drawing which shows the power module using the board | substrate for power modules. 本発明に係るパワーモジュール用基板の製造方法を示す側面図である。It is a side view which shows the manufacturing method of the board | substrate for power modules which concerns on this invention.

以下、本発明に係るパワーモジュール用基板の製造方法について説明する。
まず、パワーモジュール用基板１０は、セラミックス基板２０と、このセラミックス基板２０に接合された放熱層用の第１金属層３０と、セラミックス基板２０に接合された回路層用の第２金属層４０とを備える。 Hereinafter, the manufacturing method of the board | substrate for power modules which concerns on this invention is demonstrated.
First, the power module substrate 10 includes a ceramic substrate 20, a first metal layer 30 for a heat dissipation layer bonded to the ceramic substrate 20, and a second metal layer 40 for a circuit layer bonded to the ceramic substrate 20. Is provided.

このパワーモジュール用基板１０を用いたパワーモジュール１００は、図１に示すように、パワーモジュール用基板１０に半導体チップ等の電子部品１０１およびヒートシンク１０２を取り付けて製造される。パワーモジュール１００において、電子部品１０１は、第２金属層４０からエッチング処理等により形成された回路パターン４１の上に、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ−Ｃｕ系、Ｚｎ−Ａｌ系若しくはＰｂ−Ｓｎ系等のはんだ材１０３によって接合される。電子部品１０１と回路パターン４１の端子部との間は、アルミニウムからなるボンディングワイヤ１０４により接続される。   A power module 100 using the power module substrate 10 is manufactured by attaching an electronic component 101 such as a semiconductor chip and a heat sink 102 to the power module substrate 10 as shown in FIG. In the power module 100, the electronic component 101 is Sn-Cu-based, Sn-Ag-Cu-based, Zn-Al-based, or Pb-Sn on a circuit pattern 41 formed by etching or the like from the second metal layer 40. Joined by a solder material 103 such as a system. The electronic component 101 and the terminal portion of the circuit pattern 41 are connected by a bonding wire 104 made of aluminum.

ヒートシンク１０２は、アルミニウム合金の押し出し成形によって形成され、その長さ方向に沿って冷却水を流通させるための多数の流路１０２ａが形成されている。ヒートシンク１０２は、ろう付、はんだ付、ボルト等によってパワーモジュール用基板１０に接合される。   The heat sink 102 is formed by extrusion molding of an aluminum alloy, and a large number of flow paths 102a are formed along the length direction for circulating cooling water. The heat sink 102 is joined to the power module substrate 10 by brazing, soldering, bolts, or the like.

セラミックス用基板２０は、例えばＡｌＮ（窒化アルミニウム）、Ｓｉ3Ｎ4（窒化珪素）等の窒化物系セラミックス、若しくはＡｌ2Ｏ3（アルミナ）等の酸化物系セラミックスを母材として矩形状に形成されている。放熱層用の第１金属層３０および回路層用の第２金属層４０は、純アルミニウムまたはＪＩＳ１０００番台のアルミニウム合金により形成される。 The ceramic substrate 20 is formed in a rectangular shape using a nitride ceramic such as AlN (aluminum nitride) or Si 3 N 4 (silicon nitride) or an oxide ceramic such as Al 2 O 3 (alumina) as a base material. Has been. The first metal layer 30 for the heat dissipation layer and the second metal layer 40 for the circuit layer are formed of pure aluminum or an aluminum alloy of JIS 1000 series.

パワーモジュール用基板１０において、第１金属層３０および第２金属層４０は、図２に示すように、複数枚のセラミックス基板２０と所定の厚さを有する金属板５０を交互に積層して接合した後、金属板５０を厚さ方向の途中位置で面方向に沿って切断することにより形成される。   In the power module substrate 10, the first metal layer 30 and the second metal layer 40 are joined by alternately laminating a plurality of ceramic substrates 20 and metal plates 50 having a predetermined thickness, as shown in FIG. Then, the metal plate 50 is formed by cutting along the plane direction at a midway position in the thickness direction.

具体的には、まず、金属板５０とセラミックス基板２０との間を、ろう材によりろう付する。たとえば図２に示すように、ろう材を介在させて５枚のセラミックス基板２０と６枚の金属板５０とを交互に積層し、この積層体６０を厚さ方向に加圧および加熱して、各セラミックス基板２０と各金属板５０とをろう付する。ろう材としては、たとえばＡｌ−Ｓｉ系、Ａｌ−Ｇｅ系、Ａｌ−Ｃｕ系、Ａｌ−Ｍｇ系またはＡｌ−Ｍｎ系等を用いることができる。このように、セラミックス基板２０の両面に対して同じ厚さの金属板５０がろう付けされるので、セラミックス基板２０の両面で生じる熱伸縮が等しく、熱の影響による反りを抑制することができる。また、積層体６０は厚さが大きく曲がりにくいので、一層反りが生じにくいものとなっている。   Specifically, first, the metal plate 50 and the ceramic substrate 20 are brazed with a brazing material. For example, as shown in FIG. 2, five ceramic substrates 20 and six metal plates 50 are alternately laminated with a brazing material interposed therebetween, and this laminate 60 is pressed and heated in the thickness direction, Each ceramic substrate 20 and each metal plate 50 are brazed. As the brazing material, for example, Al—Si, Al—Ge, Al—Cu, Al—Mg, or Al—Mn can be used. Thus, since the metal plate 50 of the same thickness is brazed with respect to both surfaces of the ceramic substrate 20, the thermal expansion-contraction produced on both surfaces of the ceramic substrate 20 is equal, and the curvature by the influence of heat can be suppressed. Moreover, since the laminated body 60 is large in thickness and is difficult to bend, it is less likely to warp.

この積層体６０において、セラミックス基板２０に接合された金属板５０を、厚さ方向に分割するように切断する。金属板５０は、第１金属層３０の厚さｔ１、第２金属層４０の厚さｔ２、および切断代の厚さｔ３を合計した厚さＴを有している。したがって、各金属板５０について、一方の面からの距離ｔ１の位置で切断代がｔ３となるように切断することにより、各セラミックス基板２０の表裏面にそれぞれ厚さｔ１の第１金属層３０と厚さｔ２の第２金属層４０とが接合されてなるパワーモジュール用基板１０を形成することができる。   In this laminated body 60, the metal plate 50 bonded to the ceramic substrate 20 is cut so as to be divided in the thickness direction. The metal plate 50 has a thickness T that is the sum of the thickness t1 of the first metal layer 30, the thickness t2 of the second metal layer 40, and the thickness t3 of the cutting allowance. Therefore, by cutting each metal plate 50 so that the cutting allowance is t3 at the position of the distance t1 from one surface, the first metal layer 30 having the thickness t1 is formed on the front and back surfaces of each ceramic substrate 20, respectively. The power module substrate 10 formed by bonding the second metal layer 40 having the thickness t2 can be formed.

このとき、金属板５０の厚さＴや金属板５０の切断位置を変更することにより、任意の厚さを有する第１金属層３０および第２金属層４０を形成することができる。これら第１金属層３０と第２金属層４０とがろう付時に熱伸縮が等しい状態で接合されているため、これら金属層３０，４０の各厚さが異なっていても、パワーモジュール用基板１０はほとんど反ることがない。   At this time, the first metal layer 30 and the second metal layer 40 having any thickness can be formed by changing the thickness T of the metal plate 50 and the cutting position of the metal plate 50. Since the first metal layer 30 and the second metal layer 40 are joined with the same thermal expansion and contraction when brazed, the power module substrate 10 can be used even if the thicknesses of the metal layers 30 and 40 are different. Hardly warps.

パワーモジュール用基板１０において、第１金属層３０の厚さｔ１はたとえば０．６ｍｍ、第２金属層４０の厚さｔ２はたとえば１．６ｍｍである。このような薄い金属板５０を高精度かつ小さい切断代で切断するためには、ダイシングソー、ワイヤソー等、シリコンウェハの切断手段を応用することが好ましい。たとえば、シリコンウェハ切断用のダイシングブレードの切断代の厚さｔ３は一般的には１００μｍ程度である。切断装置の一例として、図２に、複数枚のブレード１１１を備えるダイシングソー１１０を示す。   In the power module substrate 10, the thickness t1 of the first metal layer 30 is 0.6 mm, for example, and the thickness t2 of the second metal layer 40 is 1.6 mm, for example. In order to cut such a thin metal plate 50 with high precision and a small cutting allowance, it is preferable to apply a silicon wafer cutting means such as a dicing saw or a wire saw. For example, the thickness t3 of the cutting allowance of a dicing blade for cutting a silicon wafer is generally about 100 μm. As an example of the cutting device, FIG. 2 shows a dicing saw 110 including a plurality of blades 111.

なお、図２に示すように積層体６０において、複数枚のブレード１１１によって複数の金属板５０を同時に切断して多数（図示例では５個）のパワーモジュール用基板１０を同時に製造する場合、切断終了時にパワーモジュール用基板１０がばらばらに落下しないように、積層体６０における各セラミックス基板２０を確実に保持しておく必要がある。一方、１枚のブレードによって金属板５０を１個ずつ切断し、パワーモジュール用基板１０を１個ずつ製造してもよい。この場合、多数を同時に切断する場合に比較して製造時間が増大するが、簡易な保持構造により積層体６０を保持できるので、製造装置のコスト増大を抑えることができる。   As shown in FIG. 2, in the laminated body 60, when a plurality of (5 in the illustrated example) power module substrates 10 are simultaneously manufactured by simultaneously cutting a plurality of metal plates 50 by a plurality of blades 111, cutting is performed. It is necessary to securely hold each ceramic substrate 20 in the laminated body 60 so that the power module substrate 10 does not fall apart at the end. On the other hand, the metal plates 50 may be cut one by one with one blade, and the power module substrates 10 may be manufactured one by one. In this case, the manufacturing time is increased as compared with the case where a large number are simultaneously cut. However, since the laminate 60 can be held by a simple holding structure, an increase in the cost of the manufacturing apparatus can be suppressed.

このように積層体６０から金属板５０を切断して個別のパワーモジュール用基板１０を得た後、たとえば研磨ブラシ等を用いて各金属層３０，４０のバリ取りを行う。さらに、各金属層３０，４０の表面処理を行い、表面の加工歪みを除去し、平滑化する。表面処理としては、たとえば水酸化ナトリウム５％水溶液に８０秒〜１６０秒浸漬するアルカリエッチングや、硝酸３０％水溶液に２０秒〜４０秒浸漬する酸処理等が可能である。パワーモジュール用基板１０について、バリ取りおよび表面処理を行った後、エッチング等により第２金属層４０から回路パターン４１を形成し、電子部品１０１およびヒートシンク１０２を取り付けることにより、パワーモジュール１００を製造することができる。   Thus, after cutting the metal plate 50 from the laminated body 60 to obtain the individual power module substrate 10, the deburring of the metal layers 30 and 40 is performed using, for example, a polishing brush. Furthermore, the surface treatment of each metal layer 30 and 40 is performed, the surface processing distortion is removed, and it smoothes. As the surface treatment, for example, alkali etching immersed in a 5% aqueous solution of sodium hydroxide for 80 seconds to 160 seconds, acid treatment immersed in a 30% aqueous solution of nitric acid for 20 seconds to 40 seconds, or the like is possible. After the power module substrate 10 is deburred and surface-treated, a circuit pattern 41 is formed from the second metal layer 40 by etching or the like, and the electronic component 101 and the heat sink 102 are attached to manufacture the power module 100. be able to.

以上説明したパワーモジュール用基板の製造方法によれば、セラミックス基板２０の両面においてろう付時の各金属板５０の熱伸縮の差がほとんどないので、金属板５０を適宜位置で切断することにより、厚さの異なる各金属層３０，４０がセラミックス基板２０に接合されてなり、反りなく信頼性の高いパワーモジュール用基板１０を製造することができる。
なお、本発明は前記実施形態の構成のものに限定されるものではなく、細部構成においては、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。 According to the method for manufacturing a power module substrate described above, there is almost no difference in thermal expansion and contraction of each metal plate 50 at the time of brazing on both surfaces of the ceramic substrate 20, so by cutting the metal plate 50 at an appropriate position, The metal layers 30 and 40 having different thicknesses are bonded to the ceramic substrate 20, and the power module substrate 10 having high reliability without warping can be manufactured.
In addition, this invention is not limited to the thing of the structure of the said embodiment, In a detailed structure, it is possible to add a various change in the range which does not deviate from the meaning of this invention.

１０ パワーモジュール用基板
２０ セラミックス基板
３０ 第１金属層
４０ 第２金属層
４１ 回路パターン
５０ 金属板
６０ 積層体
１００ パワーモジュール
１０１ 電子部品
１０２ ヒートシンク
１０２ａ 流路
１０３ はんだ材
１０４ ボンディングワイヤ DESCRIPTION OF SYMBOLS 10 Power module substrate 20 Ceramic substrate 30 1st metal layer 40 2nd metal layer 41 Circuit pattern 50 Metal plate 60 Laminated body 100 Power module 101 Electronic component 102 Heat sink 102a Flow path 103 Solder material 104 Bonding wire

Claims (2)

セラミックス基板と所定の厚さを有する金属板とを交互に積層して接合した後、前記金属板を厚さ方向の途中位置で面方向に沿って切断することにより、前記セラミックス基板の両面にそれぞれ所定厚さの第１金属層および第２金属層を形成することを特徴とするパワーモジュール用基板の製造方法。   After alternately laminating and bonding ceramic substrates and metal plates having a predetermined thickness, the metal plates are cut along the surface direction at intermediate positions in the thickness direction, so that both surfaces of the ceramic substrate are respectively A method of manufacturing a power module substrate, comprising forming a first metal layer and a second metal layer having a predetermined thickness. 前記第１金属層の厚さと前記第２金属層の厚さとが異なることを特徴とする請求項１に記載のパワーモジュール用基板の製造方法。   2. The method of manufacturing a power module substrate according to claim 1, wherein a thickness of the first metal layer is different from a thickness of the second metal layer.
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Publication number Priority date Publication date Assignee Title
JP2014167984A (en) * 2013-02-28 2014-09-11 Mitsubishi Materials Corp Method of manufacturing substrate for power module with heat sink

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