JP2012104219A - Recording medium, reproduction device, reproducing method, recorder and recording method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wobbling method suitable to a high density disk.SOLUTION: In a recording medium in which a track is wobbled and address information is recorded, the address information recorded as a wobble of a groove is configured as a 83-bit address unit formed by a 75-bit data part composed of 15 address blocks in which a 8-bit synchronization part and five bits including a 4-bit address bit are defined as one address block, the address unit has a monotone unit including a groove wobbled by a fixed frequency and a data unit showing 0 or 1 by using MSK modulation, the monotone unit and the data unit are a period of monotone wobble 56 waves, and three address units are included in a recording unit of data to be recorded in a track composed of 498 frames being a unit in which run-in and runout are added to an ECC block.

Description

The present invention relates to a recording medium such as an optical disc, a reproducing apparatus that performs recording / reproducing on the recording medium , a reproducing method, a recording apparatus, and a recording method .

In order to record data on a disc, a means for guiding to form a data track is required. For this purpose, a groove is formed in advance as a pre-groove, and the groove or land (groove and groove is divided into grooves). A section having a cross-section plateau) is used as a data track.
Further, it is necessary to record address information so that data can be recorded at a predetermined position on the data track, but this address information may be recorded by wobbling (meandering) the groove.

That is, a track for recording data is formed in advance as a pregroup, for example, and the side wall of this pregroup is wobbled corresponding to the address information.
In this way, the address can be read from the wobbling information obtained as reflected light information at the time of recording and reproduction. Data can be recorded and reproduced.
By adding address information as a wobbling groove in this way, for example, it becomes unnecessary to provide an address area discretely on a track and record an address as, for example, pit data. Recording capacity can be increased.
The absolute time (address) information expressed by such a wobbling groove is called ATIP (Absolute Time In Pregroove) or ADIP (Adress In Pregroove).

  Representative examples of the optical disk using such a wobbling groove include CD-R (CD-Recordable), CD-RW (CD-ReWritable), DVD-R, CD-RW, and DVD + RW. However, the address addition methods using wobbling grooves are different.

In the case of CD-R and CD-RW, the groove is wobbled based on a signal obtained by FM-modulating address information.
As shown in FIG. 28, the ATIP information embedded in the CD-R / CD-RW wobbling groove is subjected to FM modulation after bi-phase modulation. That is, the ATIP data such as the address is switched by 1 and 0 every predetermined period by bi-phase modulation, and the average number of 1 and 0 becomes 1: 1, and the average frequency of the wobble signal when FM is modulated is 22 .05 kHz.
A groove forming a data track is formed to be wobbled (meandering) based on such an FM modulation signal.

In DVD-RW which is a rewritable disc of a phase change recording method of DVD (Digital Versatile Disc) and DVD-R which is a write-once disc of an organic dye change method, wobbling is performed as a preformat on the disc as shown in FIG. A groove G is formed, and a land prepit LPP is formed in a land L portion between the grooves G.
In this case, the wobbling groove is used for disc rotation control, recording master clock generation, and the like, and the land pre-pit is used for accurate bit position determination and acquisition of various disc information such as pre-addresses. Used.
That is, in this case, the address information itself is recorded not as groove wobbling but as land pre-pits LPP.

DVD + RAM, which is a rewritable disc of the DVD phase change recording method, records information such as addresses by a wobbling groove phase-modulated (PSK) on the disc.
FIG. 30 shows information represented by the phase modulation wobbling of the groove.
Eight wobbles are considered as one ADIP unit. The ADIP unit expresses a sync pattern or “0” data and “1” data by performing phase modulation so that positive wobble PW and negative wobble NW are generated in a predetermined order as each wobble.
The positive wobble PW is a wobble where the leading of the meandering is directed toward the inner circumference of the disk, and the negative wobble NW is a wobble where the leading of the meandering is directed toward the outer circumference of the disk.

FIG. 30A shows a sync pattern (ADIP sync unit). The first 4 wobbles (W0 to W3) are negative wobbles NW, and the latter 4 wobbles (W4 to W7) are positive wobbles PW.
FIG. 30B shows an ADIP data unit that becomes data “0”. The first wobble W0 is a negative wobble NW as a bit sync, and the latter 4 wobbles are 2 wobbles (W4, W5) and 2 wobbles via 3 wobble (W1 to W3) positive wobbles PW. “0” data is expressed as a negative wobble NW of (W6, W7).
FIG. 30C shows an ADIP data unit that is data “1”. The first wobble W0 is a negative wobble NW as a bit sync, and the latter 4 wobbles are 2 wobbles (W6, W7) negative wobbles NW and 2 wobbles via 3 wobble (W1 to W3) positive wobbles PW. “1” data is expressed as a positive wobble PW of (W6, W7).
One channel bit is expressed as these ADIP units, and an address or the like is expressed by a predetermined number of ADIP units.

However, each of these methods has the following drawbacks.
First, in the case of wobbling based on FM modulation data such as CD-R and CD-RW, the wobble crosstalk of adjacent tracks causes a phase change in the FM waveform. For this reason, when the track pitch is narrowed, the address as ATIP data cannot be reproduced satisfactorily. In other words, it is not an appropriate method for improving the recording density by narrowing the track pitch.

  In the method of providing land pre-pits such as DVD-R and DVD-RW, the land pre-pits may leak into the reproduction RF signal, resulting in a data error, and mastering (cutting) in the groove part and the land pre-pit part. It is relatively difficult because of the two-beam mastering.

In the case of wobbling based on PSK data, such as DVD + RW, a high-frequency component possessed by the phase change point of the PSK modulated wave may leak into the reproduction RF signal when the laser spot is detracked, resulting in a fatal error.
In addition, since the change point of PSK phase switching has a very high frequency component, the required band of the wobble signal processing circuit system becomes high.

  In view of these circumstances, the present invention provides a novel recording medium using a novel wobbling method suitable for increasing the capacity as a disk recording medium and improving the recording / reproducing performance, and a reproducing apparatus, reproducing method, recording apparatus, and recording method. The purpose is to provide.

  For this purpose, the recording medium of the present invention is formed with a circular track for recording data as grooves and / or lands in advance, and a wobble in which address information is recorded by wobbling the track. In the recording medium, the address information recorded as the wobble of the groove is a 75-bit address block composed of 15 address blocks each including 5 bits including an 8-bit synchronization portion and 4-bit address bits. It is configured as an 83-bit address unit comprising a data portion, and the address unit includes a monotone unit including a groove wobbled at a predetermined frequency in a predetermined unit, and a data unit indicating 0 or 1 using MSK modulation. The monotone unit and the front The data unit is a monotone wobble 56 wave period, and the address unit is a recording unit of data recorded on the track composed of 498 frames, which is a unit in which run-in and run-out are added to the ECC block. It is assumed that three are included.

The reproducing apparatus of the present invention is a reproducing apparatus for reproducing an address of the recording medium based on a groove formed on the recording medium, and an irradiating means for irradiating the recording medium with laser light, and reflected light from the recording medium. Receiving means for extracting a reflected light signal corresponding to the groove; and a reproducing means for reproducing address information based on the extracted reflected light signal, wherein the groove formed on the recording medium includes: The address information recorded as the wobble is an 83-bit data portion consisting of a 75-bit data portion consisting of 15 address blocks with an 8-bit synchronization portion and 5 bits including a 4-bit address bit as one address block. It is configured as an address unit, and the address unit is a group that is wobbled at a constant frequency in a predetermined unit. A monotone unit including a probe and a data unit indicating 0 or 1 using MSK modulation, the monotone unit and the data unit are in a period of 56 monotone wobbles, and the address unit is ECC It is assumed that three are included for the recording unit of data recorded in the track composed of 498 frames, which are units in which run-in and run-out are added to the block.

The reproducing method of the present invention is a reproducing method in a reproducing apparatus for reproducing the address of the recording medium based on a groove formed on the recording medium, the irradiation procedure for irradiating the recording medium with laser light, and the recording medium An extraction procedure for receiving reflected light from the light source and extracting a reflected light signal corresponding to the groove; and a reproducing procedure for reproducing address information based on the extracted reflected light signal. The address information recorded as the wobble of the groove is a 75-bit data portion consisting of 15 address blocks with one 8-bit synchronization portion and 5 bits including 4-bit address bits as one address block. The address unit is configured as a unit with a constant frequency in a predetermined unit. A monotone unit including a ringed groove, and a data unit indicating 0 or 1 using MSK modulation, the monotone unit and the data unit are in a period of 56 monotone wobbles, and the address unit is , It is assumed that three data recording units are included in the track composed of 498 frames, which are units in which run-in and run-out are added to the ECC block.

The recording apparatus of the present invention is a recording apparatus that reproduces an address of the recording medium based on a groove formed on the recording medium, the irradiation means for irradiating the recording medium with laser light, and the reflection from the recording medium. An extraction unit that receives light and extracts a reflected light signal corresponding to the groove; and a reproducing unit that reproduces address information based on the extracted reflected light signal, and is formed on the recording medium. The address information recorded as the wobble of the groove is composed of an 8-bit synchronization portion and a 75-bit data portion consisting of 15 address blocks with 5 bits including 4 address bits as one address block. It is configured as a bit address unit, and the address unit is a group of wobbled wobbles at a constant frequency in a predetermined unit. A monotone unit including a probe and a data unit indicating 0 or 1 using MSK modulation, the monotone unit and the data unit are in a period of 56 monotone wobbles, and the address unit is ECC It is assumed that three are included for the recording unit of data recorded in the track composed of 498 frames, which are units in which run-in and run-out are added to the block.

The recording method of the present invention is a recording method in a recording apparatus for reproducing the address of the recording medium based on a groove formed on the recording medium, the irradiation procedure for irradiating the recording medium with laser light, and the recording medium An extraction procedure for receiving reflected light from the light source and extracting a reflected light signal corresponding to the groove; and a reproducing procedure for reproducing address information based on the extracted reflected light signal. The address information recorded as the wobble of the groove is a 75-bit data portion consisting of 15 address blocks with one 8-bit synchronization portion and 5 bits including 4-bit address bits as one address block. The address unit is configured as a unit with a constant frequency in a predetermined unit. A monotone unit including a ringed groove and a data unit indicating 0 or 1 using MSK modulation, wherein the monotone unit and the data unit are in a monotone wobble 56 wave period, and the address unit is , It is assumed that three data recording units are included in the track composed of 498 frames, which are units in which run-in and run-out are added to the ECC block.

As will be understood from the above description, the present invention provides the following effects.
In the case of the present invention, the wobbling is formed so that the FSK information bit portion and the single frequency portion based on the single frequency waveform are set as a fixed unit, and the fixed unit is continuous. Therefore, since the portion related to FSK modulation (MSK modulation) is discretely formed, there is little influence due to crosstalk from wobbling of adjacent tracks. This is very suitable for increasing the recording density by narrowing the track pitch. That is, it is suitable as a wobbling method for a large capacity disk.
Further, in the fixed unit, the period length of the single frequency portion is approximately 10 times or more of the period length of the FSK information bit portion, that is, the period of the single frequency portion with respect to the FSK information bit portion. If the length is sufficiently long, the effect of reducing the crosstalk effect becomes more remarkable.
In addition, FSK modulation (MSK modulation) is advantageous in extracting data such as addresses because the S / N is much better than in the case of FM modulation wobbling, for example.

Also, since there is no land portion defect like land pre-pits, there is no influence on the recorded data due to the land defect portion, and there is no high frequency component as in the case of wobbling by PSK, so playback at the time of detracking Even if a wobble component leaks into the signal, an error is unlikely to occur, and the data reproduction capability is also improved.
Further, not having a high frequency component as in PSK may require a narrower band for the wobbling signal processing circuit system, thereby simplifying the circuit configuration.

  In addition, two types of frequencies are used for FSK modulation (MSK modulation), one frequency is the same frequency as the single frequency, and the other frequency is a frequency different from the single frequency. The other frequency is related to the fact that the wave numbers of both frequencies are an even wave and an odd wave in a certain period, so that FSK demodulation processing is facilitated. For example, the other frequency is preferably 1.5 times the one frequency or 1 / 1.5 times the frequency.

  In the FSK information bit part, two wave periods of a single frequency are set as one channel bit as the information bit, and the period length of the FSK information bit part is a period of a single frequency. The fact that the period is an integral multiple also facilitates FSK demodulation processing.

Further, since the integral multiple of the above-mentioned constant unit as wobbling corresponds to the time length of the recording unit of data recorded on the track, the consistency between the recording data and the wobbling can be obtained.
Further, since the channel clock frequency of the data recorded on the track is an integral multiple of the single frequency, a clock used for recording processing can be easily generated based on wobbling.
Further, since the frequency as the single frequency is a frequency in a band between the tracking servo frequency band and the reproduction signal frequency band, extraction / processing can be performed with good separation from each other. In particular, extraction of address information from wobbling can be performed well.

  In the FSK information bit portion, four wave periods of a single frequency are set as one channel bit as an information bit, and the four wave periods include an interval in which four waves of one frequency are used, and the x Since an interval of x wave of the other frequency being doubled and 3 waves of one frequency is formed, and further x = 1.5, etc., MSK demodulation is performed in units of wobble periods of multiple waves. Therefore, the demodulation process can be facilitated and the reliability can be improved.

  The cutting apparatus according to the present invention includes signal generating means for continuously generating a signal of a fixed unit composed of a signal portion obtained by FSK modulation of information bits and a signal portion having a single frequency, thereby providing the above-described one-beam method. The disc recording medium can be cut.

The disk drive apparatus of the present invention can realize a high-performance apparatus by extracting information such as addresses from wobbling in the disk recording medium.
In particular, the wobble reproduction clock can be easily and accurately obtained by the clock reproduction unit that generates the wobble reproduction clock by the PLL based on the signal corresponding to the single frequency portion of the signal related to wobbling. By generating an encode clock for processing recording data based on the wobble reproduction clock and performing spindle servo control, stable operation processing can be performed.
In addition, the PLL can perform a PLL operation based only on a signal corresponding to the single frequency portion of a signal related to wobbling by performing an operation based on a gate signal generated based on sync detection. Speeding up the lock and accurate clock recovery can be performed.
Further, as described above, since the wobbling of the disk recording medium has a single frequency portion sufficiently longer than the FSK information bit portion, it is easy to pull in the PLL using the single frequency portion.

FSK demodulation for a signal corresponding to the FSK information bit part of wobbling can be easily and accurately realized by correlation detection processing or frequency detection processing.
Further, by using both of these processes in combination, it is possible to realize a demodulation process in accordance with the operation state.
That is, at the time of PLL pull-in of the clock recovery unit, by decoding the required information from the logical product of the demodulated data demodulated by the correlation detection circuit and the demodulated data demodulated by the frequency detection circuit, for example, sync information Decoding and the like can be performed accurately, which is suitable for correctly locking the PLL. When the PLL is stable, the required information is decoded from the logical sum of the demodulated data demodulated by the correlation detection circuit and the demodulated data demodulated by the frequency detection circuit, thereby minimizing the lack of decoded data, address, etc. Can be extracted appropriately.

  The correlation detection circuit is configured to detect a correlation between the signal related to the wobbling and a delayed signal obtained by delaying the signal related to the wobbling by the wobble reproduction clock cycle, and the frequency detection circuit includes Address detection and sync detection with a very simple circuit configuration by detecting the number of rising edges or falling edges of the signal related to wobbling existing during one period of the wobble reproduction clock. Is possible.

  The wobbling information decoding means includes an MSK demodulating unit that performs MSK demodulation on the MSK modulated signal to obtain demodulated data, and the MSK demodulating unit demodulates the unit of four frequency periods of the single frequency. By performing the above and obtaining demodulated data, easy and accurate MSK demodulation becomes possible.

  From the above, the present invention is suitable as a large capacity disk recording medium, the recording / reproducing operation performance of the disk drive device is improved, and the wobble processing circuit system can be simplified. .

It is explanatory drawing of the various parameters of the disc of embodiment of this invention. It is explanatory drawing of the wobbling groove structure of the disk of 1st Embodiment. It is explanatory drawing of the wobble unit of the disk of 1st Embodiment. It is explanatory drawing of the FSK part of the wobbling of the disk of 1st Embodiment. It is explanatory drawing of the ECC block structure of the disk of 1st Embodiment. It is explanatory drawing of the RUB structure of the disk of 1st Embodiment. It is explanatory drawing of the address structure of the disk of 1st Embodiment. It is explanatory drawing of the address data of the disk of 1st Embodiment. It is explanatory drawing of the address structure of the disk of 1st Embodiment. It is explanatory drawing of the address data of the disk of 1st Embodiment. It is a block diagram of the cutting apparatus which manufactures the disk of embodiment. 1 is a block diagram of a disk drive device according to an embodiment of the present invention. It is a block diagram of a wobble processing circuit system of the disk drive device of the embodiment. It is a block diagram of a correlation detection circuit of the disk drive device of the embodiment. It is an operation timing waveform diagram of the correlation detection circuit of the embodiment. It is a block diagram of a frequency detection circuit of the disk drive device of the embodiment. It is an operation timing waveform diagram of the frequency detection circuit of the embodiment. It is explanatory drawing of the MSK stream of the wobble of the disk of 2nd Embodiment. It is explanatory drawing of the bit structure by the wobble of 2nd Embodiment. It is explanatory drawing of the address block with respect to RUB of 2nd Embodiment. It is explanatory drawing of the sync part of the disc of 2nd Embodiment. It is explanatory drawing of the sync bit pattern of the disk of 2nd Embodiment. It is explanatory drawing of the data part of the disk of 2nd Embodiment. It is explanatory drawing of the ADIP bit pattern of the disk of 2nd Embodiment. It is a block diagram of the MSK demodulation part corresponding to 2nd Embodiment. It is explanatory drawing of the waveform at the time of the demodulation process in case of L = 4 of 2nd Embodiment. It is explanatory drawing of the waveform at the time of the demodulation process in case of L = 2 of 2nd Embodiment. It is explanatory drawing of FM modulation wobbling. It is explanatory drawing of a land prepit system. It is explanatory drawing of PSK wobbling.

Hereinafter, an optical disk as an embodiment of the present invention will be described, and a cutting apparatus and a disk drive apparatus (recording / reproducing apparatus) corresponding to the optical disk will be described in the following order.
<First Embodiment>
1-1. Physical characteristics of optical disc 1-2. Wobbling method 1-3. Cutting device 1-4. Disk drive device <second embodiment>
2-1. Wobbling method 2-2. Demodulation processing

<First Embodiment>
1-1. First, physical characteristics and wobbling tracks in the disk according to the embodiment will be described.

The optical disk of this example belongs to the category of recently developed disks called, for example, DVR (Data & Video Recording), and particularly has a new wobbling system as the DVR system.
FIG. 1 shows typical parameters of the optical disc of this example. The optical disc of this example is an optical disc that records data by the phase change method, and the disc size is 120 mm in diameter. The disc thickness is 1.2 mm. In other words, these are the same as CD (Compact Disc) type discs and DVD (Digital Versatile Disc) type discs in terms of external appearance.
As with various conventional discs, the area on the disc includes a lead-in area, a program area, and a lead-out area from the inner circumference side. The information area composed of these is an area with a diameter of 44 mm to 117 mm. It becomes.

The laser wavelength for recording / reproducing is 405 nm, and so-called blue laser is used. NA is set to 0.85.
The track pitch is 0.30 μm, the channel bit length is 0.086 μm, and the data bit length is 0.13 μm.
The user data capacity is 22.46 Gbytes.
The average transfer rate of user data is set to 35 Mbit / sec.

Data recording is a groove recording system. That is, a track by a groove (groove) is formed in advance on the disk, and recording is performed on this groove.
As schematically shown in FIG. 2A, an embossed pit EP is preformatted on the innermost side on the disc, and subsequently, a groove GV is formed up to the outermost side. The groove GV is formed in a spiral shape from the inner periphery toward the outer periphery. As another example, the grooves GV can be formed concentrically.

Such a groove GV is formed by wobbling (meandering) to express a physical address.
Although the groove is schematically shown in FIG. 2B, the left and right side walls of the groove GV are wobbled corresponding to the address information and the like. In other words, the signal meanders in correspondence with a signal generated based on an address or the like.
A land L is formed between the groove GV and the adjacent groove GV, and data is recorded in the groove GV as described above. That is, the groove GV becomes a data track. It is also conceivable to record data on the land L using the land L as a data track, or to use both the groove GV and the land L as data tracks.

The present invention has a great feature in a wobbling groove, which will be described later, but this groove is suitable for a high-density and large-capacity disk by being wobbled by a signal obtained by FSK modulation of an address or the like. .
The disk 100 is rotated and driven by the CLV (constant linear velocity) method to record and reproduce data, but the groove GV is also CLV. Therefore, the wobbling wave number of the groove per track increases as it goes to the outer periphery side of the disk.

1-2. Wobbling method Describes the groove wobbling method.
FIG. 3 shows the wobble structure. Groove wobbling is formed such that the wobble unit shown in the figure is a constant unit and is continuous.

The wobble unit includes an FSK part and a single frequency part.
The single frequency portion is a section using only a specific wobble frequency fw1, that is, in this section, the wobbling of the groove is meandered at a fixed period corresponding to the frequency fw1. In this single frequency portion, for example, a wobble with a frequency fw1 is a section in which 65 waves are continuous. This single frequency wobble of frequency fw1 is also referred to as monotone wobble.

On the other hand, the FSK part is a part where a wobble in which ADIP information is FSK modulated using two frequencies of the same frequency fw1 as the monotone wobble and the other frequency fw2.
The period length of this FSK portion corresponds to a 6-wobble length of monotone wobble.
Note that the single frequency part is a period of 65 monotone wobbles and the FSK part is a period of 6 monotone wobbles. For example, the single frequency part is a period of 60 monotone wobbles. Other examples are possible.

However, the fact that the single frequency part is sufficiently longer than the FSK part is effective for the effects to be described later, that is, for reducing the influence of crosstalk and facilitating / accelerating the PLL lock for wobble processing.
For example, it is preferable that the single frequency portion has a period length approximately 10 times or more that of the FSK portion. Therefore, when the FSK part is set to a period of 6 monotone wobbles, the single frequency part is preferably set to a period of 60 or more monotone wobbles. However, this does not mean that it is impossible to set the single frequency part to 59 waves or less, and actually, it may be determined in consideration of various conditions such as an allowable range such as crosstalk and PLL lock time. Is.

One FSK portion that is a period of 6 monotone wobbles represents one information bit as ADIP data.
Then, as shown in the figure, an address or the like as ADIP data is expressed from each information bit from ADIP unit 0 to ADIP unit N as discrete FSK units via a single frequency unit.

The frequency fw1 of the monotone wobble is set to, for example, 478 KHz or 957 KHz according to an address structure as ADIP data described later.
On the other hand, another frequency fw2 used for FSK modulation is, for example, 1.5 times the frequency fw1. That is, the frequency fw2 is set to 717 KHz or 1435.5 KHz.
However, the frequencies fw1 and fw2 are not limited to these values. For example, the frequency fw2 is preferably 1 / 1.5 times the frequency fw1. Furthermore, it is preferable that the relationship between the frequency fw1 and the frequency fw2 is such that the wave numbers of both frequencies are an even wave and an odd wave in a certain period. As described above, when the frequency fw2 is 1.5 times the frequency fw1, the six wave periods of the frequency fw1 correspond to the nine wave periods of the frequency fw2, satisfying the relationship between the even wave and the odd wave. Yes.
When such a condition is satisfied, simplification of FSK demodulation processing in the disk drive device described later is realized.

  The information bits expressed by the FSK unit composed of wobbles that are FSK modulated using the frequencies fw1 and fw2 will be described with reference to FIG. In the following description, it is assumed that the frequency fw1: fw2 has a relationship of 1: 1.5.

In the FSK part, which is a monotone wobble 6 wave period, the monotone wobble 2 wave period is one channel bit. Therefore, in one FSK part (one ADIP unit), one information bit is formed by three channel bits. Is done.
The FSK modulation is performed such that the frequency fw1 is the channel bit “0” and the frequency fw2 is the channel bit “1”. That is, in the period of two monotone wobbles with frequency fw1, two wobbles with frequency fw1 are “0” and three wobbles with frequency fw2 are “1”.

Information bits such as cluster sync, secondary sync, data “0”, and data “1” are expressed by such three channel bits of the FSK section.
With three channel bits, “1”, “1”, and “1” are cluster syncs. That is, in this case, as shown in the figure, wobbles (9 waves) having a frequency fw2 are continuous during a period of 6 monotone wobbles.
With three channel bits, “1”, “1”, and “0” are secondary syncs. In this case, six wobbles of the frequency fw2 are continuous in the period of four monotone wobbles, and the period of the subsequent two monotone wobbles is two waves of the frequency fw1.
With three channel bits, “1”, “0”, “0” becomes data “0”. In this case, three wobbles of the frequency fw2 are continuous during the period of two monotone wobbles, and the period of the subsequent four monotone wobbles is four of the frequency fw1.
With three channel bits, “1”, “0”, “1” becomes data “1”. In this case, three wobbles of the frequency fw2 continue in the period of the first two monotone wobbles, the period of the subsequent two monotone wobbles becomes two of the frequency fw1, and the wobble of the frequency fw2 in the last two monotone wobbles 3 consecutive waves.

  As described above, one information bit is expressed by one FSK unit, that is, one ADIP unit shown in FIG. 3, and the information bits of the ADIP unit are collected to form address information. As will be described later with reference to FIGS. 7 and 9, address information representing one address on the disk is, for example, 98 bits. In this case, 98 ADIP units partially arranged as a wobbling groove are collected. Address information is formed.

In the case of this example, an integral multiple of the wobble unit, which is a constant unit of wobbling, corresponds to the time length of the recording unit of data recorded on the track. The data recording unit is a unit called RUB (Recording Unit Block), and an integer number of addresses are included in one RUB. Hereinafter, an example in which one address is put in one RUB and an example in which two addresses are put in one RUB will be described.
As described above, the address is information arranged in 98 ADIP units. Therefore, when one address is put in one RUB, a section of 98 wobble units is a section in which data is recorded as one RUB. On the other hand, when two addresses are put in one RUB, a section of 196 wobble units corresponds to a section in which data is recorded as one RUB.

First, in order to explain the RUB, which is a unit of data to be recorded, the ECC block structure of the recorded data will be described with reference to FIG.
One ECC block is a unit called a cluster and is one block in which an error correction code is added to recorded data. However, as shown in FIG. 5, the ECC block is 1932T (in this case, T is data). It is composed of 495 rows of recording frames (channel clock period). This is a 64K byte block. For example, data and parity are arranged as illustrated.

1932T corresponds to 28 waves (when fw1 = 957 KHz) or 14 waves (when fw1 = 478 KHz) of a monotone wobble having a frequency fw1.
That is, 69T (in the case of fw1 = 957 KHz) or 138T (in the case of fw1 = 478 KHz) or one monotone wobble period of the frequency fw1 with respect to the data channel clock period T.
The data channel clock frequency is 66.033 MHz, which corresponds to 957 KHz × 69 or 478 KHz × 138.
In other words, the channel clock frequency of the data is an integral multiple of the monotone wobble frequency, and this easily generates the encode clock for the data recording process from the wobble clock reproduced by the PLL from the monotone wobble of the wobbling groove It means you can do it.

A block in which run-in and run-out are added to the ECC block of FIG. 5 is a RUB as shown in FIG.
In the RUB, a guard GD and a preamble PrA are added as a 1932T run-in at the beginning of the ECC block, and a postamble PoA and a guard GD are added as a 1932T run-out at the end.
Therefore, a 1932T × 497 row block is formed, and this becomes one writing unit of data.

One or two pieces of address information correspond to such RUB as ADIP information.
First, an example in which one address corresponds to one RUB will be described with reference to FIGS.
When one address corresponds to one RUB, the monotone wobble frequency fw1 = 478 kHz. One wobble cycle corresponds to 138T.
In this case, since one recording frame 1932T of RUB corresponds to a 14 wobble period, as shown in FIG. 7A, one RUB corresponds to 14 × 497 = 6958 monotone wobble period.
When there is one address per 1 RUB, this 6958 monotone wobble period is set as one address (ADIP) block.
Since the address is formed by a block of 98 bits as described above, 98 wobble units are arranged in this 6958 monotone wobble period as shown in FIG. 7B. One wobble unit has a length of 71 monotone wobble periods.
That is, one wobble unit is formed from the FSK portion of the 6 monotone wobble period serving as the ADIP unit and the 65 monotone wobble.

As shown in FIG. 8, each bit is assigned to 98-bit address information formed by collecting one information bit from 98 ADIP units, that is, the information bits described in FIG.
The first bit is sync information, which corresponds to the cluster sync.
The subsequent 9 bits are used as auxiliary information bits.
The subsequent 24 bits (3 bytes) are used as the cluster address value.
The next 40 bits (5 bytes) are used as auxiliary information bits, and the last 24 bits (3 bytes) are used as ECC for this address information.

An example in which two addresses correspond to one RUB is shown in FIGS.
When two addresses correspond to one RUB, the monotone wobble frequency fw1 = 957 KHz. One wobble period corresponds to 69T.
In this case, since one recording frame 1932T of RUB corresponds to 28 wobble periods, as shown in FIG. 9A, one RUB corresponds to 28 × 497 = 13916 monotone wobble period.
When there are two addresses in one RUB, a 6958 monotone wobble period, which is a half period of one RUB, is set as one address (ADIP) block.
Also in this case, since the address is formed by a block of 98 bits, 98 wobble units are arranged in a 6958 monotone wobble period of 1/2 RUB as shown in FIG. 9B. One wobble unit has a length of 71 monotone wobble periods.
Accordingly, as in the case of FIG. 7 described above, one wobble unit is formed from the FSK portion of the 6 monotone wobble period serving as the ADIP unit and the 65 monotone wobble.

Each bit is assigned to 98-bit address information formed by collecting one information bit from each of 98 ADIP units as shown in FIG.
The first 1 bit is the sync information, and this is the cluster sync for the ½ cluster.
The subsequent 9 bits are used as auxiliary information bits.
The subsequent 24 bits (3 bytes) are used as the address value of the ½ cluster.
The next 40 bits (5 bytes) are used as auxiliary information bits, and the last 24 bits (3 bytes) are used as ECC for this address information.

  The wobbling method of this example has been described above. To summarize, the wobbling method of this example has the following various characteristics.

  The wobbling is formed so that the wobble unit is continuous with the FSK portion based on the waveform obtained by FSK modulation of the information bits and the single frequency portion based on the waveform of the single frequency fw1 as a constant unit as the wobble unit. Yes. That is, the FSK part in which the actual information bits are embedded partially exists on the wobbled track (groove). The partial presence of the FSK portion can significantly reduce the adverse effects of crosstalk even when the track pitch is narrow.

Two types of frequencies fw1 and fw2 are used for the FSK modulation of the FSK section, and the frequency fw1 is the same frequency as the monotone wobble frequency. As described above, the frequency fw2 is, for example, 1.5 times the frequency fw1, so that the relationship between the frequency fw1 and the frequency fw2 is such that the wave numbers of both frequencies are even and odd in a certain period. It is supposed to be a wave.
In the FSK section, two wave periods of monotone wobble are set as one channel bit constituting an information bit.
The period length of the FSK portion is set to 6 wave periods of monotone wobble, that is, a period that is an integral multiple of the monotone wobble period.
These realize facilitation of FSK demodulation processing.

  In the wobble unit, the period length of the single frequency part is approximately 10 times or more of the period length of the FSK part. As described above, since the single frequency portion is sufficiently longer than the FSK portion, the crosstalk reduction effect can be promoted.

Further, as a relationship between wobbling and recording data, an integral multiple of a wobble unit which is a fixed unit corresponds to a time length of RUB which is a recording unit of data recorded on a track.
Further, an integer number, for example, 1 or 2 addresses are arranged for one RUB as ADIP information.
As a result, consistency between the wobbling groove and the recording data is achieved.
Further, the channel clock frequency of the data recorded on the track is an integral multiple of the monotone wobble frequency fw1. Therefore, the encode clock for recording data processing can be easily generated by dividing the wobble clock generated based on the wobbling.

  Incidentally, as described above, the frequency fw1 of the monotone wobble is, for example, 478 KHz or 957 KHz, which is a frequency in a band between the tracking servo frequency band (near 10 KHz) and the reproduction signal frequency band (several MHz or more). . This means that in the disk drive device described later, there is no interference with the servo signal and the reproduction signal, and ADIP information expressed by wobbling can be extracted with good separation.

The above FSK modulation is MSK modulation (Minimum Shift Keying), which is a kind of FSK modulation.
In FSK, a modulation index H is defined. When the two frequencies used are f1 and f2, the modulation index H = | f1-f2 | / fb. Here, fb is the transmission speed of the modulated signal. Usually, 0.5 ≦ H ≦ 1.0.
FSK with a modulation index H = 0.5 is called MSK.

In this example, in the FSK section, the phase is continuous at the switching point between the frequency fw1 and the frequency fw2.
As a result, there is no high frequency component as in the case of wobbling by PSK.

1-3. Cutting Device Next, a cutting device for manufacturing the above-described wobbling type disc will be described.
The disc manufacturing process is roughly divided into a so-called master process (mastering process) and a disc forming process (replication process). The master process is a process until the completion of a metal master (stamper) used in the disc making process, and the disc making process is a process for mass-producing an optical disc as a duplicate using the stamper.

Specifically, in the master process, so-called cutting is performed in which a photoresist is applied to a polished glass substrate, and pits and grooves are formed on the photosensitive film by exposure with a laser beam.
In the case of this example, pit cutting is performed at a portion corresponding to the embossed area on the innermost peripheral side of the disc, and wobbling groove cutting is performed at a portion corresponding to the groove area.

Pit data in the emboss area is prepared in a preparation process called premastering.
When the cutting is completed, after performing a predetermined process such as development, information is transferred onto the metal surface by, for example, electroforming, and a stamper necessary for copying the disk is created.
Next, using this stamper, the information is transferred onto a resin substrate by, for example, an injection method, and after a reflective film is formed thereon, processing such as processing into a required disk form is performed to obtain a final product. Complete.

  For example, as shown in FIG. 11, the cutting device records an input data by an optical unit 70 that performs cutting by irradiating a laser beam onto a glass substrate 71 that has been subjected to photoresist, a drive unit 80 that rotationally drives the glass substrate 71, and the like. A signal processing unit 60 that converts the data into data and controls the optical unit 70 and the driving unit 80 is configured.

  The optical unit 70 includes a laser light source 72 made of, for example, a He—Cd laser, and an acousto-optic light modulator 73 (AOM) that modulates (on / off) the emitted light from the laser light source 72 based on recording data. And an acousto-optic type optical deflector 74 (AOD) for deflecting light emitted from the laser light source 72 based on the wobble generation signal, a prism 75 for bending the optical axis of the modulated beam from the optical deflector 74, and a prism An objective lens 76 for condensing the modulated beam reflected at 75 and irradiating the photoresist surface of the glass substrate 71 is provided.

  The drive unit 80 also includes a motor 81 that rotationally drives the glass substrate 71, an FG 82 that generates an FG pulse for detecting the rotational speed of the motor 81, and a slide motor that slides the glass substrate 71 in the radial direction. 83 and a servo controller 84 for controlling the rotation speed of the motor 81 and the slide motor 83, the tracking of the objective lens 76, and the like.

The signal processing unit 60 adds, for example, an error correction code to source data from a computer to form input data, and performs predetermined arithmetic processing on the input data from the formatting circuit 61. It has a logic operation circuit 62 for forming recording data.
The signal processing unit 60 includes a data generation unit 63, a parallel / serial conversion unit 64, and a sine conversion unit 66 as parts for generating a wobble generation signal for wobbling the groove.
Further, the signal processing unit 60 switches the signal from the logic operation circuit 62 and the signal from the sine conversion unit 66 and outputs the signal as one continuous signal, and the optical modulator based on the signal from the synthesis circuit 65. 73 and a drive circuit 68 for driving the optical deflector 74.
Further, the signal processing unit 60 is a system for controlling the servo controller 84, the data generating unit 63 and the like based on the clock generator 91 and the supplied master clock MCK to supply the master clock MCK to the logic operation circuit 62 and the like. A controller 67 is included. The master clock MCK from the clock generation unit 91 is divided by 1 / N by the frequency divider 92 to become the bit clock bitCK, and the bit clock bitCK is further divided by 1/8 by the frequency divider 93 to be the byte clock byteCK. , Supplied to the necessary circuit system.

In this cutting apparatus, at the time of cutting, the servo controller 84 rotates the glass substrate 71 at a constant linear speed by the motor 81 and rotates the glass substrate 71 by the slide motor 83 at a predetermined track pitch. Slide so that a spiral track is formed.
At the same time, the light emitted from the laser light source 72 is converted into a modulated beam based on the recording signal via the optical modulator 73 and the optical deflector 74 and is irradiated from the objective lens 76 onto the photoresist surface of the glass substrate 71. The photoresist is exposed based on data and grooves.

When cutting the embossed area on the innermost periphery of the disc, input data to which an error correction code or the like has been added by the formatting circuit 61, that is, data recorded in the embossed area such as control data is sent to the logical operation circuit 62. It is supplied and formed as recording data.
Then, at the cutting timing of the emboss area, this recording data is supplied to the driving circuit 68 via the synthesis circuit 65, and the driving circuit 68 sets the optical modulator 73 at the bit timing at which pits should be formed according to the recording data. The optical modulator 73 is driven and controlled to be turned off at a bit timing that does not form a pit.
By such an operation, an exposure portion corresponding to the embossed pit is formed on the glass substrate 41.

At the cutting timing of the groove area, the system controller 67 performs control to sequentially output data corresponding to the FSK unit and the single frequency unit from the data generation unit 63.
For example, the data generating unit 63 continuously outputs “0” data during a period corresponding to the single frequency unit based on the byte clock byteCK. In a period corresponding to the FSK section, necessary data is generated corresponding to each ADIP unit constituting the address block described above. In other words, the channel bit data corresponding to the cluster sync, secondary sync, data “0”, and data “1” is output at a timing corresponding to each FSK period. Of course, as described above, the data “0” and the data “1” are output in the required order so as to become the cluster address value and the data constituting the additional information when collected from each ADIP unit.

The data output from the data generator 63 is supplied to the sine converter 66 as a serial data stream corresponding to the bit clock bitCK by the parallel / serial converter 64.
The sine conversion unit 66 selects and outputs a sine wave having a predetermined frequency according to the supplied data by so-called table lookup processing. Therefore, a sine wave having the frequency fw1 is continuously output in a period corresponding to the single frequency portion. In the period corresponding to the FSK part, the frequency fw2 or the frequency shown in FIG. 4 according to the contents expressed by the FSK part, that is, the cluster sync, the secondary sync, the data “0”, or the data “1”. One of the waveforms formed by fw1 and fw2 is output.

The synthesizing circuit 65 supplies a signal output from the sine conversion unit 66, that is, a single frequency or FSK modulated signal having the frequencies fw1 and fw2 to the driving circuit 68 as a wobbling generation signal.
The drive circuit 68 continuously controls the optical modulator 73 to be in an on state in order to form a groove. Further, the optical deflector 74 is driven according to the wobbling generation signal. As a result, the laser beam is meandered, that is, a portion exposed as a groove is wobbled.

By such an operation, an exposure portion corresponding to the wobbling groove is formed on the glass substrate 41 based on the format.
Thereafter, development, electroforming, and the like are performed to produce a stamper, and the above-described disk is produced using the stamper.

1-4. Disc Drive Device Next, a disc drive device capable of recording / reproducing corresponding to the above disc will be described.
FIG. 12 shows the configuration of the disk drive device 30.
In FIG. 12, a disk 100 is the disk of this example described above.

  The disc 100 is loaded on the turntable 7 and is rotationally driven by the spindle motor 6 at a constant linear velocity (CLV) during the recording / reproducing operation. Then, the pit data recorded on the track on the disk 100 and the ADIP information embedded as the wobbling of the track are read by the optical pickup 1. A pit recorded as data on a track formed as a groove is a so-called phase change pit, and an emboss pit in an emboss pit area on the inner periphery side of the disc.

In the pickup 1, a laser diode 4 serving as a laser light source, a photodetector 5 for detecting reflected light, an objective lens 2 serving as an output end of the laser light, and a laser recording light are irradiated onto the disk recording surface via the objective lens 2. In addition, an optical system (not shown) for guiding the reflected light to the photodetector 5 is formed.
A monitor detector 22 for receiving a part of the output light from the laser diode 4 is also provided.
The laser diode 4 outputs a so-called blue laser having a wavelength of 405 nm. The NA by the optical system is 0.85.

The objective lens 2 is held by a biaxial mechanism 3 so as to be movable in the tracking direction and the focus direction.
The entire pickup 1 can be moved in the radial direction of the disk by a thread mechanism 8.
The laser diode 4 in the pickup 1 is driven to emit laser light by a drive signal (drive current) from a laser driver 18.

Reflected light information from the disk 90 is detected by the photodetector 5, converted into an electrical signal corresponding to the amount of received light, and supplied to the matrix circuit 9.
The matrix circuit 9 includes a current-voltage conversion circuit, a matrix calculation / amplification circuit, and the like corresponding to output currents from a plurality of light receiving elements as the photodetector 5, and generates necessary signals by matrix calculation processing.
For example, a high frequency signal (reproduction data signal) corresponding to reproduction data, a focus error signal FE for servo control, a tracking error signal TE, and the like are generated.
Further, a push-pull signal P / P is generated as a signal related to groove wobbling, that is, a signal for detecting wobbling.

  The reproduction data signal output from the matrix circuit 9 is supplied to the binarization circuit 11, the focus error signal FE and the tracking error signal TE are supplied to the servo circuit 14, and the push-pull signal P / P is supplied to the FSK demodulator 24. .

  The push-pull signal P / P output as a signal related to the wobbling of the groove is processed by the wobbling processing circuit system of the FSK demodulator 24, the wobble PLL 25, and the address decoder 26, and an address as ADIP information is extracted. A wobble clock WCK used for decoding ADIP information is supplied to other required circuit systems. The wobbling processing circuit system will be described in detail later.

The reproduction data signal obtained by the matrix circuit 9 is binarized by the binarization circuit 11 and then supplied to the encoding / decoding unit 12.
The encoding / decoding unit 12 includes a functional part as a decoder during reproduction and a functional part as an encoder during recording.
At the time of reproduction, as decoding processing, processing such as run length limited code demodulation processing, error correction processing, deinterleaving, and the like is performed to obtain reproduction data.

Further, at the time of reproduction, the encoding / decoding unit 12 generates a reproduction clock synchronized with the reproduction data signal by the PLL process, and executes the decoding process based on the reproduction clock.
At the time of reproduction, the encoding / decoding unit 12 accumulates the data decoded as described above in the buffer memory 20.
As playback output from the disk drive device 30, data buffered in the buffer memory 20 is read out and transferred and output.

The interface unit 13 is connected to an external host computer 80 and communicates recording data, reproduction data, various commands, and the like with the host computer 80.
At the time of reproduction, the reproduction data decoded and stored in the buffer memory 20 is transferred and output to the host computer 80 via the interface unit 13.
Note that a read command, a write command, and other signals from the host computer 80 are supplied to the system controller 10 via the interface unit 13.

On the other hand, at the time of recording, recording data is transferred from the host computer 80. The recording data is sent from the interface unit 13 to the buffer memory 20 and buffered.
In this case, the encoding / decoding unit 12 performs error correction code addition, interleaving, addition of a subcode, etc., encoding as recording data on the disc 100, and the like as encoding processing of the buffered recording data.

An encode clock serving as a reference clock for encoding at the time of recording is generated by the encode clock generator 27, and the encode / decode unit 12 performs an encode process using this encode clock.
The encode clock generator 27 generates an encode clock from the wobble clock WCK supplied from the wobble PLL 25. As described above, the channel clock of the recording data is, for example, 66.033 KHz, which is an integral multiple of the monotone wobble frequency fw1. The wobble PLL 25 generates a monotone wobble frequency fw clock (or an integer multiple thereof) as the wobble clock WCK. Therefore, the encode clock generator 27 divides the wobble clock WCK to easily generate an encode clock. be able to.

The recording data generated by the encoding process in the encoding / decoding unit 12 is subjected to a waveform adjustment process by the write strategy 21 and then sent to the laser driver 18 as a laser drive pulse (write data WDATA).
The write strategy 21 performs recording compensation, that is, fine adjustment of the optimum recording power and adjustment of the laser drive pulse waveform with respect to the characteristics of the recording layer, the spot shape of the laser beam, the recording linear velocity, and the like.

  The laser driver 18 applies a laser drive pulse supplied as write data WDATA to the laser diode 4 to perform laser emission driving. As a result, pits (phase change pits) corresponding to the recording data are formed on the disk 90.

  The APC circuit (Auto Power Control) 19 is a circuit unit that controls the laser output power to be constant regardless of temperature or the like while monitoring the laser output power by the output of the monitor detector 22. The target value of the laser output is given from the system controller 10, and the laser driver 18 is controlled so that the laser output level becomes the target value.

The servo circuit 14 generates various servo drive signals for focus, tracking, and sled from the focus error signal FE and tracking error signal TE from the matrix circuit 9 and executes the servo operation.
That is, the focus drive signal FD and the tracking drive signal TD are generated according to the focus error signal FE and the tracking error signal TE and supplied to the biaxial driver 16. The biaxial driver 16 drives the focus coil and tracking coil of the biaxial mechanism 3 in the pickup 1. As a result, a tracking servo loop and a focus servo loop are formed by the pickup 1, the matrix circuit 9, the servo processor 14, the biaxial driver 16, and the biaxial mechanism 3.

  Further, in response to a track jump command from the system controller 10, the tracking servo loop is turned off and a jump drive signal is output to the biaxial driver 16 to execute a track jump operation.

  The servo processor 14 generates a thread drive signal based on a thread error signal obtained as a low frequency component of the tracking error signal TE, access execution control from the system controller 10, and the like, and supplies the thread driver signal to the thread driver 15. The thread driver 15 drives the thread mechanism 8 according to the thread drive signal. Although not shown, the thread mechanism 8 has a mechanism including a main shaft that holds the pickup 1, a thread motor, a transmission gear, and the like, and the thread driver 15 drives the thread motor 8 according to a thread drive signal, thereby 1 required slide movement is performed.

The spindle servo circuit 23 performs control to rotate the spindle motor 6 at CLV.
The spindle servo circuit 23 obtains the current rotation speed information of the spindle motor 6 from the wobble clock WCK generated by the wobble PLL, and compares this with predetermined CLV reference speed information, thereby generating a spindle error signal SPE. .
At the time of data reproduction, the reproduction clock (clock serving as a reference for decoding processing) generated by the PLL in the encoding / decoding unit 21 becomes the current rotational speed information of the spindle motor 6 and is used as a predetermined CLV. The spindle error signal SPE can also be generated by comparing with the reference speed information.
The spindle servo circuit 23 supplies the spindle motor driver 17 with a spindle drive signal generated according to the spindle error signal SPE. The spindle motor driver 17 applies, for example, a three-phase drive signal to the spindle motor 6 according to the spindle drive signal, and causes the spindle motor 6 to perform CLV rotation.
Further, the spindle servo circuit 23 generates a spindle drive signal in accordance with the spindle kick / brake control signal from the system controller 10 and executes operations such as starting, stopping, accelerating, and decelerating the spindle motor 6 by the spindle motor driver 17. .

Various operations of the servo system and the recording / reproducing system as described above are controlled by a system controller 10 formed by a microcomputer.
The system controller 10 executes various processes in accordance with commands from the host computer 80.
For example, when a read command for requesting transfer of certain data recorded on the disk 100 is supplied from the host computer 80, seek operation control is first performed for the instructed address. That is, a command is issued to the servo circuit 14 to cause the pickup 1 to access the address specified by the seek command.
Thereafter, operation control necessary for transferring the data in the designated data section to the host computer 80 is performed. That is, the requested data is transferred by reading / decoding / buffering data from the disk 100.

When a write command (write command) is issued from the host computer 80, the system controller 10 first moves the pickup 1 to the address to be written. Then, the encoding / decoding unit 12 causes the encoding process to be performed on the data transferred from the host computer 80 as described above.
Then, recording is executed by supplying the write data WDATA from the write strategy 21 to the laser driver 18 as described above.

In the example of FIG. 12, the disk drive device 30 connected to the host computer 80 is used. However, the disk drive device of the present invention may not be connected to the host computer 80 or the like. In that case, an operation unit and a display unit are provided, and the configuration of the interface portion for data input / output is different from that in FIG. That is, it is only necessary that recording and reproduction are performed in accordance with a user operation and a terminal unit for inputting / outputting various data is formed.
Of course, there are various other configuration examples. For example, examples of a recording-only device and a reproduction-only device are also possible.

A wobbling processing circuit system in the disk drive device having the above configuration will be described.
FIG. 13 shows the configuration of the FSK demodulator 24, the wobble PLL 25, and the address decoder 26, which are a wobbling processing circuit system.
The FSK demodulator 24 includes a band pass filter 31, a comparator 32, a correlation detection circuit 33, a frequency detection circuit 34, a discrimination circuit 35, a sync detection circuit 36, and a gate signal generation circuit 37.

The push-pull signal P / P supplied as a signal related to wobbling from the matrix circuit 9 is input to the band pass filter 31 of the FSK demodulator 24.
The band pass filter 31 has a band characteristic that allows two frequencies to pass. That is, the two frequencies fw1 and fw2 used in the single frequency unit and the FSK unit described above are passed.
The signal components of the frequencies fw1 and fw2 that have passed through the bandpass filter 31 are binarized by the comparator 32.
The binarized push-pull signal P / P is supplied to the wobble PLL 25, the correlation detection circuit 33, and the frequency detection circuit 34.

The wobble PLL 25 is configured as a PLL that performs phase comparison on the binarized push-pull signal P / P, and generates a wobble clock WCK synchronized with the push-pull signal P / P. However, the push-pull signal P / P in the period corresponding to the FSK part of the wobble unit is masked by the gate signal GATE from the gate signal generation circuit 37 described later, and thereby the push-pull signal corresponding to the monotone wobble of the single frequency part. Locking is performed on P / P.
Therefore, the wobble clock WCK has a frequency fw1 (or an integer ratio thereof).
As described above, in the wobble unit, the single frequency portion has a sufficiently long period, for example, 10 times or more that of the FSK portion. For this reason, PLL pull-in can be easily realized.
Further, since the wobble PLL 25 compares the phase of only the monotone wobble having the frequency fw1 based on the gate signal GATE, the residual jitter of the generated wobble clock WCK is significantly reduced.

The generated wobble clock WCK is supplied to each circuit in the FSK demodulator 24 and the address decoder 26 and used for FSK demodulation and ADIP information decoding processing. Also, as described above with reference to FIG. 12, the wobble clock WCK is also supplied to the encode clock generator 27 and the spindle servo circuit 23 and used as described above.
In this case, as described above, the wobble clock WCK has good accuracy with little residual jitter, so that the accuracy of the encoding clock is improved and the stability of the recording operation is increased, and the stability of the spindle servo control is also improved. improves.

  The correlation detection circuit 33 and the frequency detection circuit 34 are both circuits that demodulate the channel data embedded as the FSK part of the wobble unit. Therefore, at least one of the FSK demodulating units 24 only needs to be provided, but in this example, by providing both the correlation detection circuit 33 and the frequency detection circuit 34, the effects described later are produced. is there.

The correlation detection circuit 33 performs FSK demodulation by detecting a correlation over two cycles of the wobble clock WCK, and demodulates channel data.
The frequency detection circuit 34 performs FSK demodulation by counting edges in one cycle of the wobble clock WCK, and demodulates channel data.
The configurations and operations of the correlation detection circuit 33 and the frequency detection circuit 34 will be described later. From each circuit, the channel bit data for the FSK-modulated wobbling, that is, the channel in units of two monotone wobbles shown in FIG. “0” and “1” as bits are extracted and supplied to the determination circuit 35.

The discriminating circuit 35 performs AND (logical product) or OR (logical sum) on the channel bit values supplied from both the correlation detection circuit 33 and the frequency detection circuit 34, and sets the channel bit value as the FSK demodulated channel bit value. To do.
The determination circuit 35 outputs the obtained channel bit value to the sync detection circuit 36.
The sync detection circuit 36 detects a sync based on the periodicity of the supplied channel bit value.
As shown in FIG. 4, the cluster sync has channel bit values “1”, “1”, and “1”. Further, as can be seen from FIG. 4, in the FSK portion of 3 channel bits, the first channel bit is always “1”. On the other hand, the period corresponding to the single frequency portion is always “0” as the channel bit value demodulated by FSK.
Therefore, the first “1” after the channel bit value “0” is continuous becomes the head of the FSK portion, and the period in which this “1” is obtained corresponds to the period of the wobble unit. By detecting such periodicity, the period of each wobble unit can be grasped, and if “1”, “1”, “1” are detected in succession for 3 channel bits, the wobble unit becomes a cluster. It can be determined that the sync is the head wobble unit of 98 wobble units constituting one ADIP information.
The sync detection circuit 36 detects the sync timing in this way, and supplies the sync signal SY to the gate signal generation circuit 37 and the address decoder 26.

  The gate signal generation circuit 37 generates a gate signal GATE based on the sync signal SY. That is, since the cycle of the wobble unit is known from the timing of the sync signal SY, the period of the FSK portion in the wobble unit can be found by, for example, performing the clock count of the frequency fw1 based on the sync signal SY. As a result, the gate signal GATE for masking the period of the FSK portion is generated, and the phase comparison operation of the wobble PLL 25 is controlled.

The discrimination circuit 35 is described as taking AND (logical product) or OR (logical sum) for the channel bit values supplied from both the correlation detection circuit 33 and the frequency detection circuit 34. An AND process is performed during a period until the lock-in of the wobble PLL 25 performed using the detection and the gate signal GATE based on the detection.
By taking the AND of the channel bit value supplied from both the correlation detection circuit 33 and the frequency detection circuit 34, the reliability of the channel bit value is improved, thereby improving the sync detection accuracy and reducing the erroneous sync detection. it can.
On the other hand, after performing the PLL pull-in based on the sync detection, the sync can be guarded based on the periodicity. Therefore, the AND process should be switched to the OR process. In particular, by taking OR on the channel bit values supplied from both the correlation detection circuit 33 and the frequency detection circuit 34, detection omission due to dropout of the channel bit values is reduced, thereby improving the reliability of ADIP information decoding. It is done.

When the wobble clock WCK is stabilized by pulling in the PLL, the determination circuit 35 obtains a channel bit value that is FSK demodulated by taking the OR of the channel bit value supplied from both the correlation detection circuit 33 and the frequency detection circuit 34. From this, data “0” and data “1” are discriminated as information bits of the FSK portion of each wobble unit expressed by 3 channel bits.
The information bits are supplied to the address decoder 26.
The address decoder 26 can obtain the 98-bit address information described in FIG. 8 or FIG. 10 by taking in information bits with reference to the timing of the sync signal SY, and is thereby embedded as a wobbling groove. The address value Dad is decoded and supplied to the system controller 10.

The correlation detection circuit 33 that performs FSK demodulation is configured as shown in FIG.
The push-pull signal binarized by the comparator 32 shown in FIG. 13 is input to the delay circuit 112 and one input of the exclusive OR gate (EX-OR) 113. The output of the delay circuit 112 is the other input of the EX-OR 113.
The wobble clock WCK is supplied to the 1T measurement circuit 111. The 1T measurement circuit measures one cycle of the wobble clock WCK and controls the delay circuit 112 to execute a delay corresponding to one cycle of the wobble clock WCK.
Therefore, the EX-OR 113 performs a logical operation on the push-pull signal and the push-pull signal delayed by 1T.
The output of the EX-OR 113 is low-pass extracted by the low-pass filter 114 and binarized by the comparator 115. The binarized signal is latched and output by the D flip-flop flop 116 at the wobble clock WCK timing. This latch output becomes “0” “1” output as channel bits in units of two monotone wobble periods, and this is supplied to the discrimination circuit 35.

  The operation waveform of the correlation detection circuit 33 is shown in FIG. Note that this operation waveform is an example of a push-pull signal that is input during the period of the FSK section that serves as a cluster sync. That is, the period indicated as the FSK portion in the input push-pull signal in FIG. 15B is a binarized portion of the waveform having 9 consecutive frequencies fw2 shown in FIG. 4 as the cluster sync.

FIG. 15A shows the wobble clock WCK. The EX-OR 113 is delayed by one wobble clock period by the binarized push-pull signal shown in FIG. 15B and the delay circuit 112 shown in FIG. Push-pull signal is input.
With respect to these inputs, the output of the EX-OR 113 is as shown in FIG. 15 (d). This output is changed to a waveform of only the low frequency component as shown in FIG. 15 (e) by the low-pass filter 114. By being binarized by the comparator 115, the waveform of FIG.

This is input to the D flip-flop flop 116 and latched and output at the timing of the wobble clock WCK, whereby the signal of FIG. 15G is supplied to the discrimination circuit 35 as the channel bit value subjected to FSK demodulation. . In this case, since the FSK portion of the cluster sync is taken as an example, the waveform of the period corresponding to the FSK portion is 6 Wobble clock periods “H” as shown in the figure, that is, in units of 2 wobble clock periods (2 monotone wobble periods). The channel bit values are “1”, “1”, and “1”. That is, the waveform shown in FIG. 4 as cluster sync address bits is obtained.
Of course, if this is an FSK part indicating data “0” or data “1”, the waveform during this period will be the waveform shown as the address bits of data “0” or data “1” in FIG. .

As described above, in the case of the disk of this example, wobbling uses two types of waveforms of frequencies fw1 and fw2. The frequency fw2 is, for example, 1.5 times the frequency fw1, and the relationship between the frequency fw1 and the frequency fw2 is such that the wave numbers of both frequencies are even and odd in a certain period. The In such a case, the binarized push-pull signal and the push-pull signal obtained by delaying the push-pull signal by one cycle of the wobble clock of the frequency fw1 can be seen by comparing FIGS. 15B and 15C. The wobble part of fw2, that is, the part corresponding to the channel bit value “1” in the FSK modulation, is in an antiphase state.
For this reason, for example, FSK demodulation can be easily performed by EX-OR logic.
Needless to say, the demodulation process is not limited to the EX-OR process, and a system using other logical operations is also possible.

The frequency detection circuit 34, which is another circuit that performs FSK demodulation in the FSK demodulator 24, is configured as shown in FIG.
The push-pull signal binarized by the comparator 32 shown in FIG. 13 is input to the rising edge number counting circuit 121. The rising edge number counting circuit 121 counts the number of rising edges of the push-pull signal for each period of the wobble clock WCK. Then, “0” or “1” is output according to the count result.
The output of the rising edge number counting circuit 121 is used as one input of the OR gate 123 and the other input of the OR gate 123 as a signal delayed by one clock timing by the latch output at the wobble clock WCK timing in the D flip-flop flop 122. It is said.
The OR output of the OR gate 123 becomes “0” “1” output as channel bits in units of two monotone wobble periods, and this is supplied to the discrimination circuit 35.

  The operation waveform of the frequency detection circuit 34 is shown in FIG. This operation waveform also takes as an example a push-pull signal that is input during the period of the FSK section that serves as a cluster sync. That is, the period indicated as the FSK portion in the input push-pull signal in FIG. 17B is a binarized portion of the waveform having nine consecutive frequencies fw2 shown as the cluster sync in FIG.

FIG. 17A shows the wobble clock WCK, and the rising edge number counting circuit 121 counts the rising edge number of the push-pull signal for each cycle of the wobble clock WCK. In FIG. 17B, the rising edge portion is marked with ◯. As can be seen from FIGS. 17B and 17C, the output of the rising edge number counting circuit 121 is within one wobble clock cycle. When one rising edge is counted, “0” is set, and when two rising edges are counted, “1” is set.
The OR of the signal of FIG. 17C output in this way and the signal of FIG. 17D delayed by 1T by the D flip-flop flop 122 is obtained by the OR gate 123, and FIG. ) Is obtained, and this is supplied to the discrimination circuit 35 as a channel bit value demodulated by FSK.
In this case, since the FSK portion of the cluster sync is taken as an example, the waveform of the period corresponding to the FSK portion is 6 Wobble clock periods “H” as shown in the figure, that is, in units of 2 wobble clock periods (2 monotone wobble periods). The channel bit values are “1”, “1”, and “1”. That is, the waveform shown in FIG. 4 as cluster sync address bits is obtained.
Of course, if this is an FSK part indicating data “0” or data “1”, the waveform during this period will be the waveform shown as the address bits of data “0” or data “1” in FIG. .

Even in the case of the frequency detection circuit 34, wobbling uses two types of waveforms of the frequencies fw1 and fw2, and the relationship between the frequency fw1 and the frequency fw2 is that the wave numbers of both frequencies are an even wave and an odd wave in a certain period. Therefore, FSK demodulation can be realized with a very simple circuit configuration as shown in FIG.
Instead of counting the number of rising edges, the number of falling edges may be counted.

<Second Embodiment>
2-1. Wobbling method Next, a second embodiment will be described. Note that the second embodiment also relates to a category of disks called DVR, for example, and the physical characteristics of the optical disk are the same as those described with reference to FIGS.
The configurations of the cutting device and the disk drive device corresponding to this optical disk are basically the same as those described in the first embodiment, and therefore redundant description is avoided.
Here, only the wobbling method and the demodulation method corresponding to the wobbling method will be described as different parts from the first embodiment. In the description of the demodulation method, a circuit configuration example that is a part corresponding to the FSK demodulator 24 in FIG. 12 in the disk drive apparatus in the second embodiment will also be described.

  FIG. 18 shows the use of MSK (minimum shift keying) modulation, which is one of the FSK modulations, as described above as a method for modulating the wobble address in which the groove is wobbled, and the wobble detection window (wobble detection window) L = The wobble waveform when 4 is used is shown. Note that L indicates the length of the wobble detection window, and L = 4 means that the detection unit corresponds to a monotone wobble 4-wave period.

When the data waveform (channel bit) as the address information recorded in the wobbling groove is the waveform (data) of FIG. 18D, this data (data) is pre-encoded, and the pre-coded data of FIG. Is done. For example, pre-encoding is performed so that the pre-coded data is set to “1” at the timing of logical inversion of data (data).
Then, MSK modulation is performed by this precoded data, and a stream as an MSK modulated signal as shown in FIG. 18 (f) is formed.

Here, two frequencies fw1 and fw2 are used for the MSK modulation, and the frequency fw1 is set to a frequency that is one time the carrier frequency of the MSK modulation shown in FIG. The frequency fw2 is, for example, 1.5 times the frequency fw1 (2/3 times the wavelength).
For example, as shown in FIG. 18A, when the precode data is “1”, 1.5 waves of the frequency fw2, which is 1.5 times the carrier, are supported, and as shown in FIG. 18B, the precode data “0”. In this case, one wave of the same frequency fw1 as the carrier corresponds.
The 1.5 wave period of the frequency fw2 corresponds to one wave period of the frequency fw1 (= carrier frequency).

FIG. 19 shows a wobble waveform stream including an MSK modulation portion.
The monotone bits in FIG. 19A are sections in which single frequency wobbles with the frequency fw1 (= carrier) continue. The monotone bit is formed by 56 monotone wobbles.

The ADIP bit in FIG. 19 (b) also has a period of 56 monotone wobbles, but the ADIP unit, which is 12 monotone wobble sections, is the MSK part, that is, the MSK part is precoded data as described above. Is a portion that is MSK modulated by the frequencies fw1 and fw2. This MSK portion is a section including address information.
The remaining 44 monotone wobble sections of the ADIP bits are sections in which 44 single-frequency wobbles with the frequency fw1 (= carrier) continue.

  The sync bits in FIG. 19 (c) also have a period of 56 monotone wobbles, of which 28 monotone wobble sections are used as sync units, and the precoded data is MSK modulated with the frequencies fw1 and fw2 as described above. Part. Synchronization information is expressed by the pattern of the sync unit. The remaining 28 monotone wobble sections of the sync bits are sections in which 28 single-frequency wobbles with the frequency fw1 (= carrier) continue.

  The ADIP bit, monotone bit, and sync bit correspond to one bit that constitutes an address block (83 bits) to be described next, which is one address information (ADIP).

In the case of this example, one RUB (recording unit block) which is a data recording unit is assumed to contain three addresses as ADIP addresses.
This is shown in FIG. As described in FIGS. 5 and 6, the RUB is a data unit in which run-in and run-out are added to the ECC block. In this case, one RUB is composed of 498 frames (498 rows). In the section corresponding to one RUB as shown in FIG. 20A, ADIP includes three address blocks.
One address block consists of 83 bits as ADIP data, and the ADIP bit and monotone bit correspond to 56 monotone wobble periods as shown in FIG. 19, so one address block has 83 × 56 = 4648 monotone wobble periods. 1 RUB corresponds to 4648 × 3 = 13944 monotone wobble period.

FIG. 20B shows the configuration of one address block. The 83-bit address block is composed of an 8-bit sync part (synchronization signal part) and a 75-bit data part.
In the 8 bits of the sync part, 4 units of sync blocks are formed by monotone bits (1 bit) and sync bits (1 bit).
In the 75 bits of the data part, 15 units of ADIP blocks are formed by monotone bits (1 bit) and ADIP bits (4 bits).
The monotone bit, the sync bit, and the ADIP bit mentioned here are those described with reference to FIG. 19, and the sync bit and the ADIP bit are formed with a wobble based on the MSK modulation waveform.

First, the configuration of the sync part will be described with reference to FIG.
As can be seen from FIGS. 21A and 21B, the sync part is formed of four sync blocks (sync block “0” “1” “2” “3”). Each sync block is 2 bits.

The sync block “0” is formed by a monotone bit and a sync “0” bit.
The sync block “1” is formed by a monotone bit and a sync “1” bit.
The sync block “2” is formed of a monotone bit and a sync “2” bit.
The sync block “3” is formed by a monotone bit and a sync “3” bit.

In each sync block, the monotone bit is a waveform in which 56 single-frequency wobbles representing a carrier are continuous as described above, and this is shown in FIG.
As described above, there are four types of sync bits from sync “0” bit to sync “3” bit.
Each of these four types of sync bits has a wobble pattern as shown in FIGS. 22B, 22C, 22D, and 22E.

Each sync bit is formed of a sync unit of 28 monotone wobble periods and 28 monotone wobbles. The sync unit patterns are different from each other.
22 (b), (c), (d), and (e) show the wobble waveform pattern in the section of the sync unit and the corresponding data pattern as address information. As shown in (1), one channel bit as address information corresponds to a 4 monotone wobble period. The channel bit stream as the address information is pre-encoded into pre-coded data as shown in FIG. 18E and becomes a wobble waveform pattern subjected to MSK modulation.

  First, the sync “0” bit becomes a channel bit data stream of “1010000” in the section of the sync unit as shown in FIG. 22B, that is, a wobble waveform corresponding to “1000100010001000000000000000” as the precoded data stream. Specifically, the portion corresponding to “1” of the precoded data is 1.5 waves of frequency fw2, and the portion corresponding to “0” of the precoded data is 1 wave of frequency fw1. An MSK modulated wobble pattern is obtained.

  The sync “1” bit is a channel bit data stream of “1001000” in the section of the sync unit as shown in FIG. 22C, and has a wobble waveform corresponding to “1000100000001000100000000” as the pre-coded data stream.

  The sync “2” bit becomes a channel bit data stream of “1000100” in the section of the sync unit as shown in FIG. 22D, and has a wobble waveform corresponding to “1000100000000000100010000000” as the pre-coded data stream.

  As shown in FIG. 22E, the sync “3” bit becomes a channel bit data stream of “1000010” in the section of the sync unit, and has a wobble waveform corresponding to “1000100000000000000010001000” as the pre-coded data stream.

  In this way, four patterns of sync bits are arranged in each sync block, and if the disk drive device can detect any one of the four patterns of sync units from the sync part section, synchronization is achieved. Have been able to.

Next, the structure of the data part in the address block will be described with reference to FIG.
As can be seen from FIGS. 23A and 23B, the data part is formed of 15 ADIP blocks (ADIP blocks “0” to “14”). Each ADIP block is 5 bits.

Each 5-bit ADIP block is composed of 1 monotone bit and 4 ADIP bits.
In each ADIP block, as in the case of the sync block, the monotone bit is a waveform in which 56 single-frequency wobbles representing a carrier are continuous, as shown in FIG.

Since 4 ADIP bits are included in one ADIP block, address information is formed by 15 ADIP blocks with 60 ADIP bits.
One ADIP bit is formed by an ADIP unit of 12 monotone wobble periods and 44 monotone wobbles.

The wobble waveform pattern when the value as the ADIP bit is “1” and the data pattern as the address information corresponding thereto are shown in FIG. 24B, and the wobble waveform when the value as the ADIP bit is “0”. FIG. 24C shows a pattern and a data pattern as address information corresponding to the pattern.
The ADIP bits “1” and “0” are each represented by 3 channel bits in 12 monotone wobble periods (1 channel bit is 4 monotone wobble periods).

  As shown in FIG. 24B, the value “1” as the ADIP bit becomes a channel bit data stream of “100” in the section of the ADIP unit, that is, a wobble waveform corresponding to “100010000000” as the precoded data stream. Become. Specifically, the MSK is such that the portion corresponding to “1” of the precoded data is 1.5 waves of frequency fw2 and the portion corresponding to “0” of the precoded data is 1 wave of frequency fw1. It becomes a modulated wobble pattern.

  The value “0” as the ADIP bit becomes a channel bit data stream of “010” in the ADIP unit section as shown in FIG. 24C, that is, a wobble waveform corresponding to “000010001000” as the precoded data stream. Become.

  The wobbling method of the present example as described above has the following various characteristics.

  As wobbling, there are an ADIP bit and a sync bit having a waveform obtained by MSK modulating information bits, and a monotone bit that is a single frequency portion based on a waveform of a single frequency fw1 (= carrier), and these are continuous. Is formed. That is, the MSK modulation portion in which the actual information bits are embedded partially exists on the wobbled track (groove). The partial presence of the MSK modulation part can significantly reduce the adverse effects of crosstalk even when the track pitch is narrow.

Two types of frequencies fw1 and fw2 are used for MSK modulation, and the frequency fw1 is the same frequency as the monotone wobble frequency (= carrier frequency). As described above, the frequency fw2 is, for example, 1.5 times the frequency fw1, so that the relationship between the frequency fw1 and the frequency fw2 is such that the wave numbers of both frequencies are even and odd in a certain period. It is supposed to be a wave.
In the MSK part, the four wave periods of the monotone wobble are set to one channel bit constituting the information bit (when corresponding to the length L = 4 of the wobble detection window).
The period length of the MSK modulation portion of the ADIP bit is a 12-wave period of monotone wobble, that is, a period that is an integral multiple of the monotone wobble period.
These realize facilitation of FSK demodulation processing. As will be described later, in a disk drive device, demodulation processing can be facilitated by performing MSK demodulation in units of a plurality of wobble periods such as a monotone wobble four-wave period.

Further, as a relation between wobbling and recording data, an integer number, for example, three addresses as ADIP information are arranged for one RUB.
This ensures consistency between the wobbling groove and the recording data.

In the MSK unit, the phase is continuous at the switching point between the frequency fw1 and the frequency fw2.
As a result, there is no high frequency component as in the case of wobbling by PSK.

2-2. Demodulation processing Demodulation processing corresponding to the wobbling method of the second embodiment will be described. As described above, the configuration of the disk drive device is the same as that of FIG. 12, and here, in the FSK demodulator 24 of FIG. The circuit components provided instead will be described with reference to FIG.

In this case, bandpass filters 151 and 152, a multiplier 153, an adder 154, an accumulator 155, a sample hold circuit 156, and a slicer 157 are provided as a configuration for MSK demodulation, as shown in FIG.
The other components such as the wobble PLL 25, the address decoder 26, and the encode clock generator 27 in FIG.
25 (the output of the slicer 157) is supplied to the discrimination circuit 35 shown in the FSK demodulator 24 in FIG. 13, that is, the discrimination circuit 35 and the sync detection circuit shown in FIG. 36. The gate signal generation circuit 37 is similarly provided in the subsequent stage of the circuit of FIG.

The push-pull signal P / P supplied as a signal related to wobbling from the matrix circuit 9 in FIG. 12 is supplied to each of the bandpass filters 151 and 152 in FIG.
The bandpass filter 151 has a characteristic of passing a band corresponding to the frequencies fw1 and fw2, and a wobble component, that is, an MSK modulated wave is extracted by the bandpass filter 151.
The band-pass filter 152 has a narrower band characteristic that allows only the frequency fw1, that is, the carrier component to pass through, and extracts the carrier component.

Multiplier 153 multiplies the outputs of bandpass filters 151 and 152. This multiplication output and the output of the accumulator 155 are supplied to the adder 154. The accumulator 155 is cleared from the clear signal CLR in units of four wobble wave periods (when L = 4) or in units of two wobble wave periods (when L = 2). Therefore, an integrated value for a period of four waves or two waves is output.
The output of the accumulator 155 is held in the sample hold circuit 156. The sample hold circuit 156 performs sample / hold at the timing of the hold control signal sHOLD.
The output of the sample hold circuit 156 is binarized by a slicer 157 formed as a comparator. The binarized output (data) becomes channel bit data forming address information, and is supplied to the subsequent circuit, that is, the determination circuit 35 shown in FIG. 13 to determine the value as the ADIP bit or the sync bit. . The discriminated ADIP bit is supplied to the address decoder 26 shown in FIGS. 12 and 13, and the ADIP address is decoded.
The sync bits are processed in the same manner as described with reference to FIG. 12 by the sync detection circuit 32 shown in FIG.

The MSK demodulation operation will be described with reference to FIGS. 26 (a) and 26 (b) while showing the waveforms of the respective parts when the length L = 4 of the wobble detection window.
FIG. 26A shows pre-coded data, a wobble waveform MSK (L = 4) formed corresponding to the pre-coded data, and a carrier which is an output (BPF.out) of the band-pass filter 152.
FIG. 26B shows the output of the multiplier 153 (Demod.out), the output of the accumulator 155 (Int (L = 4)), and the output of the sample hold circuit 156 (h (L = 4)). ing.

The signal (Demod.out) in FIG. 26B is obtained by multiplying the wobble waveform MSK (L = 4) shown in FIG. 26A by the carrier 153 (BPF.out) by the multiplier 153. The accumulator 155 and the adder 154 obtain a signal (Int (L = 4)) obtained by integrating this signal (Demod.out) in units of 4 wobbles.
The accumulated signal (Int (L = 4)) is sampled and held in units of 4 wobbles by the sample and hold circuit 156 to obtain an output (h (L = 4)).
By slicing the waveform of this output (h (L = 4)) with the slicer 157, the channel bit data before precoding is detected.

  FIGS. 27A and 27B show the waveforms of the respective parts when the length L = 2 of the wobble detection window. In FIGS. 27A and 27B, similarly to FIGS. 26A and 26B, pre-coded data, wobble waveform MSK (L = 2), carrier (BPF.out), output of the multiplier 153 (Demod. out), the output of the accumulator 155 (Int (L = 2)), and the output of the sample hold circuit 156 (h (L = 2)).

By multiplying the wobble waveform MSK (L = 2) shown in FIG. 27A by the carrier (BPF.out) by the multiplier 153, the signal (Demod.out) shown in FIG. 27B is obtained. The accumulator 155 and the adder 154 obtain a signal (Int (L = 2)) obtained by integrating this signal (Demod.out) in units of 2 wobbles.
The integrated signal (Int (L = 2)) is sampled and held in 2-wobble units by the sample-and-hold circuit 156 to obtain an output (h (L = 2)).
By slicing this output (h (L = 2)) waveform with a slicer 157, channel bit data before precoding is detected.

In this example, the length of the wobble detection window can be extended to a plurality of wobble periods as described above, and MSK demodulation can be performed easily and accurately.
By the way, as can be seen by comparing the integrated signal (Int) and the sample hold signal (h) in FIGS. 26 and 27, the length L = 4 of the wobble detection window is larger than that in the case of L = 2. Since the signal is doubled, the signal is doubled.
The increase in noise is not doubled but doubled when L = 4 and L = 2.
Thereby, when L = 4 as a total, S / N becomes 3 dB dominant over the case of L = 2. For this reason, the bit error is dominant when L = 4 and L = 2.
From this, it is understood that the reliability of MSK demodulation and ADIP decoding is increased by increasing the length of the wobble detection window by the wobbling method of this example.

As described above, the disk of the embodiment, the cutting device corresponding to the disk, and the disk drive device have been described. However, the present invention is not limited to these examples, and various modifications can be considered within the scope of the gist. is there.

  DESCRIPTION OF SYMBOLS 1 Pickup, 2 Objective lens, 3 Biaxial mechanism, 4 Laser diode, 5 Photo detector, 6 Spindle motor, 8 Thread mechanism, 9 Matrix circuit, 10 System controller, 12 Encoding / decoding part, 13 Interface part, 14 Servo circuit, 20 Buffer memory, 21 write strategy, 23 spindle servo circuit, 24 FSK demodulator, 25 wobble PLL, 26 address decoder, 27 encode clock generator, 30 disk drive device, 33 correlation detection circuit, 34 frequency detection circuit, 35 discrimination circuit, 36 sync detection circuit, 37 gate signal generation circuit, 61 formatting circuit, 62 logic operation circuit, 63 address generation circuit, 64 P / S conversion circuit, 65 synthesis circuit, 66 sign change Circuit, 68 a driving circuit, 72 a laser light source, 73 AOM, 74 AOD, 100 disc, 151 and 152 band pass filter, 153 multipliers, 154 an adder, 155 an accumulator, 156 sample and hold circuit, 157 slicer

Claims (5)

With circularly tracks for recording data as a groove and / or land are formed in advance in a recording medium in which the track is wobbled address information is recorded wobble is formed,
The address information recorded as the wobble of the groove is composed of a 75-bit data portion comprising 15 address blocks in which an 8-bit synchronization portion and 5-bit including 4 address bits are one address block. Configured as an 83-bit address unit,
The address unit includes a monotone unit including a groove wobbled at a predetermined frequency in a predetermined unit, and a data unit indicating 0 or 1 using MSK modulation,
The monotone unit and the data unit have a period of 56 monotone wobbles,
Three address units are included for each recording unit of data recorded on the track, which is composed of 498 frames, which are units in which run-in and run-out are added to the ECC block.
recoding media. In a reproducing apparatus for reproducing the address of the recording medium based on the groove formed on the recording medium ,
Irradiating means for irradiating the recording medium with laser light;
Extracting means for receiving reflected light from the recording medium and extracting a reflected light signal corresponding to the groove;
Reproducing means for reproducing address information based on the extracted reflected light signal,
The address information recorded as wobble of the groove formed on the recording medium is composed of 15 address blocks in which 5 bits including an 8-bit synchronization portion and 4-bit address bits are used as one address block. It is configured as an 83-bit address unit consisting of a 75-bit data part,
The address unit includes a monotone unit including a groove wobbled at a predetermined frequency in a predetermined unit, and a data unit indicating 0 or 1 using MSK modulation,
The monotone unit and the data unit have a period of 56 monotone wobbles,
Three address units are included for each recording unit of data recorded in the track, which is composed of 498 frames, which are units in which run-in and run-out are added to the ECC block. . A playback method in a playback apparatus for playing back an address of the recording medium based on a groove formed on the recording medium,
An irradiation procedure for irradiating the recording medium with laser light;
An extraction procedure for receiving reflected light from the recording medium and extracting a reflected light signal corresponding to the groove;
A reproduction procedure for reproducing address information based on the extracted reflected light signal;
With
The address information recorded as wobble of the groove formed on the recording medium is composed of 15 address blocks in which 5 bits including an 8-bit synchronization portion and 4-bit address bits are used as one address block. It is configured as an 83-bit address unit consisting of a 75-bit data part,
The address unit includes a monotone unit including a groove wobbled at a predetermined frequency in a predetermined unit, and a data unit indicating 0 or 1 using MSK modulation,
The monotone unit and the data unit have a period of 56 monotone wobbles,
Three address units are included for each recording unit of data recorded on the track, which is composed of 498 frames, which are units in which run-in and run-out are added to the ECC block.
Playback method. Based on the formed recording medium groove, a recording apparatus for reproducing an address of said recording medium,
Irradiating means for irradiating the recording medium with laser light;
Extracting means for receiving reflected light from the recording medium and extracting a reflected light signal corresponding to the groove;
Reproducing means for reproducing address information based on the extracted reflected light signal,
The address information recorded as wobble of the groove formed on the recording medium is composed of 15 address blocks in which 5 bits including an 8-bit synchronization portion and 4-bit address bits are used as one address block. It is configured as an 83-bit address unit consisting of a 75-bit data part,
The address unit includes a monotone unit including a groove wobbled at a predetermined frequency in a predetermined unit, and a data unit indicating 0 or 1 using MSK modulation,
The monotone unit and the data unit have a period of 56 monotone wobbles,
Three address units are included for each recording unit of data recorded on the track, which is composed of 498 frames, which are units in which run-in and run-out are added to the ECC block. . A recording method in a recording apparatus for reproducing an address of the recording medium based on a groove formed on the recording medium,
An irradiation procedure for irradiating the recording medium with laser light;
An extraction procedure for receiving reflected light from the recording medium and extracting a reflected light signal corresponding to the groove;
A reproduction procedure for reproducing address information based on the extracted reflected light signal;
With
The address information recorded as wobble of the groove formed on the recording medium is composed of 15 address blocks in which 5 bits including an 8-bit synchronization portion and 4-bit address bits are used as one address block. It is configured as an 83-bit address unit consisting of a 75-bit data part,
The address unit includes a monotone unit including a groove wobbled at a predetermined frequency in a predetermined unit, and a data unit indicating 0 or 1 using MSK modulation,
The monotone unit and the data unit have a period of 56 monotone wobbles,
Three address units are included for each recording unit of data recorded on the track, which is composed of 498 frames, which are units in which run-in and run-out are added to the ECC block.
Recording method.

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