JP2012084938A - Substrate for manufacturing semiconductor device - Google Patents

Substrate for manufacturing semiconductor device Download PDF

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JP2012084938A
JP2012084938A JP2012022143A JP2012022143A JP2012084938A JP 2012084938 A JP2012084938 A JP 2012084938A JP 2012022143 A JP2012022143 A JP 2012022143A JP 2012022143 A JP2012022143 A JP 2012022143A JP 2012084938 A JP2012084938 A JP 2012084938A
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semiconductor device
metal plate
substrate
plating layer
manufacturing
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Juntaro Mikami
順太郎 三上
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Sumitomo Metal Mining Co Ltd
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Sumitomo Metal Mining Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To double the number of semiconductor devices to be manufactured from one substrate for manufacturing semiconductor device as compared with prior art, by obtaining a substrate for manufacturing semiconductor device where a plating layer becoming the terminals for a semiconductor device is formed on both surfaces of a metal plate.SOLUTION: Terminals for a plurality of semiconductor devices are formed, as a plating layer, on the surface of a metal layer and when a semiconductor device is manufactured, a plurality of semiconductor elements are mounted and resin sealed and then only the metal plate is peeled off to leave the plating layer on the resin sealed body. In such a substrate for manufacturing semiconductor device, the plating layers 2, 3 for individual semiconductor devices are formed on both surfaces of the metal plate 1.

Description

本発明は、樹脂封止された半導体装置の底面側にめっき層で形成された端子部を有する半導体装置の製造に用いる半導体装置製造用基板に関する。   The present invention relates to a semiconductor device manufacturing substrate used for manufacturing a semiconductor device having a terminal portion formed of a plating layer on the bottom side of a resin-sealed semiconductor device.

半導体装置の中には、半導体素子を樹脂封止し、その封止体（パッケージ）の底面に金属皮膜で端子部を形成するようにしたものがあるが、この種の半導体装置を製造するに際しては、最初に、金属板の片面に、いずれは個々の半導体装置用の端子部やパッド部などになるめっき層を複数個分形成した半導体装置製造用基板を製作しておき、そこに複数の半導体素子を搭載して上記の端子部にボンディングワイヤで接続した後、成形加工によって複数の半導体素子を樹脂封止し、その後、金属板だけを取り除いた樹脂封止体を切断して、個々の半導体装置を得るようにする方法が知られている。   Some semiconductor devices are made by sealing a semiconductor element with a resin, and forming a terminal portion with a metal film on the bottom surface of the sealing body (package). First, a substrate for manufacturing a semiconductor device in which a plurality of plating layers to be terminal portions or pad portions for individual semiconductor devices are formed on one side of a metal plate is manufactured, and a plurality of substrates are formed there. After mounting the semiconductor element and connecting it to the terminal portion with a bonding wire, a plurality of semiconductor elements are resin-sealed by molding, and then the resin sealing body from which only the metal plate has been removed is cut, A method for obtaining a semiconductor device is known.

また、そのような半導体装置製造用基板の金属板には、従来から銅合金の金属板を採用することが知られているが、その場合には、樹脂封止体から金属板を取り除くときに、金属板をエッチングによって溶解させてしまうようにしていた。また、下記の特許文献１には、半導体装置製造用基板の金属板として、ステンレス鋼の金属板を採用することが記載されている。そして、この場合には、金属板を取り除くとき、密着している樹脂封止体から金属板を剥離することになる。   In addition, it is known that a copper alloy metal plate is conventionally used as the metal plate of such a substrate for manufacturing a semiconductor device. In that case, when removing the metal plate from the resin sealing body, The metal plate was dissolved by etching. Patent Document 1 below describes that a stainless steel metal plate is used as the metal plate of the semiconductor device manufacturing substrate. In this case, when removing the metal plate, the metal plate is peeled off from the resin sealing body that is in close contact.

特開２００６−１９６９２２JP 2006-196922 A

半導体装置製造用基板のベースとなる金属板に銅合金を採用した場合には、金属板を除去するとき、上記のようにエッチング加工で溶解させていた。しかしながら、そのようなエッチング工程は、時間がかかるばかりでなく設備を必要とするため、コスト高になって生産上好ましくないという問題点がある。それに対して、金属板にステンレス鋼を採用した場合には、剥離するだけなので時間が短くて済む代わりに、樹脂封止体が金属板に密着しているので剥離作業が面倒になるなどの問題点がある。そして、ステンレス鋼に限らず、金属板と樹脂封止体とを剥離する場合には、剥離工程で金属板に反りが生じてしまい、再利用が難しく、生産性に難があるという問題点もある。   In the case where a copper alloy is used for the metal plate serving as the base of the semiconductor device manufacturing substrate, when the metal plate is removed, it is dissolved by etching as described above. However, such an etching process is not only time consuming but also requires equipment, which increases costs and is undesirable in production. On the other hand, when stainless steel is used for the metal plate, it takes only a short time because it peels off. Instead, the resin sealing body is in close contact with the metal plate, making the peeling work cumbersome. There is a point. And when peeling a metal plate and a resin sealing body as well as stainless steel, the metal plate is warped in the peeling process, it is difficult to reuse, and the productivity is also difficult. is there.

本発明は、このような問題点を解決するためになされたものであり、その目的とするところは、複数個の半導体装置用の端子部になるめっき層を夫々金属板の両面に形成することによって、１枚の金属板で従来よりも２倍の半導体装置の製造を可能にした、生産性の向上に資する半導体装置製造用基板を提供することである。さらに本発明の半導体装置製造用基板を用いることにより、基板上に複数の半導体素子を樹脂封止した後、複数の半導体素子を封止した樹脂封止体と、半導体装置製造用基板の金属板とを、簡単に剥離できるようにした半導体装置の製造方法を提供することである。   The present invention has been made to solve such problems, and an object of the present invention is to form plating layers to be terminal portions for a plurality of semiconductor devices on both surfaces of a metal plate, respectively. Accordingly, it is an object of the present invention to provide a substrate for manufacturing a semiconductor device that contributes to improvement in productivity and enables manufacturing of a semiconductor device twice as much as conventional with a single metal plate. Furthermore, by using the semiconductor device manufacturing substrate of the present invention, after sealing a plurality of semiconductor elements on the substrate, a resin sealing body in which the plurality of semiconductor elements are sealed, and a metal plate of the semiconductor device manufacturing substrate And providing a method of manufacturing a semiconductor device that can be easily peeled off.

上記の目的を達成するために、本発明の半導体装置製造用基板は、金属板の表面に複数個の半導体装置用の端子部などをめっき層として形成しており、半導体装置の製造に際しては、複数の半導体素子を搭載してそれらを樹脂封止体で封止した後、前記めっき層を前記樹脂封止体に残して金属板だけが剥離されることになる半導体装置製造用基板であって、前記金属板には、個々の半導体装置用の前記めっき層が、両面に形成されているようにする。   In order to achieve the above object, the substrate for manufacturing a semiconductor device of the present invention has a plurality of terminal portions for a semiconductor device formed as a plating layer on the surface of a metal plate. A semiconductor device manufacturing substrate in which a plurality of semiconductor elements are mounted and sealed with a resin sealing body, and then only the metal plate is peeled off while leaving the plating layer on the resin sealing body. In the metal plate, the plating layers for individual semiconductor devices are formed on both surfaces.

その場合、前記金属板は、両面の各々に、個々の半導体装置用の前記めっき層を、複数の領域に分けて各々マトリックス状に形成しているようにしてもよい。また、前記めっき層は、１０〜１００μｍの厚さに形成されていることが好ましい。また、前記めっき層は、金めっき層を含む多層のめっき層であることが好ましい。そして、前記金属板は、ステンレス鋼であることが有利である。   In that case, the said metal plate may be made to form the said metal-plating layer for each semiconductor device in each of both surfaces in the shape of a matrix, dividing | segmenting into several area | regions. Moreover, it is preferable that the said plating layer is formed in the thickness of 10-100 micrometers. Moreover, it is preferable that the said plating layer is a multilayer plating layer containing a gold plating layer. The metal plate is advantageously stainless steel.

本発明の半導体装置製造用基板によれば、半導体装置用の端子部などになるめっき層を金属板の両面に形成した半導体装置製造用基板を実現することによって、１枚の半導体装置製造用基板で従来よりも２倍の半導体装置の製造が可能になる。また、本発明の半導体装置製造用基板を用いることにより、基板上に複数の半導体素子を樹脂封止する過程において、半導体装置製造用基板の金属板と樹脂封止体との間に空間部が形成されるようにし、複数の半導体素子を樹脂封止している樹脂封止体と、半導体装置製造用基板の金属板とを剥離するとき、その空間部に指や適宜な道具などを挿入することにより、両者を簡単に剥離することが可能となる。   According to the substrate for manufacturing a semiconductor device of the present invention, a single substrate for manufacturing a semiconductor device is realized by realizing a substrate for manufacturing a semiconductor device in which plating layers to be terminal portions for the semiconductor device are formed on both surfaces of the metal plate. Thus, it becomes possible to manufacture a semiconductor device twice as much as before. In addition, by using the semiconductor device manufacturing substrate of the present invention, in the process of resin-sealing a plurality of semiconductor elements on the substrate, there is a space between the metal plate of the semiconductor device manufacturing substrate and the resin sealing body. When the resin sealing body that is formed and resin-sealed a plurality of semiconductor elements and the metal plate of the semiconductor device manufacturing substrate are peeled off, a finger or an appropriate tool is inserted into the space. As a result, both can be easily peeled off.

本発明の半導体装置製造用基板の一例としては、厚さが０．１〜０．３ｍｍ程度のステンレス鋼の金属板を用意し、その両表面に、複数個分の半導体装置用の端子部やパッド部をめっき層で形成する予定のエリアを残し、レジストでマスクを形成する。そして、マスクが形成された金属板に前処理を行ってめっき層を形成し、その後、マスクとしたレジストを除去し、後処理を行うことによって、金属板の両面に端子部やパッド部をめっき層として形成した半導体装置製造用基板が得られる。尚、このようなめっき層は、金属板の両面に形成した方が生産性が飛躍的に向上する。   As an example of a substrate for manufacturing a semiconductor device of the present invention, a stainless steel metal plate having a thickness of about 0.1 to 0.3 mm is prepared, and a plurality of terminal portions for a semiconductor device are provided on both surfaces thereof. A mask is formed with a resist leaving an area where the pad portion is to be formed of a plating layer. Then, the metal plate on which the mask is formed is pre-processed to form a plating layer, and then the resist used as the mask is removed, and post-processing is performed, thereby plating the terminals and pads on both sides of the metal plate. A semiconductor device manufacturing substrate formed as a layer is obtained. It should be noted that productivity is dramatically improved if such a plating layer is formed on both surfaces of the metal plate.

次に、このようにして製作された半導体装置製造用基板のパッド部に複数の半導体素子を搭載し、端子部との間にワイヤボンディング等を行う組み付け工程を行ってから、樹脂封止を行う。このとき樹脂封止体の周辺部の一部には、金属板との間に空間部が形成されるようにするが、その空間部は樹脂封止用の金型形状によって形成される。また、半導体装置製造用基板が、めっき層を両面に形成したものである場合には、上記のような組み付け工程は両面にわたって行われ、樹脂封止体は両面側に同時に成形される。そのようにして樹脂封止体が成形された後は、その空間部に治具を挿入して引っ掛け、樹脂封止体を金属板から引き剥がすことによって、めっき層（端子部，パッド部）を一体化し複数の半導体素子を封止した樹脂封止体を得る。そして、その樹脂封止体をダイシングソーで切断することによって、個々の半導体装置が得られる。   Next, a plurality of semiconductor elements are mounted on the pad portion of the semiconductor device manufacturing substrate manufactured as described above, and an assembly process of performing wire bonding or the like between the terminal portion and the resin sealing is performed. . At this time, a space is formed between a part of the periphery of the resin sealing body and the metal plate, and the space is formed by a mold shape for resin sealing. Further, when the substrate for manufacturing a semiconductor device has a plated layer formed on both sides, the above assembling process is performed on both sides, and the resin sealing body is simultaneously formed on both sides. After the resin sealing body is molded in this manner, a plating layer (terminal portion, pad portion) is removed by inserting and hooking a jig into the space and peeling the resin sealing body from the metal plate. A resin sealing body in which a plurality of semiconductor elements are integrated and sealed is obtained. Each resin device is obtained by cutting the resin sealing body with a dicing saw.

そこで、以下においては、金属板の両面にめっき層を形成した半導体装置製造用基板の製造方法と、その半導体装置製造用基板を用いた半導体装置の製造方法についての実施例を、図面を用いて具体的に説明する。尚、図１は、実施例における半導体装置製造用基板を示した平面図であり、図２は、半導体装置製造用基板の両面に樹脂封止体が成形された状態を示す部分断面図であり、図３は、樹脂封止体と金属板が剥離されるときの状態を示した部分断面図である。   Therefore, in the following, an example of a manufacturing method of a semiconductor device manufacturing substrate in which plating layers are formed on both surfaces of a metal plate and a manufacturing method of a semiconductor device using the semiconductor device manufacturing substrate will be described with reference to the drawings. This will be specifically described. FIG. 1 is a plan view showing a semiconductor device manufacturing substrate in the embodiment, and FIG. 2 is a partial cross-sectional view showing a state where a resin sealing body is molded on both surfaces of the semiconductor device manufacturing substrate. FIG. 3 is a partial cross-sectional view showing a state when the resin sealing body and the metal plate are peeled off.

先ず、本実施例の金属板１の原材料としては、ステンレス鋼（ＳＵＳ４３０）であって、板厚が０．２ｍｍであり、幅が１００ｍｍの長尺の板材が用いられた。そして、このようなステンレス鋼の表面の脱脂及び酸洗浄を行った後、両面に、厚み０．０２５ｍｍの感光性ドライフィルムレジストをラミネートロールで貼り付けた。次に、あとでめっき層を形成するエリア部分を黒くし、それ以外を透明にしたガラスマスクをドライフィルムレジストの上から被せ、さらにその上から紫外光を照射して露光を行い、ステンレス鋼両面のドライフィルムレジストにマスクパターンを作製した。次に、炭酸ナトリウム溶液を用いて現像処理を行い、紫外光の照射が遮られて感光しなかった未硬化のドライフィルムレジストを溶かすことによって、めっき層形成用の材料を得た。   First, as a raw material of the metal plate 1 of the present example, stainless steel (SUS430) having a plate thickness of 0.2 mm and a width of 100 mm was used. And after performing the degreasing | defatting and acid cleaning of the surface of such stainless steel, the photosensitive dry film resist of thickness 0.025mm was affixed on the both surfaces with the lamination roll. Next, the area where the plating layer is to be formed later is blackened, and a glass mask with the other parts made transparent is placed on the dry film resist. A mask pattern was prepared on the dry film resist. Next, development processing was performed using a sodium carbonate solution, and an uncured dry film resist that was not exposed due to the irradiation of ultraviolet light was dissolved to obtain a material for forming a plating layer.

次に、めっき層を形成するための前処理として、アルカリ浸漬したあと３ｍｏｌ／Ｌの塩酸で電解処理しステンレス鋼の両面を十分に活性化させた。その後、すぐ金めっきを１μｍ施し、その上にニッケルめっきを１０μｍ施し、さらにその上に金めっきを３μｍ施した。そして、最後に水酸化ナトリウム溶液でドライフィルムレジストを剥離し、水洗と乾燥を行った後、長尺材料の長さを約２００ｍｍになるように切断することによって、図１に示されているような、両面に全く同じパターンのめっき層を有する半導体装置用基板を得た。   Next, as a pretreatment for forming the plating layer, both surfaces of the stainless steel were sufficiently activated by electrolytic treatment with 3 mol / L hydrochloric acid after immersion in alkali. Thereafter, 1 μm of gold plating was immediately applied, 10 μm of nickel plating was applied thereon, and 3 μm of gold plating was further applied thereon. Finally, after removing the dry film resist with a sodium hydroxide solution, washing with water and drying, the length of the long material is cut to about 200 mm, as shown in FIG. In addition, a semiconductor device substrate having a plating layer with exactly the same pattern on both surfaces was obtained.

図１は、半導体装置用基板の一方の面を示したものであって、本実施例の場合には、中央に３ｍｍ角のパッド部２となるめっき層の周囲に０．３ｍｍ角の端子部３となるめっき層を２８個（小さくて個々に図示できないため、７個分ずつを実線で示してある）配置したものが、金属板１の長さ方向の二つの領域に分けられて、幅方向の中央５０ｍｍ内に、４０セット分ずつマトリックス状に形成されている。尚、本実施例のめっき層は、上記のように形成されるが、金属板１の表面側から順に、金，ニッケル，銀のめっき層に形成してもよいし、金，パラジウム，ニッケルパラジウム，金のめっき層に形成しても構わない。そして、いずれにしても、めっき層の厚さは、１０〜１００μｍにすることが好ましい。   FIG. 1 shows one surface of a substrate for a semiconductor device. In the case of this embodiment, a 0.3 mm square terminal portion is formed around a plating layer that becomes a 3 mm square pad portion 2 in the center. The number of plating layers that are 3 is 28 (small and cannot be shown individually, so 7 are shown by solid lines) are divided into two regions in the length direction of the metal plate 1 and the width 40 sets are formed in a matrix form within the center 50 mm in the direction. Although the plating layer of this embodiment is formed as described above, it may be formed on a gold, nickel, silver plating layer sequentially from the surface side of the metal plate 1, or gold, palladium, nickel palladium. The gold plating layer may be formed. In any case, the thickness of the plating layer is preferably 10 to 100 μm.

次に、このようにして製作された半導体装置用基板の各パッド部２に、半導体素子４を搭載し、端子部３との間をボンディングワイヤ５で接続したが、このような複数の半導体素子４の組み付け工程は片面ずつ行った。その後、一つの金型によって、金属板１の表裏に、平面形状が長方形をしている樹脂封止体６を同時に成形加工した。図２は、その成形加工後の一部を断面で示したものであるが、本実施例の場合には、図１に示しためっき層の形成状態からも分かるように、半導体素子４の８０個分のめっき層を４０個ずつ二つの領域に分けて形成しているので、このような樹脂封止体６を、表裏で四つ形成した。そして、各々の樹脂封止体６には、図２に示されているように、その周辺部の一部にフランジ部６ａを形成し、そのフランジ部６ａと金属板１との間に空間部が形成されるようにした。   Next, the semiconductor element 4 is mounted on each pad portion 2 of the semiconductor device substrate manufactured as described above, and the terminal portion 3 is connected by the bonding wire 5. The assembly process of No. 4 was performed one side at a time. Thereafter, the resin sealing body 6 having a rectangular planar shape was simultaneously molded on the front and back of the metal plate 1 by one mold. FIG. 2 is a cross-sectional view of a part after the forming process. In the case of this example, as can be seen from the formation state of the plating layer shown in FIG. Since 40 plating layers are divided into two regions and formed, four such resin sealing bodies 6 are formed on the front and back sides. As shown in FIG. 2, each resin sealing body 6 is formed with a flange portion 6 a at a part of its peripheral portion, and a space portion is formed between the flange portion 6 a and the metal plate 1. Was formed.

尚、本実施例の場合には、片面ごとに、８０個分のめっき層を二つの領域に分けて形成しているが、二つの領域の間にめっき層を形成するようにしても差し支えなく、そのようにした場合には、樹脂封止体６は片面あたり一つとなる。そして、その場合には、金型によって、フランジ部６ａを、樹脂封止体６の全周にわたって形成することも考えられる。また、本実施例のように、複数のめっき層を二つの領域に分けて形成するのではなく、金属板１の長さや、半導体素子４の大きさ・数量などに応じて、三つ以上の領域に形成することも考えられる。   In the case of this embodiment, 80 plating layers are formed in two regions for each side, but a plating layer may be formed between the two regions. In such a case, the resin sealing body 6 is one per side. In that case, it is also conceivable to form the flange portion 6a over the entire circumference of the resin sealing body 6 by a mold. In addition, as in the present embodiment, a plurality of plating layers are not formed in two regions, but three or more depending on the length of the metal plate 1 and the size / quantity of the semiconductor element 4. It is also possible to form the region.

このようにして、図２に示された状態が得られた後、金属板１とフランジ部６ａとの間の空間部に治具を挿入してフランジ部６ａに引っ掛け、樹脂封止体６を金属板１から引き剥がした。それによって、各めっき層も、半導体素子４を封止した樹脂封止体６と共に金属板１から剥離されたが、本実施例は、金属板１にステンレス鋼を用いているため、めっき層との密着性が弱く、容易に剥離することができた。図３は、そのようにして、金属板１の両面で二つの樹脂封止体６が同時に引き剥がされるときを示したものである。その後、引き剥がされた樹脂封止体６をダイシングソーで切断することによって、個々の半導体装置を得た。そして、端子部のめっき面のはんだ濡れ性を溶融はんだで確認したところ、金めっき面の全域にわたってきれいにはんだ付けができた。   In this way, after the state shown in FIG. 2 is obtained, a jig is inserted into the space between the metal plate 1 and the flange portion 6a and hooked on the flange portion 6a. The metal plate 1 was peeled off. As a result, each plating layer was also peeled off from the metal plate 1 together with the resin sealing body 6 that sealed the semiconductor element 4. However, in this example, since the stainless steel is used for the metal plate 1, The adhesion was weak and could be peeled off easily. FIG. 3 shows a case where the two resin sealing bodies 6 are peeled off simultaneously on both surfaces of the metal plate 1 as described above. Then, the individual semiconductor device was obtained by cut | disconnecting the peeled resin sealing body 6 with a dicing saw. And when the solder wettability of the plating surface of a terminal part was confirmed with the molten solder, it was able to be soldered cleanly over the entire area of the gold plating surface.

尚、実施例は、１枚の半導体装置製造用基板の両面に半導体素子４を組み付ける場合で説明したが、半導体装置の製造に際してはこのような方法に限定されず、片面だけに半導体素子４を組み付けるようにしても構わない。しかしながら、金属板１は、一度使用すると、上記の剥離工程において反りが生じてしまい、再利用ができなくなるので、実施例のように両面に半導体素子４を組み付けるようにした方が、はるかに生産性が向上する。   The embodiment has been described in the case where the semiconductor elements 4 are assembled on both surfaces of a single semiconductor device manufacturing substrate. However, the manufacturing method of the semiconductor device is not limited to such a method, and the semiconductor elements 4 are formed only on one surface. You may make it assemble. However, once the metal plate 1 is used, warping occurs in the above-described peeling process and it cannot be reused. Therefore, it is much more productive to assemble the semiconductor element 4 on both sides as in the embodiment. Improves.

実施例における半導体装置製造用基板を示した平面図である。It is the top view which showed the board | substrate for semiconductor device manufacture in an Example. 半導体装置製造用基板の両面に樹脂封止体が成形された状態を示す部分断面 図である。It is a fragmentary sectional view which shows the state by which the resin sealing body was shape | molded on both surfaces of the board | substrate for semiconductor device manufacture. 樹脂封止体と金属板が剥離されるときの状態を示す部分断面図である。It is a fragmentary sectional view which shows a state when a resin sealing body and a metal plate are peeled.

１ 金属板
２ パッド部
３ 端子部
４ 半導体素子
５ ボンディングワイヤ
６ 樹脂封止体
６ａ フランジ部 DESCRIPTION OF SYMBOLS 1 Metal plate 2 Pad part 3 Terminal part 4 Semiconductor element 5 Bonding wire 6 Resin sealing body 6a Flange part

Claims (5)

金属板の表面に複数個の半導体装置用の端子部などをめっき層として形成しており、半導体装置の製造に際しては、複数の半導体素子を搭載してそれらを樹脂封止体で封止した後、前記めっき層を前記樹脂封止体に残して金属板だけが剥離されることになる半導体装置製造用基板であって、前記金属板には、個々の半導体装置用の前記めっき層が、両面に形成されていることを特徴とする半導体装置製造用基板。   A plurality of terminal portions for a semiconductor device are formed as a plating layer on the surface of the metal plate. When manufacturing a semiconductor device, a plurality of semiconductor elements are mounted and sealed with a resin sealing body. , A substrate for manufacturing a semiconductor device in which only the metal plate is peeled while leaving the plating layer on the resin-encapsulated body, and the plating layer for each semiconductor device is provided on both sides of the metal plate. A substrate for manufacturing a semiconductor device, characterized in that the substrate is formed. 前記金属板は、両面の各々に、個々の半導体装置用の前記めっき層を、複数の領域に分けて各々マトリックス状に形成していることを特徴とする請求項１に記載の半導体装置製造用基板。   2. The semiconductor device manufacturing method according to claim 1, wherein the metal plate is formed on each of both surfaces thereof with the plating layer for an individual semiconductor device divided into a plurality of regions in a matrix shape. substrate. 前記めっき層は、１０〜１００μｍの厚さに形成されていることを特徴とする請求項１又は２に記載の半導体装置製造用基板。   The substrate for manufacturing a semiconductor device according to claim 1, wherein the plating layer is formed to a thickness of 10 to 100 μm. 前記めっき層は、金めっき層を含む多層のめっき層であることを特徴とする請求項１乃至３のいずれかに記載の半導体装置製造用基板。   4. The semiconductor device manufacturing substrate according to claim 1, wherein the plating layer is a multilayer plating layer including a gold plating layer. 前記金属板は、ステンレス鋼であることを特徴とする請求項１乃至４のいずれかに記載の半導体装置製造用基板。   The semiconductor device manufacturing substrate according to claim 1, wherein the metal plate is stainless steel.
JP2012022143A 2012-02-03 2012-02-03 Substrate for manufacturing semiconductor device Pending JP2012084938A (en)

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JP2002226797A (en) * 2001-01-29 2002-08-14 Nitto Denko Corp Heat resistant adhesive tape and method for manufacturing semiconductor device
JP2006196922A (en) * 2000-04-25 2006-07-27 Kyushu Hitachi Maxell Ltd Semiconductor device, manufacturing method thereof, and electrodeposition frame
JP2006222164A (en) * 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2007129068A (en) * 2005-11-04 2007-05-24 Toshiba Corp Semiconductor device and its manufacturing method therefor, substrate used for manufacturing semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001067513A1 (en) * 2000-03-09 2001-09-13 Fujitsu Limited Semiconductor device, method of manufacturing semiconductor device, lead frame, method of manufacturing lead frame, and method of manufacturing semiconductor device with lead frame
JP2006196922A (en) * 2000-04-25 2006-07-27 Kyushu Hitachi Maxell Ltd Semiconductor device, manufacturing method thereof, and electrodeposition frame
JP2002226797A (en) * 2001-01-29 2002-08-14 Nitto Denko Corp Heat resistant adhesive tape and method for manufacturing semiconductor device
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