JP2012084622A - Semiconductor light-emitting element manufacturing method - Google Patents

Semiconductor light-emitting element manufacturing method Download PDF

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JP2012084622A
JP2012084622A JP2010228164A JP2010228164A JP2012084622A JP 2012084622 A JP2012084622 A JP 2012084622A JP 2010228164 A JP2010228164 A JP 2010228164A JP 2010228164 A JP2010228164 A JP 2010228164A JP 2012084622 A JP2012084622 A JP 2012084622A
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wafer
layer
led elements
led
peak wavelength
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Megumi Horiuchi
恵 堀内
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Citizen Holdings Co Ltd
Citizen Electronics Co Ltd
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Citizen Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problem that when applying a manufacturing method in which a fluorescent substance layer containing a fluorescent substance having a conversion efficiency greatly varying at around a peak wavelength of light irradiated from a semiconductor layer of an LED element is formed on a wafer on which a number of LED elements are disposed and the wafer is singulated into pieces of LED elements, luminous colors of the individual LED elements vary because peak wavelengths of the individual LED elements take different values within a range of a few nanometers.SOLUTION: A semiconductor light-emitting element manufacturing method comprises the steps of (a) preparing a wafer provided with a light-emitting layer and a connection electrode on one face, (b) obtaining a peak wavelength distribution of the wafer and forming phosphor on the other face of the wafer by adjusting a thickness based on the peak wavelength distribution, and (c) singulating the wafer into pieces of LED elements by cutting the wafer.

Description

本発明は、上面にだけ蛍光体層を備えるフリップチップ用の半導体発光素子の製造方法に関する。   The present invention relates to a method of manufacturing a flip-chip semiconductor light emitting device having a phosphor layer only on an upper surface.

半導体発光装置(以後とくに断らない限りLED装置と呼ぶ)の回路基板に実装する半導体発光素子(以後とくに断らない限りLED素子と呼ぶ)のなかで、透明基板の一方の面に発光層と接続用電極を備え、他方の面に蛍光体層が形成されたLED素子がある(例えば特許文献1の図4)。   Among semiconductor light emitting devices (hereinafter referred to as LED elements unless otherwise specified) mounted on a circuit board of a semiconductor light emitting device (hereinafter referred to as an LED device unless otherwise specified), a light emitting layer is connected to one surface of a transparent substrate. There is an LED element including an electrode and having a phosphor layer formed on the other surface (for example, FIG. 4 of Patent Document 1).

特許文献1の図4を図5に示す。図5はチップ2(LED素子)の射出面上に蛍光層3を備える従来例の発光ダイオード1(LED装置)の断面図である。リードフレーム4上にチップ2がフリップチップ実装され、チップ2は透明樹脂からなるケース5で封止されている。   FIG. 5 of Patent Document 1 is shown in FIG. FIG. 5 is a cross-sectional view of a conventional light emitting diode 1 (LED device) having a fluorescent layer 3 on the emission surface of a chip 2 (LED element). The chip 2 is flip-chip mounted on the lead frame 4, and the chip 2 is sealed with a case 5 made of a transparent resin.

このようなLED素子の製造方法は、例えば特許文献1の図1〜図3に示されている。特許文献1の図1には、ウエハー2Aの一方の面においてP層の拡散が行われ、発光部2aが形成されるとともに正電極2bと負電極2cが設けられた様子が示されている。図2では、ウエハー2Aに蛍光物質3aを含有する蛍光層3を成膜する工程が示されている。蛍光層3は前述の一方の面とは表裏関係となる他方の面、即ち、光の射出面2dに設けられている。蛍光層3を設ける手段としては、スプレー塗装、スピンコート、若しくは真空蒸着などでよい。最後に蛍光層3が形成されたウエハー2Aを切断し個別のチップ2を得る(図3)。   A method for manufacturing such an LED element is shown in FIGS. FIG. 1 of Patent Document 1 shows a state in which the P layer is diffused on one surface of the wafer 2 </ b> A, the light emitting portion 2 a is formed, and the positive electrode 2 b and the negative electrode 2 c are provided. FIG. 2 shows a process of forming the fluorescent layer 3 containing the fluorescent material 3a on the wafer 2A. The fluorescent layer 3 is provided on the other surface, ie, the light exit surface 2d, which has a front-back relationship with the one surface described above. Means for providing the fluorescent layer 3 may be spray coating, spin coating, vacuum deposition, or the like. Finally, the wafer 2A on which the fluorescent layer 3 is formed is cut to obtain individual chips 2 (FIG. 3).

特開平10−209505号公報 (図1〜図4)JP-A-10-209505 (FIGS. 1 to 4)

LED素子の半導体層が発する光のピーク波長(以後とくに断らない限り「ピーク波長」はLED素子の半導体層が発する光のピーク波長を示す)付近で変換効率が大きく変動する蛍光体がある。多数のLED素子が配列するウェハー上では、個々のLED素子のピーク波長が数nmの範囲で異なった値をとるため、厚さが均一な蛍光体層をウェハーに形成すると、個々のLED素子間で発光色がばらつくという課題が生じる。   There are phosphors whose conversion efficiency varies greatly in the vicinity of the peak wavelength of light emitted from the semiconductor layer of the LED element (hereinafter, unless otherwise specified, “peak wavelength” indicates the peak wavelength of light emitted from the semiconductor layer of the LED element). On a wafer on which a large number of LED elements are arranged, the peak wavelength of each LED element takes a different value within a range of several nm. Therefore, when a phosphor layer having a uniform thickness is formed on a wafer, the distance between the individual LED elements is reduced. This causes the problem that the emission color varies.

そこで本発明は、この課題を解決するため、LED素子に含まれる半導体層が配列したウェハーに蛍光体層を形成する際、蛍光体層に含まれる蛍光体がピーク波長の影響を受けやすい場合であっても、LED素子間の色度ばらつきを抑えることが可能な半導体発光素子の製造方法を提供することを目的とする。   Therefore, in order to solve this problem, the present invention provides a case where the phosphor contained in the phosphor layer is easily affected by the peak wavelength when the phosphor layer is formed on the wafer on which the semiconductor layers contained in the LED element are arranged. Even if it exists, it aims at providing the manufacturing method of the semiconductor light-emitting element which can suppress the chromaticity dispersion | variation between LED elements.

上記課題を解決するため本発明の半導体発光素子の製造方法は、一方の面に発光層と接続電極を備え、他方の面に蛍光体層を有するウェハーを個片化して得られる半導体発光素子の製造方法において、
前記蛍光体層を形成する前のウェハーを準備するウェハー準備工程と、
該ウェハーの特性分布を得る特性測定工程と、
該ウェハーの前記他方の面に前記特性分布にもとづいて厚さを調整しながら蛍光体を形成する蛍光体層形成工程と、
該ウェハーを切断して前記半導体発光素子を個片化する個片化工程と
を備えることを特徴とする。
In order to solve the above problems, a method for manufacturing a semiconductor light-emitting device according to the present invention is a semiconductor light-emitting device obtained by separating a wafer having a light-emitting layer and a connection electrode on one surface and a phosphor layer on the other surface. In the manufacturing method,
A wafer preparation step of preparing a wafer before forming the phosphor layer;
A characteristic measuring step for obtaining a characteristic distribution of the wafer;
A phosphor layer forming step of forming a phosphor on the other surface of the wafer while adjusting the thickness based on the characteristic distribution;
And a singulation step of cutting the wafer into pieces of the semiconductor light emitting elements.

ウェハーの面内において各LED素子領域のピーク波長は滑らかに分布することが知られている。これは半導体層を形成する際、エピタキシャル成長がウェハー全体に亘って均一とはいえないまでも急激には変化しないからである。本発明ではピーク波長の滑らかな分布に合うように蛍光体層の厚さを調整しているので、ウェハーのどの部分から個片化したかに係わらず個別のLED光素子の色度のばらつきを狭い範囲に納めることが可能となる。以上、本発明の半導体発光素子の製造方法は、LED素子に含まれる半導体層が配列したウェハーに蛍光体層を形成する際、蛍光体層に含まれる蛍光体がLED素子のピーク波長の影響を受けやすい場合であっても、LED素子間の色度ばらつきを抑えることが可能となる。   It is known that the peak wavelength of each LED element region is smoothly distributed in the plane of the wafer. This is because when the semiconductor layer is formed, the epitaxial growth does not change abruptly even if it is not uniform over the entire wafer. In the present invention, since the thickness of the phosphor layer is adjusted to match the smooth distribution of the peak wavelength, the chromaticity variation of individual LED light elements can be reduced regardless of where the wafer is separated. It is possible to fit in a narrow range. As described above, in the method for manufacturing a semiconductor light emitting device of the present invention, when the phosphor layer is formed on the wafer on which the semiconductor layers included in the LED element are arranged, the phosphor included in the phosphor layer affects the peak wavelength of the LED element. Even if it is easy to receive, it becomes possible to suppress the chromaticity dispersion | variation between LED elements.

本発明の実施形態で製造するLED素子を備えたLED装置の断面図。Sectional drawing of the LED apparatus provided with the LED element manufactured by embodiment of this invention. 本発明の実施形態で用いるウェハーの特性分布図。The characteristic distribution map of the wafer used in the embodiment of the present invention. 本発明の実施形態におけるLED素子の製造方法の説明図。Explanatory drawing of the manufacturing method of the LED element in embodiment of this invention. 本発明の実施形態におけるLED装置の製造方法の説明図。Explanatory drawing of the manufacturing method of the LED apparatus in embodiment of this invention. 従来のLED装置の断面図。Sectional drawing of the conventional LED device.

以下、添付図1〜4を参照しながら本発明の好適な実施形態について詳細に説明する。なお図面の説明において、同一または相当要素には同一の符号を付し、重複する説明は省略する。また説明のため部材の縮尺は適宜変更している。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. In the description of the drawings, the same or equivalent elements will be denoted by the same reference numerals, and redundant description will be omitted. For the sake of explanation, the scale of the members is changed as appropriate.

図1は本実施形態の方法で製造したLED素子21(半導体発光素子)を回路基板22に実装したLED装置10(半導体発光装置)の断面図である。LED装置10は、回路基板22上にLED素子21をフリップチップ実装している。回路基板22において板材20上面に形成された電極17はスルーホール18を介して板材20の下面に形成された電極19と接続している。LED素子21はサファイア基板12(透明基板)の下面に半導体層13、上面に蛍光体層15が形成されている。半導体層13は、発光層を備えたダイオードであり、付着している2個のバンプ14はそれぞれアノードとカソードに相当する。バンプ14は金属共晶接合により電極17と接続している。回路基板22上面及びLED素子21は樹脂層11で封止されている。   FIG. 1 is a cross-sectional view of an LED device 10 (semiconductor light emitting device) in which an LED element 21 (semiconductor light emitting device) manufactured by the method of this embodiment is mounted on a circuit board 22. In the LED device 10, an LED element 21 is flip-chip mounted on a circuit board 22. The electrode 17 formed on the upper surface of the plate material 20 in the circuit board 22 is connected to the electrode 19 formed on the lower surface of the plate material 20 through the through hole 18. In the LED element 21, a semiconductor layer 13 is formed on the lower surface of the sapphire substrate 12 (transparent substrate), and a phosphor layer 15 is formed on the upper surface. The semiconductor layer 13 is a diode provided with a light emitting layer, and the two attached bumps 14 correspond to an anode and a cathode, respectively. The bumps 14 are connected to the electrodes 17 by metal eutectic bonding. The upper surface of the circuit board 22 and the LED element 21 are sealed with the resin layer 11.

LED素子21の半導体層13は青色発光ダイオードであり、蛍光体層15は珪酸塩系の緑色蛍光体と窒化物系の赤色蛍光体を含んでいる。半導体層13から出射した青色光により蛍光層15は緑色光及び赤色光を発光する。この結果、半導体層13の青色光と蛍光体層15からの緑色光、赤色光が混色し白色光が得られる。この緑色蛍光体は青色光のピーク波長(正確には発光スペクトル)で発光効率が大きく変化する。このためピーク波長に応じて緑色蛍光体の量(蛍光体層15の厚さ)が微調されている。   The semiconductor layer 13 of the LED element 21 is a blue light emitting diode, and the phosphor layer 15 includes a silicate green phosphor and a nitride red phosphor. The blue light emitted from the semiconductor layer 13 causes the fluorescent layer 15 to emit green light and red light. As a result, the blue light of the semiconductor layer 13 and the green light and red light from the phosphor layer 15 are mixed to obtain white light. The emission efficiency of the green phosphor changes greatly at the peak wavelength of blue light (exactly, the emission spectrum). For this reason, the amount of the green phosphor (the thickness of the phosphor layer 15) is finely adjusted according to the peak wavelength.

樹脂層11は散乱材等を含む透明なシリコーン樹脂からなり厚さが数100μmである。蛍光体層15は厚さが100μm〜150μmの範囲で微調されている。サファイア基板12は厚さが80〜120μmであるが、さらに薄くすればサファイア基板12の側面から出射する光が減り、上方へ向かう光が増え波長変換効率や発光効率が良くなる。半導体層13は厚さが7μm程度であり、バンプ14は電解メッキ法で形成すれば厚さが10
〜30μm程度になる。板材20は、厚さが数100μmで、熱伝導性を考慮して樹脂、セラミック、金属から選ぶ。電極17,19は、例えば20μm程度の銅箔上にニッケル層と金層を積層したものである。板材20が樹脂の場合、スルーホール18は熱伝導性をよくするため内部を金属ペーストで埋めておくと良い。
The resin layer 11 is made of a transparent silicone resin containing a scattering material and has a thickness of several hundreds of μm. The phosphor layer 15 is finely tuned in the range of 100 μm to 150 μm. The sapphire substrate 12 has a thickness of 80 to 120 μm. However, if the sapphire substrate 12 is further thinned, the light emitted from the side surface of the sapphire substrate 12 decreases, the light traveling upward increases, and the wavelength conversion efficiency and the light emission efficiency are improved. The semiconductor layer 13 has a thickness of about 7 μm, and the bump 14 has a thickness of 10 if formed by electrolytic plating.
˜30 μm. The plate member 20 has a thickness of several hundreds of micrometers and is selected from resin, ceramic, and metal in consideration of thermal conductivity. The electrodes 17 and 19 are formed by laminating a nickel layer and a gold layer on a copper foil of about 20 μm, for example. When the plate material 20 is resin, the through hole 18 is preferably filled with a metal paste to improve thermal conductivity.

図2は本実施形態で用いる多数のLED素子21(蛍光体層15は備えていない)が配列したウェハー23のピーク波長分布を示す特性分布図である。ウェハー23の外周部にある点線は波長がλ1となるLED素子21をつなぎ合わせたものであり、等高線のようなものである。同様にその内側の点線及び最も内側の点線は、それぞれ波長がλ2,λ3となるLED素子21をつなぎ合わせたものである。一枚のウェハーではピーク波長の広がりが概ね数nmの範囲になるので、例えば波長λ1は445nm、波長λ2は446nm、波長λ3は447nmという値になる。また波長λ1と波長λ2の間などでは波長が滑らかに変化する分布となる。   FIG. 2 is a characteristic distribution diagram showing a peak wavelength distribution of the wafer 23 in which a large number of LED elements 21 (not provided with the phosphor layer 15) used in the present embodiment are arranged. A dotted line on the outer peripheral portion of the wafer 23 is obtained by connecting the LED elements 21 having a wavelength of λ1, and is like a contour line. Similarly, the inner dotted line and the innermost dotted line are obtained by connecting the LED elements 21 having wavelengths of λ2 and λ3, respectively. Since the spread of the peak wavelength is approximately in the range of several nm in one wafer, for example, the wavelength λ1 is 445 nm, the wavelength λ2 is 446 nm, and the wavelength λ3 is 447 nm. Also, a distribution in which the wavelength changes smoothly between the wavelength λ1 and the wavelength λ2, for example.

図3はLED素子21を製造する工程の説明図である。(a)は蛍光体層15を形成する前のウェハー23を準備するウェハー準備工程である。サファイア基板12を基部とするウェハー23の下面には複数の半導体層13が形成され、各LED素子領域の半導体層13にはバンプ14が付着している。なおウェハー23の上面には蛍光体を塗布するためのノズル31を図示した。またウェハー23の状態で予め各LED素子21に含まれる半導体層13は、リークなど良否判定に係わる検査が実施されており、このなかでのピーク波長などの発光特性も測定される。すなわちこの検査工程(特性測定工程)においてウェハー23の特性分布を測定する。   FIG. 3 is an explanatory diagram of a process for manufacturing the LED element 21. (A) is a wafer preparation process for preparing the wafer 23 before forming the phosphor layer 15. A plurality of semiconductor layers 13 are formed on the lower surface of the wafer 23 based on the sapphire substrate 12, and bumps 14 are attached to the semiconductor layers 13 in each LED element region. A nozzle 31 for applying a phosphor is shown on the upper surface of the wafer 23. In addition, the semiconductor layer 13 included in each LED element 21 in the state of the wafer 23 is inspected for quality determination such as leakage, and the light emission characteristics such as the peak wavelength are also measured. That is, the characteristic distribution of the wafer 23 is measured in this inspection process (characteristic measurement process).

(b)はウェハー23の上面に前述の特性分布にもとづいて塗布量(厚さ)を調整しながら蛍光体を塗布(形成)する蛍光体層形成工程である。蛍光体層15は図の右から3番目の半導体層13上がもっとも厚くなっている。これは図2の波長λ3程度のLED素子21が存在する領域に対応する。つまりLED素子21のピーク波長が長くなると緑色蛍光体の発光効率が低下するため、これを補償するため蛍光体層15を厚くしている。蛍光体層15の厚さ調整はノズル31から吐出するインク(蛍光体を含有する)の量で決まり、前述のようにピーク波長が滑らかに分布することに対応して蛍光体層15の厚みも徐々に変化している。吐出量の制御は、インクジェット印刷法に準じる(例えば特開平11−46019号公報参照)。蛍光体層15はLED素子21を回路基板22に実装するときに加わる温度(約300℃)に耐えられる必要があるので、オルガノポリシロキサン等の焼結するとガラス質(無機質)になり前述の高温に耐えられるバインダと、粒径が数μmの蛍光体と、触媒とを溶媒に混ぜたインクを使用する。インクを塗布したら150℃で焼結する。   (B) is a phosphor layer forming step of applying (forming) the phosphor on the upper surface of the wafer 23 while adjusting the coating amount (thickness) based on the above-described characteristic distribution. The phosphor layer 15 is thickest on the third semiconductor layer 13 from the right in the drawing. This corresponds to a region where the LED element 21 having a wavelength of about λ3 in FIG. 2 is present. That is, as the peak wavelength of the LED element 21 becomes longer, the luminous efficiency of the green phosphor decreases, and the phosphor layer 15 is made thicker to compensate for this. The thickness adjustment of the phosphor layer 15 is determined by the amount of ink (containing phosphor) ejected from the nozzle 31, and the thickness of the phosphor layer 15 is also corresponding to the smooth distribution of the peak wavelength as described above. It is gradually changing. The discharge amount is controlled in accordance with the ink jet printing method (see, for example, Japanese Patent Laid-Open No. 11-46019). Since the phosphor layer 15 needs to be able to withstand the temperature (about 300 ° C.) applied when the LED element 21 is mounted on the circuit board 22, it becomes glassy (inorganic) when organopolysiloxane or the like is sintered. Ink in which a binder that can withstand the above, a phosphor having a particle size of several μm, and a catalyst are mixed in a solvent is used. When the ink is applied, it is sintered at 150 ° C.

(c)はウェハー23を切断してLED素子21(以降、LED素子21は蛍光体層15を備えるものとなる)を個片化する個片化工程である。ウェハー23をダイシング用シートに貼りつけダイシング装置で切断し、このダイシング用シートを拡張すると各LED素子21がピックアップ出来るようになる。各LED素子21はピーク波長に合わせて蛍光体層15の厚さが調整されているので色度ばらつきが小さくなっている。   (C) is a singulation process for cutting the wafer 23 to separate the LED elements 21 (hereinafter, the LED elements 21 will be provided with the phosphor layer 15). When the wafer 23 is attached to a dicing sheet, cut by a dicing apparatus, and the dicing sheet is expanded, each LED element 21 can be picked up. Each LED element 21 has a small chromaticity variation because the thickness of the phosphor layer 15 is adjusted in accordance with the peak wavelength.

図4はLED素子21を回路基板22に実装したLED装置10の製造方法の説明図である。(a)は回路基板22が連結した集合基板22aにLED素子21をフリップチップ実装する実装工程である。集合基板22aは大判の板材20(図1参照)に多数の回路基板領域を備え、各回路基板領域には電極17(図1参照)、スルーホール18(図1参照)、及び電極19(図1参照)が形成されている。LED素子21は、一個ずつ集合基板22a上に配置しても良いし、予め集合基板22aの電極ピッチにあわせて粘着シート上にLED素子21を配列させ、この粘着シートを集合基板22aに重ね、多数のLED
素子21を一括して集合基板22aに配置しても良い。LED素子21の配置が完了したらLED素子21を加圧及び加熱し電極17に接合する。
FIG. 4 is an explanatory diagram of a manufacturing method of the LED device 10 in which the LED element 21 is mounted on the circuit board 22. (A) is a mounting process in which the LED elements 21 are flip-chip mounted on the collective substrate 22a connected to the circuit substrate 22. The collective substrate 22a is provided with a large number of circuit board regions on a large plate member 20 (see FIG. 1). Each circuit board region has an electrode 17 (see FIG. 1), a through hole 18 (see FIG. 1), and an electrode 19 (see FIG. 1). 1) is formed. The LED elements 21 may be arranged on the collective substrate 22a one by one, or the LED elements 21 are arranged on the adhesive sheet in advance according to the electrode pitch of the collective substrate 22a, and this adhesive sheet is stacked on the collective substrate 22a. Many LEDs
The elements 21 may be collectively arranged on the collective substrate 22a. When the placement of the LED element 21 is completed, the LED element 21 is pressurized and heated to be joined to the electrode 17.

(b)は透明樹脂を塗布する透明樹脂塗布工程である。シリコーン樹脂からなる樹脂層11を塗布したら150℃程度で加熱硬化させる。(c)は集合基板22aからLED装置10を単個に分離するLED装置の個片化工程である。集合基板22aをダイシング装置により切断しLED装置10を個片化する。   (B) is a transparent resin coating step of coating a transparent resin. When the resin layer 11 made of silicone resin is applied, it is cured by heating at about 150 ° C. (C) is an LED device singulation process for separating the LED device 10 into single pieces from the collective substrate 22a. The collective substrate 22a is cut by a dicing device to divide the LED device 10 into individual pieces.

本実施形態において蛍光体層形成工程では塗布により蛍光体層15を形成していた。蛍光体層の形成方法としては、いったん平坦で厚めに蛍光体層を形成し、この蛍光体層を研磨若しくは研削により厚さを調整しても良い。   In the present embodiment, the phosphor layer 15 is formed by coating in the phosphor layer forming step. As a method for forming the phosphor layer, the phosphor layer may be once formed flat and thick, and the thickness of the phosphor layer may be adjusted by polishing or grinding.

10…LED装置(半導体発光装置)、
11…樹脂層、
12…サファイア基板(透明基板)、
13…半導体層、
14…バンプ、
15…蛍光体層、
17,19…電極、
18…スルーホール、
20…板材、
21…LED素子(半導体発光素子)、
22…回路基板、
22a…集合基板、
23…ウェハー、
31…ノズル。
10 ... LED device (semiconductor light-emitting device),
11 ... resin layer,
12 ... Sapphire substrate (transparent substrate),
13 ... semiconductor layer,
14 ... Bump,
15 ... phosphor layer,
17, 19 ... electrodes,
18 ... Through hole,
20 ... plate material,
21 ... LED element (semiconductor light emitting element),
22 ... circuit board,
22a ... collective board,
23 ... wafer,
31 ... Nozzle.

Claims (1)

一方の面に発光層と接続電極を備え、他方の面に蛍光体層を有するウェハーを個片化して得られる半導体発光素子の製造方法において、
前記蛍光体層を形成する前のウェハーを準備するウェハー準備工程と、
該ウェハーの特性分布を得る特性測定工程と、
該ウェハーの前記他方の面に前記特性分布にもとづいて厚さを調整しながら蛍光体を形成する蛍光体層形成工程と、
該ウェハーを切断して前記半導体発光素子を個片化する個片化工程と
を備えることを特徴とする半導体発光素子の製造方法。
In a method for manufacturing a semiconductor light emitting device obtained by separating a wafer having a light emitting layer and a connection electrode on one surface and a phosphor layer on the other surface,
A wafer preparation step of preparing a wafer before forming the phosphor layer;
A characteristic measuring step for obtaining a characteristic distribution of the wafer;
A phosphor layer forming step of forming a phosphor on the other surface of the wafer while adjusting the thickness based on the characteristic distribution;
A method for manufacturing a semiconductor light emitting device, comprising: a step of cutting the wafer into pieces to separate the semiconductor light emitting devices.
JP2010228164A 2010-10-08 2010-10-08 Semiconductor light-emitting element manufacturing method Pending JP2012084622A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012222320A (en) * 2011-04-14 2012-11-12 Nitto Denko Corp Manufacturing method of light emitting element transfer sheet, manufacturing method of light emitting device, the light emitting element transfer sheet, and the light emitting device
CN111628062A (en) * 2013-04-11 2020-09-04 亮锐控股有限公司 Top-emitting semiconductor light-emitting device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012222320A (en) * 2011-04-14 2012-11-12 Nitto Denko Corp Manufacturing method of light emitting element transfer sheet, manufacturing method of light emitting device, the light emitting element transfer sheet, and the light emitting device
US8877528B2 (en) 2011-04-14 2014-11-04 Nitto Denko Corporation Producing method of light emitting element transfer sheet, producing method of light emitting device, light emitting element transfer sheet, and light emitting device
CN111628062A (en) * 2013-04-11 2020-09-04 亮锐控股有限公司 Top-emitting semiconductor light-emitting device

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